net: stmmac: Calculate CDC error only once
The clock domain crossing error (CDC) is calculated at every fetch of Tx or Rx timestamps. It includes a division. Especially on arm32 based systems it is expensive. It also requires two conditionals in the hotpath. Add a compensation value cache to struct plat_stmmacenet_data and subtract it unconditionally in the RX/TX functions which spares the conditionals. The value is initialized to 0 and if supported calculated in the PTP initialization code. Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Link: https://lore.kernel.org/r/20211122111931.135135-1-kurt@linutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -511,14 +511,6 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
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return true;
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}
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static inline u32 stmmac_cdc_adjust(struct stmmac_priv *priv)
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{
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/* Correct the clk domain crossing(CDC) error */
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if (priv->plat->has_gmac4 && priv->plat->clk_ptp_rate)
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return (2 * NSEC_PER_SEC) / priv->plat->clk_ptp_rate;
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return 0;
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}
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/* stmmac_get_tx_hwtstamp - get HW TX timestamps
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* @priv: driver private structure
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* @p : descriptor pointer
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@ -550,7 +542,7 @@ static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv,
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}
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if (found) {
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ns -= stmmac_cdc_adjust(priv);
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ns -= priv->plat->cdc_error_adj;
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memset(&shhwtstamp, 0, sizeof(struct skb_shared_hwtstamps));
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shhwtstamp.hwtstamp = ns_to_ktime(ns);
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@ -587,7 +579,7 @@ static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *p,
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if (stmmac_get_rx_timestamp_status(priv, p, np, priv->adv_ts)) {
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stmmac_get_timestamp(priv, desc, priv->adv_ts, &ns);
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ns -= stmmac_cdc_adjust(priv);
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ns -= priv->plat->cdc_error_adj;
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netdev_dbg(priv->dev, "get valid RX hw timestamp %llu\n", ns);
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shhwtstamp = skb_hwtstamps(skb);
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@ -309,6 +309,11 @@ void stmmac_ptp_register(struct stmmac_priv *priv)
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if (priv->plat->ptp_max_adj)
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stmmac_ptp_clock_ops.max_adj = priv->plat->ptp_max_adj;
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/* Calculate the clock domain crossing (CDC) error if necessary */
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priv->plat->cdc_error_adj = 0;
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if (priv->plat->has_gmac4 && priv->plat->clk_ptp_rate)
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priv->plat->cdc_error_adj = (2 * NSEC_PER_SEC) / priv->plat->clk_ptp_rate;
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stmmac_ptp_clock_ops.n_per_out = priv->dma_cap.pps_out_num;
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stmmac_ptp_clock_ops.n_ext_ts = priv->dma_cap.aux_snapshot_n;
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@ -241,6 +241,7 @@ struct plat_stmmacenet_data {
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unsigned int clk_ref_rate;
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unsigned int mult_fact_100ns;
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s32 ptp_max_adj;
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u32 cdc_error_adj;
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struct reset_control *stmmac_rst;
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struct reset_control *stmmac_ahb_rst;
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struct stmmac_axi *axi;
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