drm/i915: Start using comparative INTEL_PCH_TYPE
In order to make it easier to bring up new platforms without having to take care about all corner cases that was previously taken care for previous platforms we already use comparative INTEL_GEN statements. Let's start doing the same with PCH. The only caveats are: - less-than comparisons need to be avoided or done with attention and check > PCH_NONE as well. - It is not necessarily a chronological order, but a matter of south display compatibility/inheritance. v2: Rebased on top of Jani's clean-up which removed the need for less-than comparison Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190308214300.25057-3-rodrigo.vivi@intel.com
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@ -523,6 +523,12 @@ struct i915_psr {
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u16 su_x_granularity;
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};
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/*
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* Sorted by south display engine compatibility.
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* If the new PCH comes with a south display engine that is not
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* inherited from the latest item, please do not add it to the
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* end. Instead, add it right after its "parent" PCH.
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*/
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enum intel_pch {
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PCH_NOP = -1, /* PCH without south display */
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PCH_NONE = 0, /* No PCH present */
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@ -2831,9 +2831,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
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if (HAS_PCH_ICP(dev_priv))
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icp_irq_handler(dev_priv, iir);
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else if (HAS_PCH_SPT(dev_priv) ||
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HAS_PCH_KBP(dev_priv) ||
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HAS_PCH_CNP(dev_priv))
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else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
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spt_irq_handler(dev_priv, iir);
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else
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cpt_irq_handler(dev_priv, iir);
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@ -4621,8 +4619,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
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dev->driver->disable_vblank = gen8_disable_vblank;
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if (IS_GEN9_LP(dev_priv))
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dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
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else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv) ||
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HAS_PCH_CNP(dev_priv))
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else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
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dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
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else
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dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
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@ -2723,7 +2723,7 @@ static int g4x_hrawclk(struct drm_i915_private *dev_priv)
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*/
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void intel_update_rawclk(struct drm_i915_private *dev_priv)
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{
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if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv))
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if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
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dev_priv->rawclk_freq = cnp_rawclk(dev_priv);
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else if (HAS_PCH_SPLIT(dev_priv))
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dev_priv->rawclk_freq = pch_rawclk(dev_priv);
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@ -951,8 +951,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
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regs->pp_off = PP_OFF_DELAYS(pps_idx);
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/* Cycle delay moved from PP_DIVISOR to PP_CONTROL */
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if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) ||
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HAS_PCH_ICP(dev_priv))
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if (IS_GEN9_LP(dev_priv) || INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
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regs->pp_div = INVALID_MMIO_REG;
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else
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regs->pp_div = PP_DIVISOR(pps_idx);
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@ -1894,15 +1894,14 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
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panel->backlight.set = bxt_set_backlight;
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panel->backlight.get = bxt_get_backlight;
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panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
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} else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
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} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
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panel->backlight.setup = cnp_setup_backlight;
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panel->backlight.enable = cnp_enable_backlight;
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panel->backlight.disable = cnp_disable_backlight;
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panel->backlight.set = bxt_set_backlight;
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panel->backlight.get = bxt_get_backlight;
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panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
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} else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
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HAS_PCH_KBP(dev_priv)) {
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} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
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panel->backlight.setup = lpt_setup_backlight;
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panel->backlight.enable = lpt_enable_backlight;
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panel->backlight.disable = lpt_disable_backlight;
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