From 285e74ab4f94d921a56fcf66320b3cd65e35b6bc Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Tue, 14 Apr 2020 19:09:43 -0300 Subject: [PATCH 1/5] hwspinlock: Simplify Kconfig Every hwspinlock driver is expected to depend on the hwspinlock core, so it's possible to simplify the Kconfig, factoring out the HWSPINLOCK dependency. Reviewed-by: Baolin Wang Signed-off-by: Ezequiel Garcia Link: https://lore.kernel.org/r/20200414220943.6203-1-ezequiel@collabora.com Signed-off-by: Bjorn Andersson --- drivers/hwspinlock/Kconfig | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/hwspinlock/Kconfig b/drivers/hwspinlock/Kconfig index 826a1054100d..32cd26352f38 100644 --- a/drivers/hwspinlock/Kconfig +++ b/drivers/hwspinlock/Kconfig @@ -6,9 +6,10 @@ menuconfig HWSPINLOCK bool "Hardware Spinlock drivers" +if HWSPINLOCK + config HWSPINLOCK_OMAP tristate "OMAP Hardware Spinlock device" - depends on HWSPINLOCK depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 || COMPILE_TEST help Say y here to support the OMAP Hardware Spinlock device (firstly @@ -18,7 +19,6 @@ config HWSPINLOCK_OMAP config HWSPINLOCK_QCOM tristate "Qualcomm Hardware Spinlock device" - depends on HWSPINLOCK depends on ARCH_QCOM || COMPILE_TEST select MFD_SYSCON help @@ -30,7 +30,6 @@ config HWSPINLOCK_QCOM config HWSPINLOCK_SIRF tristate "SIRF Hardware Spinlock device" - depends on HWSPINLOCK depends on ARCH_SIRF || COMPILE_TEST help Say y here to support the SIRF Hardware Spinlock device, which @@ -43,7 +42,6 @@ config HWSPINLOCK_SIRF config HWSPINLOCK_SPRD tristate "SPRD Hardware Spinlock device" depends on ARCH_SPRD || COMPILE_TEST - depends on HWSPINLOCK help Say y here to support the SPRD Hardware Spinlock device. @@ -52,7 +50,6 @@ config HWSPINLOCK_SPRD config HWSPINLOCK_STM32 tristate "STM32 Hardware Spinlock device" depends on MACH_STM32MP157 || COMPILE_TEST - depends on HWSPINLOCK help Say y here to support the STM32 Hardware Spinlock device. @@ -60,7 +57,6 @@ config HWSPINLOCK_STM32 config HSEM_U8500 tristate "STE Hardware Semaphore functionality" - depends on HWSPINLOCK depends on ARCH_U8500 || COMPILE_TEST help Say y here to support the STE Hardware Semaphore functionality, which @@ -68,3 +64,5 @@ config HSEM_U8500 SoC. If unsure, say N. + +endif # HWSPINLOCK From a7541de9abed7cee7df0012214b1962e892885cc Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 22 Jun 2020 00:59:53 -0700 Subject: [PATCH 2/5] dt-bindings: hwlock: qcom: Migrate binding to YAML Migrate the Qualcomm TCSR mutex binding to YAML to allow validation. Reviewed-by: Vinod Koul Reviewed-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20200622075956.171058-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson --- .../bindings/hwlock/qcom-hwspinlock.txt | 39 -------------- .../bindings/hwlock/qcom-hwspinlock.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 39 deletions(-) delete mode 100644 Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt create mode 100644 Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt deleted file mode 100644 index 4563f524556b..000000000000 --- a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt +++ /dev/null @@ -1,39 +0,0 @@ -Qualcomm Hardware Mutex Block: - -The hardware block provides mutexes utilized between different processors on -the SoC as part of the communication protocol used by these processors. - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,sfpb-mutex", - "qcom,tcsr-mutex" - -- syscon: - Usage: required - Value type: - Definition: one cell containing: - syscon phandle - offset of the hwmutex block within the syscon - stride of the hwmutex registers - -- #hwlock-cells: - Usage: required - Value type: - Definition: must be 1, the specified cell represent the lock id - (hwlock standard property, see hwlock.txt) - -Example: - - tcsr_mutex_block: syscon@fd484000 { - compatible = "syscon"; - reg = <0xfd484000 0x2000>; - }; - - hwlock@fd484000 { - compatible = "qcom,tcsr-mutex"; - syscon = <&tcsr_mutex_block 0 0x80>; - - #hwlock-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml new file mode 100644 index 000000000000..71e63b52edd5 --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwlock/qcom-hwspinlock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Hardware Mutex Block + +maintainers: + - Bjorn Andersson + +description: + The hardware block provides mutexes utilized between different processors on + the SoC as part of the communication protocol used by these processors. + +properties: + compatible: + enum: + - qcom,sfpb-mutex + - qcom,tcsr-mutex + + '#hwlock-cells': + const: 1 + + syscon: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: + Should be a triple of phandle referencing the TCSR mutex syscon, offset + of first mutex within the syscon and stride between each mutex. + +required: + - compatible + - '#hwlock-cells' + - syscon + +additionalProperties: false + +examples: + - | + tcsr_mutex_block: syscon@fd484000 { + compatible = "syscon"; + reg = <0xfd484000 0x2000>; + }; + + hwlock { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_block 0 0x80>; + + #hwlock-cells = <1>; + }; +... From d6a9f0c8f635a9177e39db6386575bd6cdd55931 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 22 Jun 2020 00:59:54 -0700 Subject: [PATCH 3/5] dt-bindings: hwlock: qcom: Allow device on mmio bus In modern Qualcomm platforms the mutex region of the TCSR is forked off into its own block, all with a offset of 0 and stride of 4096, and in some of these platforms no other registers in this region is accessed from Linux. Update the binding to allow the hardware block to be described directly on the mmio bus, in addition to allowing the existing syscon based definition for backwards compatibility. Reviewed-by: Vinod Koul Reviewed-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20200622075956.171058-3-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson --- .../bindings/hwlock/qcom-hwspinlock.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml index 71e63b52edd5..88f975837588 100644 --- a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml +++ b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml @@ -19,6 +19,9 @@ properties: - qcom,sfpb-mutex - qcom,tcsr-mutex + reg: + maxItems: 1 + '#hwlock-cells': const: 1 @@ -31,7 +34,12 @@ properties: required: - compatible - '#hwlock-cells' - - syscon + +oneOf: + - required: + - reg + - required: + - syscon additionalProperties: false @@ -46,6 +54,12 @@ examples: compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x80>; + #hwlock-cells = <1>; + }; + - | + tcsr_mutex: hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x01f40000 0x40000>; #hwlock-cells = <1>; }; ... From 7a1e6fb1c606d414320b7498e7f8357d73c972e5 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 22 Jun 2020 00:59:55 -0700 Subject: [PATCH 4/5] hwspinlock: qcom: Allow mmio usage in addition to syscon In modern Qualcomm platforms the mutex region of the TCSR is forked off into its own block, all with a offset of 0 and stride of 4096, and in some of these platforms no other registers in this region is accessed from Linux. So add support for directly memory mapping this register space, to avoid the need to represent this block using a syscon. Reviewed-by: Baolin Wang Reviewed-by: Vinod Koul Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20200622075956.171058-4-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson --- drivers/hwspinlock/qcom_hwspinlock.c | 80 ++++++++++++++++++++-------- 1 file changed, 59 insertions(+), 21 deletions(-) diff --git a/drivers/hwspinlock/qcom_hwspinlock.c b/drivers/hwspinlock/qcom_hwspinlock.c index f0da544b14d2..364710966665 100644 --- a/drivers/hwspinlock/qcom_hwspinlock.c +++ b/drivers/hwspinlock/qcom_hwspinlock.c @@ -70,41 +70,79 @@ static const struct of_device_id qcom_hwspinlock_of_match[] = { }; MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match); +static struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev, + u32 *base, u32 *stride) +{ + struct device_node *syscon; + struct regmap *regmap; + int ret; + + syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); + if (!syscon) + return ERR_PTR(-ENODEV); + + regmap = syscon_node_to_regmap(syscon); + of_node_put(syscon); + if (IS_ERR(regmap)) + return regmap; + + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, base); + if (ret < 0) { + dev_err(&pdev->dev, "no offset in syscon\n"); + return ERR_PTR(-EINVAL); + } + + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, stride); + if (ret < 0) { + dev_err(&pdev->dev, "no stride syscon\n"); + return ERR_PTR(-EINVAL); + } + + return regmap; +} + +static const struct regmap_config tcsr_mutex_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = 0x40000, + .fast_io = true, +}; + +static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev, + u32 *offset, u32 *stride) +{ + struct device *dev = &pdev->dev; + void __iomem *base; + + /* All modern platform has offset 0 and stride of 4k */ + *offset = 0; + *stride = 0x1000; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return ERR_CAST(base); + + return devm_regmap_init_mmio(dev, base, &tcsr_mutex_config); +} + static int qcom_hwspinlock_probe(struct platform_device *pdev) { struct hwspinlock_device *bank; - struct device_node *syscon; struct reg_field field; struct regmap *regmap; size_t array_size; u32 stride; u32 base; - int ret; int i; - syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); - if (!syscon) { - dev_err(&pdev->dev, "no syscon property\n"); - return -ENODEV; - } + regmap = qcom_hwspinlock_probe_syscon(pdev, &base, &stride); + if (IS_ERR(regmap) && PTR_ERR(regmap) == -ENODEV) + regmap = qcom_hwspinlock_probe_mmio(pdev, &base, &stride); - regmap = syscon_node_to_regmap(syscon); - of_node_put(syscon); if (IS_ERR(regmap)) return PTR_ERR(regmap); - ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base); - if (ret < 0) { - dev_err(&pdev->dev, "no offset in syscon\n"); - return -EINVAL; - } - - ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride); - if (ret < 0) { - dev_err(&pdev->dev, "no stride syscon\n"); - return -EINVAL; - } - array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock); bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL); if (!bank) From 35efb0e1d5c60e334ea719586ff2509fde2e613b Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 28 Jul 2020 17:47:57 -0700 Subject: [PATCH 5/5] dt-bindings: hwlock: qcom: Remove invalid binding The Qualcomm hwlock is described in DeviceTree either directly on the mmio bus or split between a syscon and a mutex node, but as noted in [1] the latter is not valid DT, so remove any traces of this from the binding. [1] https://lore.kernel.org/r/CAL_JsqLa9GBtbgN6aL7AQ=A6V-YRtPgYqh6XgM2kpx532+r4Gg@mail.gmail.com/ Reviewed-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20200729004757.1901107-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson --- .../bindings/hwlock/qcom-hwspinlock.yaml | 25 +------------------ 1 file changed, 1 insertion(+), 24 deletions(-) diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml index 88f975837588..1c7149f7d171 100644 --- a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml +++ b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml @@ -25,37 +25,14 @@ properties: '#hwlock-cells': const: 1 - syscon: - $ref: "/schemas/types.yaml#/definitions/phandle-array" - description: - Should be a triple of phandle referencing the TCSR mutex syscon, offset - of first mutex within the syscon and stride between each mutex. - required: - compatible + - reg - '#hwlock-cells' -oneOf: - - required: - - reg - - required: - - syscon - additionalProperties: false examples: - - | - tcsr_mutex_block: syscon@fd484000 { - compatible = "syscon"; - reg = <0xfd484000 0x2000>; - }; - - hwlock { - compatible = "qcom,tcsr-mutex"; - syscon = <&tcsr_mutex_block 0 0x80>; - - #hwlock-cells = <1>; - }; - | tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex";