Fix the "IBPB mitigated RETBleed" mode of operation on AMD CPUs
(not turned on by default), which also need STIBP enabled (if available) to be '100% safe' on even the shortest speculation windows. Signed-off-by: Ingo Molnar <mingo@kernel.org> -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAmL3fqcRHG1pbmdvQGtl cm5lbC5vcmcACgkQEnMQ0APhK1gnuw/6AighFp+Gp4qXP1DIVU+acVnZsxbdt7GA WGs/JJfKYsKpWvDGFxnwtF2V1Imq8XVRPVPyFKvLQiBs2h8vNcVkgIvJsdeTFsqQ uUwUaYgDXuhLYaFpnMGouoeA3iw2zf/CY5ZJX79Nl/CwNwT7FxiLbu+JF/I2Yc0V yddiQ8xgT0VJhaBcUTsD2qFl8wjpxer7gNBFR4ujiYWXHag3qKyZuaySmqCz4xhd 4nyhJCp34548MsTVXDys2gnYpgLWweB9zOPvH4+GgtiFF3UJxRMhkB9NzfZq1l5W tCjgGupb3vVoXOVb/xnXyZlPbdFNqSAja7iOXYdmNUSURd7LC0PYHpVxN0rkbFcd V6noyU3JCCp86ceGTC0u3Iu6LLER6RBGB0gatVlzomWLjTEiC806eo23CVE22cnk poy7FO3RWa+q1AqWsEzc3wr14ZgSKCBZwwpn6ispT/kjx9fhAFyKtH2/Sznx26GH yKOF7pPCIXjCpcMnNoUu8cVyzfk0g3kOWQtKjaL9WfeyMtBaHhctngR0s1eCxZNJ rBlTs+YO7fO42unZEExgvYekBzI70aThIkvxahKEWW48owWph+i/sn5gzdVF+ynR R4PGeylfd8ZXr21cG2rG9250JLwqzhsxnAGvNjYg1p/hdyrzLTGWHIc9r9BU9000 mmOP9uY6Cjc= =Ac6x -----END PGP SIGNATURE----- Merge tag 'x86-urgent-2022-08-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fix from Ingo Molnar: "Fix the 'IBPB mitigated RETBleed' mode of operation on AMD CPUs (not turned on by default), which also need STIBP enabled (if available) to be '100% safe' on even the shortest speculation windows" * tag 'x86-urgent-2022-08-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/bugs: Enable STIBP for IBPB mitigated RETBleed
This commit is contained in:
commit
c5f1e32e32
@ -5274,20 +5274,33 @@
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Speculative Code Execution with Return Instructions)
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Speculative Code Execution with Return Instructions)
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vulnerability.
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vulnerability.
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AMD-based UNRET and IBPB mitigations alone do not stop
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sibling threads from influencing the predictions of other
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sibling threads. For that reason, STIBP is used on pro-
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cessors that support it, and mitigate SMT on processors
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that don't.
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off - no mitigation
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off - no mitigation
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auto - automatically select a migitation
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auto - automatically select a migitation
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auto,nosmt - automatically select a mitigation,
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auto,nosmt - automatically select a mitigation,
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disabling SMT if necessary for
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disabling SMT if necessary for
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the full mitigation (only on Zen1
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the full mitigation (only on Zen1
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and older without STIBP).
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and older without STIBP).
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ibpb - mitigate short speculation windows on
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ibpb - On AMD, mitigate short speculation
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basic block boundaries too. Safe, highest
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windows on basic block boundaries too.
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perf impact.
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Safe, highest perf impact. It also
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unret - force enable untrained return thunks,
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enables STIBP if present. Not suitable
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only effective on AMD f15h-f17h
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on Intel.
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based systems.
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ibpb,nosmt - Like "ibpb" above but will disable SMT
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unret,nosmt - like unret, will disable SMT when STIBP
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when STIBP is not available. This is
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is not available.
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the alternative for systems which do not
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have STIBP.
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unret - Force enable untrained return thunks,
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only effective on AMD f15h-f17h based
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systems.
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unret,nosmt - Like unret, but will disable SMT when STIBP
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is not available. This is the alternative for
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systems which do not have STIBP.
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Selecting 'auto' will choose a mitigation method at run
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Selecting 'auto' will choose a mitigation method at run
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time according to the CPU.
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time according to the CPU.
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@ -152,7 +152,7 @@ void __init check_bugs(void)
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/*
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/*
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* spectre_v2_user_select_mitigation() relies on the state set by
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* spectre_v2_user_select_mitigation() relies on the state set by
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* retbleed_select_mitigation(); specifically the STIBP selection is
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* retbleed_select_mitigation(); specifically the STIBP selection is
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* forced for UNRET.
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* forced for UNRET or IBPB.
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*/
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*/
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spectre_v2_user_select_mitigation();
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spectre_v2_user_select_mitigation();
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ssb_select_mitigation();
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ssb_select_mitigation();
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@ -1179,7 +1179,8 @@ spectre_v2_user_select_mitigation(void)
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boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON))
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boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON))
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mode = SPECTRE_V2_USER_STRICT_PREFERRED;
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mode = SPECTRE_V2_USER_STRICT_PREFERRED;
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if (retbleed_mitigation == RETBLEED_MITIGATION_UNRET) {
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if (retbleed_mitigation == RETBLEED_MITIGATION_UNRET ||
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retbleed_mitigation == RETBLEED_MITIGATION_IBPB) {
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if (mode != SPECTRE_V2_USER_STRICT &&
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if (mode != SPECTRE_V2_USER_STRICT &&
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mode != SPECTRE_V2_USER_STRICT_PREFERRED)
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mode != SPECTRE_V2_USER_STRICT_PREFERRED)
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pr_info("Selecting STIBP always-on mode to complement retbleed mitigation\n");
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pr_info("Selecting STIBP always-on mode to complement retbleed mitigation\n");
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@ -2360,10 +2361,11 @@ static ssize_t srbds_show_state(char *buf)
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static ssize_t retbleed_show_state(char *buf)
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static ssize_t retbleed_show_state(char *buf)
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{
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{
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if (retbleed_mitigation == RETBLEED_MITIGATION_UNRET) {
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if (retbleed_mitigation == RETBLEED_MITIGATION_UNRET ||
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retbleed_mitigation == RETBLEED_MITIGATION_IBPB) {
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if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
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if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
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boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
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boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
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return sprintf(buf, "Vulnerable: untrained return thunk on non-Zen uarch\n");
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return sprintf(buf, "Vulnerable: untrained return thunk / IBPB on non-AMD based uarch\n");
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return sprintf(buf, "%s; SMT %s\n",
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return sprintf(buf, "%s; SMT %s\n",
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retbleed_strings[retbleed_mitigation],
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retbleed_strings[retbleed_mitigation],
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