arm64: dts: qcom: Add msm8916 sdhci configuration nodes
Add sdhci1 and sdhci2 device configuration nodes. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
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@ -24,7 +24,10 @@
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#address-cells = <2>;
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#size-cells = <2>;
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aliases { };
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aliases {
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sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
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sdhc2 = &sdhc_2; /* SDC2 SD card slot */
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};
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chosen { };
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@ -236,6 +239,35 @@
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status = "disabled";
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};
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sdhc_1: sdhci@07824000 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0x07824900 0x11c>, <0x07824000 0x800>;
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reg-names = "hc_mem", "core_mem";
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interrupts = <0 123 0>, <0 138 0>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&gcc GCC_SDCC1_APPS_CLK>,
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<&gcc GCC_SDCC1_AHB_CLK>;
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clock-names = "core", "iface";
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bus-width = <8>;
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non-removable;
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status = "disabled";
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};
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sdhc_2: sdhci@07864000 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0x07864900 0x11c>, <0x07864000 0x800>;
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reg-names = "hc_mem", "core_mem";
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interrupts = <0 125 0>, <0 221 0>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&gcc GCC_SDCC2_APPS_CLK>,
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<&gcc GCC_SDCC2_AHB_CLK>;
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clock-names = "core", "iface";
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bus-width = <4>;
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status = "disabled";
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};
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intc: interrupt-controller@b000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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