drm/amd/display: dc/bios: add support for DCE6
[Why] command_table_helper.c requires changes for DCE6 support [How] DCE6 targets added replicating and adapting the existing DCE8 implementation. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mauro Rossi
Alex Deucher
parent
683b59504d
commit
c4a54f70a6
@ -31,6 +31,15 @@ AMD_DAL_BIOS = $(addprefix $(AMDDALPATH)/dc/bios/,$(BIOS))
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AMD_DISPLAY_FILES += $(AMD_DAL_BIOS)
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###############################################################################
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# DCE 6x
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###############################################################################
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# All DCE6.x are derived from DCE6.0, so 6.0 MUST be defined if ANY of
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# DCE6.x is compiled.
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ifdef CONFIG_DRM_AMD_DC_SI
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AMD_DISPLAY_FILES += $(AMDDALPATH)/dc/bios/dce60/command_table_helper_dce60.o
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endif
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###############################################################################
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# DCE 8x
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###############################################################################
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@ -36,6 +36,14 @@ bool dal_bios_parser_init_cmd_tbl_helper(
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enum dce_version dce)
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{
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switch (dce) {
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#if defined(CONFIG_DRM_AMD_DC_SI)
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case DCE_VERSION_6_0:
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case DCE_VERSION_6_1:
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case DCE_VERSION_6_4:
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*h = dal_cmd_tbl_helper_dce60_get_table();
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return true;
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#endif
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case DCE_VERSION_8_0:
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case DCE_VERSION_8_1:
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case DCE_VERSION_8_3:
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@ -26,6 +26,9 @@
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#ifndef __DAL_COMMAND_TABLE_HELPER_H__
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#define __DAL_COMMAND_TABLE_HELPER_H__
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#if defined(CONFIG_DRM_AMD_DC_SI)
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#include "dce60/command_table_helper_dce60.h"
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#endif
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#include "dce80/command_table_helper_dce80.h"
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#include "dce110/command_table_helper_dce110.h"
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#include "dce112/command_table_helper_dce112.h"
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@ -37,6 +37,14 @@ bool dal_bios_parser_init_cmd_tbl_helper2(
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enum dce_version dce)
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{
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switch (dce) {
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#if defined(CONFIG_DRM_AMD_DC_SI)
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case DCE_VERSION_6_0:
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case DCE_VERSION_6_1:
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case DCE_VERSION_6_4:
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*h = dal_cmd_tbl_helper_dce60_get_table();
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return true;
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#endif
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case DCE_VERSION_8_0:
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case DCE_VERSION_8_1:
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case DCE_VERSION_8_3:
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@ -26,6 +26,9 @@
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#ifndef __DAL_COMMAND_TABLE_HELPER2_H__
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#define __DAL_COMMAND_TABLE_HELPER2_H__
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#if defined(CONFIG_DRM_AMD_DC_SI)
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#include "dce60/command_table_helper_dce60.h"
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#endif
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#include "dce80/command_table_helper_dce80.h"
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#include "dce110/command_table_helper_dce110.h"
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#include "dce112/command_table_helper2_dce112.h"
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@ -0,0 +1,354 @@
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/*
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* Copyright 2020 Mauro Rossi <issor.oruam@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dm_services.h"
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#include "atom.h"
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#include "include/grph_object_id.h"
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#include "include/grph_object_defs.h"
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#include "include/bios_parser_types.h"
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#include "../command_table_helper.h"
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static uint8_t encoder_action_to_atom(enum bp_encoder_control_action action)
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{
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uint8_t atom_action = 0;
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switch (action) {
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case ENCODER_CONTROL_ENABLE:
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atom_action = ATOM_ENABLE;
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break;
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case ENCODER_CONTROL_DISABLE:
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atom_action = ATOM_DISABLE;
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break;
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case ENCODER_CONTROL_SETUP:
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atom_action = ATOM_ENCODER_CMD_SETUP;
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break;
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case ENCODER_CONTROL_INIT:
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atom_action = ATOM_ENCODER_INIT;
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break;
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default:
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BREAK_TO_DEBUGGER(); /* Unhandle action in driver.!! */
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break;
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}
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return atom_action;
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}
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static bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id)
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{
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bool result = false;
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if (atom_engine_id != NULL)
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switch (id) {
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case ENGINE_ID_DIGA:
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*atom_engine_id = ASIC_INT_DIG1_ENCODER_ID;
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result = true;
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break;
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case ENGINE_ID_DIGB:
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*atom_engine_id = ASIC_INT_DIG2_ENCODER_ID;
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result = true;
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break;
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case ENGINE_ID_DIGC:
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*atom_engine_id = ASIC_INT_DIG3_ENCODER_ID;
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result = true;
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break;
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case ENGINE_ID_DIGD:
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*atom_engine_id = ASIC_INT_DIG4_ENCODER_ID;
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result = true;
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break;
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case ENGINE_ID_DIGE:
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*atom_engine_id = ASIC_INT_DIG5_ENCODER_ID;
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result = true;
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break;
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case ENGINE_ID_DIGF:
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*atom_engine_id = ASIC_INT_DIG6_ENCODER_ID;
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result = true;
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break;
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case ENGINE_ID_DIGG:
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*atom_engine_id = ASIC_INT_DIG7_ENCODER_ID;
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result = true;
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break;
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case ENGINE_ID_DACA:
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*atom_engine_id = ASIC_INT_DAC1_ENCODER_ID;
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result = true;
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break;
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default:
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break;
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}
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return result;
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}
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static bool clock_source_id_to_atom(
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enum clock_source_id id,
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uint32_t *atom_pll_id)
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{
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bool result = true;
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if (atom_pll_id != NULL)
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switch (id) {
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case CLOCK_SOURCE_ID_PLL0:
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*atom_pll_id = ATOM_PPLL0;
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break;
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case CLOCK_SOURCE_ID_PLL1:
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*atom_pll_id = ATOM_PPLL1;
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break;
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case CLOCK_SOURCE_ID_PLL2:
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*atom_pll_id = ATOM_PPLL2;
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break;
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case CLOCK_SOURCE_ID_EXTERNAL:
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*atom_pll_id = ATOM_PPLL_INVALID;
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break;
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case CLOCK_SOURCE_ID_DFS:
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*atom_pll_id = ATOM_EXT_PLL1;
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break;
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case CLOCK_SOURCE_ID_VCE:
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/* for VCE encoding,
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* we need to pass in ATOM_PPLL_INVALID
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*/
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*atom_pll_id = ATOM_PPLL_INVALID;
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break;
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case CLOCK_SOURCE_ID_DP_DTO:
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/* When programming DP DTO PLL ID should be invalid */
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*atom_pll_id = ATOM_PPLL_INVALID;
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break;
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case CLOCK_SOURCE_ID_UNDEFINED:
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BREAK_TO_DEBUGGER(); /* check when this will happen! */
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*atom_pll_id = ATOM_PPLL_INVALID;
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result = false;
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break;
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default:
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result = false;
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break;
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}
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return result;
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}
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static uint8_t clock_source_id_to_atom_phy_clk_src_id(
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enum clock_source_id id)
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{
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uint8_t atom_phy_clk_src_id = 0;
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switch (id) {
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case CLOCK_SOURCE_ID_PLL0:
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atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_P0PLL;
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break;
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case CLOCK_SOURCE_ID_PLL1:
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atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_P1PLL;
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break;
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case CLOCK_SOURCE_ID_PLL2:
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atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_P2PLL;
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break;
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case CLOCK_SOURCE_ID_EXTERNAL:
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atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_REFCLK_SRC_EXT;
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break;
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default:
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atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_P1PLL;
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break;
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}
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return atom_phy_clk_src_id >> 2;
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}
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static uint8_t signal_type_to_atom_dig_mode(enum signal_type s)
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{
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uint8_t atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DP;
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switch (s) {
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case SIGNAL_TYPE_DISPLAY_PORT:
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case SIGNAL_TYPE_EDP:
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atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DP;
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break;
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case SIGNAL_TYPE_LVDS:
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atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_LVDS;
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break;
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case SIGNAL_TYPE_DVI_SINGLE_LINK:
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case SIGNAL_TYPE_DVI_DUAL_LINK:
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atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DVI;
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break;
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case SIGNAL_TYPE_HDMI_TYPE_A:
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atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_HDMI;
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break;
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case SIGNAL_TYPE_DISPLAY_PORT_MST:
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atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DP_MST;
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break;
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default:
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atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DVI;
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break;
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}
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return atom_dig_mode;
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}
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static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
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{
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uint8_t atom_hpd_sel = 0;
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switch (id) {
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case HPD_SOURCEID1:
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atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD1_SEL;
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break;
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case HPD_SOURCEID2:
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atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD2_SEL;
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break;
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case HPD_SOURCEID3:
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atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD3_SEL;
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break;
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case HPD_SOURCEID4:
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atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD4_SEL;
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break;
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case HPD_SOURCEID5:
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atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD5_SEL;
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break;
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case HPD_SOURCEID6:
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atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD6_SEL;
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break;
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case HPD_SOURCEID_UNKNOWN:
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default:
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atom_hpd_sel = 0;
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break;
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}
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return atom_hpd_sel >> 4;
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}
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static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
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{
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uint8_t atom_dig_encoder_sel = 0;
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switch (id) {
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case ENGINE_ID_DIGA:
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atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGA_SEL;
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break;
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case ENGINE_ID_DIGB:
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atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGB_SEL;
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break;
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case ENGINE_ID_DIGC:
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atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGC_SEL;
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break;
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case ENGINE_ID_DIGD:
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atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGD_SEL;
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break;
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case ENGINE_ID_DIGE:
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atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGE_SEL;
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break;
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case ENGINE_ID_DIGF:
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atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGF_SEL;
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break;
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case ENGINE_ID_DIGG:
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atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGG_SEL;
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break;
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default:
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atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGA_SEL;
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break;
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}
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return atom_dig_encoder_sel;
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}
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static uint8_t phy_id_to_atom(enum transmitter t)
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{
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uint8_t atom_phy_id;
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switch (t) {
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case TRANSMITTER_UNIPHY_A:
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atom_phy_id = ATOM_PHY_ID_UNIPHYA;
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break;
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case TRANSMITTER_UNIPHY_B:
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atom_phy_id = ATOM_PHY_ID_UNIPHYB;
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break;
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case TRANSMITTER_UNIPHY_C:
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atom_phy_id = ATOM_PHY_ID_UNIPHYC;
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break;
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case TRANSMITTER_UNIPHY_D:
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atom_phy_id = ATOM_PHY_ID_UNIPHYD;
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break;
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case TRANSMITTER_UNIPHY_E:
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atom_phy_id = ATOM_PHY_ID_UNIPHYE;
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break;
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case TRANSMITTER_UNIPHY_F:
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atom_phy_id = ATOM_PHY_ID_UNIPHYF;
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break;
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case TRANSMITTER_UNIPHY_G:
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atom_phy_id = ATOM_PHY_ID_UNIPHYG;
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break;
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default:
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atom_phy_id = ATOM_PHY_ID_UNIPHYA;
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break;
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}
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return atom_phy_id;
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}
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static uint8_t disp_power_gating_action_to_atom(
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enum bp_pipe_control_action action)
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{
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uint8_t atom_pipe_action = 0;
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switch (action) {
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case ASIC_PIPE_DISABLE:
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atom_pipe_action = ATOM_DISABLE;
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break;
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case ASIC_PIPE_ENABLE:
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atom_pipe_action = ATOM_ENABLE;
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break;
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case ASIC_PIPE_INIT:
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atom_pipe_action = ATOM_INIT;
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break;
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default:
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BREAK_TO_DEBUGGER(); /* Unhandle action in driver! */
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break;
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}
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return atom_pipe_action;
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}
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static const struct command_table_helper command_table_helper_funcs = {
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.controller_id_to_atom = dal_cmd_table_helper_controller_id_to_atom,
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.encoder_action_to_atom = encoder_action_to_atom,
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.engine_bp_to_atom = engine_bp_to_atom,
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.clock_source_id_to_atom = clock_source_id_to_atom,
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.clock_source_id_to_atom_phy_clk_src_id =
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clock_source_id_to_atom_phy_clk_src_id,
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.signal_type_to_atom_dig_mode = signal_type_to_atom_dig_mode,
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.hpd_sel_to_atom = hpd_sel_to_atom,
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.dig_encoder_sel_to_atom = dig_encoder_sel_to_atom,
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.phy_id_to_atom = phy_id_to_atom,
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.disp_power_gating_action_to_atom = disp_power_gating_action_to_atom,
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.assign_control_parameter =
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dal_cmd_table_helper_assign_control_parameter,
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.clock_source_id_to_ref_clk_src =
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dal_cmd_table_helper_clock_source_id_to_ref_clk_src,
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.transmitter_bp_to_atom = dal_cmd_table_helper_transmitter_bp_to_atom,
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.encoder_id_to_atom = dal_cmd_table_helper_encoder_id_to_atom,
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.encoder_mode_bp_to_atom =
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dal_cmd_table_helper_encoder_mode_bp_to_atom,
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};
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const struct command_table_helper *dal_cmd_tbl_helper_dce60_get_table(void)
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{
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return &command_table_helper_funcs;
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}
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@ -0,0 +1,33 @@
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/*
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* Copyright 2020 Mauro Rossi <issor.oruam@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors: AMD
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __DAL_COMMAND_TABLE_HELPER_DCE60_H__
|
||||
#define __DAL_COMMAND_TABLE_HELPER_DCE60_H__
|
||||
|
||||
struct command_table_helper;
|
||||
|
||||
const struct command_table_helper *dal_cmd_tbl_helper_dce60_get_table(void);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user