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x86: apic - unify lapic_setup_esr

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We use 32bit code former for 64bit
mode since it's much better implementation
and easier to merge.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Cyrill Gorcunov 2008-08-18 20:45:54 +04:00 committed by Ingo Molnar
parent 36c9d67428
commit c43da2f5e9
2 changed files with 50 additions and 22 deletions
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21
arch/x86/kernel/apic_32.c
View File

@ -983,6 +983,16 @@ static void __cpuinit lapic_setup_esr(void)
{ {
unsigned long oldvalue, value, maxlvt; unsigned long oldvalue, value, maxlvt;
if (lapic_is_integrated() && !esr_disable) { if (lapic_is_integrated() && !esr_disable) {
if (esr_disable) {
/*
* Something untraceable is creating bad interrupts on
* secondary quads ... for the moment, just leave the
* ESR disabled - we can't do anything useful with the
* errors anyway - mbligh
*/
printk(KERN_INFO "Leaving ESR disabled.\n");
return;
}
/* !82489DX */ /* !82489DX */
maxlvt = lapic_get_maxlvt(); maxlvt = lapic_get_maxlvt();
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
@ -1003,16 +1013,7 @@ static void __cpuinit lapic_setup_esr(void)
"vector: 0x%08lx after: 0x%08lx\n", "vector: 0x%08lx after: 0x%08lx\n",
oldvalue, value); oldvalue, value);
} else { } else {
if (esr_disable) printk(KERN_INFO "No ESR for 82489DX.\n");
/*
* Something untraceable is creating bad interrupts on
* secondary quads ... for the moment, just leave the
* ESR disabled - we can't do anything useful with the
* errors anyway - mbligh
*/
printk(KERN_INFO "Leaving ESR disabled.\n");
else
printk(KERN_INFO "No ESR for 82489DX.\n");
} }
} }

51
arch/x86/kernel/apic_64.c
View File

@ -863,6 +863,45 @@ void __init init_bsp_APIC(void)
apic_write(APIC_LVT1, value); apic_write(APIC_LVT1, value);
} }
static void __cpuinit lapic_setup_esr(void)
{
unsigned long oldvalue, value, maxlvt;
if (lapic_is_integrated() && !esr_disable) {
if (esr_disable) {
/*
* Something untraceable is creating bad interrupts on
* secondary quads ... for the moment, just leave the
* ESR disabled - we can't do anything useful with the
* errors anyway - mbligh
*/
printk(KERN_INFO "Leaving ESR disabled.\n");
return;
}
/* !82489DX */
maxlvt = lapic_get_maxlvt();
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
apic_write(APIC_ESR, 0);
oldvalue = apic_read(APIC_ESR);
/* enables sending errors */
value = ERROR_APIC_VECTOR;
apic_write(APIC_LVTERR, value);
/*
* spec says clear errors after enabling vector.
*/
if (maxlvt > 3)
apic_write(APIC_ESR, 0);
value = apic_read(APIC_ESR);
if (value != oldvalue)
apic_printk(APIC_VERBOSE, "ESR value before enabling "
"vector: 0x%08lx after: 0x%08lx\n",
oldvalue, value);
} else {
printk(KERN_INFO "No ESR for 82489DX.\n");
}
}
/** /**
* setup_local_APIC - setup the local APIC * setup_local_APIC - setup the local APIC
*/ */
@ -968,18 +1007,6 @@ void __cpuinit setup_local_APIC(void)
preempt_enable(); preempt_enable();
} }
static void __cpuinit lapic_setup_esr(void)
{
unsigned maxlvt = lapic_get_maxlvt();
apic_write(APIC_LVTERR, ERROR_APIC_VECTOR);
/*
* spec says clear errors after enabling vector.
*/
if (maxlvt > 3)
apic_write(APIC_ESR, 0);
}
void __cpuinit end_local_APIC_setup(void) void __cpuinit end_local_APIC_setup(void)
{ {
lapic_setup_esr(); lapic_setup_esr();