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arm64: zynqmp: Label whole PL part as fpga_full region

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This will simplify dt overlay structure for the whole PL.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
This commit is contained in:
Nava kishore Manne 2019-10-18 18:07:33 +02:00 committed by Michal Simek
parent 9c36339215
commit c40d1cceb3
1 changed files with 8 additions and 0 deletions
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8
arch/arm64/boot/dts/xilinx/zynqmp.dtsi
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@ -135,6 +135,14 @@
<1 10 0xf08>; <1 10 0xf08>;
}; };
fpga_full: fpga-full {
compatible = "fpga-region";
fpga-mgr = <&zynqmp_pcap>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
};
amba_apu: amba-apu@0 { amba_apu: amba-apu@0 {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;