forked from Minki/linux
drm/i915: Move vblank evasion to commit (v4)
Move the vblank evasion up from the low-level, hw-specific update_plane() handlers to the general plane commit operation. Everything inside commit should now be non-sleeping, so this brings us closer to how vblank evasion will behave once we move over to atomic. v2: - Restore lost intel_crtc->active check on vblank evasion v3: - Replace assert_pipe_enabled() in intel_disable_primary_hw_plane() with an intel_crtc->active test; it turns out assert_pipe_enabled() grabs some mutexes and can sleep, which we can't do with interrupts disabled. v4: - Equivalent to v2; v3 change is now squashed into an earlier patch of the series. (Ander). Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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32b7eeec4d
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c34c9ee482
@ -11864,6 +11864,12 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc)
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intel_update_watermarks(crtc);
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intel_runtime_pm_get(dev_priv);
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/* Perform vblank evasion around commit operation */
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if (intel_crtc->active)
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intel_crtc->atomic.evade =
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intel_pipe_update_start(intel_crtc,
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&intel_crtc->atomic.start_vbl_count);
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}
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static void intel_finish_crtc_commit(struct drm_crtc *crtc)
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@ -11873,6 +11879,10 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc)
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct drm_plane *p;
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if (intel_crtc->atomic.evade)
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intel_pipe_update_end(intel_crtc,
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intel_crtc->atomic.start_vbl_count);
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intel_runtime_pm_put(dev_priv);
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if (intel_crtc->atomic.wait_vblank)
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@ -428,6 +428,10 @@ struct skl_pipe_wm {
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* and thus can't be run with interrupts disabled.
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*/
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struct intel_crtc_atomic_commit {
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/* vblank evasion */
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bool evade;
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unsigned start_vbl_count;
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/* Sleepable operations to perform before commit */
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bool wait_for_flips;
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bool disable_fbc;
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@ -412,8 +412,6 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
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u32 sprctl;
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unsigned long sprsurf_offset, linear_offset;
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int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
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u32 start_vbl_count;
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bool atomic_update;
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sprctl = I915_READ(SPCNTR(pipe, plane));
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@ -502,8 +500,6 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
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linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
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}
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atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
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intel_update_primary_plane(intel_crtc);
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if (IS_CHERRYVIEW(dev) && pipe == PIPE_B)
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@ -525,9 +521,6 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
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sprsurf_offset);
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intel_flush_primary_plane(dev_priv, intel_crtc->plane);
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if (atomic_update)
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intel_pipe_update_end(intel_crtc, start_vbl_count);
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}
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static void
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@ -539,10 +532,6 @@ vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_plane->pipe;
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int plane = intel_plane->plane;
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u32 start_vbl_count;
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bool atomic_update;
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atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
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intel_update_primary_plane(intel_crtc);
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@ -553,9 +542,6 @@ vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
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intel_flush_primary_plane(dev_priv, intel_crtc->plane);
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if (atomic_update)
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intel_pipe_update_end(intel_crtc, start_vbl_count);
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intel_update_sprite_watermarks(dplane, crtc, 0, 0, 0, false, false);
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}
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@ -626,8 +612,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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u32 sprctl, sprscale = 0;
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unsigned long sprsurf_offset, linear_offset;
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int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
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u32 start_vbl_count;
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bool atomic_update;
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sprctl = I915_READ(SPRCTL(pipe));
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@ -711,8 +695,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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}
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}
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atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
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intel_update_primary_plane(intel_crtc);
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I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);
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@ -735,9 +717,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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i915_gem_obj_ggtt_offset(obj) + sprsurf_offset);
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intel_flush_primary_plane(dev_priv, intel_crtc->plane);
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if (atomic_update)
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intel_pipe_update_end(intel_crtc, start_vbl_count);
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}
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static void
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@ -748,10 +727,6 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
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struct intel_plane *intel_plane = to_intel_plane(plane);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_plane->pipe;
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u32 start_vbl_count;
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bool atomic_update;
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atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
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intel_update_primary_plane(intel_crtc);
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@ -764,9 +739,6 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
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intel_flush_primary_plane(dev_priv, intel_crtc->plane);
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if (atomic_update)
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intel_pipe_update_end(intel_crtc, start_vbl_count);
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/*
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* Avoid underruns when disabling the sprite.
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* FIXME remove once watermark updates are done properly.
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@ -845,8 +817,6 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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unsigned long dvssurf_offset, linear_offset;
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u32 dvscntr, dvsscale;
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int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
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u32 start_vbl_count;
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bool atomic_update;
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dvscntr = I915_READ(DVSCNTR(pipe));
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@ -921,8 +891,6 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
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}
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atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
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intel_update_primary_plane(intel_crtc);
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I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);
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@ -940,9 +908,6 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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i915_gem_obj_ggtt_offset(obj) + dvssurf_offset);
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intel_flush_primary_plane(dev_priv, intel_crtc->plane);
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if (atomic_update)
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intel_pipe_update_end(intel_crtc, start_vbl_count);
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}
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static void
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@ -953,10 +918,6 @@ ilk_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
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struct intel_plane *intel_plane = to_intel_plane(plane);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_plane->pipe;
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u32 start_vbl_count;
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bool atomic_update;
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atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
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intel_update_primary_plane(intel_crtc);
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@ -968,9 +929,6 @@ ilk_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
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intel_flush_primary_plane(dev_priv, intel_crtc->plane);
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if (atomic_update)
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intel_pipe_update_end(intel_crtc, start_vbl_count);
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/*
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* Avoid underruns when disabling the sprite.
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* FIXME remove once watermark updates are done properly.
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