forked from Minki/linux
brcmfmac: remove dummy cache flush/invalidate function
brcmf_dma_flush and brcmf_dma_invalidate_cache are not necessary and have never been implemented. Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com> Reviewed-by: Hante Meuleman <meuleman@broadcom.com> Reviewed-by: Arend Van Spriel <arend@broadcom.com> Signed-off-by: Franky Lin <frankyl@broadcom.com> Signed-off-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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c2d4182edc
@ -22,17 +22,6 @@
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#include "core.h"
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#include "commonring.h"
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/* dma flushing needs implementation for mips and arm platforms. Should
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* be put in util. Note, this is not real flushing. It is virtual non
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* cached memory. Only write buffers should have to be drained. Though
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* this may be different depending on platform......
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* SEE ALSO msgbuf.c
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*/
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#define brcmf_dma_flush(addr, len)
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#define brcmf_dma_invalidate_cache(addr, len)
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void brcmf_commonring_register_cb(struct brcmf_commonring *commonring,
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int (*cr_ring_bell)(void *ctx),
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int (*cr_update_rptr)(void *ctx),
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@ -206,14 +195,9 @@ int brcmf_commonring_write_complete(struct brcmf_commonring *commonring)
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address = commonring->buf_addr;
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address += (commonring->f_ptr * commonring->item_len);
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if (commonring->f_ptr > commonring->w_ptr) {
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brcmf_dma_flush(address,
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(commonring->depth - commonring->f_ptr) *
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commonring->item_len);
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address = commonring->buf_addr;
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commonring->f_ptr = 0;
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}
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brcmf_dma_flush(address, (commonring->w_ptr - commonring->f_ptr) *
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commonring->item_len);
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commonring->f_ptr = commonring->w_ptr;
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@ -258,8 +242,6 @@ void *brcmf_commonring_get_read_ptr(struct brcmf_commonring *commonring,
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if (commonring->r_ptr == commonring->depth)
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commonring->r_ptr = 0;
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brcmf_dma_invalidate_cache(ret_addr, *n_ items * commonring->item_len);
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return ret_addr;
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}
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@ -278,16 +278,6 @@ struct brcmf_msgbuf_pktids {
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struct brcmf_msgbuf_pktid *array;
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};
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/* dma flushing needs implementation for mips and arm platforms. Should
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* be put in util. Note, this is not real flushing. It is virtual non
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* cached memory. Only write buffers should have to be drained. Though
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* this may be different depending on platform......
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*/
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#define brcmf_dma_flush(addr, len)
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#define brcmf_dma_invalidate_cache(addr, len)
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static void brcmf_msgbuf_rxbuf_ioctlresp_post(struct brcmf_msgbuf *msgbuf);
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@ -462,7 +452,6 @@ static int brcmf_msgbuf_tx_ioctl(struct brcmf_pub *drvr, int ifidx,
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memcpy(msgbuf->ioctbuf, buf, buf_len);
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else
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memset(msgbuf->ioctbuf, 0, buf_len);
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brcmf_dma_flush(ioctl_buf, buf_len);
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err = brcmf_commonring_write_complete(commonring);
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brcmf_commonring_unlock(commonring);
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@ -276,15 +276,6 @@ static const u32 brcmf_ring_itemsize[BRCMF_NROF_COMMON_MSGRINGS] = {
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};
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/* dma flushing needs implementation for mips and arm platforms. Should
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* be put in util. Note, this is not real flushing. It is virtual non
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* cached memory. Only write buffers should have to be drained. Though
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* this may be different depending on platform......
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*/
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#define brcmf_dma_flush(addr, len)
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#define brcmf_dma_invalidate_cache(addr, len)
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static u32
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brcmf_pcie_read_reg32(struct brcmf_pciedev_info *devinfo, u32 reg_offset)
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{
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@ -1174,7 +1165,6 @@ static int brcmf_pcie_init_scratchbuffers(struct brcmf_pciedev_info *devinfo)
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goto fail;
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memset(devinfo->shared.scratch, 0, BRCMF_DMA_D2H_SCRATCH_BUF_LEN);
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brcmf_dma_flush(devinfo->shared.scratch, BRCMF_DMA_D2H_SCRATCH_BUF_LEN);
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addr = devinfo->shared.tcm_base_address +
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BRCMF_SHARED_DMA_SCRATCH_ADDR_OFFSET;
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@ -1192,7 +1182,6 @@ static int brcmf_pcie_init_scratchbuffers(struct brcmf_pciedev_info *devinfo)
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goto fail;
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memset(devinfo->shared.ringupd, 0, BRCMF_DMA_D2H_RINGUPD_BUF_LEN);
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brcmf_dma_flush(devinfo->shared.ringupd, BRCMF_DMA_D2H_RINGUPD_BUF_LEN);
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addr = devinfo->shared.tcm_base_address +
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BRCMF_SHARED_DMA_RINGUPD_ADDR_OFFSET;
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