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drm/amd/display: Optimize passive update planes.

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[Why]
passive update planes still spends a litte more
time on some cases.

[How]
Remove unnecessary trace which involving in some register read.
Disable debug output for release build.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yongqiang Sun 2018-12-07 10:38:05 -05:00 committed by Alex Deucher
parent 1ae62f3114
commit c2c2ce1e96
1 changed files with 0 additions and 3 deletions
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3
drivers/gpu/drm/amd/display/dc/core/dc.c
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@ -1570,9 +1570,6 @@ static void commit_planes_for_stream(struct dc *dc,
}
}
if (update_type == UPDATE_TYPE_FULL)
context_timing_trace(dc, &context->res_ctx);
// Update Type FAST, Surface updates
if (update_type == UPDATE_TYPE_FAST) {
/* Lock the top pipe while updating plane addrs, since freesync requires