forked from Minki/linux
efikamx: add reset
The efikamx board is using a gpio to reset the board so add support for it Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -56,6 +56,10 @@
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#define EFIKAMX_SPI_CS0 (3*32 + 24)
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#define EFIKAMX_SPI_CS0 (3*32 + 24)
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#define EFIKAMX_SPI_CS1 (3*32 + 25)
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#define EFIKAMX_SPI_CS1 (3*32 + 25)
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/* board 1.1 doesn't have same reset gpio */
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#define EFIKAMX_RESET1_1 (2*32 + 2)
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#define EFIKAMX_RESET (0*32 + 4)
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/* the pci ids pin have pull up. they're driven low according to board id */
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/* the pci ids pin have pull up. they're driven low according to board id */
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#define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
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#define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
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#define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
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#define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
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@ -110,6 +114,10 @@ static iomux_v3_cfg_t mx51efikamx_pads[] = {
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MX51_PAD_CSPI1_SS1__GPIO_4_25,
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MX51_PAD_CSPI1_SS1__GPIO_4_25,
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MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
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MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
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MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
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MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
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/* reset */
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MX51_PAD_DI1_PIN13__GPIO_3_2,
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MX51_PAD_GPIO_1_4__GPIO_1_4,
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};
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};
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/* Serial ports */
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/* Serial ports */
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@ -296,6 +304,14 @@ static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst = {
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.num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs),
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.num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs),
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};
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};
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void mx51_efikamx_reset(void)
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{
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if (system_rev == 0x11)
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gpio_direction_output(EFIKAMX_RESET1_1, 0);
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else
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gpio_direction_output(EFIKAMX_RESET, 0);
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}
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static void __init mxc_board_init(void)
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static void __init mxc_board_init(void)
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{
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{
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mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
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mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
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@ -317,6 +333,14 @@ static void __init mxc_board_init(void)
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spi_register_board_info(mx51_efikamx_spi_board_info,
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spi_register_board_info(mx51_efikamx_spi_board_info,
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ARRAY_SIZE(mx51_efikamx_spi_board_info));
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ARRAY_SIZE(mx51_efikamx_spi_board_info));
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imx51_add_ecspi(0, &mx51_efikamx_spi_pdata);
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imx51_add_ecspi(0, &mx51_efikamx_spi_pdata);
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if (system_rev == 0x11) {
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gpio_request(EFIKAMX_RESET1_1, "reset");
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gpio_direction_output(EFIKAMX_RESET1_1, 1);
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} else {
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gpio_request(EFIKAMX_RESET, "reset");
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gpio_direction_output(EFIKAMX_RESET, 1);
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}
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}
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}
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static void __init mx51_efikamx_timer_init(void)
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static void __init mx51_efikamx_timer_init(void)
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@ -50,5 +50,5 @@ extern void mxc_arch_reset_init(void __iomem *);
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extern void mxc91231_power_off(void);
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extern void mxc91231_power_off(void);
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extern void mxc91231_arch_reset(int, const char *);
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extern void mxc91231_arch_reset(int, const char *);
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extern void mxc91231_prepare_idle(void);
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extern void mxc91231_prepare_idle(void);
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extern void mx51_efikamx_reset(void);
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#endif
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#endif
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@ -26,6 +26,7 @@
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#include <mach/common.h>
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#include <mach/common.h>
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#include <asm/proc-fns.h>
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#include <asm/proc-fns.h>
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#include <asm/system.h>
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#include <asm/system.h>
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#include <asm/mach-types.h>
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static void __iomem *wdog_base;
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static void __iomem *wdog_base;
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@ -42,6 +43,13 @@ void arch_reset(char mode, const char *cmd)
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return;
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return;
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}
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}
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#endif
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#endif
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#ifdef CONFIG_MACH_MX51_EFIKAMX
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if (machine_is_mx51_efikamx()) {
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mx51_efikamx_reset();
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return;
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}
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#endif
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if (cpu_is_mx1()) {
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if (cpu_is_mx1()) {
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wcr_enable = (1 << 0);
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wcr_enable = (1 << 0);
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} else {
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} else {
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