forked from Minki/linux
hwmon: (it87) Rearrange code to avoid forward declarations
Cleanup only, no functional change. Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Guenter Roeck
parent
e84bd9535e
commit
c1e7a4ca6d
@ -603,23 +603,160 @@ static const unsigned int pwm_freq[8] = {
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750000,
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};
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static int it87_probe(struct platform_device *pdev);
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static int it87_remove(struct platform_device *pdev);
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/*
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* Must be called with data->update_lock held, except during initialization.
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* We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
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* would slow down the IT87 access and should not be necessary.
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*/
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static int it87_read_value(struct it87_data *data, u8 reg)
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{
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outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
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return inb_p(data->addr + IT87_DATA_REG_OFFSET);
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}
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static int it87_read_value(struct it87_data *data, u8 reg);
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static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
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static struct it87_data *it87_update_device(struct device *dev);
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static int it87_check_pwm(struct device *dev);
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static void it87_init_device(struct platform_device *pdev);
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/*
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* Must be called with data->update_lock held, except during initialization.
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* We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
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* would slow down the IT87 access and should not be necessary.
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*/
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static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
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{
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outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
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outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
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}
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static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
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{
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data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
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if (has_newer_autopwm(data)) {
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data->pwm_temp_map[nr] = (data->pwm_ctrl[nr] & 0x03) +
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nr < 3 ? 0 : 3;
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data->pwm_duty[nr] = it87_read_value(data,
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IT87_REG_PWM_DUTY[nr]);
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} else {
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if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
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data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
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else /* Manual mode */
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data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
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}
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static struct platform_driver it87_driver = {
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.driver = {
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.name = DRVNAME,
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},
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.probe = it87_probe,
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.remove = it87_remove,
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};
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if (has_old_autopwm(data)) {
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int i;
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for (i = 0; i < 5 ; i++)
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data->auto_temp[nr][i] = it87_read_value(data,
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IT87_REG_AUTO_TEMP(nr, i));
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for (i = 0; i < 3 ; i++)
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data->auto_pwm[nr][i] = it87_read_value(data,
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IT87_REG_AUTO_PWM(nr, i));
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}
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}
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static struct it87_data *it87_update_device(struct device *dev)
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{
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struct it87_data *data = dev_get_drvdata(dev);
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int i;
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mutex_lock(&data->update_lock);
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if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
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|| !data->valid) {
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if (update_vbat) {
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/*
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* Cleared after each update, so reenable. Value
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* returned by this read will be previous value
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*/
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it87_write_value(data, IT87_REG_CONFIG,
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it87_read_value(data, IT87_REG_CONFIG) | 0x40);
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}
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for (i = 0; i <= 7; i++) {
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data->in[i][0] =
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it87_read_value(data, IT87_REG_VIN(i));
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data->in[i][1] =
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it87_read_value(data, IT87_REG_VIN_MIN(i));
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data->in[i][2] =
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it87_read_value(data, IT87_REG_VIN_MAX(i));
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}
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/* in8 (battery) has no limit registers */
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data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
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if (has_avcc3(data))
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data->in[9][0] = it87_read_value(data, IT87_REG_AVCC3);
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for (i = 0; i < 6; i++) {
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/* Skip disabled fans */
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if (!(data->has_fan & (1 << i)))
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continue;
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data->fan[i][1] =
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it87_read_value(data, IT87_REG_FAN_MIN[i]);
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data->fan[i][0] = it87_read_value(data,
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IT87_REG_FAN[i]);
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/* Add high byte if in 16-bit mode */
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if (has_16bit_fans(data)) {
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data->fan[i][0] |= it87_read_value(data,
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IT87_REG_FANX[i]) << 8;
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data->fan[i][1] |= it87_read_value(data,
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IT87_REG_FANX_MIN[i]) << 8;
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}
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}
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for (i = 0; i < 3; i++) {
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if (!(data->has_temp & (1 << i)))
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continue;
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data->temp[i][0] =
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it87_read_value(data, IT87_REG_TEMP(i));
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data->temp[i][1] =
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it87_read_value(data, IT87_REG_TEMP_LOW(i));
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data->temp[i][2] =
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it87_read_value(data, IT87_REG_TEMP_HIGH(i));
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if (has_temp_offset(data))
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data->temp[i][3] =
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it87_read_value(data,
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IT87_REG_TEMP_OFFSET[i]);
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}
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/* Newer chips don't have clock dividers */
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if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
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i = it87_read_value(data, IT87_REG_FAN_DIV);
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data->fan_div[0] = i & 0x07;
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data->fan_div[1] = (i >> 3) & 0x07;
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data->fan_div[2] = (i & 0x40) ? 3 : 1;
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}
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data->alarms =
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it87_read_value(data, IT87_REG_ALARM1) |
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(it87_read_value(data, IT87_REG_ALARM2) << 8) |
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(it87_read_value(data, IT87_REG_ALARM3) << 16);
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data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
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data->fan_main_ctrl = it87_read_value(data,
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IT87_REG_FAN_MAIN_CTRL);
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data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
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for (i = 0; i < 6; i++)
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it87_update_pwm_ctrl(data, i);
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data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
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data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
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/*
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* The IT8705F does not have VID capability.
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* The IT8718F and later don't use IT87_REG_VID for the
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* same purpose.
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*/
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if (data->type == it8712 || data->type == it8716) {
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data->vid = it87_read_value(data, IT87_REG_VID);
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/*
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* The older IT8712F revisions had only 5 VID pins,
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* but we assume it is always safe to read 6 bits.
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*/
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data->vid &= 0x3f;
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}
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data->last_updated = jiffies;
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data->valid = 1;
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}
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mutex_unlock(&data->update_lock);
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return data;
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}
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static ssize_t show_in(struct device *dev, struct device_attribute *attr,
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char *buf)
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@ -2341,6 +2478,175 @@ static void it87_remove_files(struct device *dev)
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sysfs_remove_group(&dev->kobj, &it87_group_label);
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}
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/* Called when we have found a new IT87. */
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static void it87_init_device(struct platform_device *pdev)
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{
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struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
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struct it87_data *data = platform_get_drvdata(pdev);
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int tmp, i;
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u8 mask;
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/*
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* For each PWM channel:
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* - If it is in automatic mode, setting to manual mode should set
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* the fan to full speed by default.
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* - If it is in manual mode, we need a mapping to temperature
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* channels to use when later setting to automatic mode later.
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* Use a 1:1 mapping by default (we are clueless.)
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* In both cases, the value can (and should) be changed by the user
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* prior to switching to a different mode.
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* Note that this is no longer needed for the IT8721F and later, as
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* these have separate registers for the temperature mapping and the
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* manual duty cycle.
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*/
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for (i = 0; i < 3; i++) {
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data->pwm_temp_map[i] = i;
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data->pwm_duty[i] = 0x7f; /* Full speed */
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data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
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}
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/*
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* Some chips seem to have default value 0xff for all limit
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* registers. For low voltage limits it makes no sense and triggers
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* alarms, so change to 0 instead. For high temperature limits, it
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* means -1 degree C, which surprisingly doesn't trigger an alarm,
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* but is still confusing, so change to 127 degrees C.
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*/
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for (i = 0; i < 8; i++) {
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tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
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if (tmp == 0xff)
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it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
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}
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for (i = 0; i < 3; i++) {
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tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
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if (tmp == 0xff)
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it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
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}
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/*
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* Temperature channels are not forcibly enabled, as they can be
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* set to two different sensor types and we can't guess which one
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* is correct for a given system. These channels can be enabled at
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* run-time through the temp{1-3}_type sysfs accessors if needed.
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*/
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/* Check if voltage monitors are reset manually or by some reason */
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tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
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if ((tmp & 0xff) == 0) {
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/* Enable all voltage monitors */
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it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
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}
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/* Check if tachometers are reset manually or by some reason */
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mask = 0x70 & ~(sio_data->skip_fan << 4);
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data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
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if ((data->fan_main_ctrl & mask) == 0) {
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/* Enable all fan tachometers */
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data->fan_main_ctrl |= mask;
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it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
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data->fan_main_ctrl);
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}
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data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
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tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
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/* Set tachometers to 16-bit mode if needed */
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if (has_fan16_config(data)) {
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if (~tmp & 0x07 & data->has_fan) {
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dev_dbg(&pdev->dev,
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"Setting fan1-3 to 16-bit mode\n");
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it87_write_value(data, IT87_REG_FAN_16BIT,
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tmp | 0x07);
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}
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}
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/* Check for additional fans */
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if (has_five_fans(data)) {
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if (tmp & (1 << 4))
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data->has_fan |= (1 << 3); /* fan4 enabled */
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if (tmp & (1 << 5))
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data->has_fan |= (1 << 4); /* fan5 enabled */
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if (has_six_fans(data) && (tmp & (1 << 2)))
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data->has_fan |= (1 << 5); /* fan6 enabled */
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}
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/* Fan input pins may be used for alternative functions */
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data->has_fan &= ~sio_data->skip_fan;
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/* Check if pwm5, pwm6 are enabled */
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if (has_six_pwm(data)) {
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/* The following code may be IT8620E specific */
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tmp = it87_read_value(data, IT87_REG_FAN_DIV);
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if ((tmp & 0xc0) == 0xc0)
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sio_data->skip_pwm |= (1 << 4);
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if (!(tmp & (1 << 3)))
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sio_data->skip_pwm |= (1 << 5);
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}
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/* Start monitoring */
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it87_write_value(data, IT87_REG_CONFIG,
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(it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
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| (update_vbat ? 0x41 : 0x01));
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}
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/* Return 1 if and only if the PWM interface is safe to use */
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static int it87_check_pwm(struct device *dev)
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{
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struct it87_data *data = dev_get_drvdata(dev);
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/*
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* Some BIOSes fail to correctly configure the IT87 fans. All fans off
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* and polarity set to active low is sign that this is the case so we
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* disable pwm control to protect the user.
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*/
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int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
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if ((tmp & 0x87) == 0) {
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if (fix_pwm_polarity) {
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/*
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* The user asks us to attempt a chip reconfiguration.
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* This means switching to active high polarity and
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* inverting all fan speed values.
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*/
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int i;
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u8 pwm[3];
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for (i = 0; i < 3; i++)
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pwm[i] = it87_read_value(data,
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IT87_REG_PWM[i]);
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/*
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* If any fan is in automatic pwm mode, the polarity
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* might be correct, as suspicious as it seems, so we
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* better don't change anything (but still disable the
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* PWM interface).
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*/
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if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
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dev_info(dev,
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"Reconfiguring PWM to active high polarity\n");
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it87_write_value(data, IT87_REG_FAN_CTL,
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tmp | 0x87);
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for (i = 0; i < 3; i++)
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it87_write_value(data,
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IT87_REG_PWM[i],
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0x7f & ~pwm[i]);
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return 1;
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}
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dev_info(dev,
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"PWM configuration is too broken to be fixed\n");
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}
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dev_info(dev,
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"Detected broken BIOS defaults, disabling PWM interface\n");
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return 0;
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} else if (fix_pwm_polarity) {
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dev_info(dev,
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"PWM configuration looks sane, won't touch\n");
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}
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return 1;
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}
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static int it87_probe(struct platform_device *pdev)
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{
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struct it87_data *data;
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@ -2570,328 +2876,13 @@ static int it87_remove(struct platform_device *pdev)
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return 0;
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}
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/*
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* Must be called with data->update_lock held, except during initialization.
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* We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
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* would slow down the IT87 access and should not be necessary.
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*/
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static int it87_read_value(struct it87_data *data, u8 reg)
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{
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outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
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return inb_p(data->addr + IT87_DATA_REG_OFFSET);
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}
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/*
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* Must be called with data->update_lock held, except during initialization.
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* We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
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* would slow down the IT87 access and should not be necessary.
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*/
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static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
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{
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outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
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outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
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}
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/* Return 1 if and only if the PWM interface is safe to use */
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static int it87_check_pwm(struct device *dev)
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{
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struct it87_data *data = dev_get_drvdata(dev);
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/*
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* Some BIOSes fail to correctly configure the IT87 fans. All fans off
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* and polarity set to active low is sign that this is the case so we
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* disable pwm control to protect the user.
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*/
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int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
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if ((tmp & 0x87) == 0) {
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if (fix_pwm_polarity) {
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/*
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* The user asks us to attempt a chip reconfiguration.
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* This means switching to active high polarity and
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* inverting all fan speed values.
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*/
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int i;
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u8 pwm[3];
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for (i = 0; i < 3; i++)
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pwm[i] = it87_read_value(data,
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IT87_REG_PWM[i]);
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/*
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* If any fan is in automatic pwm mode, the polarity
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* might be correct, as suspicious as it seems, so we
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* better don't change anything (but still disable the
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* PWM interface).
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*/
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if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
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dev_info(dev,
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"Reconfiguring PWM to active high polarity\n");
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it87_write_value(data, IT87_REG_FAN_CTL,
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tmp | 0x87);
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for (i = 0; i < 3; i++)
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it87_write_value(data,
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IT87_REG_PWM[i],
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0x7f & ~pwm[i]);
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return 1;
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}
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dev_info(dev,
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"PWM configuration is too broken to be fixed\n");
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}
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dev_info(dev,
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||||
"Detected broken BIOS defaults, disabling PWM interface\n");
|
||||
return 0;
|
||||
} else if (fix_pwm_polarity) {
|
||||
dev_info(dev,
|
||||
"PWM configuration looks sane, won't touch\n");
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Called when we have found a new IT87. */
|
||||
static void it87_init_device(struct platform_device *pdev)
|
||||
{
|
||||
struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
|
||||
struct it87_data *data = platform_get_drvdata(pdev);
|
||||
int tmp, i;
|
||||
u8 mask;
|
||||
|
||||
/*
|
||||
* For each PWM channel:
|
||||
* - If it is in automatic mode, setting to manual mode should set
|
||||
* the fan to full speed by default.
|
||||
* - If it is in manual mode, we need a mapping to temperature
|
||||
* channels to use when later setting to automatic mode later.
|
||||
* Use a 1:1 mapping by default (we are clueless.)
|
||||
* In both cases, the value can (and should) be changed by the user
|
||||
* prior to switching to a different mode.
|
||||
* Note that this is no longer needed for the IT8721F and later, as
|
||||
* these have separate registers for the temperature mapping and the
|
||||
* manual duty cycle.
|
||||
*/
|
||||
for (i = 0; i < 3; i++) {
|
||||
data->pwm_temp_map[i] = i;
|
||||
data->pwm_duty[i] = 0x7f; /* Full speed */
|
||||
data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
|
||||
}
|
||||
|
||||
/*
|
||||
* Some chips seem to have default value 0xff for all limit
|
||||
* registers. For low voltage limits it makes no sense and triggers
|
||||
* alarms, so change to 0 instead. For high temperature limits, it
|
||||
* means -1 degree C, which surprisingly doesn't trigger an alarm,
|
||||
* but is still confusing, so change to 127 degrees C.
|
||||
*/
|
||||
for (i = 0; i < 8; i++) {
|
||||
tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
|
||||
if (tmp == 0xff)
|
||||
it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
|
||||
}
|
||||
for (i = 0; i < 3; i++) {
|
||||
tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
|
||||
if (tmp == 0xff)
|
||||
it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
|
||||
}
|
||||
|
||||
/*
|
||||
* Temperature channels are not forcibly enabled, as they can be
|
||||
* set to two different sensor types and we can't guess which one
|
||||
* is correct for a given system. These channels can be enabled at
|
||||
* run-time through the temp{1-3}_type sysfs accessors if needed.
|
||||
*/
|
||||
|
||||
/* Check if voltage monitors are reset manually or by some reason */
|
||||
tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
|
||||
if ((tmp & 0xff) == 0) {
|
||||
/* Enable all voltage monitors */
|
||||
it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
|
||||
}
|
||||
|
||||
/* Check if tachometers are reset manually or by some reason */
|
||||
mask = 0x70 & ~(sio_data->skip_fan << 4);
|
||||
data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
|
||||
if ((data->fan_main_ctrl & mask) == 0) {
|
||||
/* Enable all fan tachometers */
|
||||
data->fan_main_ctrl |= mask;
|
||||
it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
|
||||
data->fan_main_ctrl);
|
||||
}
|
||||
data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
|
||||
|
||||
tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
|
||||
|
||||
/* Set tachometers to 16-bit mode if needed */
|
||||
if (has_fan16_config(data)) {
|
||||
if (~tmp & 0x07 & data->has_fan) {
|
||||
dev_dbg(&pdev->dev,
|
||||
"Setting fan1-3 to 16-bit mode\n");
|
||||
it87_write_value(data, IT87_REG_FAN_16BIT,
|
||||
tmp | 0x07);
|
||||
}
|
||||
}
|
||||
|
||||
/* Check for additional fans */
|
||||
if (has_five_fans(data)) {
|
||||
if (tmp & (1 << 4))
|
||||
data->has_fan |= (1 << 3); /* fan4 enabled */
|
||||
if (tmp & (1 << 5))
|
||||
data->has_fan |= (1 << 4); /* fan5 enabled */
|
||||
if (has_six_fans(data) && (tmp & (1 << 2)))
|
||||
data->has_fan |= (1 << 5); /* fan6 enabled */
|
||||
}
|
||||
|
||||
/* Fan input pins may be used for alternative functions */
|
||||
data->has_fan &= ~sio_data->skip_fan;
|
||||
|
||||
/* Check if pwm5, pwm6 are enabled */
|
||||
if (has_six_pwm(data)) {
|
||||
/* The following code may be IT8620E specific */
|
||||
tmp = it87_read_value(data, IT87_REG_FAN_DIV);
|
||||
if ((tmp & 0xc0) == 0xc0)
|
||||
sio_data->skip_pwm |= (1 << 4);
|
||||
if (!(tmp & (1 << 3)))
|
||||
sio_data->skip_pwm |= (1 << 5);
|
||||
}
|
||||
|
||||
/* Start monitoring */
|
||||
it87_write_value(data, IT87_REG_CONFIG,
|
||||
(it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
|
||||
| (update_vbat ? 0x41 : 0x01));
|
||||
}
|
||||
|
||||
static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
|
||||
{
|
||||
data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
|
||||
if (has_newer_autopwm(data)) {
|
||||
data->pwm_temp_map[nr] = (data->pwm_ctrl[nr] & 0x03) +
|
||||
nr < 3 ? 0 : 3;
|
||||
data->pwm_duty[nr] = it87_read_value(data,
|
||||
IT87_REG_PWM_DUTY[nr]);
|
||||
} else {
|
||||
if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
|
||||
data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
|
||||
else /* Manual mode */
|
||||
data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
|
||||
}
|
||||
|
||||
if (has_old_autopwm(data)) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 5 ; i++)
|
||||
data->auto_temp[nr][i] = it87_read_value(data,
|
||||
IT87_REG_AUTO_TEMP(nr, i));
|
||||
for (i = 0; i < 3 ; i++)
|
||||
data->auto_pwm[nr][i] = it87_read_value(data,
|
||||
IT87_REG_AUTO_PWM(nr, i));
|
||||
}
|
||||
}
|
||||
|
||||
static struct it87_data *it87_update_device(struct device *dev)
|
||||
{
|
||||
struct it87_data *data = dev_get_drvdata(dev);
|
||||
int i;
|
||||
|
||||
mutex_lock(&data->update_lock);
|
||||
|
||||
if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|
||||
|| !data->valid) {
|
||||
if (update_vbat) {
|
||||
/*
|
||||
* Cleared after each update, so reenable. Value
|
||||
* returned by this read will be previous value
|
||||
*/
|
||||
it87_write_value(data, IT87_REG_CONFIG,
|
||||
it87_read_value(data, IT87_REG_CONFIG) | 0x40);
|
||||
}
|
||||
for (i = 0; i <= 7; i++) {
|
||||
data->in[i][0] =
|
||||
it87_read_value(data, IT87_REG_VIN(i));
|
||||
data->in[i][1] =
|
||||
it87_read_value(data, IT87_REG_VIN_MIN(i));
|
||||
data->in[i][2] =
|
||||
it87_read_value(data, IT87_REG_VIN_MAX(i));
|
||||
}
|
||||
/* in8 (battery) has no limit registers */
|
||||
data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
|
||||
if (has_avcc3(data))
|
||||
data->in[9][0] = it87_read_value(data, IT87_REG_AVCC3);
|
||||
|
||||
for (i = 0; i < 6; i++) {
|
||||
/* Skip disabled fans */
|
||||
if (!(data->has_fan & (1 << i)))
|
||||
continue;
|
||||
|
||||
data->fan[i][1] =
|
||||
it87_read_value(data, IT87_REG_FAN_MIN[i]);
|
||||
data->fan[i][0] = it87_read_value(data,
|
||||
IT87_REG_FAN[i]);
|
||||
/* Add high byte if in 16-bit mode */
|
||||
if (has_16bit_fans(data)) {
|
||||
data->fan[i][0] |= it87_read_value(data,
|
||||
IT87_REG_FANX[i]) << 8;
|
||||
data->fan[i][1] |= it87_read_value(data,
|
||||
IT87_REG_FANX_MIN[i]) << 8;
|
||||
}
|
||||
}
|
||||
for (i = 0; i < 3; i++) {
|
||||
if (!(data->has_temp & (1 << i)))
|
||||
continue;
|
||||
data->temp[i][0] =
|
||||
it87_read_value(data, IT87_REG_TEMP(i));
|
||||
data->temp[i][1] =
|
||||
it87_read_value(data, IT87_REG_TEMP_LOW(i));
|
||||
data->temp[i][2] =
|
||||
it87_read_value(data, IT87_REG_TEMP_HIGH(i));
|
||||
if (has_temp_offset(data))
|
||||
data->temp[i][3] =
|
||||
it87_read_value(data,
|
||||
IT87_REG_TEMP_OFFSET[i]);
|
||||
}
|
||||
|
||||
/* Newer chips don't have clock dividers */
|
||||
if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
|
||||
i = it87_read_value(data, IT87_REG_FAN_DIV);
|
||||
data->fan_div[0] = i & 0x07;
|
||||
data->fan_div[1] = (i >> 3) & 0x07;
|
||||
data->fan_div[2] = (i & 0x40) ? 3 : 1;
|
||||
}
|
||||
|
||||
data->alarms =
|
||||
it87_read_value(data, IT87_REG_ALARM1) |
|
||||
(it87_read_value(data, IT87_REG_ALARM2) << 8) |
|
||||
(it87_read_value(data, IT87_REG_ALARM3) << 16);
|
||||
data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
|
||||
|
||||
data->fan_main_ctrl = it87_read_value(data,
|
||||
IT87_REG_FAN_MAIN_CTRL);
|
||||
data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
|
||||
for (i = 0; i < 6; i++)
|
||||
it87_update_pwm_ctrl(data, i);
|
||||
|
||||
data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
|
||||
data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
|
||||
/*
|
||||
* The IT8705F does not have VID capability.
|
||||
* The IT8718F and later don't use IT87_REG_VID for the
|
||||
* same purpose.
|
||||
*/
|
||||
if (data->type == it8712 || data->type == it8716) {
|
||||
data->vid = it87_read_value(data, IT87_REG_VID);
|
||||
/*
|
||||
* The older IT8712F revisions had only 5 VID pins,
|
||||
* but we assume it is always safe to read 6 bits.
|
||||
*/
|
||||
data->vid &= 0x3f;
|
||||
}
|
||||
data->last_updated = jiffies;
|
||||
data->valid = 1;
|
||||
}
|
||||
|
||||
mutex_unlock(&data->update_lock);
|
||||
|
||||
return data;
|
||||
}
|
||||
static struct platform_driver it87_driver = {
|
||||
.driver = {
|
||||
.name = DRVNAME,
|
||||
},
|
||||
.probe = it87_probe,
|
||||
.remove = it87_remove,
|
||||
};
|
||||
|
||||
static int __init it87_device_add(int index, unsigned short address,
|
||||
const struct it87_sio_data *sio_data)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user