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drm/i915: Remove ppgtt->dirty_engines

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This is no longer used anywhere and so can be removed. However, tracking
the dirty status on the ppgtt doesn't work very well if the ppgtt is
shared, so perhaps for the best that it is no longer required.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190830180000.24608-3-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2019-08-30 19:00:00 +01:00
parent 0b718ba1e8
commit c1d143dd2a
2 changed files with 1 additions and 16 deletions
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16
drivers/gpu/drm/i915/i915_gem_gtt.c
View File

@ -823,17 +823,6 @@ release_pd_entry(struct i915_page_directory * const pd,
return free;
}
/*
* PDE TLBs are a pain to invalidate on GEN8+. When we modify
* the page table structures, we mark them dirty so that
* context switching/execlist queuing code takes extra steps
* to ensure that tlbs are flushed.
*/
static void mark_tlbs_dirty(struct i915_ppgtt *ppgtt)
{
ppgtt->pd_dirty_engines = ALL_ENGINES;
}
static void gen8_ppgtt_notify_vgt(struct i915_ppgtt *ppgtt, bool create)
{
struct drm_i915_private *dev_priv = ppgtt->vm.i915;
@ -1735,10 +1724,8 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
}
spin_unlock(&pd->lock);
if (flush) {
mark_tlbs_dirty(&ppgtt->base);
if (flush)
gen6_ggtt_invalidate(vm->gt->ggtt);
}
goto out;
@ -1833,7 +1820,6 @@ static int pd_vma_bind(struct i915_vma *vma,
gen6_for_all_pdes(pt, ppgtt->base.pd, pde)
gen6_write_pde(ppgtt, pde, pt);
mark_tlbs_dirty(&ppgtt->base);
gen6_ggtt_invalidate(ggtt);
return 0;

1
drivers/gpu/drm/i915/i915_gem_gtt.h
View File

@ -422,7 +422,6 @@ struct i915_ggtt {
struct i915_ppgtt {
struct i915_address_space vm;
intel_engine_mask_t pd_dirty_engines;
struct i915_page_directory *pd;
};