forked from Minki/linux
sky2: support Yukon EC_U rev B1 and later
Need to change logic to support later versions of Yukon 2 EC_U chip. Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -877,6 +877,10 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
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if (hw->dev[port]->mtu > ETH_DATA_LEN)
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reg |= GM_SMOD_JUMBO_ENA;
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if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
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hw->chip_rev == CHIP_REV_YU_EC_U_B1)
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reg |= GM_NEW_FLOW_CTRL;
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gma_write16(hw, port, GM_SERIAL_MODE, reg);
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/* virtual address for data */
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@ -1413,8 +1417,7 @@ static void sky2_rx_start(struct sky2_port *sky2)
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/* These chips have no ram buffer?
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* MAC Rx RAM Read is controlled by hardware */
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if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
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(hw->chip_rev == CHIP_REV_YU_EC_U_A1 ||
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hw->chip_rev == CHIP_REV_YU_EC_U_B0))
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hw->chip_rev > CHIP_REV_YU_EC_U_A0)
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sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
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sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
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@ -557,6 +557,7 @@ enum yukon_ec_u_rev {
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CHIP_REV_YU_EC_U_A0 = 1,
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CHIP_REV_YU_EC_U_A1 = 2,
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CHIP_REV_YU_EC_U_B0 = 3,
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CHIP_REV_YU_EC_U_B1 = 5,
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};
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enum yukon_fe_rev {
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CHIP_REV_YU_FE_A1 = 1,
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@ -1775,10 +1776,13 @@ enum {
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/* GM_SERIAL_MODE 16 bit r/w Serial Mode Register */
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enum {
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GM_SMOD_DATABL_MSK = 0x1f<<11, /* Bit 15..11: Data Blinder (r/o) */
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GM_SMOD_LIMIT_4 = 1<<10, /* Bit 10: 4 consecutive Tx trials */
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GM_SMOD_VLAN_ENA = 1<<9, /* Bit 9: Enable VLAN (Max. Frame Len) */
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GM_SMOD_JUMBO_ENA = 1<<8, /* Bit 8: Enable Jumbo (Max. Frame Len) */
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GM_SMOD_IPG_MSK = 0x1f /* Bit 4..0: Inter-Packet Gap (IPG) */
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GM_SMOD_LIMIT_4 = 1<<10, /* 4 consecutive Tx trials */
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GM_SMOD_VLAN_ENA = 1<<9, /* Enable VLAN (Max. Frame Len) */
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GM_SMOD_JUMBO_ENA = 1<<8, /* Enable Jumbo (Max. Frame Len) */
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GM_NEW_FLOW_CTRL = 1<<6, /* Enable New Flow-Control */
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GM_SMOD_IPG_MSK = 0x1f /* Bit 4..0: Inter-Packet Gap (IPG) */
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};
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#define DATA_BLIND_VAL(x) (((x)<<11) & GM_SMOD_DATABL_MSK)
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