forked from Minki/linux
Merge 3.16-rc4 into staging-next
We want the staging tree fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
commit
c1a567d31b
4
CREDITS
4
CREDITS
@ -9,6 +9,10 @@
|
||||
Linus
|
||||
----------
|
||||
|
||||
M: Matt Mackal
|
||||
E: mpm@selenic.com
|
||||
D: SLOB slab allocator
|
||||
|
||||
N: Matti Aarnio
|
||||
E: mea@nic.funet.fi
|
||||
D: Alpha systems hacking, IPv6 and other network related stuff
|
||||
|
@ -314,6 +314,7 @@ int main(int argc, char *argv[])
|
||||
break;
|
||||
case 'm':
|
||||
strncpy(cpumask, optarg, sizeof(cpumask));
|
||||
cpumask[sizeof(cpumask) - 1] = '\0';
|
||||
maskset = 1;
|
||||
printf("cpumask %s maskset %d\n", cpumask, maskset);
|
||||
break;
|
||||
|
@ -6,5 +6,15 @@ following property:
|
||||
|
||||
Required root node property:
|
||||
|
||||
- compatible: must contain either "marvell,armada380" or
|
||||
"marvell,armada385" depending on the variant of the SoC being used.
|
||||
- compatible: must contain "marvell,armada380"
|
||||
|
||||
In addition, boards using the Marvell Armada 385 SoC shall have the
|
||||
following property before the previous one:
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible: must contain "marvell,armada385"
|
||||
|
||||
Example:
|
||||
|
||||
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
|
||||
|
@ -40,6 +40,9 @@ Optional properties:
|
||||
- arm,filter-ranges : <start length> Starting address and length of window to
|
||||
filter. Addresses in the filter window are directed to the M1 port. Other
|
||||
addresses will go to the M0 port.
|
||||
- arm,io-coherent : indicates that the system is operating in an hardware
|
||||
I/O coherent mode. Valid only when the arm,pl310-cache compatible
|
||||
string is used.
|
||||
- interrupts : 1 combined interrupt.
|
||||
- cache-id-part: cache id part number to be used if it is not present
|
||||
on hardware
|
||||
|
@ -48,7 +48,7 @@ adc@12D10000 {
|
||||
|
||||
/* NTC thermistor is a hwmon device */
|
||||
ncp15wb473@0 {
|
||||
compatible = "ntc,ncp15wb473";
|
||||
compatible = "murata,ncp15wb473";
|
||||
pullup-uv = <1800000>;
|
||||
pullup-ohm = <47000>;
|
||||
pulldown-ohm = <0>;
|
||||
|
@ -3,11 +3,19 @@ NTC Thermistor hwmon sensors
|
||||
|
||||
Requires node properties:
|
||||
- "compatible" value : one of
|
||||
"ntc,ncp15wb473"
|
||||
"ntc,ncp18wb473"
|
||||
"ntc,ncp21wb473"
|
||||
"ntc,ncp03wb473"
|
||||
"ntc,ncp15wl333"
|
||||
"murata,ncp15wb473"
|
||||
"murata,ncp18wb473"
|
||||
"murata,ncp21wb473"
|
||||
"murata,ncp03wb473"
|
||||
"murata,ncp15wl333"
|
||||
|
||||
/* Usage of vendor name "ntc" is deprecated */
|
||||
<DEPRECATED> "ntc,ncp15wb473"
|
||||
<DEPRECATED> "ntc,ncp18wb473"
|
||||
<DEPRECATED> "ntc,ncp21wb473"
|
||||
<DEPRECATED> "ntc,ncp03wb473"
|
||||
<DEPRECATED> "ntc,ncp15wl333"
|
||||
|
||||
- "pullup-uv" Pull up voltage in micro volts
|
||||
- "pullup-ohm" Pull up resistor value in ohms
|
||||
- "pulldown-ohm" Pull down resistor value in ohms
|
||||
@ -21,7 +29,7 @@ Read more about iio bindings at
|
||||
|
||||
Example:
|
||||
ncp15wb473@0 {
|
||||
compatible = "ntc,ncp15wb473";
|
||||
compatible = "murata,ncp15wb473";
|
||||
pullup-uv = <1800000>;
|
||||
pullup-ohm = <47000>;
|
||||
pulldown-ohm = <0>;
|
||||
|
@ -23,6 +23,12 @@ Optional properties:
|
||||
- spi-max-frequency: Specifies maximum SPI clock frequency,
|
||||
Units - Hz. Definition as per
|
||||
Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
- num-cs: total number of chipselects
|
||||
- cs-gpios: should specify GPIOs used for chipselects.
|
||||
The gpios will be referred to as reg = <index> in the SPI child
|
||||
nodes. If unspecified, a single SPI device without a chip
|
||||
select can be used.
|
||||
|
||||
|
||||
SPI slave nodes must be children of the SPI master node and can contain
|
||||
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
|
@ -83,6 +83,7 @@ mosaixtech Mosaix Technologies, Inc.
|
||||
moxa Moxa
|
||||
mpl MPL AG
|
||||
mundoreader Mundo Reader S.L.
|
||||
murata Murata Manufacturing Co., Ltd.
|
||||
mxicy Macronix International Co., Ltd.
|
||||
national National Semiconductor
|
||||
neonode Neonode Inc.
|
||||
|
@ -1,6 +1,17 @@
|
||||
Email clients info for Linux
|
||||
======================================================================
|
||||
|
||||
Git
|
||||
----------------------------------------------------------------------
|
||||
These days most developers use `git send-email` instead of regular
|
||||
email clients. The man page for this is quite good. On the receiving
|
||||
end, maintainers use `git am` to apply the patches.
|
||||
|
||||
If you are new to git then send your first patch to yourself. Save it
|
||||
as raw text including all the headers. Run `git am raw_email.txt` and
|
||||
then review the changelog with `git log`. When that works then send
|
||||
the patch to the appropriate mailing list(s).
|
||||
|
||||
General Preferences
|
||||
----------------------------------------------------------------------
|
||||
Patches for the Linux kernel are submitted via email, preferably as
|
||||
|
@ -1,7 +1,7 @@
|
||||
Kernel driver ntc_thermistor
|
||||
=================
|
||||
|
||||
Supported thermistors:
|
||||
Supported thermistors from Murata:
|
||||
* Murata NTC Thermistors NCP15WB473, NCP18WB473, NCP21WB473, NCP03WB473, NCP15WL333
|
||||
Prefixes: 'ncp15wb473', 'ncp18wb473', 'ncp21wb473', 'ncp03wb473', 'ncp15wl333'
|
||||
Datasheet: Publicly available at Murata
|
||||
@ -15,9 +15,9 @@ Authors:
|
||||
Description
|
||||
-----------
|
||||
|
||||
The NTC thermistor is a simple thermistor that requires users to provide the
|
||||
resistance and lookup the corresponding compensation table to get the
|
||||
temperature input.
|
||||
The NTC (Negative Temperature Coefficient) thermistor is a simple thermistor
|
||||
that requires users to provide the resistance and lookup the corresponding
|
||||
compensation table to get the temperature input.
|
||||
|
||||
The NTC driver provides lookup tables with a linear approximation function
|
||||
and four circuit models with an option not to use any of the four models.
|
||||
|
@ -3130,6 +3130,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||
[KNL] Should the soft-lockup detector generate panics.
|
||||
Format: <integer>
|
||||
|
||||
softlockup_all_cpu_backtrace=
|
||||
[KNL] Should the soft-lockup detector generate
|
||||
backtraces on all cpus.
|
||||
Format: <integer>
|
||||
|
||||
sonypi.*= [HW] Sony Programmable I/O Control Device driver
|
||||
See Documentation/laptops/sonypi.txt
|
||||
|
||||
|
@ -209,15 +209,12 @@ If memory device is found, memory hotplug code will be called.
|
||||
|
||||
4.2 Notify memory hot-add event by hand
|
||||
------------
|
||||
On powerpc, the firmware does not notify a memory hotplug event to the kernel.
|
||||
Therefore, "probe" interface is supported to notify the event to the kernel.
|
||||
This interface depends on CONFIG_ARCH_MEMORY_PROBE.
|
||||
|
||||
CONFIG_ARCH_MEMORY_PROBE is supported on powerpc only. On x86, this config
|
||||
option is disabled by default since ACPI notifies a memory hotplug event to
|
||||
the kernel, which performs its hotplug operation as the result. Please
|
||||
enable this option if you need the "probe" interface for testing purposes
|
||||
on x86.
|
||||
On some architectures, the firmware may not notify the kernel of a memory
|
||||
hotplug event. Therefore, the memory "probe" interface is supported to
|
||||
explicitly notify the kernel. This interface depends on
|
||||
CONFIG_ARCH_MEMORY_PROBE and can be configured on powerpc, sh, and x86
|
||||
if hotplug is supported, although for x86 this should be handled by ACPI
|
||||
notification.
|
||||
|
||||
Probe interface is located at
|
||||
/sys/devices/system/memory/probe
|
||||
|
@ -17,6 +17,7 @@
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
#define _GNU_SOURCE
|
||||
#include <errno.h>
|
||||
#include <fcntl.h>
|
||||
#include <inttypes.h>
|
||||
@ -46,12 +47,14 @@
|
||||
#define CLOCK_INVALID -1
|
||||
#endif
|
||||
|
||||
/* When glibc offers the syscall, this will go away. */
|
||||
/* clock_adjtime is not available in GLIBC < 2.14 */
|
||||
#if !__GLIBC_PREREQ(2, 14)
|
||||
#include <sys/syscall.h>
|
||||
static int clock_adjtime(clockid_t id, struct timex *tx)
|
||||
{
|
||||
return syscall(__NR_clock_adjtime, id, tx);
|
||||
}
|
||||
#endif
|
||||
|
||||
static clockid_t get_clockid(int fd)
|
||||
{
|
||||
|
@ -286,6 +286,11 @@ STAC92HD83*
|
||||
hp-inv-led HP with broken BIOS for inverted mute LED
|
||||
auto BIOS setup (default)
|
||||
|
||||
STAC92HD95
|
||||
==========
|
||||
hp-led LED support for HP laptops
|
||||
hp-bass Bass HPF setup for HP Spectre 13
|
||||
|
||||
STAC9872
|
||||
========
|
||||
vaio VAIO laptop without SPDIF
|
||||
|
@ -75,6 +75,7 @@ show up in /proc/sys/kernel:
|
||||
- shmall
|
||||
- shmmax [ sysv ipc ]
|
||||
- shmmni
|
||||
- softlockup_all_cpu_backtrace
|
||||
- stop-a [ SPARC only ]
|
||||
- sysrq ==> Documentation/sysrq.txt
|
||||
- sysctl_writes_strict
|
||||
@ -783,6 +784,22 @@ via the /proc/sys interface:
|
||||
|
||||
==============================================================
|
||||
|
||||
softlockup_all_cpu_backtrace:
|
||||
|
||||
This value controls the soft lockup detector thread's behavior
|
||||
when a soft lockup condition is detected as to whether or not
|
||||
to gather further debug information. If enabled, each cpu will
|
||||
be issued an NMI and instructed to capture stack trace.
|
||||
|
||||
This feature is only applicable for architectures which support
|
||||
NMI.
|
||||
|
||||
0: do nothing. This is the default behavior.
|
||||
|
||||
1: on detection capture more debug information.
|
||||
|
||||
==============================================================
|
||||
|
||||
tainted:
|
||||
|
||||
Non-zero if the kernel has been tainted. Numeric values, which
|
||||
|
@ -702,7 +702,8 @@ The batch value of each per cpu pagelist is also updated as a result. It is
|
||||
set to pcp->high/4. The upper limit of batch is (PAGE_SHIFT * 8)
|
||||
|
||||
The initial value is zero. Kernel does not use this value at boot time to set
|
||||
the high water marks for each per cpu page list.
|
||||
the high water marks for each per cpu page list. If the user writes '0' to this
|
||||
sysctl, it will revert to this default behavior.
|
||||
|
||||
==============================================================
|
||||
|
||||
|
@ -47,7 +47,6 @@ use constant HIGH_KSWAPD_REWAKEUP => 21;
|
||||
use constant HIGH_NR_SCANNED => 22;
|
||||
use constant HIGH_NR_TAKEN => 23;
|
||||
use constant HIGH_NR_RECLAIMED => 24;
|
||||
use constant HIGH_NR_CONTIG_DIRTY => 25;
|
||||
|
||||
my %perprocesspid;
|
||||
my %perprocess;
|
||||
@ -105,7 +104,7 @@ my $regex_direct_end_default = 'nr_reclaimed=([0-9]*)';
|
||||
my $regex_kswapd_wake_default = 'nid=([0-9]*) order=([0-9]*)';
|
||||
my $regex_kswapd_sleep_default = 'nid=([0-9]*)';
|
||||
my $regex_wakeup_kswapd_default = 'nid=([0-9]*) zid=([0-9]*) order=([0-9]*)';
|
||||
my $regex_lru_isolate_default = 'isolate_mode=([0-9]*) order=([0-9]*) nr_requested=([0-9]*) nr_scanned=([0-9]*) nr_taken=([0-9]*) contig_taken=([0-9]*) contig_dirty=([0-9]*) contig_failed=([0-9]*)';
|
||||
my $regex_lru_isolate_default = 'isolate_mode=([0-9]*) order=([0-9]*) nr_requested=([0-9]*) nr_scanned=([0-9]*) nr_taken=([0-9]*) file=([0-9]*)';
|
||||
my $regex_lru_shrink_inactive_default = 'nid=([0-9]*) zid=([0-9]*) nr_scanned=([0-9]*) nr_reclaimed=([0-9]*) priority=([0-9]*) flags=([A-Z_|]*)';
|
||||
my $regex_lru_shrink_active_default = 'lru=([A-Z_]*) nr_scanned=([0-9]*) nr_rotated=([0-9]*) priority=([0-9]*)';
|
||||
my $regex_writepage_default = 'page=([0-9a-f]*) pfn=([0-9]*) flags=([A-Z_|]*)';
|
||||
@ -200,7 +199,7 @@ $regex_lru_isolate = generate_traceevent_regex(
|
||||
$regex_lru_isolate_default,
|
||||
"isolate_mode", "order",
|
||||
"nr_requested", "nr_scanned", "nr_taken",
|
||||
"contig_taken", "contig_dirty", "contig_failed");
|
||||
"file");
|
||||
$regex_lru_shrink_inactive = generate_traceevent_regex(
|
||||
"vmscan/mm_vmscan_lru_shrink_inactive",
|
||||
$regex_lru_shrink_inactive_default,
|
||||
@ -375,7 +374,6 @@ EVENT_PROCESS:
|
||||
}
|
||||
my $isolate_mode = $1;
|
||||
my $nr_scanned = $4;
|
||||
my $nr_contig_dirty = $7;
|
||||
|
||||
# To closer match vmstat scanning statistics, only count isolate_both
|
||||
# and isolate_inactive as scanning. isolate_active is rotation
|
||||
@ -385,7 +383,6 @@ EVENT_PROCESS:
|
||||
if ($isolate_mode != 2) {
|
||||
$perprocesspid{$process_pid}->{HIGH_NR_SCANNED} += $nr_scanned;
|
||||
}
|
||||
$perprocesspid{$process_pid}->{HIGH_NR_CONTIG_DIRTY} += $nr_contig_dirty;
|
||||
} elsif ($tracepoint eq "mm_vmscan_lru_shrink_inactive") {
|
||||
$details = $6;
|
||||
if ($details !~ /$regex_lru_shrink_inactive/o) {
|
||||
@ -539,13 +536,6 @@ sub dump_stats {
|
||||
}
|
||||
}
|
||||
}
|
||||
if ($stats{$process_pid}->{HIGH_NR_CONTIG_DIRTY}) {
|
||||
print " ";
|
||||
my $count = $stats{$process_pid}->{HIGH_NR_CONTIG_DIRTY};
|
||||
if ($count != 0) {
|
||||
print "contig-dirty=$count ";
|
||||
}
|
||||
}
|
||||
|
||||
print "\n";
|
||||
}
|
||||
|
79
MAINTAINERS
79
MAINTAINERS
@ -943,16 +943,10 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
|
||||
F: arch/arm/mach-imx/
|
||||
F: arch/arm/mach-mxs/
|
||||
F: arch/arm/boot/dts/imx*
|
||||
F: arch/arm/configs/imx*_defconfig
|
||||
|
||||
ARM/FREESCALE MXS ARM ARCHITECTURE
|
||||
M: Shawn Guo <shawn.guo@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.linaro.org/people/shawnguo/linux-2.6.git
|
||||
F: arch/arm/mach-mxs/
|
||||
|
||||
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
@ -1052,9 +1046,33 @@ M: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-keystone/
|
||||
F: drivers/clk/keystone/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
|
||||
|
||||
ARM/TEXAS INSTRUMENT KEYSTONE CLOCK FRAMEWORK
|
||||
M: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/clk/keystone/
|
||||
|
||||
ARM/TEXAS INSTRUMENT KEYSTONE ClOCKSOURCE
|
||||
M: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/clocksource/timer-keystone.c
|
||||
|
||||
ARM/TEXAS INSTRUMENT KEYSTONE RESET DRIVER
|
||||
M: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/power/reset/keystone-reset.c
|
||||
|
||||
ARM/TEXAS INSTRUMENT AEMIF/EMIF DRIVERS
|
||||
M: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/memory/*emif*
|
||||
|
||||
ARM/LOGICPD PXA270 MACHINE SUPPORT
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
@ -2917,6 +2935,9 @@ L: linux-doc@vger.kernel.org
|
||||
T: quilt http://www.infradead.org/~rdunlap/Doc/patches/
|
||||
S: Maintained
|
||||
F: Documentation/
|
||||
X: Documentation/ABI/
|
||||
X: Documentation/devicetree/
|
||||
X: Documentation/[a-z][a-z]_[A-Z][A-Z]/
|
||||
|
||||
DOUBLETALK DRIVER
|
||||
M: "James R. Van Zandt" <jrv@vanzandt.mv.com>
|
||||
@ -3189,14 +3210,6 @@ L: linux-scsi@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/scsi/eata_pio.*
|
||||
|
||||
EBTABLES
|
||||
L: netfilter-devel@vger.kernel.org
|
||||
W: http://ebtables.sourceforge.net/
|
||||
S: Orphan
|
||||
F: include/linux/netfilter_bridge/ebt_*.h
|
||||
F: include/uapi/linux/netfilter_bridge/ebt_*.h
|
||||
F: net/bridge/netfilter/ebt*.c
|
||||
|
||||
EC100 MEDIA DRIVER
|
||||
M: Antti Palosaari <crope@iki.fi>
|
||||
L: linux-media@vger.kernel.org
|
||||
@ -5517,10 +5530,11 @@ S: Maintained
|
||||
F: arch/arm/mach-lpc32xx/
|
||||
|
||||
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
|
||||
M: Nagalakshmi Nandigama <Nagalakshmi.Nandigama@lsi.com>
|
||||
M: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
|
||||
M: support@lsi.com
|
||||
L: DL-MPTFusionLinux@lsi.com
|
||||
M: Nagalakshmi Nandigama <nagalakshmi.nandigama@avagotech.com>
|
||||
M: Praveen Krishnamoorthy <praveen.krishnamoorthy@avagotech.com>
|
||||
M: Sreekanth Reddy <sreekanth.reddy@avagotech.com>
|
||||
M: Abhijit Mahajan <abhijit.mahajan@avagotech.com>
|
||||
L: MPT-FusionLinux.pdl@avagotech.com
|
||||
L: linux-scsi@vger.kernel.org
|
||||
W: http://www.lsilogic.com/support
|
||||
S: Supported
|
||||
@ -6105,12 +6119,11 @@ F: Documentation/networking/s2io.txt
|
||||
F: Documentation/networking/vxge.txt
|
||||
F: drivers/net/ethernet/neterion/
|
||||
|
||||
NETFILTER/IPTABLES
|
||||
NETFILTER ({IP,IP6,ARP,EB,NF}TABLES)
|
||||
M: Pablo Neira Ayuso <pablo@netfilter.org>
|
||||
M: Patrick McHardy <kaber@trash.net>
|
||||
M: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
|
||||
L: netfilter-devel@vger.kernel.org
|
||||
L: netfilter@vger.kernel.org
|
||||
L: coreteam@netfilter.org
|
||||
W: http://www.netfilter.org/
|
||||
W: http://www.iptables.org/
|
||||
@ -8196,13 +8209,15 @@ S: Maintained
|
||||
F: drivers/usb/misc/sisusbvga/
|
||||
|
||||
SLAB ALLOCATOR
|
||||
M: Christoph Lameter <cl@linux-foundation.org>
|
||||
M: Christoph Lameter <cl@linux.com>
|
||||
M: Pekka Enberg <penberg@kernel.org>
|
||||
M: Matt Mackall <mpm@selenic.com>
|
||||
M: David Rientjes <rientjes@google.com>
|
||||
M: Joonsoo Kim <iamjoonsoo.kim@lge.com>
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: include/linux/sl?b*.h
|
||||
F: mm/sl?b.c
|
||||
F: mm/sl?b*
|
||||
|
||||
SLEEPABLE READ-COPY UPDATE (SRCU)
|
||||
M: Lai Jiangshan <laijs@cn.fujitsu.com>
|
||||
@ -9391,12 +9406,6 @@ S: Maintained
|
||||
F: drivers/usb/host/isp116x*
|
||||
F: include/linux/usb/isp116x.h
|
||||
|
||||
USB KAWASAKI LSI DRIVER
|
||||
M: Oliver Neukum <oliver@neukum.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/usb/serial/kl5kusb105.*
|
||||
|
||||
USB MASS STORAGE DRIVER
|
||||
M: Matthew Dharm <mdharm-usb@one-eyed-alien.net>
|
||||
L: linux-usb@vger.kernel.org
|
||||
@ -9424,12 +9433,6 @@ S: Maintained
|
||||
F: Documentation/usb/ohci.txt
|
||||
F: drivers/usb/host/ohci*
|
||||
|
||||
USB OPTION-CARD DRIVER
|
||||
M: Matthias Urlichs <smurf@smurf.noris.de>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/usb/serial/option.c
|
||||
|
||||
USB PEGASUS DRIVER
|
||||
M: Petko Manolov <petkan@nucleusys.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
@ -9462,7 +9465,7 @@ S: Maintained
|
||||
F: drivers/net/usb/rtl8150.c
|
||||
|
||||
USB SERIAL SUBSYSTEM
|
||||
M: Johan Hovold <jhovold@gmail.com>
|
||||
M: Johan Hovold <johan@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/usb/usb-serial.txt
|
||||
|
5
Makefile
5
Makefile
@ -1,7 +1,7 @@
|
||||
VERSION = 3
|
||||
PATCHLEVEL = 16
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Shuffling Zombie Juror
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@ -126,7 +126,10 @@ PHONY += $(MAKECMDGOALS) sub-make
|
||||
$(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make
|
||||
@:
|
||||
|
||||
# Fake the "Entering directory" message once, so that IDEs/editors are
|
||||
# able to understand relative filenames.
|
||||
sub-make: FORCE
|
||||
@echo "make[1]: Entering directory \`$(KBUILD_OUTPUT)'"
|
||||
$(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \
|
||||
KBUILD_SRC=$(CURDIR) \
|
||||
KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile \
|
||||
|
@ -60,7 +60,7 @@ extern void read_decode_cache_bcr(void);
|
||||
#define ARC_REG_IC_IVIC 0x10
|
||||
#define ARC_REG_IC_CTRL 0x11
|
||||
#define ARC_REG_IC_IVIL 0x19
|
||||
#if defined(CONFIG_ARC_MMU_V3) || defined (CONFIG_ARC_MMU_V4)
|
||||
#if defined(CONFIG_ARC_MMU_V3)
|
||||
#define ARC_REG_IC_PTAG 0x1E
|
||||
#endif
|
||||
|
||||
@ -74,7 +74,7 @@ extern void read_decode_cache_bcr(void);
|
||||
#define ARC_REG_DC_IVDL 0x4A
|
||||
#define ARC_REG_DC_FLSH 0x4B
|
||||
#define ARC_REG_DC_FLDL 0x4C
|
||||
#if defined(CONFIG_ARC_MMU_V3) || defined (CONFIG_ARC_MMU_V4)
|
||||
#if defined(CONFIG_ARC_MMU_V3)
|
||||
#define ARC_REG_DC_PTAG 0x5C
|
||||
#endif
|
||||
|
||||
|
@ -11,6 +11,7 @@
|
||||
#ifndef _UAPI__ASM_ARC_PTRACE_H
|
||||
#define _UAPI__ASM_ARC_PTRACE_H
|
||||
|
||||
#define PTRACE_GET_THREAD_AREA 25
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*
|
||||
|
@ -10,9 +10,9 @@
|
||||
* -This is the more "natural" hand written assembler
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/entry.h> /* For the SAVE_* macros */
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/linkage.h>
|
||||
|
||||
#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4)
|
||||
|
||||
|
@ -41,7 +41,7 @@ const struct machine_desc * __init setup_machine_fdt(void *dt)
|
||||
{
|
||||
const struct machine_desc *mdesc;
|
||||
unsigned long dt_root;
|
||||
void *clk;
|
||||
const void *clk;
|
||||
int len;
|
||||
|
||||
if (!early_init_dt_scan(dt))
|
||||
|
@ -77,10 +77,11 @@ stext:
|
||||
; Clear BSS before updating any globals
|
||||
; XXX: use ZOL here
|
||||
mov r5, __bss_start
|
||||
mov r6, __bss_stop
|
||||
1:
|
||||
sub r6, __bss_stop, r5
|
||||
lsr.f lp_count, r6, 2
|
||||
lpnz 1f
|
||||
st.ab 0, [r5, 4]
|
||||
brlt r5, r6, 1b
|
||||
1:
|
||||
|
||||
; Uboot - kernel ABI
|
||||
; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2
|
||||
|
@ -146,6 +146,10 @@ long arch_ptrace(struct task_struct *child, long request,
|
||||
pr_debug("REQ=%ld: ADDR =0x%lx, DATA=0x%lx)\n", request, addr, data);
|
||||
|
||||
switch (request) {
|
||||
case PTRACE_GET_THREAD_AREA:
|
||||
ret = put_user(task_thread_info(child)->thr_ptr,
|
||||
(unsigned long __user *)data);
|
||||
break;
|
||||
default:
|
||||
ret = ptrace_request(child, request, addr, data);
|
||||
break;
|
||||
|
@ -337,8 +337,19 @@ irqreturn_t do_IPI(int irq, void *dev_id)
|
||||
* API called by platform code to hookup arch-common ISR to their IPI IRQ
|
||||
*/
|
||||
static DEFINE_PER_CPU(int, ipi_dev);
|
||||
|
||||
static struct irqaction arc_ipi_irq = {
|
||||
.name = "IPI Interrupt",
|
||||
.flags = IRQF_PERCPU,
|
||||
.handler = do_IPI,
|
||||
};
|
||||
|
||||
int smp_ipi_irq_setup(int cpu, int irq)
|
||||
{
|
||||
int *dev_id = &per_cpu(ipi_dev, smp_processor_id());
|
||||
return request_percpu_irq(irq, do_IPI, "IPI Interrupt", dev_id);
|
||||
if (!cpu)
|
||||
return setup_irq(irq, &arc_ipi_irq);
|
||||
else
|
||||
arch_unmask_irq(irq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -116,7 +116,7 @@ SECTIONS
|
||||
|
||||
_edata = .;
|
||||
|
||||
BSS_SECTION(0, 0, 0)
|
||||
BSS_SECTION(4, 4, 4)
|
||||
|
||||
#ifdef CONFIG_ARC_DW2_UNWIND
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
|
@ -389,7 +389,7 @@ static inline void __dc_line_op(unsigned long paddr, unsigned long vaddr,
|
||||
/***********************************************************
|
||||
* Machine specific helper for per line I-Cache invalidate.
|
||||
*/
|
||||
static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr,
|
||||
static void __ic_line_inv_vaddr_local(unsigned long paddr, unsigned long vaddr,
|
||||
unsigned long sz)
|
||||
{
|
||||
unsigned long flags;
|
||||
@ -405,6 +405,23 @@ static inline void __ic_entire_inv(void)
|
||||
read_aux_reg(ARC_REG_IC_CTRL); /* blocks */
|
||||
}
|
||||
|
||||
struct ic_line_inv_vaddr_ipi {
|
||||
unsigned long paddr, vaddr;
|
||||
int sz;
|
||||
};
|
||||
|
||||
static void __ic_line_inv_vaddr_helper(void *info)
|
||||
{
|
||||
struct ic_line_inv_vaddr_ipi *ic_inv = (struct ic_line_inv_vaddr_ipi*) info;
|
||||
__ic_line_inv_vaddr_local(ic_inv->paddr, ic_inv->vaddr, ic_inv->sz);
|
||||
}
|
||||
|
||||
static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr,
|
||||
unsigned long sz)
|
||||
{
|
||||
struct ic_line_inv_vaddr_ipi ic_inv = { paddr, vaddr , sz};
|
||||
on_each_cpu(__ic_line_inv_vaddr_helper, &ic_inv, 1);
|
||||
}
|
||||
#else
|
||||
|
||||
#define __ic_entire_inv()
|
||||
@ -553,12 +570,8 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
|
||||
*/
|
||||
void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
__ic_line_inv_vaddr(paddr, vaddr, len);
|
||||
__dc_line_op(paddr, vaddr, len, OP_FLUSH_N_INV);
|
||||
local_irq_restore(flags);
|
||||
__ic_line_inv_vaddr(paddr, vaddr, len);
|
||||
}
|
||||
|
||||
/* wrapper to compile time eliminate alignment checks in flush loop */
|
||||
|
@ -357,7 +357,7 @@ dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
|
||||
stih415-b2020.dtb \
|
||||
stih416-b2000.dtb \
|
||||
stih416-b2020.dtb \
|
||||
stih416-b2020-revE.dtb
|
||||
stih416-b2020e.dtb
|
||||
dtb-$(CONFIG_MACH_SUN4I) += \
|
||||
sun4i-a10-a1000.dtb \
|
||||
sun4i-a10-cubieboard.dtb \
|
||||
|
@ -319,6 +319,10 @@
|
||||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
|
@ -16,7 +16,7 @@
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 380 family SoC";
|
||||
compatible = "marvell,armada380", "marvell,armada38x";
|
||||
compatible = "marvell,armada380";
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
|
@ -16,7 +16,7 @@
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 385 Development Board";
|
||||
compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada38x";
|
||||
compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
|
@ -17,7 +17,7 @@
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 385 Reference Design";
|
||||
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada38x";
|
||||
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
|
@ -16,7 +16,7 @@
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 385 family SoC";
|
||||
compatible = "marvell,armada385", "marvell,armada38x";
|
||||
compatible = "marvell,armada385", "marvell,armada380";
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
|
@ -20,7 +20,7 @@
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 38x family SoC";
|
||||
compatible = "marvell,armada38x";
|
||||
compatible = "marvell,armada380";
|
||||
|
||||
aliases {
|
||||
gpio0 = &gpio0;
|
||||
|
@ -568,24 +568,17 @@
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
slow_rc_osc: slow_rc_osc {
|
||||
compatible = "fixed-clock";
|
||||
main_osc: main_osc {
|
||||
compatible = "atmel,at91rm9200-clk-main-osc";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-accuracy = <50000000>;
|
||||
};
|
||||
|
||||
clk32k: slck {
|
||||
compatible = "atmel,at91sam9260-clk-slow";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&slow_rc_osc &slow_xtal>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
|
||||
clocks = <&main_xtal>;
|
||||
};
|
||||
|
||||
main: mainck {
|
||||
compatible = "atmel,at91rm9200-clk-main";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
|
||||
clocks = <&main_xtal>;
|
||||
clocks = <&main_osc>;
|
||||
};
|
||||
|
||||
plla: pllack {
|
||||
@ -615,7 +608,7 @@
|
||||
compatible = "atmel,at91rm9200-clk-master";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
|
||||
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
|
||||
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
|
||||
atmel,clk-output-range = <0 94000000>;
|
||||
atmel,clk-divisors = <1 2 4 0>;
|
||||
};
|
||||
@ -632,7 +625,7 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&pmc>;
|
||||
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
|
||||
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
|
||||
|
||||
prog0: prog0 {
|
||||
#clock-cells = <0>;
|
||||
|
@ -20,6 +20,10 @@
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
@ -132,8 +132,8 @@
|
||||
<595000000 650000000 3 0>,
|
||||
<545000000 600000000 0 1>,
|
||||
<495000000 555000000 1 1>,
|
||||
<445000000 500000000 1 2>,
|
||||
<400000000 450000000 1 3>;
|
||||
<445000000 500000000 2 1>,
|
||||
<400000000 450000000 3 1>;
|
||||
};
|
||||
|
||||
plladiv: plladivck {
|
||||
|
@ -140,8 +140,8 @@
|
||||
595000000 650000000 3 0
|
||||
545000000 600000000 0 1
|
||||
495000000 555000000 1 1
|
||||
445000000 500000000 1 2
|
||||
400000000 450000000 1 3>;
|
||||
445000000 500000000 2 1
|
||||
400000000 450000000 3 1>;
|
||||
};
|
||||
|
||||
plladiv: plladivck {
|
||||
|
@ -773,7 +773,6 @@
|
||||
clocks = <&qspi_gfclk_div>;
|
||||
clock-names = "fck";
|
||||
num-cs = <4>;
|
||||
interrupts = <0 343 0x4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -984,6 +983,17 @@
|
||||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
atl: atl@4843c000 {
|
||||
compatible = "ti,dra7-atl";
|
||||
reg = <0x4843c000 0x3ff>;
|
||||
ti,hwmods = "atl";
|
||||
ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
|
||||
<&atl_clkin2_ck>, <&atl_clkin3_ck>;
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -10,26 +10,26 @@
|
||||
&cm_core_aon_clocks {
|
||||
atl_clkin0_ck: atl_clkin0_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin1_ck: atl_clkin1_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin2_ck: atl_clkin2_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin3_ck: atl_clkin3_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
hdmi_clkin_ck: hdmi_clkin_ck {
|
||||
|
@ -113,7 +113,7 @@
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
|
||||
reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
|
||||
};
|
||||
|
||||
combiner: interrupt-controller@10440000 {
|
||||
|
@ -315,15 +315,15 @@
|
||||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
fsl,cd-controller;
|
||||
fsl,wp-controller;
|
||||
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&esdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc2>;
|
||||
cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -468,8 +468,8 @@
|
||||
MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
|
||||
MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
|
||||
MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
|
||||
MX51_PAD_GPIO1_0__SD1_CD 0x20d5
|
||||
MX51_PAD_GPIO1_1__SD1_WP 0x20d5
|
||||
MX51_PAD_GPIO1_0__GPIO1_0 0x100
|
||||
MX51_PAD_GPIO1_1__GPIO1_1 0x100
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -107,7 +107,7 @@
|
||||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
|
||||
fsl,cd-controller;
|
||||
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -206,7 +206,7 @@
|
||||
|
||||
pinctrl_esdhc1_cd: esdhc1_cd {
|
||||
fsl,pins = <
|
||||
MX51_PAD_GPIO1_0__SD1_CD 0x20d5
|
||||
MX51_PAD_GPIO1_0__GPIO1_0 0xd5
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -21,7 +21,6 @@
|
||||
<0xb0000000 0x20000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
display1: display@di1 {
|
||||
compatible = "fsl,imx-parallel-display";
|
||||
interface-pix-fmt = "bgr666";
|
||||
@ -43,7 +42,6 @@
|
||||
vsync-active = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
display1_in: endpoint {
|
||||
|
@ -143,6 +143,14 @@
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
|
||||
};
|
||||
|
||||
pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
|
||||
/*
|
||||
* Similar to pinctrl_usbotg_2, but we want it
|
||||
* pulled down for a fixed host connection.
|
||||
*/
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
|
||||
};
|
||||
|
||||
pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
|
||||
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
|
||||
};
|
||||
@ -178,6 +186,8 @@
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
|
||||
vbus-supply = <®_usbotg_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -11,7 +11,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw54xx.dtsi"
|
||||
#include "imx6qdl-gw51xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Quad GW51XX";
|
||||
|
@ -12,6 +12,19 @@
|
||||
pinctrl-0 = <&pinctrl_cubox_i_ir>;
|
||||
};
|
||||
|
||||
pwmleds {
|
||||
compatible = "pwm-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
|
||||
|
||||
front {
|
||||
active-low;
|
||||
label = "imx6:red:front";
|
||||
max-brightness = <248>;
|
||||
pwms = <&pwm1 0 50000>;
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
||||
@ -109,6 +122,10 @@
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
|
||||
fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
|
||||
};
|
||||
|
||||
pinctrl_cubox_i_spdif: cubox-i-spdif {
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
|
||||
};
|
||||
@ -117,6 +134,14 @@
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
|
||||
};
|
||||
|
||||
pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id {
|
||||
/*
|
||||
* The Cubox-i pulls this low, but as it's pointless
|
||||
* leaving it as a pull-up, even if it is just 10uA.
|
||||
*/
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
|
||||
};
|
||||
|
||||
pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
|
||||
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
|
||||
};
|
||||
@ -153,6 +178,8 @@
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>;
|
||||
vbus-supply = <®_usbotg_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -161,7 +161,7 @@
|
||||
status = "okay";
|
||||
|
||||
pmic: ltc3676@3c {
|
||||
compatible = "ltc,ltc3676";
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
|
||||
regulators {
|
||||
|
@ -220,7 +220,7 @@
|
||||
};
|
||||
|
||||
pmic: ltc3676@3c {
|
||||
compatible = "ltc,ltc3676";
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
|
||||
regulators {
|
||||
@ -288,7 +288,7 @@
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks 169>;
|
||||
clocks = <&clks 201>;
|
||||
VDDA-supply = <®_1p8v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
};
|
||||
|
@ -234,7 +234,7 @@
|
||||
};
|
||||
|
||||
pmic: ltc3676@3c {
|
||||
compatible = "ltc,ltc3676";
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
|
||||
regulators {
|
||||
|
@ -10,14 +10,6 @@
|
||||
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_microsom_usbotg: microsom-usbotg {
|
||||
/*
|
||||
* Similar to pinctrl_usbotg_2, but we want it
|
||||
* pulled down for a fixed host connection.
|
||||
*/
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -26,8 +18,3 @@
|
||||
pinctrl-0 = <&pinctrl_microsom_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_microsom_usbotg>;
|
||||
};
|
||||
|
@ -686,7 +686,7 @@
|
||||
compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
|
||||
reg = <0x02188000 0x4000>;
|
||||
interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6SL_CLK_ENET_REF>,
|
||||
clocks = <&clks IMX6SL_CLK_ENET>,
|
||||
<&clks IMX6SL_CLK_ENET_REF>;
|
||||
clock-names = "ipg", "ahb";
|
||||
status = "disabled";
|
||||
|
@ -105,7 +105,6 @@
|
||||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@1 {
|
||||
@ -113,7 +112,6 @@
|
||||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
|
||||
@ -121,6 +119,7 @@
|
||||
status = "okay";
|
||||
ethernet0-port@0 {
|
||||
phy-handle = <ðphy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
|
||||
@ -128,5 +127,6 @@
|
||||
status = "okay";
|
||||
ethernet1-port@0 {
|
||||
phy-handle = <ðphy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
|
@ -251,6 +251,11 @@
|
||||
codec {
|
||||
};
|
||||
};
|
||||
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -301,6 +306,7 @@
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
@ -50,6 +50,13 @@
|
||||
gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&twl {
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
@ -351,6 +351,11 @@
|
||||
compatible = "ti,twl4030-audio";
|
||||
ti,enable-vibra = <1>;
|
||||
};
|
||||
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
|
||||
&twl_keypad {
|
||||
|
@ -45,7 +45,6 @@
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
500000 880000
|
||||
1000000 1060000
|
||||
1500000 1250000
|
||||
>;
|
||||
|
@ -169,8 +169,8 @@
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mii0>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
|
||||
clock-names = "stmmaceth", "sti-ethclk";
|
||||
clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
|
||||
};
|
||||
|
||||
ethernet1: dwmac@fef08000 {
|
||||
@ -192,8 +192,8 @@
|
||||
reset-names = "stmmaceth";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mii1>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
|
||||
clock-names = "stmmaceth", "sti-ethclk";
|
||||
clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
|
||||
};
|
||||
|
||||
rc: rc@fe518000 {
|
||||
|
@ -175,8 +175,8 @@
|
||||
reset-names = "stmmaceth";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mii0>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
|
||||
clock-names = "stmmaceth", "sti-ethclk";
|
||||
clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
|
||||
};
|
||||
|
||||
ethernet1: dwmac@fef08000 {
|
||||
@ -197,8 +197,8 @@
|
||||
reset-names = "stmmaceth";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mii1>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
|
||||
clock-names = "stmmaceth", "sti-ethclk";
|
||||
clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
|
||||
};
|
||||
|
||||
rc: rc@fe518000 {
|
||||
|
@ -182,7 +182,6 @@ static int scoop_probe(struct platform_device *pdev)
|
||||
struct scoop_config *inf;
|
||||
struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
int ret;
|
||||
int temp;
|
||||
|
||||
if (!mem)
|
||||
return -EINVAL;
|
||||
|
@ -94,10 +94,10 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_PWM=y
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_UNSAFE_RESUME=y
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_TEST=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_BCM_KONA=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
|
@ -186,6 +186,7 @@ CONFIG_VIDEO_MX3=y
|
||||
CONFIG_V4L_MEM2MEM_DRIVERS=y
|
||||
CONFIG_VIDEO_CODA=y
|
||||
CONFIG_SOC_CAMERA_OV2640=y
|
||||
CONFIG_IMX_IPUV3_CORE=y
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_PANEL_SIMPLE=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
|
@ -223,12 +223,12 @@ CONFIG_POWER_RESET_GPIO=y
|
||||
CONFIG_POWER_RESET_SUN6I=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_DOVE_THERMAL=y
|
||||
CONFIG_ARMADA_THERMAL=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_ORION_WATCHDOG=y
|
||||
CONFIG_SUNXI_WATCHDOG=y
|
||||
CONFIG_MFD_AS3722=y
|
||||
CONFIG_MFD_BCM590XX=y
|
||||
CONFIG_MFD_CROS_EC=y
|
||||
CONFIG_MFD_CROS_EC_SPI=y
|
||||
CONFIG_MFD_MAX8907=y
|
||||
@ -240,6 +240,7 @@ CONFIG_MFD_TPS65910=y
|
||||
CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
|
||||
CONFIG_REGULATOR_AB8500=y
|
||||
CONFIG_REGULATOR_AS3722=y
|
||||
CONFIG_REGULATOR_BCM590XX=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_MAX8907=y
|
||||
CONFIG_REGULATOR_PALMAS=y
|
||||
@ -353,6 +354,7 @@ CONFIG_MFD_NVEC=y
|
||||
CONFIG_KEYBOARD_NVEC=y
|
||||
CONFIG_SERIO_NVEC_PS2=y
|
||||
CONFIG_NVEC_POWER=y
|
||||
CONFIG_QCOM_GSBI=y
|
||||
CONFIG_COMMON_CLK_QCOM=y
|
||||
CONFIG_MSM_GCC_8660=y
|
||||
CONFIG_MSM_MMCC_8960=y
|
||||
|
@ -14,6 +14,7 @@ CONFIG_MACH_ARMADA_370=y
|
||||
CONFIG_MACH_ARMADA_375=y
|
||||
CONFIG_MACH_ARMADA_38X=y
|
||||
CONFIG_MACH_ARMADA_XP=y
|
||||
CONFIG_MACH_DOVE=y
|
||||
CONFIG_NEON=y
|
||||
# CONFIG_CACHE_L2X0 is not set
|
||||
# CONFIG_SWP_EMULATE is not set
|
||||
@ -52,6 +53,7 @@ CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ORION=y
|
||||
|
@ -208,8 +208,6 @@ struct sync_struct {
|
||||
struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS];
|
||||
};
|
||||
|
||||
extern unsigned long sync_phys; /* physical address of *mcpm_sync */
|
||||
|
||||
void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster);
|
||||
void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster);
|
||||
void __mcpm_outbound_leave_critical(unsigned int cluster, int state);
|
||||
|
@ -114,8 +114,14 @@ static inline struct thread_info *current_thread_info(void)
|
||||
((unsigned long)(task_thread_info(tsk)->cpu_context.pc))
|
||||
#define thread_saved_sp(tsk) \
|
||||
((unsigned long)(task_thread_info(tsk)->cpu_context.sp))
|
||||
|
||||
#ifndef CONFIG_THUMB2_KERNEL
|
||||
#define thread_saved_fp(tsk) \
|
||||
((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
|
||||
#else
|
||||
#define thread_saved_fp(tsk) \
|
||||
((unsigned long)(task_thread_info(tsk)->cpu_context.r7))
|
||||
#endif
|
||||
|
||||
extern void crunch_task_disable(struct thread_info *);
|
||||
extern void crunch_task_copy(struct thread_info *, void *);
|
||||
|
@ -1924,7 +1924,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
|
||||
struct perf_event *event)
|
||||
{
|
||||
int idx;
|
||||
int bit;
|
||||
int bit = -1;
|
||||
unsigned int prefix;
|
||||
unsigned int region;
|
||||
unsigned int code;
|
||||
@ -1953,7 +1953,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
|
||||
}
|
||||
|
||||
idx = armv7pmu_get_event_idx(cpuc, event);
|
||||
if (idx < 0 && krait_event)
|
||||
if (idx < 0 && bit >= 0)
|
||||
clear_bit(bit, cpuc->used_mask);
|
||||
|
||||
return idx;
|
||||
|
@ -908,7 +908,7 @@ enum ptrace_syscall_dir {
|
||||
PTRACE_SYSCALL_EXIT,
|
||||
};
|
||||
|
||||
static int tracehook_report_syscall(struct pt_regs *regs,
|
||||
static void tracehook_report_syscall(struct pt_regs *regs,
|
||||
enum ptrace_syscall_dir dir)
|
||||
{
|
||||
unsigned long ip;
|
||||
@ -926,7 +926,6 @@ static int tracehook_report_syscall(struct pt_regs *regs,
|
||||
current_thread_info()->syscall = -1;
|
||||
|
||||
regs->ARM_ip = ip;
|
||||
return current_thread_info()->syscall;
|
||||
}
|
||||
|
||||
asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
|
||||
@ -938,7 +937,9 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
|
||||
return -1;
|
||||
|
||||
if (test_thread_flag(TIF_SYSCALL_TRACE))
|
||||
scno = tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
|
||||
tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
|
||||
|
||||
scno = current_thread_info()->syscall;
|
||||
|
||||
if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
|
||||
trace_sys_enter(regs, scno);
|
||||
|
@ -46,13 +46,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
|
||||
if (cpu == 1)
|
||||
exynos_cpu_power_down(cpu);
|
||||
|
||||
/*
|
||||
* here's the WFI
|
||||
*/
|
||||
asm(".word 0xe320f003\n"
|
||||
:
|
||||
:
|
||||
: "memory", "cc");
|
||||
wfi();
|
||||
|
||||
if (pen_release == cpu_logical_map(cpu)) {
|
||||
/*
|
||||
|
@ -25,7 +25,6 @@
|
||||
|
||||
#define EXYNOS5420_CPUS_PER_CLUSTER 4
|
||||
#define EXYNOS5420_NR_CLUSTERS 2
|
||||
#define MCPM_BOOT_ADDR_OFFSET 0x1c
|
||||
|
||||
/*
|
||||
* The common v7_exit_coherency_flush API could not be used because of the
|
||||
@ -343,11 +342,13 @@ static int __init exynos_mcpm_init(void)
|
||||
pr_info("Exynos MCPM support installed\n");
|
||||
|
||||
/*
|
||||
* Future entries into the kernel can now go
|
||||
* through the cluster entry vectors.
|
||||
* U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
|
||||
* as part of secondary_cpu_start(). Let's redirect it to the
|
||||
* mcpm_entry_point().
|
||||
*/
|
||||
__raw_writel(virt_to_phys(mcpm_entry_point),
|
||||
ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET);
|
||||
__raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */
|
||||
__raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */
|
||||
__raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
|
||||
|
||||
iounmap(ns_sram_base_addr);
|
||||
|
||||
|
@ -300,7 +300,7 @@ static int exynos_pm_suspend(void)
|
||||
tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
|
||||
__raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
|
||||
|
||||
if (!soc_is_exynos5250())
|
||||
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
|
||||
exynos_cpu_save_register();
|
||||
|
||||
return 0;
|
||||
@ -334,7 +334,7 @@ static void exynos_pm_resume(void)
|
||||
if (exynos_pm_central_resume())
|
||||
goto early_wakeup;
|
||||
|
||||
if (!soc_is_exynos5250())
|
||||
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
|
||||
exynos_cpu_restore_register();
|
||||
|
||||
/* For release retention */
|
||||
@ -353,7 +353,7 @@ static void exynos_pm_resume(void)
|
||||
|
||||
s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
|
||||
|
||||
if (!soc_is_exynos5250())
|
||||
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
|
||||
scu_enable(S5P_VA_SCU);
|
||||
|
||||
early_wakeup:
|
||||
@ -440,15 +440,18 @@ static int exynos_cpu_pm_notifier(struct notifier_block *self,
|
||||
case CPU_PM_ENTER:
|
||||
if (cpu == 0) {
|
||||
exynos_pm_central_suspend();
|
||||
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
|
||||
exynos_cpu_save_register();
|
||||
}
|
||||
break;
|
||||
|
||||
case CPU_PM_EXIT:
|
||||
if (cpu == 0) {
|
||||
if (!soc_is_exynos5250())
|
||||
if (read_cpuid_part_number() ==
|
||||
ARM_CPU_PART_CORTEX_A9) {
|
||||
scu_enable(S5P_VA_SCU);
|
||||
exynos_cpu_restore_register();
|
||||
}
|
||||
exynos_pm_central_resume();
|
||||
}
|
||||
break;
|
||||
|
@ -734,9 +734,9 @@ config SOC_IMX6
|
||||
select HAVE_IMX_MMDC
|
||||
select HAVE_IMX_SRC
|
||||
select MFD_SYSCON
|
||||
select PL310_ERRATA_588369 if CACHE_PL310
|
||||
select PL310_ERRATA_727915 if CACHE_PL310
|
||||
select PL310_ERRATA_769419 if CACHE_PL310
|
||||
select PL310_ERRATA_588369 if CACHE_L2X0
|
||||
select PL310_ERRATA_727915 if CACHE_L2X0
|
||||
select PL310_ERRATA_769419 if CACHE_L2X0
|
||||
|
||||
config SOC_IMX6Q
|
||||
bool "i.MX6 Quad/DualLite support"
|
||||
@ -771,9 +771,9 @@ config SOC_VF610
|
||||
select ARM_GIC
|
||||
select PINCTRL_VF610
|
||||
select VF_PIT_TIMER
|
||||
select PL310_ERRATA_588369 if CACHE_PL310
|
||||
select PL310_ERRATA_727915 if CACHE_PL310
|
||||
select PL310_ERRATA_769419 if CACHE_PL310
|
||||
select PL310_ERRATA_588369 if CACHE_L2X0
|
||||
select PL310_ERRATA_727915 if CACHE_L2X0
|
||||
select PL310_ERRATA_769419 if CACHE_L2X0
|
||||
|
||||
help
|
||||
This enable support for Freescale Vybrid VF610 processor.
|
||||
|
@ -312,6 +312,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
|
||||
clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
|
||||
clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
|
||||
clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
|
||||
clks[IMX6SL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
|
||||
clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12);
|
||||
clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14);
|
||||
clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16);
|
||||
|
@ -480,25 +480,18 @@ static const struct of_device_id ebi_match[] = {
|
||||
static void __init ap_init_of(void)
|
||||
{
|
||||
unsigned long sc_dec;
|
||||
struct device_node *root;
|
||||
struct device_node *syscon;
|
||||
struct device_node *ebi;
|
||||
struct device *parent;
|
||||
struct soc_device *soc_dev;
|
||||
struct soc_device_attribute *soc_dev_attr;
|
||||
u32 ap_sc_id;
|
||||
int err;
|
||||
int i;
|
||||
|
||||
/* Here we create an SoC device for the root node */
|
||||
root = of_find_node_by_path("/");
|
||||
if (!root)
|
||||
return;
|
||||
|
||||
syscon = of_find_matching_node(root, ap_syscon_match);
|
||||
syscon = of_find_matching_node(NULL, ap_syscon_match);
|
||||
if (!syscon)
|
||||
return;
|
||||
ebi = of_find_matching_node(root, ebi_match);
|
||||
ebi = of_find_matching_node(NULL, ebi_match);
|
||||
if (!ebi)
|
||||
return;
|
||||
|
||||
@ -509,19 +502,17 @@ static void __init ap_init_of(void)
|
||||
if (!ebi_base)
|
||||
return;
|
||||
|
||||
of_platform_populate(NULL, of_default_bus_match_table,
|
||||
ap_auxdata_lookup, NULL);
|
||||
|
||||
ap_sc_id = readl(ap_syscon_base);
|
||||
|
||||
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
|
||||
if (!soc_dev_attr)
|
||||
return;
|
||||
|
||||
err = of_property_read_string(root, "compatible",
|
||||
&soc_dev_attr->soc_id);
|
||||
if (err)
|
||||
return;
|
||||
err = of_property_read_string(root, "model", &soc_dev_attr->machine);
|
||||
if (err)
|
||||
return;
|
||||
soc_dev_attr->soc_id = "XVC";
|
||||
soc_dev_attr->machine = "Integrator/AP";
|
||||
soc_dev_attr->family = "Integrator";
|
||||
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
|
||||
'A' + (ap_sc_id & 0x0f));
|
||||
@ -536,9 +527,6 @@ static void __init ap_init_of(void)
|
||||
parent = soc_device_to_device(soc_dev);
|
||||
integrator_init_sysfs(parent, ap_sc_id);
|
||||
|
||||
of_platform_populate(root, of_default_bus_match_table,
|
||||
ap_auxdata_lookup, parent);
|
||||
|
||||
sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
|
||||
for (i = 0; i < 4; i++) {
|
||||
struct lm_device *lmdev;
|
||||
|
@ -279,20 +279,13 @@ static const struct of_device_id intcp_syscon_match[] = {
|
||||
|
||||
static void __init intcp_init_of(void)
|
||||
{
|
||||
struct device_node *root;
|
||||
struct device_node *cpcon;
|
||||
struct device *parent;
|
||||
struct soc_device *soc_dev;
|
||||
struct soc_device_attribute *soc_dev_attr;
|
||||
u32 intcp_sc_id;
|
||||
int err;
|
||||
|
||||
/* Here we create an SoC device for the root node */
|
||||
root = of_find_node_by_path("/");
|
||||
if (!root)
|
||||
return;
|
||||
|
||||
cpcon = of_find_matching_node(root, intcp_syscon_match);
|
||||
cpcon = of_find_matching_node(NULL, intcp_syscon_match);
|
||||
if (!cpcon)
|
||||
return;
|
||||
|
||||
@ -300,19 +293,17 @@ static void __init intcp_init_of(void)
|
||||
if (!intcp_con_base)
|
||||
return;
|
||||
|
||||
of_platform_populate(NULL, of_default_bus_match_table,
|
||||
intcp_auxdata_lookup, NULL);
|
||||
|
||||
intcp_sc_id = readl(intcp_con_base);
|
||||
|
||||
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
|
||||
if (!soc_dev_attr)
|
||||
return;
|
||||
|
||||
err = of_property_read_string(root, "compatible",
|
||||
&soc_dev_attr->soc_id);
|
||||
if (err)
|
||||
return;
|
||||
err = of_property_read_string(root, "model", &soc_dev_attr->machine);
|
||||
if (err)
|
||||
return;
|
||||
soc_dev_attr->soc_id = "XCV";
|
||||
soc_dev_attr->machine = "Integrator/CP";
|
||||
soc_dev_attr->family = "Integrator";
|
||||
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
|
||||
'A' + (intcp_sc_id & 0x0f));
|
||||
@ -326,8 +317,6 @@ static void __init intcp_init_of(void)
|
||||
|
||||
parent = soc_device_to_device(soc_dev);
|
||||
integrator_init_sysfs(parent, intcp_sc_id);
|
||||
of_platform_populate(root, of_default_bus_match_table,
|
||||
intcp_auxdata_lookup, parent);
|
||||
}
|
||||
|
||||
static const char * intcp_dt_board_compat[] = {
|
||||
|
@ -10,6 +10,7 @@ menuconfig ARCH_MVEBU
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select PCI_QUIRKS if PCI
|
||||
select OF_ADDRESS_PCI
|
||||
|
||||
if ARCH_MVEBU
|
||||
|
||||
@ -17,6 +18,7 @@ config MACH_MVEBU_V7
|
||||
bool
|
||||
select ARMADA_370_XP_TIMER
|
||||
select CACHE_L2X0
|
||||
select ARM_CPU_SUSPEND
|
||||
|
||||
config MACH_ARMADA_370
|
||||
bool "Marvell Armada 370 boards" if ARCH_MULTI_V7
|
||||
|
@ -7,7 +7,7 @@ CFLAGS_pmsu.o := -march=armv7-a
|
||||
obj-y += system-controller.o mvebu-soc-id.o
|
||||
|
||||
ifeq ($(CONFIG_MACH_MVEBU_V7),y)
|
||||
obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o
|
||||
obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o
|
||||
obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o
|
||||
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
|
||||
endif
|
||||
|
@ -23,6 +23,7 @@
|
||||
#include <linux/mbus.h>
|
||||
#include <linux/signal.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/irqchip.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
@ -71,15 +72,21 @@ static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr,
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void __init mvebu_timer_and_clk_init(void)
|
||||
static void __init mvebu_init_irq(void)
|
||||
{
|
||||
of_clk_init(NULL);
|
||||
clocksource_of_init();
|
||||
irqchip_init();
|
||||
mvebu_scu_enable();
|
||||
coherency_init();
|
||||
BUG_ON(mvebu_mbus_dt_init(coherency_available()));
|
||||
}
|
||||
|
||||
static void __init external_abort_quirk(void)
|
||||
{
|
||||
u32 dev, rev;
|
||||
|
||||
if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV)
|
||||
return;
|
||||
|
||||
if (of_machine_is_compatible("marvell,armada375"))
|
||||
hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
|
||||
"imprecise external abort");
|
||||
}
|
||||
@ -169,8 +176,10 @@ static void __init mvebu_dt_init(void)
|
||||
{
|
||||
if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
|
||||
i2c_quirk();
|
||||
if (of_machine_is_compatible("marvell,a375-db"))
|
||||
if (of_machine_is_compatible("marvell,a375-db")) {
|
||||
external_abort_quirk();
|
||||
thermal_quirk();
|
||||
}
|
||||
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
}
|
||||
@ -185,7 +194,7 @@ DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
|
||||
.l2c_aux_mask = ~0,
|
||||
.smp = smp_ops(armada_xp_smp_ops),
|
||||
.init_machine = mvebu_dt_init,
|
||||
.init_time = mvebu_timer_and_clk_init,
|
||||
.init_irq = mvebu_init_irq,
|
||||
.restart = mvebu_restart,
|
||||
.dt_compat = armada_370_xp_dt_compat,
|
||||
MACHINE_END
|
||||
@ -198,7 +207,7 @@ static const char * const armada_375_dt_compat[] = {
|
||||
DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
|
||||
.l2c_aux_val = 0,
|
||||
.l2c_aux_mask = ~0,
|
||||
.init_time = mvebu_timer_and_clk_init,
|
||||
.init_irq = mvebu_init_irq,
|
||||
.init_machine = mvebu_dt_init,
|
||||
.restart = mvebu_restart,
|
||||
.dt_compat = armada_375_dt_compat,
|
||||
@ -213,7 +222,7 @@ static const char * const armada_38x_dt_compat[] = {
|
||||
DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")
|
||||
.l2c_aux_val = 0,
|
||||
.l2c_aux_mask = ~0,
|
||||
.init_time = mvebu_timer_and_clk_init,
|
||||
.init_irq = mvebu_init_irq,
|
||||
.restart = mvebu_restart,
|
||||
.dt_compat = armada_38x_dt_compat,
|
||||
MACHINE_END
|
||||
|
@ -66,6 +66,8 @@ static void __iomem *pmsu_mp_base;
|
||||
extern void ll_disable_coherency(void);
|
||||
extern void ll_enable_coherency(void);
|
||||
|
||||
extern void armada_370_xp_cpu_resume(void);
|
||||
|
||||
static struct platform_device armada_xp_cpuidle_device = {
|
||||
.name = "cpuidle-armada-370-xp",
|
||||
};
|
||||
@ -140,13 +142,6 @@ static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
|
||||
writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
|
||||
}
|
||||
|
||||
static void armada_370_xp_cpu_resume(void)
|
||||
{
|
||||
asm volatile("bl ll_add_cpu_to_smp_group\n\t"
|
||||
"bl ll_enable_coherency\n\t"
|
||||
"b cpu_resume\n\t");
|
||||
}
|
||||
|
||||
/* No locking is needed because we only access per-CPU registers */
|
||||
void armada_370_xp_pmsu_idle_prepare(bool deepidle)
|
||||
{
|
||||
|
25
arch/arm/mach-mvebu/pmsu_ll.S
Normal file
25
arch/arm/mach-mvebu/pmsu_ll.S
Normal file
@ -0,0 +1,25 @@
|
||||
/*
|
||||
* Copyright (C) 2014 Marvell
|
||||
*
|
||||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
* Gregory Clement <gregory.clement@free-electrons.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
|
||||
/*
|
||||
* This is the entry point through which CPUs exiting cpuidle deep
|
||||
* idle state are going.
|
||||
*/
|
||||
ENTRY(armada_370_xp_cpu_resume)
|
||||
ARM_BE8(setend be ) @ go BE8 if entered LE
|
||||
bl ll_add_cpu_to_smp_group
|
||||
bl ll_enable_coherency
|
||||
b cpu_resume
|
||||
ENDPROC(armada_370_xp_cpu_resume)
|
||||
|
@ -34,8 +34,8 @@ config ARCH_OMAP4
|
||||
select HAVE_ARM_SCU if SMP
|
||||
select HAVE_ARM_TWD if SMP
|
||||
select OMAP_INTERCONNECT
|
||||
select PL310_ERRATA_588369
|
||||
select PL310_ERRATA_727915
|
||||
select PL310_ERRATA_588369 if CACHE_L2X0
|
||||
select PL310_ERRATA_727915 if CACHE_L2X0
|
||||
select PM_OPP if PM
|
||||
select PM_RUNTIME if CPU_IDLE
|
||||
select ARM_ERRATA_754322
|
||||
|
@ -110,14 +110,16 @@ obj-y += prm_common.o cm_common.o
|
||||
obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
|
||||
obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o
|
||||
omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
|
||||
prcm_mpu44xx.o prminst44xx.o \
|
||||
vc44xx_data.o vp44xx_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
|
||||
obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
|
||||
obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common)
|
||||
obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common)
|
||||
am33xx-43xx-prcm-common += prm33xx.o cm33xx.o
|
||||
obj-$(CONFIG_SOC_AM33XX) += $(am33xx-43xx-prcm-common)
|
||||
obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) \
|
||||
$(am33xx-43xx-prcm-common)
|
||||
|
||||
# OMAP voltage domains
|
||||
voltagedomain-common := voltage.o vc.o vp.o
|
||||
|
@ -380,7 +380,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
|
||||
void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
|
||||
void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
|
||||
|
||||
#ifdef CONFIG_SOC_AM33XX
|
||||
#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
|
||||
extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
|
||||
u16 clkctrl_offs);
|
||||
extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
|
||||
|
@ -248,7 +248,6 @@ static inline void __iomem *omap4_get_scu_base(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
extern void __init gic_init_irq(void);
|
||||
extern void gic_dist_disable(void);
|
||||
extern void gic_dist_enable(void);
|
||||
extern bool gic_dist_disabled(void);
|
||||
|
@ -649,6 +649,18 @@ void __init dra7xxx_check_revision(void)
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xb9bc:
|
||||
switch (rev) {
|
||||
case 0:
|
||||
omap_revision = DRA722_REV_ES1_0;
|
||||
break;
|
||||
default:
|
||||
/* If we have no new revisions */
|
||||
omap_revision = DRA722_REV_ES1_0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
/* Unknown default to latest silicon rev as default*/
|
||||
pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",
|
||||
|
@ -183,7 +183,9 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
|
||||
m0_entry = mux->muxnames[0];
|
||||
|
||||
/* First check for full name in mode0.muxmode format */
|
||||
if (mode0_len && strncmp(muxname, m0_entry, mode0_len))
|
||||
if (mode0_len)
|
||||
if (strncmp(muxname, m0_entry, mode0_len) ||
|
||||
(strlen(m0_entry) != mode0_len))
|
||||
continue;
|
||||
|
||||
/* Then check for muxmode only */
|
||||
|
@ -102,26 +102,6 @@ void __init omap_barriers_init(void)
|
||||
{}
|
||||
#endif
|
||||
|
||||
void __init gic_init_irq(void)
|
||||
{
|
||||
void __iomem *omap_irq_base;
|
||||
|
||||
/* Static mapping, never released */
|
||||
gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
|
||||
BUG_ON(!gic_dist_base_addr);
|
||||
|
||||
twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_4K);
|
||||
BUG_ON(!twd_base);
|
||||
|
||||
/* Static mapping, never released */
|
||||
omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
|
||||
BUG_ON(!omap_irq_base);
|
||||
|
||||
omap_wakeupgen_init();
|
||||
|
||||
gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
|
||||
}
|
||||
|
||||
void gic_dist_disable(void)
|
||||
{
|
||||
if (gic_dist_base_addr)
|
||||
|
@ -4251,9 +4251,9 @@ void __init omap_hwmod_init(void)
|
||||
soc_ops.enable_module = _omap4_enable_module;
|
||||
soc_ops.disable_module = _omap4_disable_module;
|
||||
soc_ops.wait_target_ready = _omap4_wait_target_ready;
|
||||
soc_ops.assert_hardreset = _omap4_assert_hardreset;
|
||||
soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
|
||||
soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
|
||||
soc_ops.assert_hardreset = _am33xx_assert_hardreset;
|
||||
soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
|
||||
soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
|
||||
soc_ops.init_clkdm = _init_clkdm;
|
||||
} else if (soc_is_am33xx()) {
|
||||
soc_ops.enable_module = _am33xx_enable_module;
|
||||
|
@ -2020,6 +2020,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'ocp2scp' class
|
||||
* bridge to transform ocp interface protocol to scp (serial control port)
|
||||
* protocol
|
||||
*/
|
||||
/* ocp2scp3 */
|
||||
static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
|
||||
/* l4_cfg -> ocp2scp3 */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
|
||||
.master = &omap54xx_l4_cfg_hwmod,
|
||||
.slave = &omap54xx_ocp2scp3_hwmod,
|
||||
.clk = "l4_root_clk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
|
||||
.name = "ocp2scp3",
|
||||
.class = &omap54xx_ocp2scp_hwmod_class,
|
||||
.clkdm_name = "l3init_clkdm",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_HWCTRL,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'sata' class
|
||||
* sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
|
||||
.sysc_offs = 0x0000,
|
||||
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
|
||||
MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
|
||||
.name = "sata",
|
||||
.sysc = &omap54xx_sata_sysc,
|
||||
};
|
||||
|
||||
/* sata */
|
||||
static struct omap_hwmod omap54xx_sata_hwmod = {
|
||||
.name = "sata",
|
||||
.class = &omap54xx_sata_hwmod_class,
|
||||
.clkdm_name = "l3init_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
|
||||
.main_clk = "func_48m_fclk",
|
||||
.mpu_rt_idx = 1,
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/* l4_cfg -> sata */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
|
||||
.master = &omap54xx_l4_cfg_hwmod,
|
||||
.slave = &omap54xx_sata_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/*
|
||||
* Interfaces
|
||||
@ -2765,6 +2836,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
|
||||
&omap54xx_l4_cfg__usb_tll_hs,
|
||||
&omap54xx_l4_cfg__usb_otg_ss,
|
||||
&omap54xx_l4_wkup__wd_timer2,
|
||||
&omap54xx_l4_cfg__ocp2scp3,
|
||||
&omap54xx_l4_cfg__sata,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
@ -462,6 +462,7 @@ IS_OMAP_TYPE(3430, 0x3430)
|
||||
#define DRA7XX_CLASS 0x07000000
|
||||
#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
|
||||
#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
|
||||
#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
|
||||
|
||||
void omap2xxx_check_revision(void);
|
||||
void omap3xxx_check_revision(void);
|
||||
|
@ -329,6 +329,11 @@ static struct mtd_partition collie_partitions[] = {
|
||||
.name = "rootfs",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 0x00e20000,
|
||||
}, {
|
||||
.name = "bootblock",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 0x00020000,
|
||||
.mask_flags = MTD_WRITEABLE
|
||||
}
|
||||
};
|
||||
|
||||
@ -356,7 +361,7 @@ static void collie_flash_exit(void)
|
||||
}
|
||||
|
||||
static struct flash_platform_data collie_flash_data = {
|
||||
.map_name = "jedec_probe",
|
||||
.map_name = "cfi_probe",
|
||||
.init = collie_flash_init,
|
||||
.set_vpp = collie_set_vpp,
|
||||
.exit = collie_flash_exit,
|
||||
|
@ -11,8 +11,8 @@ menuconfig ARCH_STI
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_764369 if SMP
|
||||
select ARM_ERRATA_775420
|
||||
select PL310_ERRATA_753970 if CACHE_PL310
|
||||
select PL310_ERRATA_769419 if CACHE_PL310
|
||||
select PL310_ERRATA_753970 if CACHE_L2X0
|
||||
select PL310_ERRATA_769419 if CACHE_L2X0
|
||||
help
|
||||
Include support for STiH41x SOCs like STiH415/416 using the device tree
|
||||
for discovery
|
||||
|
@ -12,8 +12,81 @@
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/reboot.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
#define SUN4I_WATCHDOG_CTRL_REG 0x00
|
||||
#define SUN4I_WATCHDOG_CTRL_RESTART BIT(0)
|
||||
#define SUN4I_WATCHDOG_MODE_REG 0x04
|
||||
#define SUN4I_WATCHDOG_MODE_ENABLE BIT(0)
|
||||
#define SUN4I_WATCHDOG_MODE_RESET_ENABLE BIT(1)
|
||||
|
||||
#define SUN6I_WATCHDOG1_IRQ_REG 0x00
|
||||
#define SUN6I_WATCHDOG1_CTRL_REG 0x10
|
||||
#define SUN6I_WATCHDOG1_CTRL_RESTART BIT(0)
|
||||
#define SUN6I_WATCHDOG1_CONFIG_REG 0x14
|
||||
#define SUN6I_WATCHDOG1_CONFIG_RESTART BIT(0)
|
||||
#define SUN6I_WATCHDOG1_CONFIG_IRQ BIT(1)
|
||||
#define SUN6I_WATCHDOG1_MODE_REG 0x18
|
||||
#define SUN6I_WATCHDOG1_MODE_ENABLE BIT(0)
|
||||
|
||||
static void __iomem *wdt_base;
|
||||
|
||||
static void sun4i_restart(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
if (!wdt_base)
|
||||
return;
|
||||
|
||||
/* Enable timer and set reset bit in the watchdog */
|
||||
writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
|
||||
wdt_base + SUN4I_WATCHDOG_MODE_REG);
|
||||
|
||||
/*
|
||||
* Restart the watchdog. The default (and lowest) interval
|
||||
* value for the watchdog is 0.5s.
|
||||
*/
|
||||
writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
|
||||
|
||||
while (1) {
|
||||
mdelay(5);
|
||||
writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
|
||||
wdt_base + SUN4I_WATCHDOG_MODE_REG);
|
||||
}
|
||||
}
|
||||
|
||||
static struct of_device_id sunxi_restart_ids[] = {
|
||||
{ .compatible = "allwinner,sun4i-a10-wdt" },
|
||||
{ /*sentinel*/ }
|
||||
};
|
||||
|
||||
static void sunxi_setup_restart(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_matching_node(NULL, sunxi_restart_ids);
|
||||
if (WARN(!np, "unable to setup watchdog restart"))
|
||||
return;
|
||||
|
||||
wdt_base = of_iomap(np, 0);
|
||||
WARN(!wdt_base, "failed to map watchdog base address");
|
||||
}
|
||||
|
||||
static void __init sunxi_dt_init(void)
|
||||
{
|
||||
sunxi_setup_restart();
|
||||
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
}
|
||||
|
||||
static const char * const sunxi_board_dt_compat[] = {
|
||||
"allwinner,sun4i-a10",
|
||||
@ -23,7 +96,9 @@ static const char * const sunxi_board_dt_compat[] = {
|
||||
};
|
||||
|
||||
DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
|
||||
.init_machine = sunxi_dt_init,
|
||||
.dt_compat = sunxi_board_dt_compat,
|
||||
.restart = sun4i_restart,
|
||||
MACHINE_END
|
||||
|
||||
static const char * const sun6i_board_dt_compat[] = {
|
||||
@ -51,5 +126,7 @@ static const char * const sun7i_board_dt_compat[] = {
|
||||
};
|
||||
|
||||
DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
|
||||
.init_machine = sunxi_dt_init,
|
||||
.dt_compat = sun7i_board_dt_compat,
|
||||
.restart = sun4i_restart,
|
||||
MACHINE_END
|
||||
|
@ -15,7 +15,7 @@ menuconfig ARCH_U8500
|
||||
select PINCTRL
|
||||
select PINCTRL_ABX500
|
||||
select PINCTRL_NOMADIK
|
||||
select PL310_ERRATA_753970 if CACHE_PL310
|
||||
select PL310_ERRATA_753970 if CACHE_L2X0
|
||||
help
|
||||
Support for ST-Ericsson's Ux500 architecture
|
||||
|
||||
|
@ -43,7 +43,7 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
|
||||
bool "Enable A5 and A9 only errata work-arounds"
|
||||
default y
|
||||
select ARM_ERRATA_720789
|
||||
select PL310_ERRATA_753970 if CACHE_PL310
|
||||
select PL310_ERRATA_753970 if CACHE_L2X0
|
||||
help
|
||||
Provides common dependencies for Versatile Express platforms
|
||||
based on Cortex-A5 and Cortex-A9 processors. In order to
|
||||
|
@ -889,9 +889,10 @@ config CACHE_L2X0
|
||||
help
|
||||
This option enables the L2x0 PrimeCell.
|
||||
|
||||
if CACHE_L2X0
|
||||
|
||||
config CACHE_PL310
|
||||
bool
|
||||
depends on CACHE_L2X0
|
||||
default y if CPU_V7 && !(CPU_V6 || CPU_V6K)
|
||||
help
|
||||
This option enables optimisations for the PL310 cache
|
||||
@ -899,7 +900,6 @@ config CACHE_PL310
|
||||
|
||||
config PL310_ERRATA_588369
|
||||
bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
|
||||
depends on CACHE_L2X0
|
||||
help
|
||||
The PL310 L2 cache controller implements three types of Clean &
|
||||
Invalidate maintenance operations: by Physical Address
|
||||
@ -912,7 +912,6 @@ config PL310_ERRATA_588369
|
||||
|
||||
config PL310_ERRATA_727915
|
||||
bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
|
||||
depends on CACHE_L2X0
|
||||
help
|
||||
PL310 implements the Clean & Invalidate by Way L2 cache maintenance
|
||||
operation (offset 0x7FC). This operation runs in background so that
|
||||
@ -923,7 +922,6 @@ config PL310_ERRATA_727915
|
||||
|
||||
config PL310_ERRATA_753970
|
||||
bool "PL310 errata: cache sync operation may be faulty"
|
||||
depends on CACHE_PL310
|
||||
help
|
||||
This option enables the workaround for the 753970 PL310 (r3p0) erratum.
|
||||
|
||||
@ -938,7 +936,6 @@ config PL310_ERRATA_753970
|
||||
|
||||
config PL310_ERRATA_769419
|
||||
bool "PL310 errata: no automatic Store Buffer drain"
|
||||
depends on CACHE_L2X0
|
||||
help
|
||||
On revisions of the PL310 prior to r3p2, the Store Buffer does
|
||||
not automatically drain. This can cause normal, non-cacheable
|
||||
@ -948,6 +945,8 @@ config PL310_ERRATA_769419
|
||||
on systems with an outer cache, the store buffer is drained
|
||||
explicitly.
|
||||
|
||||
endif
|
||||
|
||||
config CACHE_TAUROS2
|
||||
bool "Enable the Tauros2 L2 cache controller"
|
||||
depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4)
|
||||
|
@ -1068,6 +1068,33 @@ static const struct l2c_init_data of_l2c310_data __initconst = {
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* This is a variant of the of_l2c310_data with .sync set to
|
||||
* NULL. Outer sync operations are not needed when the system is I/O
|
||||
* coherent, and potentially harmful in certain situations (PCIe/PL310
|
||||
* deadlock on Armada 375/38x due to hardware I/O coherency). The
|
||||
* other operations are kept because they are infrequent (therefore do
|
||||
* not cause the deadlock in practice) and needed for secondary CPU
|
||||
* boot and other power management activities.
|
||||
*/
|
||||
static const struct l2c_init_data of_l2c310_coherent_data __initconst = {
|
||||
.type = "L2C-310 Coherent",
|
||||
.way_size_0 = SZ_8K,
|
||||
.num_lock = 8,
|
||||
.of_parse = l2c310_of_parse,
|
||||
.enable = l2c310_enable,
|
||||
.fixup = l2c310_fixup,
|
||||
.save = l2c310_save,
|
||||
.outer_cache = {
|
||||
.inv_range = l2c210_inv_range,
|
||||
.clean_range = l2c210_clean_range,
|
||||
.flush_range = l2c210_flush_range,
|
||||
.flush_all = l2c210_flush_all,
|
||||
.disable = l2c310_disable,
|
||||
.resume = l2c310_resume,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Note that the end addresses passed to Linux primitives are
|
||||
* noninclusive, while the hardware cache range operations use
|
||||
@ -1487,6 +1514,10 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
|
||||
|
||||
data = of_match_node(l2x0_ids, np)->data;
|
||||
|
||||
if (of_device_is_compatible(np, "arm,pl310-cache") &&
|
||||
of_property_read_bool(np, "arm,io-coherent"))
|
||||
data = &of_l2c310_coherent_data;
|
||||
|
||||
old_aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
|
||||
if (old_aux != ((old_aux & aux_mask) | aux_val)) {
|
||||
pr_warn("L2C: platform modifies aux control register: 0x%08x -> 0x%08x\n",
|
||||
|
@ -300,6 +300,7 @@ void __init sanity_check_meminfo(void)
|
||||
sanity_check_meminfo_mpu();
|
||||
end = memblock_end_of_DRAM();
|
||||
high_memory = __va(end - 1) + 1;
|
||||
memblock_set_current_limit(end);
|
||||
}
|
||||
|
||||
/*
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user