drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access v2
This should speed up debugging VRAM access a lot. v2: add HDP flush/invalidate Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Jonathan Kim <Jonathan.Kim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -187,6 +187,32 @@ void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
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uint32_t hi = ~0;
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uint32_t hi = ~0;
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uint64_t last;
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uint64_t last;
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#ifdef CONFIG_64BIT
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last = min(pos + size, adev->gmc.visible_vram_size);
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if (last > pos) {
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void __iomem *addr = adev->mman.aper_base_kaddr + pos;
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size_t count = last - pos;
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if (write) {
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memcpy_toio(addr, buf, count);
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mb();
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amdgpu_asic_flush_hdp(adev, NULL);
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} else {
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amdgpu_asic_invalidate_hdp(adev, NULL);
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mb();
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memcpy_fromio(buf, addr, count);
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}
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if (count == size)
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return;
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pos += count;
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buf += count / 4;
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size -= count;
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}
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#endif
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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for (last = pos + size; pos < last; pos += 4) {
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for (last = pos + size; pos < last; pos += 4) {
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uint32_t tmp = pos >> 31;
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uint32_t tmp = pos >> 31;
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