leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Staging: brcm80211: remove sbpciregs_t typedef

Browse Source 
don't use a typedef, use a 'struct'.

Cc: Brett Rudley <brudley@broadcom.com>
Cc: Henry Ptasinski <henryp@broadcom.com>
Cc: Nohee Ko <noheek@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Greg Kroah-Hartman 2010-10-12 14:04:26 -07:00
parent 3c2c926823
commit c11b0ef8fe
3 changed files with 8 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/staging/brcm80211/include/pci_core.h
View File

@ -27,7 +27,7 @@
#endif
/* Sonics side: PCI core and host control registers */
typedef struct sbpciregs {
struct sbpciregs {
u32 control; /* PCI control */
u32 PAD[3];
u32 arbcontrol; /* PCI arbiter control */
@ -52,7 +52,7 @@ typedef struct sbpciregs {
u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */
u16 sprom[36]; /* SPROM shadow Area */
u32 PAD[46];
} sbpciregs_t;
};
#endif /* _LANGUAGE_ASSEMBLY */

4
drivers/staging/brcm80211/util/nicpci.c
View File

@ -32,7 +32,7 @@
typedef struct {
union {
sbpcieregs_t *pcieregs;
sbpciregs_t *pciregs;
struct sbpciregs *pciregs;
} regs; /* Memory mapped register to the core */
si_t *sih; /* System interconnect handle */
@ -136,7 +136,7 @@ void *pcicore_init(si_t *sih, osl_t *osh, void *regs)
ASSERT(cap_ptr);
pi->pciecap_lcreg_offset = cap_ptr + PCIE_CAP_LINKCTRL_OFFSET;
} else
pi->regs.pciregs = (sbpciregs_t *) regs;
pi->regs.pciregs = (struct sbpciregs *) regs;
return pi;
}

9
drivers/staging/brcm80211/util/siutils.c
View File

@ -1665,7 +1665,7 @@ void si_pci_down(si_t *sih)
void si_pci_setup(si_t *sih, uint coremask)
{
si_info_t *sii;
sbpciregs_t *pciregs = NULL;
struct sbpciregs *pciregs = NULL;
u32 siflag = 0, w;
uint idx = 0;
@ -1685,8 +1685,7 @@ void si_pci_setup(si_t *sih, uint coremask)
siflag = si_flag(sih);
/* switch over to pci core */
pciregs =
(sbpciregs_t *) si_setcoreidx(sih, sii->pub.buscoreidx);
pciregs = (struct sbpciregs *)si_setcoreidx(sih, sii->pub.buscoreidx);
}
/*
@ -1727,7 +1726,7 @@ void si_pci_setup(si_t *sih, uint coremask)
int si_pci_fixcfg(si_t *sih)
{
uint origidx, pciidx;
sbpciregs_t *pciregs = NULL;
struct sbpciregs *pciregs = NULL;
sbpcieregs_t *pcieregs = NULL;
void *regs = NULL;
u16 val16, *reg16 = NULL;
@ -1748,7 +1747,7 @@ int si_pci_fixcfg(si_t *sih)
ASSERT(pcieregs != NULL);
reg16 = &pcieregs->sprom[SRSH_PI_OFFSET];
} else if (sii->pub.buscoretype == PCI_CORE_ID) {
pciregs = (sbpciregs_t *) si_setcore(&sii->pub, PCI_CORE_ID, 0);
pciregs = (struct sbpciregs *)si_setcore(&sii->pub, PCI_CORE_ID, 0);
regs = pciregs;
ASSERT(pciregs != NULL);
reg16 = &pciregs->sprom[SRSH_PI_OFFSET];