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clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998

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See similar issue solved by commit 5f2420ed21
("clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998")

Without this patch, PCIe PHY init fails:

qcom-qmp-phy 1c06000.phy: pipe_clk enable failed err=-16
phy phy-1c06000.phy.0: phy init failed --> -16

Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
Fixes: b5f5f525c5 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Marc Gonzalez 2019-03-25 14:49:54 +01:00 committed by Stephen Boyd
parent 892df0191b
commit c0ee0e43c0
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/qcom/gcc-msm8998.c
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@ -2161,7 +2161,7 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = {
static struct clk_branch gcc_pcie_0_pipe_clk = {
.halt_reg = 0x6b018,
.halt_check = BRANCH_HALT,
.halt_check = BRANCH_HALT_SKIP,
.clkr = {
.enable_reg = 0x6b018,
.enable_mask = BIT(0),