forked from Minki/linux
ARM: 6768/1: hw_breakpoint: ensure debug logic is powered up on v7 cores
ARMv7 allows the debug core logic to be powered down and provides the DBGPRSR register so that software can power-up and check the status of the logic. This patch ensures that the debug logic is powered up on ARMv7 cores before we attempt to access the extended debug registers. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -836,9 +836,11 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
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/*
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/*
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* One-time initialisation.
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* One-time initialisation.
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*/
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*/
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static void reset_ctrl_regs(void *unused)
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static void reset_ctrl_regs(void *info)
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{
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{
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int i;
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int i, cpu = smp_processor_id();
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u32 dbg_power;
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cpumask_t *cpumask = info;
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/*
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/*
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* v7 debug contains save and restore registers so that debug state
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* v7 debug contains save and restore registers so that debug state
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@ -849,6 +851,17 @@ static void reset_ctrl_regs(void *unused)
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* later on.
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* later on.
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*/
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*/
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if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
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if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
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/*
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* Ensure sticky power-down is clear (i.e. debug logic is
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* powered up).
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*/
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asm volatile("mrc p14, 0, %0, c1, c5, 4" : "=r" (dbg_power));
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if ((dbg_power & 0x1) == 0) {
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pr_warning("CPU %d debug is powered down!\n", cpu);
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cpumask_or(cpumask, cpumask, cpumask_of(cpu));
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return;
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}
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/*
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/*
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* Unconditionally clear the lock by writing a value
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* Unconditionally clear the lock by writing a value
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* other than 0xC5ACCE55 to the access register.
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* other than 0xC5ACCE55 to the access register.
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@ -887,6 +900,7 @@ static struct notifier_block __cpuinitdata dbg_reset_nb = {
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static int __init arch_hw_breakpoint_init(void)
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static int __init arch_hw_breakpoint_init(void)
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{
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{
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u32 dscr;
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u32 dscr;
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cpumask_t cpumask = { CPU_BITS_NONE };
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debug_arch = get_debug_arch();
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debug_arch = get_debug_arch();
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@ -911,7 +925,13 @@ static int __init arch_hw_breakpoint_init(void)
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* Reset the breakpoint resources. We assume that a halting
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* Reset the breakpoint resources. We assume that a halting
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* debugger will leave the world in a nice state for us.
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* debugger will leave the world in a nice state for us.
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*/
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*/
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on_each_cpu(reset_ctrl_regs, NULL, 1);
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on_each_cpu(reset_ctrl_regs, &cpumask, 1);
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if (!cpumask_empty(&cpumask)) {
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core_num_brps = 0;
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core_num_reserved_brps = 0;
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core_num_wrps = 0;
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return 0;
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}
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ARM_DBG_READ(c1, 0, dscr);
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ARM_DBG_READ(c1, 0, dscr);
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if (dscr & ARM_DSCR_HDBGEN) {
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if (dscr & ARM_DSCR_HDBGEN) {
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