drm/amdgpu: add new BIF 5.0 register for BACO
Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -27,6 +27,7 @@
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#define mmMM_INDEX 0x0
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#define mmMM_INDEX_HI 0x6
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#define mmMM_DATA 0x1
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#define mmCC_BIF_BX_FUSESTRAP0 0x14D7
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#define mmCC_BIF_BX_STRAP2 0x152A
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#define mmBIF_MM_INDACCESS_CNTL 0x1500
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#define mmBIF_DOORBELL_APER_EN 0x1501
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@ -32,6 +32,8 @@
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#define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
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#define MM_DATA__MM_DATA_MASK 0xffffffff
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#define MM_DATA__MM_DATA__SHIFT 0x0
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#define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2
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#define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1
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#define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS_MASK 0x2
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#define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS__SHIFT 0x1
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#define BIF_DOORBELL_APER_EN__BIF_DOORBELL_APER_EN_MASK 0x1
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