mlx5-fixes-2022-05-31
-----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAmKWfVcACgkQSD+KveBX +j6WkQf/eKOHaSaD/h3JkUp1qFpFFxjdidnUJKVg/N4N5EhiiF5k2FZm5o0l3Nv9 rR5emN/iMpeAtSEMoQcecKvjeCppFMFfuKWh8GoimQpbsApOwDvOAsk01p78FVOA ZK2DeWFdBT9P3d/NOiwgHujkYVHF0OuSMfnf5Iww3GubE5/1PfPZ4QTUyFRjM/D7 Ir6GXi9psIBIERzAVTIRpnzTPjGzkKURgcyr5N7mpxMWbgjB4nKs//O0emfc/mG6 i46OQNSU/mLWT7K8kXP2kyq6s1/DCXc+s7UbChEXp/v/N0yZeeelYrkhkZUsbGtr DA2mK2tikGGSGwtHpI8yYbs+N1LoIw== =msRz -----END PGP SIGNATURE----- Merge tag 'mlx5-fixes-2022-05-31' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5 fixes 2022-05-31 This series provides bug fixes to mlx5 driver. Please pull and let me know if there is any problem. * tag 'mlx5-fixes-2022-05-31' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux: net/mlx5: Fix mlx5_get_next_dev() peer device matching net/mlx5e: Update netdev features after changing XDP state net/mlx5: correct ECE offset in query qp output net/mlx5e: Disable softirq in mlx5e_activate_rq to avoid race condition net/mlx5: CT: Fix header-rewrite re-use for tupels net/mlx5e: TC NIC mode, fix tc chains miss table net/mlx5: Don't use already freed action pointer ==================== Link: https://lore.kernel.org/r/20220531205447.99236-1-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
c034ff2b53
@ -571,18 +571,32 @@ static int _next_phys_dev(struct mlx5_core_dev *mdev,
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return 1;
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}
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static void *pci_get_other_drvdata(struct device *this, struct device *other)
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{
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if (this->driver != other->driver)
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return NULL;
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return pci_get_drvdata(to_pci_dev(other));
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}
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static int next_phys_dev(struct device *dev, const void *data)
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{
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struct mlx5_adev *madev = container_of(dev, struct mlx5_adev, adev.dev);
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struct mlx5_core_dev *mdev = madev->mdev;
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struct mlx5_core_dev *mdev, *this = (struct mlx5_core_dev *)data;
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mdev = pci_get_other_drvdata(this->device, dev);
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if (!mdev)
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return 0;
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return _next_phys_dev(mdev, data);
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}
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static int next_phys_dev_lag(struct device *dev, const void *data)
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{
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struct mlx5_adev *madev = container_of(dev, struct mlx5_adev, adev.dev);
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struct mlx5_core_dev *mdev = madev->mdev;
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struct mlx5_core_dev *mdev, *this = (struct mlx5_core_dev *)data;
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mdev = pci_get_other_drvdata(this->device, dev);
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if (!mdev)
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return 0;
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if (!MLX5_CAP_GEN(mdev, vport_group_manager) ||
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!MLX5_CAP_GEN(mdev, lag_master) ||
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@ -596,19 +610,17 @@ static int next_phys_dev_lag(struct device *dev, const void *data)
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static struct mlx5_core_dev *mlx5_get_next_dev(struct mlx5_core_dev *dev,
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int (*match)(struct device *dev, const void *data))
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{
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struct auxiliary_device *adev;
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struct mlx5_adev *madev;
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struct device *next;
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if (!mlx5_core_is_pf(dev))
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return NULL;
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adev = auxiliary_find_device(NULL, dev, match);
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if (!adev)
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next = bus_find_device(&pci_bus_type, NULL, dev, match);
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if (!next)
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return NULL;
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madev = container_of(adev, struct mlx5_adev, adev);
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put_device(&adev->dev);
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return madev->mdev;
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put_device(next);
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return pci_get_drvdata(to_pci_dev(next));
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}
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/* Must be called with intf_mutex held */
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@ -764,6 +764,7 @@ struct mlx5e_rq {
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u8 wq_type;
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u32 rqn;
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struct mlx5_core_dev *mdev;
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struct mlx5e_channel *channel;
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u32 umr_mkey;
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struct mlx5e_dma_info wqe_overflow;
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@ -1076,6 +1077,9 @@ void mlx5e_close_cq(struct mlx5e_cq *cq);
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int mlx5e_open_locked(struct net_device *netdev);
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int mlx5e_close_locked(struct net_device *netdev);
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void mlx5e_trigger_napi_icosq(struct mlx5e_channel *c);
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void mlx5e_trigger_napi_sched(struct napi_struct *napi);
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int mlx5e_open_channels(struct mlx5e_priv *priv,
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struct mlx5e_channels *chs);
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void mlx5e_close_channels(struct mlx5e_channels *chs);
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@ -12,6 +12,7 @@ struct mlx5e_post_act;
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enum {
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MLX5E_TC_FT_LEVEL = 0,
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MLX5E_TC_TTC_FT_LEVEL,
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MLX5E_TC_MISS_LEVEL,
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};
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struct mlx5e_tc_table {
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@ -20,6 +21,7 @@ struct mlx5e_tc_table {
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*/
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struct mutex t_lock;
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struct mlx5_flow_table *t;
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struct mlx5_flow_table *miss_t;
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struct mlx5_fs_chains *chains;
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struct mlx5e_post_act *post_act;
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@ -736,6 +736,7 @@ void mlx5e_ptp_activate_channel(struct mlx5e_ptp *c)
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if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
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mlx5e_ptp_rx_set_fs(c->priv);
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mlx5e_activate_rq(&c->rq);
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mlx5e_trigger_napi_sched(&c->napi);
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}
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}
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@ -123,6 +123,8 @@ static int mlx5e_rx_reporter_err_icosq_cqe_recover(void *ctx)
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xskrq->stats->recover++;
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}
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mlx5e_trigger_napi_icosq(icosq->channel);
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mutex_unlock(&icosq->channel->icosq_recovery_lock);
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return 0;
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@ -166,6 +168,10 @@ static int mlx5e_rx_reporter_err_rq_cqe_recover(void *ctx)
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clear_bit(MLX5E_RQ_STATE_RECOVERING, &rq->state);
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mlx5e_activate_rq(rq);
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rq->stats->recover++;
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if (rq->channel)
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mlx5e_trigger_napi_icosq(rq->channel);
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else
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mlx5e_trigger_napi_sched(rq->cq.napi);
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return 0;
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out:
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clear_bit(MLX5E_RQ_STATE_RECOVERING, &rq->state);
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@ -715,7 +715,7 @@ mlx5_tc_ct_entry_create_mod_hdr(struct mlx5_tc_ct_priv *ct_priv,
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struct mlx5_flow_attr *attr,
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struct flow_rule *flow_rule,
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struct mlx5e_mod_hdr_handle **mh,
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u8 zone_restore_id, bool nat)
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u8 zone_restore_id, bool nat_table, bool has_nat)
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{
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DECLARE_MOD_HDR_ACTS_ACTIONS(actions_arr, MLX5_CT_MIN_MOD_ACTS);
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DECLARE_MOD_HDR_ACTS(mod_acts, actions_arr);
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@ -731,11 +731,12 @@ mlx5_tc_ct_entry_create_mod_hdr(struct mlx5_tc_ct_priv *ct_priv,
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&attr->ct_attr.ct_labels_id);
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if (err)
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return -EOPNOTSUPP;
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if (nat) {
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err = mlx5_tc_ct_entry_create_nat(ct_priv, flow_rule,
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&mod_acts);
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if (err)
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goto err_mapping;
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if (nat_table) {
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if (has_nat) {
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err = mlx5_tc_ct_entry_create_nat(ct_priv, flow_rule, &mod_acts);
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if (err)
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goto err_mapping;
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}
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ct_state |= MLX5_CT_STATE_NAT_BIT;
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}
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@ -750,7 +751,7 @@ mlx5_tc_ct_entry_create_mod_hdr(struct mlx5_tc_ct_priv *ct_priv,
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if (err)
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goto err_mapping;
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if (nat) {
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if (nat_table && has_nat) {
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attr->modify_hdr = mlx5_modify_header_alloc(ct_priv->dev, ct_priv->ns_type,
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mod_acts.num_actions,
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mod_acts.actions);
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@ -818,7 +819,9 @@ mlx5_tc_ct_entry_add_rule(struct mlx5_tc_ct_priv *ct_priv,
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err = mlx5_tc_ct_entry_create_mod_hdr(ct_priv, attr, flow_rule,
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&zone_rule->mh,
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zone_restore_id, nat);
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zone_restore_id,
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nat,
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mlx5_tc_ct_entry_has_nat(entry));
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if (err) {
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ct_dbg("Failed to create ct entry mod hdr");
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goto err_mod_hdr;
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@ -179,6 +179,7 @@ static void mlx5e_activate_trap(struct mlx5e_trap *trap)
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{
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napi_enable(&trap->napi);
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mlx5e_activate_rq(&trap->rq);
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mlx5e_trigger_napi_sched(&trap->napi);
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}
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void mlx5e_deactivate_trap(struct mlx5e_priv *priv)
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@ -117,6 +117,7 @@ static int mlx5e_xsk_enable_locked(struct mlx5e_priv *priv,
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goto err_remove_pool;
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mlx5e_activate_xsk(c);
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mlx5e_trigger_napi_icosq(c);
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/* Don't wait for WQEs, because the newer xdpsock sample doesn't provide
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* any Fill Ring entries at the setup stage.
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@ -64,6 +64,7 @@ static int mlx5e_init_xsk_rq(struct mlx5e_channel *c,
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rq->clock = &mdev->clock;
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rq->icosq = &c->icosq;
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rq->ix = c->ix;
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rq->channel = c;
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rq->mdev = mdev;
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rq->hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu);
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rq->xdpsq = &c->rq_xdpsq;
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@ -179,10 +180,6 @@ void mlx5e_activate_xsk(struct mlx5e_channel *c)
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mlx5e_reporter_icosq_resume_recovery(c);
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/* TX queue is created active. */
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spin_lock_bh(&c->async_icosq_lock);
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mlx5e_trigger_irq(&c->async_icosq);
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spin_unlock_bh(&c->async_icosq_lock);
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}
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void mlx5e_deactivate_xsk(struct mlx5e_channel *c)
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@ -475,6 +475,7 @@ static int mlx5e_init_rxq_rq(struct mlx5e_channel *c, struct mlx5e_params *param
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rq->clock = &mdev->clock;
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rq->icosq = &c->icosq;
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rq->ix = c->ix;
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rq->channel = c;
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rq->mdev = mdev;
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rq->hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu);
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rq->xdpsq = &c->rq_xdpsq;
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@ -1066,13 +1067,6 @@ err_free_rq:
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void mlx5e_activate_rq(struct mlx5e_rq *rq)
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{
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set_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
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if (rq->icosq) {
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mlx5e_trigger_irq(rq->icosq);
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} else {
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local_bh_disable();
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napi_schedule(rq->cq.napi);
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local_bh_enable();
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}
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}
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void mlx5e_deactivate_rq(struct mlx5e_rq *rq)
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@ -2227,6 +2221,20 @@ static int mlx5e_channel_stats_alloc(struct mlx5e_priv *priv, int ix, int cpu)
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return 0;
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}
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void mlx5e_trigger_napi_icosq(struct mlx5e_channel *c)
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{
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spin_lock_bh(&c->async_icosq_lock);
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mlx5e_trigger_irq(&c->async_icosq);
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spin_unlock_bh(&c->async_icosq_lock);
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}
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void mlx5e_trigger_napi_sched(struct napi_struct *napi)
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{
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local_bh_disable();
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napi_schedule(napi);
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local_bh_enable();
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}
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static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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struct mlx5e_params *params,
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struct mlx5e_channel_param *cparam,
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@ -2308,6 +2316,8 @@ static void mlx5e_activate_channel(struct mlx5e_channel *c)
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if (test_bit(MLX5E_CHANNEL_STATE_XSK, c->state))
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mlx5e_activate_xsk(c);
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mlx5e_trigger_napi_icosq(c);
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}
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static void mlx5e_deactivate_channel(struct mlx5e_channel *c)
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@ -4559,6 +4569,11 @@ static int mlx5e_xdp_set(struct net_device *netdev, struct bpf_prog *prog)
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unlock:
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mutex_unlock(&priv->state_lock);
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/* Need to fix some features. */
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if (!err)
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netdev_update_features(netdev);
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return err;
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}
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@ -4714,6 +4714,33 @@ static int mlx5e_tc_nic_get_ft_size(struct mlx5_core_dev *dev)
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return tc_tbl_size;
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}
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static int mlx5e_tc_nic_create_miss_table(struct mlx5e_priv *priv)
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{
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struct mlx5_flow_table **ft = &priv->fs.tc.miss_t;
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struct mlx5_flow_table_attr ft_attr = {};
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struct mlx5_flow_namespace *ns;
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int err = 0;
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ft_attr.max_fte = 1;
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ft_attr.autogroup.max_num_groups = 1;
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ft_attr.level = MLX5E_TC_MISS_LEVEL;
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ft_attr.prio = 0;
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ns = mlx5_get_flow_namespace(priv->mdev, MLX5_FLOW_NAMESPACE_KERNEL);
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*ft = mlx5_create_auto_grouped_flow_table(ns, &ft_attr);
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if (IS_ERR(*ft)) {
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err = PTR_ERR(*ft);
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netdev_err(priv->netdev, "failed to create tc nic miss table err=%d\n", err);
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}
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return err;
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}
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static void mlx5e_tc_nic_destroy_miss_table(struct mlx5e_priv *priv)
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{
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mlx5_destroy_flow_table(priv->fs.tc.miss_t);
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}
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int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
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{
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struct mlx5e_tc_table *tc = &priv->fs.tc;
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@ -4746,19 +4773,23 @@ int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
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}
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tc->mapping = chains_mapping;
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err = mlx5e_tc_nic_create_miss_table(priv);
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if (err)
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goto err_chains;
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if (MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level))
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attr.flags = MLX5_CHAINS_AND_PRIOS_SUPPORTED |
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MLX5_CHAINS_IGNORE_FLOW_LEVEL_SUPPORTED;
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attr.ns = MLX5_FLOW_NAMESPACE_KERNEL;
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attr.max_ft_sz = mlx5e_tc_nic_get_ft_size(dev);
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attr.max_grp_num = MLX5E_TC_TABLE_NUM_GROUPS;
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attr.default_ft = mlx5e_vlan_get_flowtable(priv->fs.vlan);
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attr.default_ft = priv->fs.tc.miss_t;
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attr.mapping = chains_mapping;
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|
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tc->chains = mlx5_chains_create(dev, &attr);
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if (IS_ERR(tc->chains)) {
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err = PTR_ERR(tc->chains);
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goto err_chains;
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goto err_miss;
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}
|
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|
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tc->post_act = mlx5e_tc_post_act_init(priv, tc->chains, MLX5_FLOW_NAMESPACE_KERNEL);
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@ -4781,6 +4812,8 @@ err_reg:
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mlx5_tc_ct_clean(tc->ct);
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mlx5e_tc_post_act_destroy(tc->post_act);
|
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mlx5_chains_destroy(tc->chains);
|
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err_miss:
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mlx5e_tc_nic_destroy_miss_table(priv);
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err_chains:
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mapping_destroy(chains_mapping);
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err_mapping:
|
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@ -4821,6 +4854,7 @@ void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
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mlx5e_tc_post_act_destroy(tc->post_act);
|
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mapping_destroy(tc->mapping);
|
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mlx5_chains_destroy(tc->chains);
|
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mlx5e_tc_nic_destroy_miss_table(priv);
|
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}
|
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|
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int mlx5e_tc_ht_init(struct rhashtable *tc_ht)
|
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|
@ -114,7 +114,7 @@
|
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#define KERNEL_MIN_LEVEL (KERNEL_NIC_PRIO_NUM_LEVELS + 1)
|
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|
||||
#define KERNEL_NIC_TC_NUM_PRIOS 1
|
||||
#define KERNEL_NIC_TC_NUM_LEVELS 2
|
||||
#define KERNEL_NIC_TC_NUM_LEVELS 3
|
||||
|
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#define ANCHOR_NUM_LEVELS 1
|
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#define ANCHOR_NUM_PRIOS 1
|
||||
|
@ -44,11 +44,10 @@ static int set_miss_action(struct mlx5_flow_root_namespace *ns,
|
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err = mlx5dr_table_set_miss_action(ft->fs_dr_table.dr_table, action);
|
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if (err && action) {
|
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err = mlx5dr_action_destroy(action);
|
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if (err) {
|
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action = NULL;
|
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mlx5_core_err(ns->dev, "Failed to destroy action (%d)\n",
|
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err);
|
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}
|
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if (err)
|
||||
mlx5_core_err(ns->dev,
|
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"Failed to destroy action (%d)\n", err);
|
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action = NULL;
|
||||
}
|
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ft->fs_dr_table.miss_action = action;
|
||||
if (old_miss_action) {
|
||||
|
@ -5176,12 +5176,11 @@ struct mlx5_ifc_query_qp_out_bits {
|
||||
|
||||
u8 syndrome[0x20];
|
||||
|
||||
u8 reserved_at_40[0x20];
|
||||
u8 ece[0x20];
|
||||
u8 reserved_at_40[0x40];
|
||||
|
||||
u8 opt_param_mask[0x20];
|
||||
|
||||
u8 reserved_at_a0[0x20];
|
||||
u8 ece[0x20];
|
||||
|
||||
struct mlx5_ifc_qpc_bits qpc;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user