mt76: use mt76x02_dev instead of mt76_dev in mt76x02_phy.c
Use mt76x02_dev data structure as reference in mt76x02_phy.c instead of mt76_dev Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
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@ -618,7 +618,7 @@ void mt76x0_phy_set_txpower(struct mt76x02_dev *dev)
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dev->mt76.txpower_cur = mt76x02_get_max_rate_power(t);
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mt76x02_add_rate_power_offset(t, -info[0]);
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mt76x02_phy_set_txpower(&dev->mt76, info[0], info[1]);
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mt76x02_phy_set_txpower(dev, info[0], info[1]);
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}
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int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
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@ -815,7 +815,7 @@ static void mt76x0_dynamic_vga_tuning(struct mt76x02_dev *dev)
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int avg_rssi;
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init_vga = chandef->chan->band == NL80211_BAND_5GHZ ? 0x54 : 0x4E;
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avg_rssi = mt76x02_phy_get_min_avg_rssi(&dev->mt76);
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avg_rssi = mt76x02_phy_get_min_avg_rssi(dev);
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if (avg_rssi > -60)
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init_vga -= 0x20;
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else if (avg_rssi > -70)
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@ -897,6 +897,6 @@ void mt76x0_phy_init(struct mt76x02_dev *dev)
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INIT_DELAYED_WORK(&dev->cal_work, mt76x0_phy_calibrate);
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mt76x0_rf_init(dev);
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mt76x02_phy_set_rxpath(&dev->mt76);
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mt76x02_phy_set_txdac(&dev->mt76);
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mt76x02_phy_set_rxpath(dev);
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mt76x02_phy_set_txdac(dev);
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}
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@ -17,18 +17,17 @@
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#include <linux/kernel.h>
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#include "mt76.h"
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#include "mt76x02.h"
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#include "mt76x02_phy.h"
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#include "mt76x02_mac.h"
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void mt76x02_phy_set_rxpath(struct mt76_dev *dev)
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void mt76x02_phy_set_rxpath(struct mt76x02_dev *dev)
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{
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u32 val;
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val = __mt76_rr(dev, MT_BBP(AGC, 0));
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val = mt76_rr(dev, MT_BBP(AGC, 0));
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val &= ~BIT(4);
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switch (dev->chainmask & 0xf) {
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switch (dev->mt76.chainmask & 0xf) {
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case 2:
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val |= BIT(3);
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break;
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@ -37,23 +36,23 @@ void mt76x02_phy_set_rxpath(struct mt76_dev *dev)
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break;
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}
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__mt76_wr(dev, MT_BBP(AGC, 0), val);
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mt76_wr(dev, MT_BBP(AGC, 0), val);
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mb();
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val = __mt76_rr(dev, MT_BBP(AGC, 0));
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val = mt76_rr(dev, MT_BBP(AGC, 0));
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}
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EXPORT_SYMBOL_GPL(mt76x02_phy_set_rxpath);
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void mt76x02_phy_set_txdac(struct mt76_dev *dev)
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void mt76x02_phy_set_txdac(struct mt76x02_dev *dev)
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{
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int txpath;
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txpath = (dev->chainmask >> 8) & 0xf;
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txpath = (dev->mt76.chainmask >> 8) & 0xf;
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switch (txpath) {
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case 2:
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__mt76_set(dev, MT_BBP(TXBE, 5), 0x3);
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mt76_set(dev, MT_BBP(TXBE, 5), 0x3);
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break;
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default:
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__mt76_clear(dev, MT_BBP(TXBE, 5), 0x3);
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mt76_clear(dev, MT_BBP(TXBE, 5), 0x3);
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break;
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}
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}
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@ -102,40 +101,38 @@ void mt76x02_add_rate_power_offset(struct mt76_rate_power *r, int offset)
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}
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EXPORT_SYMBOL_GPL(mt76x02_add_rate_power_offset);
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void mt76x02_phy_set_txpower(struct mt76_dev *dev, int txp_0, int txp_1)
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void mt76x02_phy_set_txpower(struct mt76x02_dev *dev, int txp_0, int txp_1)
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{
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struct mt76_rate_power *t = &dev->rate_power;
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struct mt76_rate_power *t = &dev->mt76.rate_power;
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__mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_0,
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txp_0);
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__mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_1,
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txp_1);
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mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_0, txp_0);
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mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_1, txp_1);
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__mt76_wr(dev, MT_TX_PWR_CFG_0,
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mt76x02_tx_power_mask(t->cck[0], t->cck[2], t->ofdm[0],
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t->ofdm[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_1,
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mt76x02_tx_power_mask(t->ofdm[4], t->ofdm[6], t->ht[0],
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t->ht[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_2,
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mt76x02_tx_power_mask(t->ht[4], t->ht[6], t->ht[8],
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t->ht[10]));
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__mt76_wr(dev, MT_TX_PWR_CFG_3,
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mt76x02_tx_power_mask(t->ht[12], t->ht[14], t->stbc[0],
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t->stbc[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_4,
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mt76x02_tx_power_mask(t->stbc[4], t->stbc[6], 0, 0));
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__mt76_wr(dev, MT_TX_PWR_CFG_7,
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mt76x02_tx_power_mask(t->ofdm[7], t->vht[8], t->ht[7],
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t->vht[9]));
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__mt76_wr(dev, MT_TX_PWR_CFG_8,
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mt76x02_tx_power_mask(t->ht[14], 0, t->vht[8], t->vht[9]));
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__mt76_wr(dev, MT_TX_PWR_CFG_9,
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mt76x02_tx_power_mask(t->ht[7], 0, t->stbc[8], t->stbc[9]));
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mt76_wr(dev, MT_TX_PWR_CFG_0,
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mt76x02_tx_power_mask(t->cck[0], t->cck[2], t->ofdm[0],
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t->ofdm[2]));
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mt76_wr(dev, MT_TX_PWR_CFG_1,
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mt76x02_tx_power_mask(t->ofdm[4], t->ofdm[6], t->ht[0],
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t->ht[2]));
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mt76_wr(dev, MT_TX_PWR_CFG_2,
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mt76x02_tx_power_mask(t->ht[4], t->ht[6], t->ht[8],
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t->ht[10]));
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mt76_wr(dev, MT_TX_PWR_CFG_3,
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mt76x02_tx_power_mask(t->ht[12], t->ht[14], t->stbc[0],
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t->stbc[2]));
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mt76_wr(dev, MT_TX_PWR_CFG_4,
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mt76x02_tx_power_mask(t->stbc[4], t->stbc[6], 0, 0));
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mt76_wr(dev, MT_TX_PWR_CFG_7,
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mt76x02_tx_power_mask(t->ofdm[7], t->vht[8], t->ht[7],
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t->vht[9]));
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mt76_wr(dev, MT_TX_PWR_CFG_8,
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mt76x02_tx_power_mask(t->ht[14], 0, t->vht[8], t->vht[9]));
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mt76_wr(dev, MT_TX_PWR_CFG_9,
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mt76x02_tx_power_mask(t->ht[7], 0, t->stbc[8], t->stbc[9]));
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}
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EXPORT_SYMBOL_GPL(mt76x02_phy_set_txpower);
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int mt76x02_phy_get_min_avg_rssi(struct mt76_dev *dev)
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int mt76x02_phy_get_min_avg_rssi(struct mt76x02_dev *dev)
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{
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struct mt76x02_sta *sta;
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struct mt76_wcid *wcid;
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@ -145,8 +142,8 @@ int mt76x02_phy_get_min_avg_rssi(struct mt76_dev *dev)
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local_bh_disable();
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rcu_read_lock();
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for (i = 0; i < ARRAY_SIZE(dev->wcid_mask); i++) {
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unsigned long mask = dev->wcid_mask[i];
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for (i = 0; i < ARRAY_SIZE(dev->mt76.wcid_mask); i++) {
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unsigned long mask = dev->mt76.wcid_mask[i];
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if (!mask)
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continue;
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@ -155,17 +152,17 @@ int mt76x02_phy_get_min_avg_rssi(struct mt76_dev *dev)
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if (!(mask & 1))
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continue;
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wcid = rcu_dereference(dev->wcid[j]);
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wcid = rcu_dereference(dev->mt76.wcid[j]);
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if (!wcid)
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continue;
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sta = container_of(wcid, struct mt76x02_sta, wcid);
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spin_lock(&dev->rx_lock);
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spin_lock(&dev->mt76.rx_lock);
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if (sta->inactive_count++ < 5)
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cur_rssi = ewma_signal_read(&sta->rssi);
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else
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cur_rssi = 0;
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spin_unlock(&dev->rx_lock);
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spin_unlock(&dev->mt76.rx_lock);
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if (cur_rssi < min_rssi)
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min_rssi = cur_rssi;
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@ -20,11 +20,11 @@
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#include "mt76x02_regs.h"
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void mt76x02_add_rate_power_offset(struct mt76_rate_power *r, int offset);
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void mt76x02_phy_set_txpower(struct mt76_dev *dev, int txp_0, int txp_2);
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void mt76x02_phy_set_txpower(struct mt76x02_dev *dev, int txp_0, int txp_2);
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void mt76x02_limit_rate_power(struct mt76_rate_power *r, int limit);
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int mt76x02_get_max_rate_power(struct mt76_rate_power *r);
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void mt76x02_phy_set_rxpath(struct mt76_dev *dev);
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void mt76x02_phy_set_txdac(struct mt76_dev *dev);
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int mt76x02_phy_get_min_avg_rssi(struct mt76_dev *dev);
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void mt76x02_phy_set_rxpath(struct mt76x02_dev *dev);
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void mt76x02_phy_set_txdac(struct mt76x02_dev *dev);
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int mt76x02_phy_get_min_avg_rssi(struct mt76x02_dev *dev);
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#endif /* __MT76x02_PHY_H */
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@ -210,7 +210,7 @@ mt76x2_phy_update_channel_gain(struct mt76x02_dev *dev)
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int low_gain;
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u32 val;
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dev->cal.avg_rssi_all = mt76x02_phy_get_min_avg_rssi(&dev->mt76);
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dev->cal.avg_rssi_all = mt76x02_phy_get_min_avg_rssi(dev);
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low_gain = (dev->cal.avg_rssi_all > mt76x2_get_rssi_gain_thresh(dev)) +
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(dev->cal.avg_rssi_all > mt76x2_get_low_rssi_gain_thresh(dev));
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@ -187,7 +187,7 @@ void mt76x2_phy_set_txpower(struct mt76x02_dev *dev)
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dev->target_power_delta[1] = txp_1 - txp.chain[0].target_power;
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dev->mt76.rate_power = t;
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mt76x02_phy_set_txpower(&dev->mt76, txp_0, txp_1);
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mt76x02_phy_set_txpower(dev, txp_0, txp_1);
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}
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EXPORT_SYMBOL_GPL(mt76x2_phy_set_txpower);
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@ -237,8 +237,8 @@ int mt76x2u_init_hardware(struct mt76x02_dev *dev)
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if (err < 0)
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return err;
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mt76x02_phy_set_rxpath(&dev->mt76);
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mt76x02_phy_set_txdac(&dev->mt76);
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mt76x02_phy_set_rxpath(dev);
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mt76x02_phy_set_txdac(dev);
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return mt76x2u_mac_stop(dev);
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}
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@ -69,7 +69,7 @@ mt76x2u_phy_update_channel_gain(struct mt76x02_dev *dev)
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break;
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}
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dev->cal.avg_rssi_all = mt76x02_phy_get_min_avg_rssi(&dev->mt76);
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dev->cal.avg_rssi_all = mt76x02_phy_get_min_avg_rssi(dev);
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false_cca = FIELD_GET(MT_RX_STAT_1_CCA_ERRORS,
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mt76_rr(dev, MT_RX_STAT_1));
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