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drm/amd/display: Fix DP PHY test pre-emphasis not set properly

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Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hersen Wu 2017-01-04 10:22:35 -05:00 committed by Alex Deucher
parent 18f39f2d67
commit bf5cda339d
4 changed files with 19 additions and 10 deletions
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15
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -332,14 +332,21 @@ static bool setup_psr(struct dc *dc, const struct dc_stream *stream)
}
static void set_drive_settings(struct dc *dc,
struct link_training_settings *lt_settings)
struct link_training_settings *lt_settings,
const struct dc_link *link)
{
struct core_dc *core_dc = DC_TO_CORE(dc);
int i;
for (i = 0; i < core_dc->link_count; i++)
dc_link_dp_set_drive_settings(&core_dc->links[i]->public,
lt_settings);
for (i = 0; i < core_dc->link_count; i++) {
if (&core_dc->links[i]->public == link)
break;
}
if (i >= core_dc->link_count)
ASSERT_CRITICAL(false);
dc_link_dp_set_drive_settings(&core_dc->links[i]->public, lt_settings);
}
static void perform_link_training(struct dc *dc,

9
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
View File

@ -229,10 +229,9 @@ void dp_retrain_link_dp_test(struct core_link *link,
link->link_enc,
SIGNAL_TYPE_DISPLAY_PORT);
/* Clear current link setting.
* memset(&link->public.cur_link_settings, 0,
* sizeof(link->public.cur_link_settings));
*/
/* Clear current link setting. */
memset(&link->public.cur_link_settings, 0,
sizeof(link->public.cur_link_settings));
link->link_enc->funcs->enable_dp_output(
link->link_enc,
@ -246,6 +245,8 @@ void dp_retrain_link_dp_test(struct core_link *link,
link_setting,
skip_video_pattern);
link->public.cur_link_settings = *link_setting;
link->dc->hwss.unblank_stream(&pipes[i],
link_setting);
}

3
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -112,7 +112,8 @@ struct link_training_settings;
struct dc_link_funcs {
void (*set_drive_settings)(struct dc *dc,
struct link_training_settings *lt_settings);
struct link_training_settings *lt_settings,
const struct dc_link *link);
void (*perform_link_training)(struct dc *dc,
struct dc_link_settings *link_setting,
bool skip_video_pattern);

2
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
View File

@ -1363,7 +1363,7 @@ void dce110_link_encoder_dp_set_lane_settings(
cntl.pixel_clock = link_settings->link_settings.link_rate *
LINK_RATE_REF_FREQ_IN_KHZ;
for (lane = 0; lane < link_settings->link_settings.lane_count; ++lane) {
for (lane = 0; lane < link_settings->link_settings.lane_count; lane++) {
/* translate lane settings */
training_lane_set.bits.VOLTAGE_SWING_SET =