forked from Minki/linux
staging: et131x: Use for loop to initialise contiguous macstat registers to zero
Replace a long list of contiguous writel() calls with a for loop iterating over the same address values. Also remove redundant comments on the macstat registers, the variable names are good enough. Signed-off-by: Mark Einon <mark.einon@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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6697b87051
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@ -1257,60 +1257,13 @@ static void et1310_config_txmac_regs(struct et131x_adapter *adapter)
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static void et1310_config_macstat_regs(struct et131x_adapter *adapter)
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{
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struct macstat_regs __iomem *macstat =
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&adapter->regs->macstat;
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struct macstat_regs __iomem *macstat = &adapter->regs->macstat;
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u32 *reg;
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/* Next we need to initialize all the macstat registers to zero on
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* the device.
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*/
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writel(0, &macstat->txrx_0_64_byte_frames);
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writel(0, &macstat->txrx_65_127_byte_frames);
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writel(0, &macstat->txrx_128_255_byte_frames);
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writel(0, &macstat->txrx_256_511_byte_frames);
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writel(0, &macstat->txrx_512_1023_byte_frames);
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writel(0, &macstat->txrx_1024_1518_byte_frames);
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writel(0, &macstat->txrx_1519_1522_gvln_frames);
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writel(0, &macstat->rx_bytes);
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writel(0, &macstat->rx_packets);
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writel(0, &macstat->rx_fcs_errs);
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writel(0, &macstat->rx_multicast_packets);
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writel(0, &macstat->rx_broadcast_packets);
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writel(0, &macstat->rx_control_frames);
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writel(0, &macstat->rx_pause_frames);
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writel(0, &macstat->rx_unknown_opcodes);
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writel(0, &macstat->rx_align_errs);
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writel(0, &macstat->rx_frame_len_errs);
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writel(0, &macstat->rx_code_errs);
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writel(0, &macstat->rx_carrier_sense_errs);
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writel(0, &macstat->rx_undersize_packets);
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writel(0, &macstat->rx_oversize_packets);
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writel(0, &macstat->rx_fragment_packets);
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writel(0, &macstat->rx_jabbers);
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writel(0, &macstat->rx_drops);
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writel(0, &macstat->tx_bytes);
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writel(0, &macstat->tx_packets);
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writel(0, &macstat->tx_multicast_packets);
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writel(0, &macstat->tx_broadcast_packets);
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writel(0, &macstat->tx_pause_frames);
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writel(0, &macstat->tx_deferred);
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writel(0, &macstat->tx_excessive_deferred);
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writel(0, &macstat->tx_single_collisions);
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writel(0, &macstat->tx_multiple_collisions);
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writel(0, &macstat->tx_late_collisions);
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writel(0, &macstat->tx_excessive_collisions);
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writel(0, &macstat->tx_total_collisions);
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writel(0, &macstat->tx_pause_honored_frames);
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writel(0, &macstat->tx_drops);
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writel(0, &macstat->tx_jabbers);
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writel(0, &macstat->tx_fcs_errs);
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writel(0, &macstat->tx_control_frames);
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writel(0, &macstat->tx_oversize_frames);
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writel(0, &macstat->tx_undersize_frames);
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writel(0, &macstat->tx_fragments);
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writel(0, &macstat->carry_reg1);
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writel(0, &macstat->carry_reg2);
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/* initialize all the macstat registers to zero on the device */
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for (reg = &macstat->txrx_0_64_byte_frames;
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reg <= &macstat->carry_reg2; reg++)
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writel(0, reg);
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/* Unmask any counters that we want to track the overflow of.
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* Initially this will be all counters. It may become clear later
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@ -1259,148 +1259,54 @@ struct mac_regs { /* Location: */
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struct macstat_regs { /* Location: */
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u32 pad[32]; /* 0x6000 - 607C */
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/* Tx/Rx 0-64 Byte Frame Counter */
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/* counters */
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u32 txrx_0_64_byte_frames; /* 0x6080 */
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/* Tx/Rx 65-127 Byte Frame Counter */
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u32 txrx_65_127_byte_frames; /* 0x6084 */
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/* Tx/Rx 128-255 Byte Frame Counter */
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u32 txrx_128_255_byte_frames; /* 0x6088 */
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/* Tx/Rx 256-511 Byte Frame Counter */
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u32 txrx_256_511_byte_frames; /* 0x608C */
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/* Tx/Rx 512-1023 Byte Frame Counter */
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u32 txrx_512_1023_byte_frames; /* 0x6090 */
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/* Tx/Rx 1024-1518 Byte Frame Counter */
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u32 txrx_1024_1518_byte_frames; /* 0x6094 */
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/* Tx/Rx 1519-1522 Byte Good VLAN Frame Count */
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u32 txrx_1519_1522_gvln_frames; /* 0x6098 */
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/* Rx Byte Counter */
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u32 rx_bytes; /* 0x609C */
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/* Rx Packet Counter */
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u32 rx_packets; /* 0x60A0 */
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/* Rx FCS Error Counter */
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u32 rx_fcs_errs; /* 0x60A4 */
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/* Rx Multicast Packet Counter */
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u32 rx_multicast_packets; /* 0x60A8 */
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/* Rx Broadcast Packet Counter */
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u32 rx_broadcast_packets; /* 0x60AC */
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/* Rx Control Frame Packet Counter */
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u32 rx_control_frames; /* 0x60B0 */
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/* Rx Pause Frame Packet Counter */
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u32 rx_pause_frames; /* 0x60B4 */
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/* Rx Unknown OP Code Counter */
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u32 rx_unknown_opcodes; /* 0x60B8 */
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/* Rx Alignment Error Counter */
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u32 rx_align_errs; /* 0x60BC */
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/* Rx Frame Length Error Counter */
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u32 rx_frame_len_errs; /* 0x60C0 */
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/* Rx Code Error Counter */
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u32 rx_code_errs; /* 0x60C4 */
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/* Rx Carrier Sense Error Counter */
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u32 rx_carrier_sense_errs; /* 0x60C8 */
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/* Rx Undersize Packet Counter */
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u32 rx_undersize_packets; /* 0x60CC */
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/* Rx Oversize Packet Counter */
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u32 rx_oversize_packets; /* 0x60D0 */
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/* Rx Fragment Counter */
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u32 rx_fragment_packets; /* 0x60D4 */
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/* Rx Jabber Counter */
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u32 rx_jabbers; /* 0x60D8 */
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/* Rx Drop */
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u32 rx_drops; /* 0x60DC */
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/* Tx Byte Counter */
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u32 tx_bytes; /* 0x60E0 */
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/* Tx Packet Counter */
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u32 tx_packets; /* 0x60E4 */
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/* Tx Multicast Packet Counter */
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u32 tx_multicast_packets; /* 0x60E8 */
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/* Tx Broadcast Packet Counter */
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u32 tx_broadcast_packets; /* 0x60EC */
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/* Tx Pause Control Frame Counter */
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u32 tx_pause_frames; /* 0x60F0 */
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/* Tx Deferral Packet Counter */
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u32 tx_deferred; /* 0x60F4 */
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/* Tx Excessive Deferral Packet Counter */
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u32 tx_excessive_deferred; /* 0x60F8 */
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/* Tx Single Collision Packet Counter */
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u32 tx_single_collisions; /* 0x60FC */
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/* Tx Multiple Collision Packet Counter */
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u32 tx_multiple_collisions; /* 0x6100 */
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/* Tx Late Collision Packet Counter */
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u32 tx_late_collisions; /* 0x6104 */
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/* Tx Excessive Collision Packet Counter */
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u32 tx_excessive_collisions; /* 0x6108 */
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/* Tx Total Collision Packet Counter */
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u32 tx_total_collisions; /* 0x610C */
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/* Tx Pause Frame Honored Counter */
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u32 tx_pause_honored_frames; /* 0x6110 */
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/* Tx Drop Frame Counter */
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u32 tx_drops; /* 0x6114 */
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/* Tx Jabber Frame Counter */
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u32 tx_jabbers; /* 0x6118 */
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/* Tx FCS Error Counter */
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u32 tx_fcs_errs; /* 0x611C */
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/* Tx Control Frame Counter */
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u32 tx_control_frames; /* 0x6120 */
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/* Tx Oversize Frame Counter */
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u32 tx_oversize_frames; /* 0x6124 */
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/* Tx Undersize Frame Counter */
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u32 tx_undersize_frames; /* 0x6128 */
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/* Tx Fragments Frame Counter */
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u32 tx_fragments; /* 0x612C */
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/* Carry Register One Register */
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u32 carry_reg1; /* 0x6130 */
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/* Carry Register Two Register */
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u32 carry_reg2; /* 0x6134 */
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/* Carry Register One Mask Register */
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u32 carry_reg1_mask; /* 0x6138 */
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/* Carry Register Two Mask Register */
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u32 carry_reg2_mask; /* 0x613C */
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};
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