gpio: new driver to work with a 8x12 siox
This driver controls a SIOX device that provides 20 I/O lines. The first twelve are fixed inputs, the remaining eight are outputs. Acked-by: Gavin Schenk <g.schenk@eckelmann.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Uwe Kleine-König
Linus Walleij
parent
9aa64f0be3
commit
be8c8facc7
@ -13289,6 +13289,7 @@ M: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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R: Pengutronix Kernel Team <kernel@pengutronix.de>
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S: Supported
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F: drivers/siox/*
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F: drivers/gpio/gpio-siox.c
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F: include/trace/events/siox.h
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SIS 190 ETHERNET DRIVER
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@ -429,6 +429,14 @@ config GPIO_REG
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A 32-bit single register GPIO fixed in/out implementation. This
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can be used to represent any register as a set of GPIO signals.
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config GPIO_SIOX
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tristate "SIOX GPIO support"
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depends on SIOX
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select GPIOLIB_IRQCHIP
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help
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Say yes here to support SIOX I/O devices. These are units connected
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via a SIOX bus and have a number of fixed-direction I/O lines.
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config GPIO_SPEAR_SPICS
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bool "ST SPEAr13xx SPI Chip Select as GPIO support"
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depends on PLAT_SPEAR
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@ -124,6 +124,7 @@ obj-$(CONFIG_GPIO_TEGRA186) += gpio-tegra186.o
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obj-$(CONFIG_GPIO_THUNDERX) += gpio-thunderx.o
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obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o
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obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o
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obj-$(CONFIG_GPIO_SIOX) += gpio-siox.o
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obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o
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obj-$(CONFIG_GPIO_TPS65086) += gpio-tps65086.o
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obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o
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293
drivers/gpio/gpio-siox.c
Normal file
293
drivers/gpio/gpio-siox.c
Normal file
@ -0,0 +1,293 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2015-2018 Pengutronix, Uwe Kleine-König <kernel@pengutronix.de>
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*/
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#include <linux/module.h>
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#include <linux/siox.h>
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#include <linux/gpio/driver.h>
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#include <linux/of.h>
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struct gpio_siox_ddata {
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struct gpio_chip gchip;
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struct irq_chip ichip;
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struct mutex lock;
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u8 setdata[1];
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u8 getdata[3];
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spinlock_t irqlock;
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u32 irq_enable;
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u32 irq_status;
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u32 irq_type[20];
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};
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/*
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* Note that this callback only sets the value that is clocked out in the next
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* cycle.
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*/
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static int gpio_siox_set_data(struct siox_device *sdevice, u8 status, u8 buf[])
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{
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struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev);
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mutex_lock(&ddata->lock);
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buf[0] = ddata->setdata[0];
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mutex_unlock(&ddata->lock);
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return 0;
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}
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static int gpio_siox_get_data(struct siox_device *sdevice, const u8 buf[])
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{
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struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev);
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size_t offset;
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u32 trigger;
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mutex_lock(&ddata->lock);
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spin_lock_irq(&ddata->irqlock);
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for (offset = 0; offset < 12; ++offset) {
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unsigned int bitpos = 11 - offset;
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unsigned int gpiolevel = buf[bitpos / 8] & (1 << bitpos % 8);
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unsigned int prev_level =
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ddata->getdata[bitpos / 8] & (1 << (bitpos % 8));
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u32 irq_type = ddata->irq_type[offset];
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if (gpiolevel) {
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if ((irq_type & IRQ_TYPE_LEVEL_HIGH) ||
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((irq_type & IRQ_TYPE_EDGE_RISING) && !prev_level))
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ddata->irq_status |= 1 << offset;
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} else {
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if ((irq_type & IRQ_TYPE_LEVEL_LOW) ||
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((irq_type & IRQ_TYPE_EDGE_FALLING) && prev_level))
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ddata->irq_status |= 1 << offset;
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}
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}
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trigger = ddata->irq_status & ddata->irq_enable;
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spin_unlock_irq(&ddata->irqlock);
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ddata->getdata[0] = buf[0];
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ddata->getdata[1] = buf[1];
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ddata->getdata[2] = buf[2];
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mutex_unlock(&ddata->lock);
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for (offset = 0; offset < 12; ++offset) {
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if (trigger & (1 << offset)) {
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struct irq_domain *irqdomain = ddata->gchip.irq.domain;
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unsigned int irq = irq_find_mapping(irqdomain, offset);
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/*
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* Conceptually handle_nested_irq should call the flow
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* handler of the irq chip. But it doesn't, so we have
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* to clean the irq_status here.
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*/
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spin_lock_irq(&ddata->irqlock);
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ddata->irq_status &= ~(1 << offset);
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spin_unlock_irq(&ddata->irqlock);
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handle_nested_irq(irq);
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}
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}
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return 0;
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}
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static void gpio_siox_irq_ack(struct irq_data *d)
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{
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struct irq_chip *ic = irq_data_get_irq_chip(d);
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struct gpio_siox_ddata *ddata =
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container_of(ic, struct gpio_siox_ddata, ichip);
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spin_lock_irq(&ddata->irqlock);
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ddata->irq_status &= ~(1 << d->hwirq);
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spin_unlock_irq(&ddata->irqlock);
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}
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static void gpio_siox_irq_mask(struct irq_data *d)
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{
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struct irq_chip *ic = irq_data_get_irq_chip(d);
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struct gpio_siox_ddata *ddata =
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container_of(ic, struct gpio_siox_ddata, ichip);
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spin_lock_irq(&ddata->irqlock);
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ddata->irq_enable &= ~(1 << d->hwirq);
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spin_unlock_irq(&ddata->irqlock);
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}
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static void gpio_siox_irq_unmask(struct irq_data *d)
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{
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struct irq_chip *ic = irq_data_get_irq_chip(d);
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struct gpio_siox_ddata *ddata =
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container_of(ic, struct gpio_siox_ddata, ichip);
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spin_lock_irq(&ddata->irqlock);
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ddata->irq_enable |= 1 << d->hwirq;
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spin_unlock_irq(&ddata->irqlock);
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}
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static int gpio_siox_irq_set_type(struct irq_data *d, u32 type)
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{
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struct irq_chip *ic = irq_data_get_irq_chip(d);
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struct gpio_siox_ddata *ddata =
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container_of(ic, struct gpio_siox_ddata, ichip);
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spin_lock_irq(&ddata->irqlock);
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ddata->irq_type[d->hwirq] = type;
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spin_unlock_irq(&ddata->irqlock);
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return 0;
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}
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static int gpio_siox_get(struct gpio_chip *chip, unsigned int offset)
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{
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struct gpio_siox_ddata *ddata =
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container_of(chip, struct gpio_siox_ddata, gchip);
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int ret;
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mutex_lock(&ddata->lock);
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if (offset >= 12) {
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unsigned int bitpos = 19 - offset;
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ret = ddata->setdata[0] & (1 << bitpos);
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} else {
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unsigned int bitpos = 11 - offset;
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ret = ddata->getdata[bitpos / 8] & (1 << (bitpos % 8));
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}
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mutex_unlock(&ddata->lock);
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return ret;
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}
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static void gpio_siox_set(struct gpio_chip *chip,
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unsigned int offset, int value)
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{
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struct gpio_siox_ddata *ddata =
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container_of(chip, struct gpio_siox_ddata, gchip);
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u8 mask = 1 << (19 - offset);
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mutex_lock(&ddata->lock);
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if (value)
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ddata->setdata[0] |= mask;
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else
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ddata->setdata[0] &= ~mask;
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mutex_unlock(&ddata->lock);
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}
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static int gpio_siox_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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if (offset >= 12)
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return -EINVAL;
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return 0;
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}
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static int gpio_siox_direction_output(struct gpio_chip *chip,
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unsigned int offset, int value)
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{
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if (offset < 12)
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return -EINVAL;
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gpio_siox_set(chip, offset, value);
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return 0;
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}
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static int gpio_siox_get_direction(struct gpio_chip *chip, unsigned int offset)
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{
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if (offset < 12)
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return 1; /* input */
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else
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return 0; /* output */
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}
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static int gpio_siox_probe(struct siox_device *sdevice)
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{
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struct gpio_siox_ddata *ddata;
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int ret;
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ddata = devm_kzalloc(&sdevice->dev, sizeof(*ddata), GFP_KERNEL);
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if (!ddata)
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return -ENOMEM;
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dev_set_drvdata(&sdevice->dev, ddata);
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mutex_init(&ddata->lock);
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spin_lock_init(&ddata->irqlock);
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ddata->gchip.base = -1;
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ddata->gchip.can_sleep = 1;
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ddata->gchip.parent = &sdevice->dev;
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ddata->gchip.owner = THIS_MODULE;
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ddata->gchip.get = gpio_siox_get;
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ddata->gchip.set = gpio_siox_set;
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ddata->gchip.direction_input = gpio_siox_direction_input;
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ddata->gchip.direction_output = gpio_siox_direction_output;
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ddata->gchip.get_direction = gpio_siox_get_direction;
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ddata->gchip.ngpio = 20;
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ddata->ichip.name = "siox-gpio";
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ddata->ichip.irq_ack = gpio_siox_irq_ack;
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ddata->ichip.irq_mask = gpio_siox_irq_mask;
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ddata->ichip.irq_unmask = gpio_siox_irq_unmask;
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ddata->ichip.irq_set_type = gpio_siox_irq_set_type;
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ret = gpiochip_add(&ddata->gchip);
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if (ret) {
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dev_err(&sdevice->dev,
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"Failed to register gpio chip (%d)\n", ret);
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goto err_gpiochip;
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}
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ret = gpiochip_irqchip_add(&ddata->gchip, &ddata->ichip,
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0, handle_level_irq, IRQ_TYPE_EDGE_RISING);
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if (ret) {
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dev_err(&sdevice->dev,
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"Failed to register irq chip (%d)\n", ret);
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err_gpiochip:
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gpiochip_remove(&ddata->gchip);
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}
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return ret;
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}
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static int gpio_siox_remove(struct siox_device *sdevice)
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{
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struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev);
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gpiochip_remove(&ddata->gchip);
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return 0;
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}
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static struct siox_driver gpio_siox_driver = {
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.probe = gpio_siox_probe,
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.remove = gpio_siox_remove,
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.set_data = gpio_siox_set_data,
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.get_data = gpio_siox_get_data,
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.driver = {
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.name = "gpio-siox",
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},
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};
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static int __init gpio_siox_init(void)
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{
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return siox_driver_register(&gpio_siox_driver);
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}
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module_init(gpio_siox_init);
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static void __exit gpio_siox_exit(void)
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{
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siox_driver_unregister(&gpio_siox_driver);
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}
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module_exit(gpio_siox_exit);
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MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
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MODULE_DESCRIPTION("SIOX gpio driver");
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MODULE_LICENSE("GPL v2");
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