forked from Minki/linux
ASoC: imx-ssi: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Andra Danciu <andradanciu1997@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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/*
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* imx-ssi.c -- ALSA Soc Audio Layer
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*
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* Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* This code is based on code copyrighted by Freescale,
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* Liam Girdwood, Javier Martin and probably others.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*
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* The i.MX SSI core has some nasty limitations in AC97 mode. While most
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* sane processor vendors have a FIFO per AC97 slot, the i.MX has only
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* one FIFO which combines all valid receive slots. We cannot even select
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* which slots we want to receive. The WM9712 with which this driver
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* was developed with always sends GPIO status data in slot 12 which
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* we receive in our (PCM-) data stream. The only chance we have is to
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* manually skip this data in the FIQ handler. With sampling rates different
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* from 48000Hz not every frame has valid receive data, so the ratio
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* between pcm data and GPIO status data changes. Our FIQ handler is not
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* able to handle this, hence this driver only works with 48000Hz sampling
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* rate.
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* Reading and writing AC97 registers is another challenge. The core
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* provides us status bits when the read register is updated with *another*
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* value. When we read the same register two times (and the register still
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* contains the same value) these status bits are not set. We work
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* around this by not polling these bits but only wait a fixed delay.
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*
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*/
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// SPDX-License-Identifier: GPL-2.0+
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//
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// imx-ssi.c -- ALSA Soc Audio Layer
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//
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// Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
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//
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// This code is based on code copyrighted by Freescale,
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// Liam Girdwood, Javier Martin and probably others.
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//
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// The i.MX SSI core has some nasty limitations in AC97 mode. While most
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// sane processor vendors have a FIFO per AC97 slot, the i.MX has only
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// one FIFO which combines all valid receive slots. We cannot even select
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// which slots we want to receive. The WM9712 with which this driver
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// was developed with always sends GPIO status data in slot 12 which
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// we receive in our (PCM-) data stream. The only chance we have is to
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// manually skip this data in the FIQ handler. With sampling rates different
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// from 48000Hz not every frame has valid receive data, so the ratio
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// between pcm data and GPIO status data changes. Our FIQ handler is not
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// able to handle this, hence this driver only works with 48000Hz sampling
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// rate.
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// Reading and writing AC97 registers is another challenge. The core
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// provides us status bits when the read register is updated with *another*
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// value. When we read the same register two times (and the register still
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// contains the same value) these status bits are not set. We work
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// around this by not polling these bits but only wait a fixed delay.
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#include <linux/clk.h>
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#include <linux/delay.h>
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@ -1,8 +1,4 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _IMX_SSI_H
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#define _IMX_SSI_H
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