forked from Minki/linux
Blackfin: don't attempt to flush on-chip L1 SRAM regions
Since the on-chip L1 regions are not cacheable, there is no point in trying to flush/invalidate them. Plus, older Blackfin parts like to trigger an exception (like BF533-0.3). Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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@ -39,8 +39,13 @@ extern void blackfin_invalidate_entire_icache(void);
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static inline void flush_icache_range(unsigned start, unsigned end)
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{
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#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
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blackfin_dcache_flush_range(start, end);
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#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK)
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if (end <= physical_mem_end)
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blackfin_dcache_flush_range(start, end);
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#endif
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#if defined(CONFIG_BFIN_L2_WRITEBACK)
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if (start >= L2_START && end <= L2_START + L2_LENGTH)
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blackfin_dcache_flush_range(start, end);
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#endif
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/* Make sure all write buffers in the data side of the core
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@ -52,9 +57,17 @@ static inline void flush_icache_range(unsigned start, unsigned end)
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* the pipeline.
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*/
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SSYNC();
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#if defined(CONFIG_BFIN_ICACHE)
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blackfin_icache_flush_range(start, end);
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flush_icache_range_others(start, end);
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#if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE)
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if (end <= physical_mem_end) {
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blackfin_icache_flush_range(start, end);
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flush_icache_range_others(start, end);
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}
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#endif
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#if defined(CONFIG_BFIN_L2_ICACHEABLE)
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if (start >= L2_START && end <= L2_START + L2_LENGTH) {
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blackfin_icache_flush_range(start, end);
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flush_icache_range_others(start, end);
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}
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#endif
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}
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