arm64: dts: imx8qxp-mek: Sort labels alphabetically
Sort the labels alphabetically for consistency. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -30,31 +30,10 @@
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};
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};
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&adma_lpuart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpuart0>;
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&adma_dsp {
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status = "okay";
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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};
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&adma_i2c1 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -131,6 +110,35 @@
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};
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};
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&adma_lpuart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpuart0>;
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status = "okay";
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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};
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&scu_key {
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status = "okay";
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};
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&usdhc1 {
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assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
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assigned-clock-rates = <200000000>;
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@ -229,11 +237,3 @@
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>;
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};
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};
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&adma_dsp {
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status = "okay";
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};
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&scu_key {
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status = "okay";
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};
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