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mt76x0: phy: do not run calibration during channel switch

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Do not perform phy/vga calibration during channel switch.
Moreover remove mt76x0_agc_save and mt76x0_agc_restore routines
since they are no longer necessary. Furthermore run mt76_set_channel
in order to check if there are pending frames during channel switch

Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Lorenzo Bianconi 2018-10-12 12:16:28 +02:00 committed by Felix Fietkau
parent 4636a2544c
commit bbd10586f0
4 changed files with 23 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
drivers/net/wireless/mediatek/mt76/mt76x0/main.c
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@ -16,6 +16,20 @@
#include <linux/etherdevice.h> #include <linux/etherdevice.h>
#include "mt76x0.h" #include "mt76x0.h"
static int
mt76x0_set_channel(struct mt76x02_dev *dev, struct cfg80211_chan_def *chandef)
{
int ret;
cancel_delayed_work_sync(&dev->cal_work);
mt76_set_channel(&dev->mt76);
ret = mt76x0_phy_set_channel(dev, chandef);
mt76_txq_schedule_all(&dev->mt76);
return ret;
}
int mt76x0_config(struct ieee80211_hw *hw, u32 changed) int mt76x0_config(struct ieee80211_hw *hw, u32 changed)
{ {
struct mt76x02_dev *dev = hw->priv; struct mt76x02_dev *dev = hw->priv;
@ -25,7 +39,7 @@ int mt76x0_config(struct ieee80211_hw *hw, u32 changed)
if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
ieee80211_stop_queues(hw); ieee80211_stop_queues(hw);
ret = mt76x0_phy_set_channel(dev, &hw->conf.chandef); ret = mt76x0_set_channel(dev, &hw->conf.chandef);
ieee80211_wake_queues(hw); ieee80211_wake_queues(hw);
} }
@ -114,8 +128,6 @@ void mt76x0_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
{ {
struct mt76x02_dev *dev = hw->priv; struct mt76x02_dev *dev = hw->priv;
cancel_delayed_work_sync(&dev->cal_work);
mt76x0_agc_save(dev);
set_bit(MT76_SCANNING, &dev->mt76.state); set_bit(MT76_SCANNING, &dev->mt76.state);
} }
EXPORT_SYMBOL_GPL(mt76x0_sw_scan); EXPORT_SYMBOL_GPL(mt76x0_sw_scan);
@ -125,11 +137,7 @@ void mt76x0_sw_scan_complete(struct ieee80211_hw *hw,
{ {
struct mt76x02_dev *dev = hw->priv; struct mt76x02_dev *dev = hw->priv;
mt76x0_agc_restore(dev);
clear_bit(MT76_SCANNING, &dev->mt76.state); clear_bit(MT76_SCANNING, &dev->mt76.state);
ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work,
MT_CALIBRATE_INTERVAL);
} }
EXPORT_SYMBOL_GPL(mt76x0_sw_scan_complete); EXPORT_SYMBOL_GPL(mt76x0_sw_scan_complete);

2
drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0.h
View File

@ -66,8 +66,6 @@ int mt76x0_set_rts_threshold(struct ieee80211_hw *hw, u32 value);
/* PHY */ /* PHY */
void mt76x0_phy_init(struct mt76x02_dev *dev); void mt76x0_phy_init(struct mt76x02_dev *dev);
int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev); int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev);
void mt76x0_agc_save(struct mt76x02_dev *dev);
void mt76x0_agc_restore(struct mt76x02_dev *dev);
int mt76x0_phy_set_channel(struct mt76x02_dev *dev, int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
struct cfg80211_chan_def *chandef); struct cfg80211_chan_def *chandef);
void mt76x0_phy_recalibrate_after_assoc(struct mt76x02_dev *dev); void mt76x0_phy_recalibrate_after_assoc(struct mt76x02_dev *dev);

23
drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
View File

@ -723,17 +723,21 @@ int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
if (mt76_is_usb(dev)) { if (mt76_is_usb(dev)) {
mt76x0_vco_cal(dev, channel); mt76x0_vco_cal(dev, channel);
if (scan)
mt76x02_mcu_calibrate(dev, MCU_CAL_RXDCOC, 1,
false);
} else { } else {
/* enable vco */ /* enable vco */
rf_set(dev, MT_RF(0, 4), BIT(7)); rf_set(dev, MT_RF(0, 4), BIT(7));
mt76x0_phy_calibrate(dev, false);
} }
if (scan)
return 0;
if (mt76_is_mmio(dev))
mt76x0_phy_calibrate(dev, false);
mt76x0_phy_set_txpower(dev); mt76x0_phy_set_txpower(dev);
ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work,
MT_CALIBRATE_INTERVAL);
return 0; return 0;
} }
@ -770,17 +774,6 @@ void mt76x0_phy_recalibrate_after_assoc(struct mt76x02_dev *dev)
mt76x02_mcu_calibrate(dev, MCU_CAL_RXDCOC, 1, false); mt76x02_mcu_calibrate(dev, MCU_CAL_RXDCOC, 1, false);
} }
void mt76x0_agc_save(struct mt76x02_dev *dev)
{
/* Only one RX path */
dev->agc_save = FIELD_GET(MT_BBP_AGC_GAIN, mt76_rr(dev, MT_BBP(AGC, 8)));
}
void mt76x0_agc_restore(struct mt76x02_dev *dev)
{
mt76_rmw_field(dev, MT_BBP(AGC, 8), MT_BBP_AGC_GAIN, dev->agc_save);
}
static void mt76x0_temp_sensor(struct mt76x02_dev *dev) static void mt76x0_temp_sensor(struct mt76x02_dev *dev)
{ {
u8 rf_b7_73, rf_b0_66, rf_b0_67; u8 rf_b7_73, rf_b0_66, rf_b0_67;

2
drivers/net/wireless/mediatek/mt76/mt76x02.h
View File

@ -102,8 +102,6 @@ struct mt76x02_dev {
bool no_2ghz; bool no_2ghz;
u8 agc_save;
u8 coverage_class; u8 coverage_class;
u8 slottime; u8 slottime;