diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX index 5405f7aecefc..8dfc6708a257 100644 --- a/Documentation/00-INDEX +++ b/Documentation/00-INDEX @@ -130,8 +130,6 @@ edac.txt - information on EDAC - Error Detection And Correction eisa.txt - info on EISA bus support. -exception.txt - - how Linux v2.2 handles exceptions without verify_area etc. fault-injection/ - dir with docs about the fault injection capabilities infrastructure. fb/ @@ -234,6 +232,8 @@ memory.txt - info on typical Linux memory problems. mips/ - directory with info about Linux on MIPS architecture. +mmc/ + - directory with info about the MMC subsystem mono.txt - how to execute Mono-based .NET binaries with the help of BINFMT_MISC. mutex-design.txt diff --git a/Documentation/ABI/testing/debugfs-ec b/Documentation/ABI/testing/debugfs-ec new file mode 100644 index 000000000000..6546115a94da --- /dev/null +++ b/Documentation/ABI/testing/debugfs-ec @@ -0,0 +1,20 @@ +What: /sys/kernel/debug/ec/*/{gpe,use_global_lock,io} +Date: July 2010 +Contact: Thomas Renninger +Description: + +General information like which GPE is assigned to the EC and whether +the global lock should get used. +Knowing the EC GPE one can watch the amount of HW events related to +the EC here (XY -> GPE number from /sys/kernel/debug/ec/*/gpe): +/sys/firmware/acpi/interrupts/gpeXY + +The io file is binary and a userspace tool located here: +ftp://ftp.suse.com/pub/people/trenn/sources/ec/ +should get used to read out the 256 Embedded Controller registers +or writing to them. + +CAUTION: Do not write to the Embedded Controller if you don't know +what you are doing! Rebooting afterwards also is a good idea. +This can influence the way your machine is cooled and fans may +not get switched on again after you did a wrong write. diff --git a/Documentation/ABI/testing/debugfs-kmemtrace b/Documentation/ABI/testing/debugfs-kmemtrace deleted file mode 100644 index 5e6a92a02d85..000000000000 --- a/Documentation/ABI/testing/debugfs-kmemtrace +++ /dev/null @@ -1,71 +0,0 @@ -What: /sys/kernel/debug/kmemtrace/ -Date: July 2008 -Contact: Eduard - Gabriel Munteanu -Description: - -In kmemtrace-enabled kernels, the following files are created: - -/sys/kernel/debug/kmemtrace/ - cpu (0400) Per-CPU tracing data, see below. (binary) - total_overruns (0400) Total number of bytes which were dropped from - cpu files because of full buffer condition, - non-binary. (text) - abi_version (0400) Kernel's kmemtrace ABI version. (text) - -Each per-CPU file should be read according to the relay interface. That is, -the reader should set affinity to that specific CPU and, as currently done by -the userspace application (though there are other methods), use poll() with -an infinite timeout before every read(). Otherwise, erroneous data may be -read. The binary data has the following _core_ format: - - Event ID (1 byte) Unsigned integer, one of: - 0 - represents an allocation (KMEMTRACE_EVENT_ALLOC) - 1 - represents a freeing of previously allocated memory - (KMEMTRACE_EVENT_FREE) - Type ID (1 byte) Unsigned integer, one of: - 0 - this is a kmalloc() / kfree() - 1 - this is a kmem_cache_alloc() / kmem_cache_free() - 2 - this is a __get_free_pages() et al. - Event size (2 bytes) Unsigned integer representing the - size of this event. Used to extend - kmemtrace. Discard the bytes you - don't know about. - Sequence number (4 bytes) Signed integer used to reorder data - logged on SMP machines. Wraparound - must be taken into account, although - it is unlikely. - Caller address (8 bytes) Return address to the caller. - Pointer to mem (8 bytes) Pointer to target memory area. Can be - NULL, but not all such calls might be - recorded. - -In case of KMEMTRACE_EVENT_ALLOC events, the next fields follow: - - Requested bytes (8 bytes) Total number of requested bytes, - unsigned, must not be zero. - Allocated bytes (8 bytes) Total number of actually allocated - bytes, unsigned, must not be lower - than requested bytes. - Requested flags (4 bytes) GFP flags supplied by the caller. - Target CPU (4 bytes) Signed integer, valid for event id 1. - If equal to -1, target CPU is the same - as origin CPU, but the reverse might - not be true. - -The data is made available in the same endianness the machine has. - -Other event ids and type ids may be defined and added. Other fields may be -added by increasing event size, but see below for details. -Every modification to the ABI, including new id definitions, are followed -by bumping the ABI version by one. - -Adding new data to the packet (features) is done at the end of the mandatory -data: - Feature size (2 byte) - Feature ID (1 byte) - Feature data (Feature size - 3 bytes) - - -Users: - kmemtrace-user - git://repo.or.cz/kmemtrace-user.git - diff --git a/Documentation/ABI/testing/sysfs-bus-i2c-devices-hm6352 b/Documentation/ABI/testing/sysfs-bus-i2c-devices-hm6352 new file mode 100644 index 000000000000..feb2e4a87075 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-i2c-devices-hm6352 @@ -0,0 +1,21 @@ +Where: /sys/bus/i2c/devices/.../heading0_input +Date: April 2010 +Kernel Version: 2.6.36? +Contact: alan.cox@intel.com +Description: Reports the current heading from the compass as a floating + point value in degrees. + +Where: /sys/bus/i2c/devices/.../power_state +Date: April 2010 +Kernel Version: 2.6.36? +Contact: alan.cox@intel.com +Description: Sets the power state of the device. 0 sets the device into + sleep mode, 1 wakes it up. + +Where: /sys/bus/i2c/devices/.../calibration +Date: April 2010 +Kernel Version: 2.6.36? +Contact: alan.cox@intel.com +Description: Sets the calibration on or off (1 = on, 0 = off). See the + chip data sheet. + diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index 25be3250f7d6..f979d825d112 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -139,3 +139,30 @@ Contact: linux-pci@vger.kernel.org Description: This symbolic link points to the PCI hotplug controller driver module that manages the hotplug slot. + +What: /sys/bus/pci/devices/.../label +Date: July 2010 +Contact: Narendra K , linux-bugs@dell.com +Description: + Reading this attribute will provide the firmware + given name(SMBIOS type 41 string) of the PCI device. + The attribute will be created only if the firmware + has given a name to the PCI device. +Users: + Userspace applications interested in knowing the + firmware assigned name of the PCI device. + +What: /sys/bus/pci/devices/.../index +Date: July 2010 +Contact: Narendra K , linux-bugs@dell.com +Description: + Reading this attribute will provide the firmware + given instance(SMBIOS type 41 device type instance) + of the PCI device. The attribute will be created + only if the firmware has given a device type instance + to the PCI device. +Users: + Userspace applications interested in knowing the + firmware assigned device type instance of the PCI + device that can help in understanding the firmware + intended order of the PCI device. diff --git a/Documentation/ABI/testing/sysfs-devices-memory b/Documentation/ABI/testing/sysfs-devices-memory index aba7d989208c..7405de26ee60 100644 --- a/Documentation/ABI/testing/sysfs-devices-memory +++ b/Documentation/ABI/testing/sysfs-devices-memory @@ -7,7 +7,7 @@ Description: added or removed dynamically to represent hot-add/remove operations. Users: hotplug memory add/remove tools - https://w3.opensource.ibm.com/projects/powerpc-utils/ + http://www.ibm.com/developerworks/wikis/display/LinuxP/powerpc-utils What: /sys/devices/system/memory/memoryX/removable Date: June 2008 @@ -19,7 +19,7 @@ Description: identify removable sections of the memory before attempting potentially expensive hot-remove memory operation Users: hotplug memory remove tools - https://w3.opensource.ibm.com/projects/powerpc-utils/ + http://www.ibm.com/developerworks/wikis/display/LinuxP/powerpc-utils What: /sys/devices/system/memory/memoryX/phys_device Date: September 2008 @@ -58,7 +58,7 @@ Description: by root to offline that section. # echo offline > /sys/devices/system/memory/memory22/state Users: hotplug memory remove tools - https://w3.opensource.ibm.com/projects/powerpc-utils/ + http://www.ibm.com/developerworks/wikis/display/LinuxP/powerpc-utils What: /sys/devices/system/memoryX/nodeY diff --git a/Documentation/ABI/testing/sysfs-devices-platform-_UDC_-gadget b/Documentation/ABI/testing/sysfs-devices-platform-_UDC_-gadget index 34034027b13c..d548eaac230a 100644 --- a/Documentation/ABI/testing/sysfs-devices-platform-_UDC_-gadget +++ b/Documentation/ABI/testing/sysfs-devices-platform-_UDC_-gadget @@ -7,3 +7,15 @@ Description: 0 -> resumed (_UDC_ is the name of the USB Device Controller driver) + +What: /sys/devices/platform/_UDC_/gadget/gadget-lunX/nofua +Date: July 2010 +Contact: Andy Shevchenko +Description: + Show or set the reaction on the FUA (Force Unit Access) bit in + the SCSI WRITE(10,12) commands when a gadget in USB Mass + Storage mode. + + Possible values are: + 1 -> ignore the FUA flag + 0 -> obey the FUA flag diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 84a710f87c64..7564e88bfa43 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -197,7 +197,7 @@ Description: These files exist in every cpu's cache index directories. Currently, only AMD Family 10h Processors support cache index disable, and only for their L3 caches. See the BIOS and Kernel Developer's Guide at - http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf + http://support.amd.com/us/Embedded_TechDocs/31116-Public-GH-BKDG_3-28_5-28-09.pdf for formatting information and other details on the cache index disable. Users: joachim.deguara@amd.com diff --git a/Documentation/ABI/testing/sysfs-driver-hid-roccat-kone b/Documentation/ABI/testing/sysfs-driver-hid-roccat-kone index 88340a23ce91..063bda7fe707 100644 --- a/Documentation/ABI/testing/sysfs-driver-hid-roccat-kone +++ b/Documentation/ABI/testing/sysfs-driver-hid-roccat-kone @@ -33,19 +33,6 @@ Description: When read, this file returns the raw integer version number of the left. E.g. a returned value of 138 means 1.38 This file is readonly. -What: /sys/bus/usb/devices/-:./kone_driver_version -Date: March 2010 -Contact: Stefan Achatz -Description: When read, this file returns the driver version. - The format of the string is "v..". - This attribute is used by the userland tools to find the sysfs- - paths of installed kone-mice and determine the capabilites of - the driver. Versions of this driver for old kernels replace - usbhid instead of generic-usb. The way to scan for this file - has been chosen to provide a consistent way for all supported - kernel versions. - This file is readonly. - What: /sys/bus/usb/devices/-:./profile[1-5] Date: March 2010 Contact: Stefan Achatz diff --git a/Documentation/ABI/testing/sysfs-i2c-bmp085 b/Documentation/ABI/testing/sysfs-i2c-bmp085 new file mode 100644 index 000000000000..585962ad0465 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-i2c-bmp085 @@ -0,0 +1,31 @@ +What: /sys/bus/i2c/devices/-/pressure0_input +Date: June 2010 +Contact: Christoph Mair +Description: Start a pressure measurement and read the result. Values + represent the ambient air pressure in pascal (0.01 millibar). + + Reading: returns the current air pressure. + + +What: /sys/bus/i2c/devices/-/temp0_input +Date: June 2010 +Contact: Christoph Mair +Description: Measure the ambient temperature. The returned value represents + the ambient temperature in units of 0.1 degree celsius. + + Reading: returns the current temperature. + + +What: /sys/bus/i2c/devices/-/oversampling +Date: June 2010 +Contact: Christoph Mair +Description: Tell the bmp085 to use more samples to calculate a pressure + value. When writing to this file the chip will use 2^x samples + to calculate the next pressure value with x being the value + written. Using this feature will decrease RMS noise and + increase the measurement time. + + Reading: returns the current oversampling setting. + + Writing: sets a new oversampling setting. + Accepted values: 0..3. diff --git a/Documentation/ABI/testing/sysfs-power b/Documentation/ABI/testing/sysfs-power index d6a801f45b48..2875f1f74a07 100644 --- a/Documentation/ABI/testing/sysfs-power +++ b/Documentation/ABI/testing/sysfs-power @@ -114,3 +114,18 @@ Description: if this file contains "1", which is the default. It may be disabled by writing "0" to this file, in which case all devices will be suspended and resumed synchronously. + +What: /sys/power/wakeup_count +Date: July 2010 +Contact: Rafael J. Wysocki +Description: + The /sys/power/wakeup_count file allows user space to put the + system into a sleep state while taking into account the + concurrent arrival of wakeup events. Reading from it returns + the current number of registered wakeup events and it blocks if + some wakeup events are being processed at the time the file is + read from. Writing to it will only succeed if the current + number of wakeup events is equal to the written value and, if + successful, will make the kernel abort a subsequent transition + to a sleep state if any wakeup events are reported after the + write has returned. diff --git a/Documentation/Changes b/Documentation/Changes index eca9f6e6fbe6..4fb88f15f2ef 100644 --- a/Documentation/Changes +++ b/Documentation/Changes @@ -331,7 +331,7 @@ o Mkinitrd -------- -o +o E2fsprogs --------- @@ -343,11 +343,11 @@ o Reiserfsprogs ------------- -o +o Xfsprogs -------- -o +o Pcmciautils ----------- @@ -387,18 +387,18 @@ o mcelog ------ -o +o Networking ********** PPP --- -o +o Isdn4k-utils ------------ -o +o NFS-utils --------- diff --git a/Documentation/DMA-API-HOWTO.txt b/Documentation/DMA-API-HOWTO.txt index 98ce51796f71..d568bc235bc0 100644 --- a/Documentation/DMA-API-HOWTO.txt +++ b/Documentation/DMA-API-HOWTO.txt @@ -738,21 +738,31 @@ to "Closing". CONFIG_NEED_SG_DMA_LENGTH if the architecture supports IOMMUs (including software IOMMU). -2) ARCH_KMALLOC_MINALIGN +2) ARCH_DMA_MINALIGN Architectures must ensure that kmalloc'ed buffer is DMA-safe. Drivers and subsystems depend on it. If an architecture isn't fully DMA-coherent (i.e. hardware doesn't ensure that data in the CPU cache is identical to data in main memory), - ARCH_KMALLOC_MINALIGN must be set so that the memory allocator + ARCH_DMA_MINALIGN must be set so that the memory allocator makes sure that kmalloc'ed buffer doesn't share a cache line with the others. See arch/arm/include/asm/cache.h as an example. - Note that ARCH_KMALLOC_MINALIGN is about DMA memory alignment + Note that ARCH_DMA_MINALIGN is about DMA memory alignment constraints. You don't need to worry about the architecture data alignment constraints (e.g. the alignment constraints about 64-bit objects). +3) Supporting multiple types of IOMMUs + + If your architecture needs to support multiple types of IOMMUs, you + can use include/linux/asm-generic/dma-mapping-common.h. It's a + library to support the DMA API with multiple types of IOMMUs. Lots + of architectures (x86, powerpc, sh, alpha, ia64, microblaze and + sparc) use it. Choose one to see how it can be used. If you need to + support multiple types of IOMMUs in a single system, the example of + x86 or powerpc helps. + Closing This document, and the API itself, would not be in its current diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt index 05e2ae236865..fe2326906610 100644 --- a/Documentation/DMA-API.txt +++ b/Documentation/DMA-API.txt @@ -455,12 +455,6 @@ Free memory allocated by the nonconsistent API. All parameters must be identical to those passed in (and returned by dma_alloc_noncoherent()). -int -dma_is_consistent(struct device *dev, dma_addr_t dma_handle) - -Returns true if the device dev is performing consistent DMA on the memory -area pointed to by the dma_handle. - int dma_get_cache_alignment(void) diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile index c7e5dc7e8cb3..34929f24c284 100644 --- a/Documentation/DocBook/Makefile +++ b/Documentation/DocBook/Makefile @@ -35,7 +35,7 @@ PS_METHOD = $(prefer-db2x) PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs cleandocs xmldoclinks BOOKS := $(addprefix $(obj)/,$(DOCBOOKS)) -xmldocs: $(BOOKS) xmldoclinks +xmldocs: $(BOOKS) sgmldocs: xmldocs PS := $(patsubst %.xml, %.ps, $(BOOKS)) @@ -45,7 +45,7 @@ PDF := $(patsubst %.xml, %.pdf, $(BOOKS)) pdfdocs: $(PDF) HTML := $(sort $(patsubst %.xml, %.html, $(BOOKS))) -htmldocs: $(HTML) +htmldocs: $(HTML) xmldoclinks $(call build_main_index) $(call build_images) @@ -95,7 +95,7 @@ define rule_docproc ) > $(dir $@).$(notdir $@).cmd endef -%.xml: %.tmpl FORCE +%.xml: %.tmpl xmldoclinks FORCE $(call if_changed_rule,docproc) ### diff --git a/Documentation/DocBook/device-drivers.tmpl b/Documentation/DocBook/device-drivers.tmpl index 1b2dd4fc3db2..ecd35e9d4410 100644 --- a/Documentation/DocBook/device-drivers.tmpl +++ b/Documentation/DocBook/device-drivers.tmpl @@ -111,6 +111,7 @@ X!Edrivers/base/attribute_container.c +!Iinclude/linux/platform_device.h !Edrivers/base/platform.c !Edrivers/base/bus.c diff --git a/Documentation/DocBook/dvb/dvbapi.xml b/Documentation/DocBook/dvb/dvbapi.xml index 63c528fee624..e3a97fdd62a6 100644 --- a/Documentation/DocBook/dvb/dvbapi.xml +++ b/Documentation/DocBook/dvb/dvbapi.xml @@ -12,10 +12,12 @@ O. C.
rjkm@metzlerbros.de
 + + Mauro -Chehab Carvalho +Chehab
mchehab@redhat.com
 Ported document to Docbook XML. @@ -23,12 +25,23 @@ 2002 2003 - 2009 Convergence GmbH + + 2009-2010 + Mauro Carvalho Chehab + + + 2.0.3 + 2010-07-03 + mcc + + Add some frontend capabilities flags, present on kernel, but missing at the specs. + + 2.0.2 2009-10-25 @@ -63,7 +76,7 @@ Added ISDB-T test originally written by Patrick Boettcher LINUX DVB API -Version 3 +Version 5.2 &sub-intro; diff --git a/Documentation/DocBook/dvb/frontend.h.xml b/Documentation/DocBook/dvb/frontend.h.xml index b99644f5340a..d08e0d401418 100644 --- a/Documentation/DocBook/dvb/frontend.h.xml +++ b/Documentation/DocBook/dvb/frontend.h.xml @@ -63,6 +63,7 @@ typedef enum fe_caps { FE_CAN_8VSB = 0x200000, FE_CAN_16VSB = 0x400000, FE_HAS_EXTENDED_CAPS = 0x800000, /* We need more bitspace for newer APIs, indicate this. */ + FE_CAN_TURBO_FEC = 0x8000000, /* frontend supports "turbo fec modulation" */ FE_CAN_2G_MODULATION = 0x10000000, /* frontend supports "2nd generation modulation" (DVB-S2) */ FE_NEEDS_BENDING = 0x20000000, /* not supported anymore, don't use (frontend requires frequency bending) */ FE_CAN_RECOVER = 0x40000000, /* frontend can recover from a cable unplug automatically */ diff --git a/Documentation/DocBook/dvb/frontend.xml b/Documentation/DocBook/dvb/frontend.xml index 300ba1f04177..78d756de5906 100644 --- a/Documentation/DocBook/dvb/frontend.xml +++ b/Documentation/DocBook/dvb/frontend.xml @@ -64,8 +64,14 @@ a specific frontend type. FE_CAN_BANDWIDTH_AUTO = 0x40000, FE_CAN_GUARD_INTERVAL_AUTO = 0x80000, FE_CAN_HIERARCHY_AUTO = 0x100000, - FE_CAN_MUTE_TS = 0x80000000, - FE_CAN_CLEAN_SETUP = 0x40000000 + FE_CAN_8VSB = 0x200000, + FE_CAN_16VSB = 0x400000, + FE_HAS_EXTENDED_CAPS = 0x800000, + FE_CAN_TURBO_FEC = 0x8000000, + FE_CAN_2G_MODULATION = 0x10000000, + FE_NEEDS_BENDING = 0x20000000, + FE_CAN_RECOVER = 0x40000000, + FE_CAN_MUTE_TS = 0x80000000 } fe_caps_t; diff --git a/Documentation/DocBook/kernel-api.tmpl b/Documentation/DocBook/kernel-api.tmpl index 44b3def961a2..a20c6f6fffc3 100644 --- a/Documentation/DocBook/kernel-api.tmpl +++ b/Documentation/DocBook/kernel-api.tmpl @@ -132,7 +132,6 @@ X!Ilib/string.c FIFO Buffer kfifo interface !Iinclude/linux/kfifo.h -!Ekernel/kfifo.c diff --git a/Documentation/DocBook/kgdb.tmpl b/Documentation/DocBook/kgdb.tmpl index 55f12ac37acd..490d862c5f0d 100644 --- a/Documentation/DocBook/kgdb.tmpl +++ b/Documentation/DocBook/kgdb.tmpl @@ -199,10 +199,33 @@ may be configured as a kernel built-in or a kernel loadable module. You can only make use of kgdbwait and early debugging if you build kgdboc into the kernel as a built-in. + Optionally you can elect to activate kms (Kernel Mode + Setting) integration. When you use kms with kgdboc and you have a + video driver that has atomic mode setting hooks, it is possible to + enter the debugger on the graphics console. When the kernel + execution is resumed, the previous graphics mode will be restored. + This integration can serve as a useful tool to aid in diagnosing + crashes or doing analysis of memory with kdb while allowing the + full graphics console applications to run. + kgdboc arguments - Usage: kgdboc=[kbd][[,]serial_device][,baud] + Usage: kgdboc=[kms][[,]kbd][[,]serial_device][,baud] + The order listed above must be observed if you use any of the + optional configurations together. + + Abbreviations: + + kms = Kernel Mode Setting + kbd = Keyboard + + + You can configure kgdboc to use the keyboard, and or a serial + device depending on if you are using kdb and or kgdb, in one of the + following scenarios. The order listed above must be observed if + you use any of the optional configurations together. Using kms + + only gdb is generally not a useful combination. Using loadable module or built-in @@ -212,7 +235,7 @@ As a kernel loadable module: Use the command: modprobe kgdboc kgdboc=<tty-device>,[baud] - Here are two examples of how you might formate the kgdboc + Here are two examples of how you might format the kgdboc string. The first is for an x86 target using the first serial port. The second example is for the ARM Versatile AB using the second serial port. @@ -240,6 +263,9 @@ More examples + You can configure kgdboc to use the keyboard, and or a serial + device depending on if you are using kdb and or kgdb, in one of the + following scenarios. You can configure kgdboc to use the keyboard, and or a serial device depending on if you are using kdb and or kgdb, in one of the following scenarios. @@ -255,6 +281,12 @@ kdb with a keyboard kgdboc=kbd + kdb with kernel mode setting + kgdboc=kms,kbd + + kdb with kernel mode setting and kgdb over a serial port + kgdboc=kms,kbd,ttyS0,115200 + @@ -637,6 +669,8 @@ Task Addr Pid Parent [*] cpu State Thread Command The logic to perform safe memory reads and writes to memory while using the debugger A full implementation for software breakpoints unless overridden by the arch The API to invoke either the kdb or kgdb frontend to the debug core. + The structures and callback API for atomic kernel mode setting. + NOTE: kgdboc is where the kms callbacks are invoked. @@ -747,6 +781,8 @@ Task Addr Pid Parent [*] cpu State Thread Command kgdboc internals + + kgdboc and uarts The kgdboc driver is actually a very thin driver that relies on the underlying low level to the hardware driver having "polling hooks" @@ -754,11 +790,8 @@ Task Addr Pid Parent [*] cpu State Thread Command implementation of kgdboc it the serial_core was changed to expose a low level UART hook for doing polled mode reading and writing of a single character while in an atomic context. When kgdb makes an I/O - request to the debugger, kgdboc invokes a call back in the serial - core which in turn uses the call back in the UART driver. It is - certainly possible to extend kgdboc to work with non-UART based - consoles in the future. - + request to the debugger, kgdboc invokes a callback in the serial + core which in turn uses the callback in the UART driver. When using kgdboc with a UART, the UART driver must implement two callbacks in the struct uart_ops. Example from drivers/8250.c: #ifdef CONFIG_CONSOLE_POLL @@ -772,9 +805,68 @@ Task Addr Pid Parent [*] cpu State Thread Command that they can be called from an atomic context and have to restore the state of the UART chip on return such that the system can return to normal when the debugger detaches. You need to be very careful - with any kind of lock you consider, because failing here is most + with any kind of lock you consider, because failing here is most likely going to mean pressing the reset button. + + + kgdboc and keyboards + The kgdboc driver contains logic to configure communications + with an attached keyboard. The keyboard infrastructure is only + compiled into the kernel when CONFIG_KDB_KEYBOARD=y is set in the + kernel configuration. + The core polled keyboard driver driver for PS/2 type keyboards + is in drivers/char/kdb_keyboard.c. This driver is hooked into the + debug core when kgdboc populates the callback in the array + called kdb_poll_funcs[]. The + kdb_get_kbd_char() is the top-level function which polls hardware + for single character input. + + + + kgdboc and kms + The kgdboc driver contains logic to request the graphics + display to switch to a text context when you are using + "kgdboc=kms,kbd", provided that you have a video driver which has a + frame buffer console and atomic kernel mode setting support. + + Every time the kernel + debugger is entered it calls kgdboc_pre_exp_handler() which in turn + calls con_debug_enter() in the virtual console layer. On resuming kernel + execution, the kernel debugger calls kgdboc_post_exp_handler() which + in turn calls con_debug_leave(). + Any video driver that wants to be compatible with the kernel + debugger and the atomic kms callbacks must implement the + mode_set_base_atomic, fb_debug_enter and fb_debug_leave operations. + For the fb_debug_enter and fb_debug_leave the option exists to use + the generic drm fb helper functions or implement something custom for + the hardware. The following example shows the initialization of the + .mode_set_base_atomic operation in + drivers/gpu/drm/i915/intel_display.c: + + +static const struct drm_crtc_helper_funcs intel_helper_funcs = { +[...] + .mode_set_base_atomic = intel_pipe_set_base_atomic, +[...] +}; + + + + Here is an example of how the i915 driver initializes the fb_debug_enter and fb_debug_leave functions to use the generic drm helpers in + drivers/gpu/drm/i915/intel_fb.c: + + +static struct fb_ops intelfb_ops = { +[...] + .fb_debug_enter = drm_fb_helper_debug_enter, + .fb_debug_leave = drm_fb_helper_debug_leave, +[...] +}; + + + + diff --git a/Documentation/DocBook/media-entities.tmpl b/Documentation/DocBook/media-entities.tmpl index 5d4d40f429a5..6ae97157b1c7 100644 --- a/Documentation/DocBook/media-entities.tmpl +++ b/Documentation/DocBook/media-entities.tmpl @@ -218,6 +218,7 @@ + diff --git a/Documentation/DocBook/media.tmpl b/Documentation/DocBook/media.tmpl index eea564bb12cb..f11048d4053f 100644 --- a/Documentation/DocBook/media.tmpl +++ b/Documentation/DocBook/media.tmpl @@ -28,7 +28,7 @@ LINUX MEDIA INFRASTRUCTURE API - 2009 + 2009-2010 LinuxTV Developers @@ -61,7 +61,7 @@ Foundation. A copy of the license is included in the chapter entitled in fact it covers several different video standards including DVB-T, DVB-S, DVB-C and ATSC. The API is currently being updated to documment support also for DVB-S2, ISDB-T and ISDB-S. - The third part covers other API's used by all media infrastructure devices + The third part covers Remote Controller API For additional information and for the latest development code, see: http://linuxtv.org. For discussing improvements, reporting troubles, sending new drivers, etc, please mail to: Linux Media Mailing List (LMML).. @@ -86,7 +86,7 @@ Foundation. A copy of the license is included in the chapter entitled - 2009 + 2009-2010 Mauro Carvalho Chehab @@ -101,7 +101,7 @@ Foundation. A copy of the license is included in the chapter entitled -Other API's used by media infrastructure drivers +Remote Controller API &sub-remote_controllers; diff --git a/Documentation/DocBook/scsi.tmpl b/Documentation/DocBook/scsi.tmpl index d87f4569e768..324b53494f08 100644 --- a/Documentation/DocBook/scsi.tmpl +++ b/Documentation/DocBook/scsi.tmpl @@ -393,7 +393,7 @@ For documentation see - http://www.torque.net/sg/sdebug26.html + http://sg.danny.cz/sg/sdebug26.html diff --git a/Documentation/DocBook/stylesheet.xsl b/Documentation/DocBook/stylesheet.xsl index 254c1d5d2e50..85b25275196f 100644 --- a/Documentation/DocBook/stylesheet.xsl +++ b/Documentation/DocBook/stylesheet.xsl @@ -6,4 +6,5 @@ 0 2 +1 diff --git a/Documentation/DocBook/v4l/compat.xml b/Documentation/DocBook/v4l/compat.xml index b42b935913cd..54447f0d0784 100644 --- a/Documentation/DocBook/v4l/compat.xml +++ b/Documentation/DocBook/v4l/compat.xml @@ -1091,8 +1091,9 @@ signed 64-bit integer. Output devices should not send a buffer out until the time in the timestamp field has arrived. I would like to follow SGI's lead, and adopt a multimedia timestamping system like their UST (Unadjusted System Time). See -http://reality.sgi.com/cpirazzi_engr/lg/time/intro.html. [This link is -no longer valid.] UST uses timestamps that are 64-bit signed integers +http://web.archive.org/web/*/http://reality.sgi.com +/cpirazzi_engr/lg/time/intro.html. +UST uses timestamps that are 64-bit signed integers (not struct timeval's) and given in nanosecond units. The UST clock starts at zero when the system is booted and runs continuously and uniformly. It takes a little over 292 years for UST to overflow. There diff --git a/Documentation/DocBook/v4l/fdl-appendix.xml b/Documentation/DocBook/v4l/fdl-appendix.xml index b6ce50dbe492..ae22394ba997 100644 --- a/Documentation/DocBook/v4l/fdl-appendix.xml +++ b/Documentation/DocBook/v4l/fdl-appendix.xml @@ -2,7 +2,7 @@ The GNU Free Documentation License 1.1 in DocBook Markup by Eric Baudais Maintained by the GNOME Documentation Project - http://developer.gnome.org/projects/gdp + http://live.gnome.org/DocumentationProject Version: 1.0.1 Last Modified: Nov 16, 2000 --> diff --git a/Documentation/DocBook/v4l/lirc_device_interface.xml b/Documentation/DocBook/v4l/lirc_device_interface.xml new file mode 100644 index 000000000000..68134c0ab4d1 --- /dev/null +++ b/Documentation/DocBook/v4l/lirc_device_interface.xml @@ -0,0 +1,251 @@ +
+LIRC Device Interface + + +
+Introduction + +The LIRC device interface is a bi-directional interface for +transporting raw IR data between userspace and kernelspace. Fundamentally, +it is just a chardev (/dev/lircX, for X = 0, 1, 2, ...), with a number +of standard struct file_operations defined on it. With respect to +transporting raw IR data to and fro, the essential fops are read, write +and ioctl. + +Example dmesg output upon a driver registering w/LIRC: +
+ $ dmesg |grep lirc_dev + lirc_dev: IR Remote Control driver registered, major 248 + rc rc0: lirc_dev: driver ir-lirc-codec (mceusb) registered at minor = 0 +
+ +What you should see for a chardev: +
+ $ ls -l /dev/lirc* + crw-rw---- 1 root root 248, 0 Jul 2 22:20 /dev/lirc0 +
+
+ +
+LIRC read fop + +The lircd userspace daemon reads raw IR data from the LIRC chardev. The +exact format of the data depends on what modes a driver supports, and what +mode has been selected. lircd obtains supported modes and sets the active mode +via the ioctl interface, detailed at . The generally +preferred mode is LIRC_MODE_MODE2, in which packets containing an int value +describing an IR signal are read from the chardev. + +See also http://www.lirc.org/html/technical.html for more info. +
+ +
+LIRC write fop + +The data written to the chardev is a pulse/space sequence of integer +values. Pulses and spaces are only marked implicitly by their position. The +data must start and end with a pulse, therefore, the data must always include +an unevent number of samples. The write function must block until the data has +been transmitted by the hardware. +
+ +
+LIRC ioctl fop + +The LIRC device's ioctl definition is bound by the ioctl function +definition of struct file_operations, leaving us with an unsigned int +for the ioctl command and an unsigned long for the arg. For the purposes +of ioctl portability across 32-bit and 64-bit, these values are capped +to their 32-bit sizes. + +The following ioctls can be used to change specific hardware settings. +In general each driver should have a default set of settings. The driver +implementation is expected to re-apply the default settings when the device +is closed by user-space, so that every application opening the device can rely +on working with the default settings initially. + + + + LIRC_GET_FEATURES + + Obviously, get the underlying hardware device's features. If a driver + does not announce support of certain features, calling of the corresponding + ioctls is undefined. + + + + LIRC_GET_SEND_MODE + + Get supported transmit mode. Only LIRC_MODE_PULSE is supported by lircd. + + + + LIRC_GET_REC_MODE + + Get supported receive modes. Only LIRC_MODE_MODE2 and LIRC_MODE_LIRCCODE + are supported by lircd. + + + + LIRC_GET_SEND_CARRIER + + Get carrier frequency (in Hz) currently used for transmit. + + + + LIRC_GET_REC_CARRIER + + Get carrier frequency (in Hz) currently used for IR reception. + + + + LIRC_{G,S}ET_{SEND,REC}_DUTY_CYCLE + + Get/set the duty cycle (from 0 to 100) of the carrier signal. Currently, + no special meaning is defined for 0 or 100, but this could be used to switch + off carrier generation in the future, so these values should be reserved. + + + + LIRC_GET_REC_RESOLUTION + + Some receiver have maximum resolution which is defined by internal + sample rate or data format limitations. E.g. it's common that signals can + only be reported in 50 microsecond steps. This integer value is used by + lircd to automatically adjust the aeps tolerance value in the lircd + config file. + + + + LIRC_GET_M{IN,AX}_TIMEOUT + + Some devices have internal timers that can be used to detect when + there's no IR activity for a long time. This can help lircd in detecting + that a IR signal is finished and can speed up the decoding process. + Returns an integer value with the minimum/maximum timeout that can be + set. Some devices have a fixed timeout, in that case both ioctls will + return the same value even though the timeout cannot be changed. + + + + LIRC_GET_M{IN,AX}_FILTER_{PULSE,SPACE} + + Some devices are able to filter out spikes in the incoming signal + using given filter rules. These ioctls return the hardware capabilities + that describe the bounds of the possible filters. Filter settings depend + on the IR protocols that are expected. lircd derives the settings from + all protocols definitions found in its config file. + + + + LIRC_GET_LENGTH + + Retrieves the code length in bits (only for LIRC_MODE_LIRCCODE). + Reads on the device must be done in blocks matching the bit count. + The bit could should be rounded up so that it matches full bytes. + + + + LIRC_SET_{SEND,REC}_MODE + + Set send/receive mode. Largely obsolete for send, as only + LIRC_MODE_PULSE is supported. + + + + LIRC_SET_{SEND,REC}_CARRIER + + Set send/receive carrier (in Hz). + + + + LIRC_SET_TRANSMITTER_MASK + + This enables the given set of transmitters. The first transmitter + is encoded by the least significant bit, etc. When an invalid bit mask + is given, i.e. a bit is set, even though the device does not have so many + transitters, then this ioctl returns the number of available transitters + and does nothing otherwise. + + + + LIRC_SET_REC_TIMEOUT + + Sets the integer value for IR inactivity timeout (cf. + LIRC_GET_MIN_TIMEOUT and LIRC_GET_MAX_TIMEOUT). A value of 0 (if + supported by the hardware) disables all hardware timeouts and data should + be reported as soon as possible. If the exact value cannot be set, then + the next possible value _greater_ than the given value should be set. + + + + LIRC_SET_REC_TIMEOUT_REPORTS + + Enable (1) or disable (0) timeout reports in LIRC_MODE_MODE2. By + default, timeout reports should be turned off. + + + + LIRC_SET_REC_FILTER_{,PULSE,SPACE} + + Pulses/spaces shorter than this are filtered out by hardware. If + filters cannot be set independently for pulse/space, the corresponding + ioctls must return an error and LIRC_SET_REC_FILTER shall be used instead. + + + + LIRC_SET_MEASURE_CARRIER_MODE + + Enable (1)/disable (0) measure mode. If enabled, from the next key + press on, the driver will send LIRC_MODE2_FREQUENCY packets. By default + this should be turned off. + + + + LIRC_SET_REC_{DUTY_CYCLE,CARRIER}_RANGE + + To set a range use LIRC_SET_REC_DUTY_CYCLE_RANGE/LIRC_SET_REC_CARRIER_RANGE + with the lower bound first and later LIRC_SET_REC_DUTY_CYCLE/LIRC_SET_REC_CARRIER + with the upper bound. + + + + LIRC_NOTIFY_DECODE + + This ioctl is called by lircd whenever a successful decoding of an + incoming IR signal could be done. This can be used by supporting hardware + to give visual feedback to the user e.g. by flashing a LED. + + + + LIRC_SETUP_{START,END} + + Setting of several driver parameters can be optimized by encapsulating + the according ioctl calls with LIRC_SETUP_START/LIRC_SETUP_END. When a + driver receives a LIRC_SETUP_START ioctl it can choose to not commit + further setting changes to the hardware until a LIRC_SETUP_END is received. + But this is open to the driver implementation and every driver must also + handle parameter changes which are not encapsulated by LIRC_SETUP_START + and LIRC_SETUP_END. Drivers can also choose to ignore these ioctls. + + + + LIRC_SET_WIDEBAND_RECEIVER + + Some receivers are equipped with special wide band receiver which is intended + to be used to learn output of existing remote. + Calling that ioctl with (1) will enable it, and with (0) disable it. + This might be useful of receivers that have otherwise narrow band receiver + that prevents them to be used with some remotes. + Wide band receiver might also be more precise + On the other hand its disadvantage it usually reduced range of reception. + Note: wide band receiver might be implictly enabled if you enable + carrier reports. In that case it will be disabled as soon as you disable + carrier reports. Trying to disable wide band receiver while carrier + reports are active will do nothing. + + + + +
+
diff --git a/Documentation/DocBook/v4l/pixfmt-packed-rgb.xml b/Documentation/DocBook/v4l/pixfmt-packed-rgb.xml index d2dd697a81d8..26e879231088 100644 --- a/Documentation/DocBook/v4l/pixfmt-packed-rgb.xml +++ b/Documentation/DocBook/v4l/pixfmt-packed-rgb.xml @@ -240,6 +240,45 @@ colorspace V4L2_COLORSPACE_SRGB. r1 r0 + + V4L2_PIX_FMT_BGR666 + 'BGRH' + + b5 + b4 + b3 + b2 + b1 + b0 + g5 + g4 + + g3 + g2 + g1 + g0 + r5 + r4 + r3 + r2 + + r1 + r0 + + + + + + + + + + + + + + + V4L2_PIX_FMT_BGR24 'BGR3' @@ -700,6 +739,45 @@ defined in error. Drivers may interpret them as in b1 b0 + + V4L2_PIX_FMT_BGR666 + 'BGRH' + + b5 + b4 + b3 + b2 + b1 + b0 + g5 + g4 + + g3 + g2 + g1 + g0 + r5 + r4 + r3 + r2 + + r1 + r0 + + + + + + + + + + + + + + + V4L2_PIX_FMT_BGR24 'BGR3' diff --git a/Documentation/DocBook/v4l/remote_controllers.xml b/Documentation/DocBook/v4l/remote_controllers.xml index 73f5eab091f4..3c3b667b28e7 100644 --- a/Documentation/DocBook/v4l/remote_controllers.xml +++ b/Documentation/DocBook/v4l/remote_controllers.xml @@ -173,3 +173,5 @@ keymapping. This program demonstrates how to replace the keymap tables. &sub-keytable-c; + +&sub-lirc_device_interface; diff --git a/Documentation/HOWTO b/Documentation/HOWTO index 40ada93b820a..365bda9a0d94 100644 --- a/Documentation/HOWTO +++ b/Documentation/HOWTO @@ -187,7 +187,7 @@ apply a patch. If you do not know where you want to start, but you want to look for some task to start doing to join into the kernel development community, go to the Linux Kernel Janitor's project: - http://janitor.kernelnewbies.org/ + http://kernelnewbies.org/KernelJanitors It is a great place to start. It describes a list of relatively simple problems that need to be cleaned up and fixed within the Linux kernel source tree. Working with the developers in charge of this project, you @@ -315,7 +315,7 @@ process is tracked with the tool patchwork. Patchwork offers a web interface which shows patch postings, any comments on a patch or revisions to it, and maintainers can mark patches as under review, accepted, or rejected. Most of these patchwork sites are listed at -http://patchwork.kernel.org/ or http://patchwork.ozlabs.org/. +http://patchwork.kernel.org/. 2.6.x -next kernel tree for integration tests --------------------------------------------- @@ -595,7 +595,7 @@ start exactly where you are now. ---------- Thanks to Paolo Ciarrocchi who allowed the "Development Process" -(http://linux.tar.bz/articles/2.6-development_process) section +(http://lwn.net/Articles/94386/) section to be based on text he had written, and to Randy Dunlap and Gerrit Huizenga for some of the list of things you should and should not say. Also thanks to Pat Mochel, Hanna Linder, Randy Dunlap, Kay Sievers, diff --git a/Documentation/PCI/pci.txt b/Documentation/PCI/pci.txt index 7f6de6ea5b47..6148d4080f88 100644 --- a/Documentation/PCI/pci.txt +++ b/Documentation/PCI/pci.txt @@ -581,7 +581,7 @@ to be handled by platform and generic code, not individual drivers. 8. Vendor and device identifications ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -One is not not required to add new device ids to include/linux/pci_ids.h. +One is not required to add new device ids to include/linux/pci_ids.h. Please add PCI_VENDOR_ID_xxx for vendors and a hex constant for device ids. PCI_VENDOR_ID_xxx constants are re-used. The device ids are arbitrary diff --git a/Documentation/RCU/RTFP.txt b/Documentation/RCU/RTFP.txt index 5aea459e3dd6..c43460dade0f 100644 --- a/Documentation/RCU/RTFP.txt +++ b/Documentation/RCU/RTFP.txt @@ -606,7 +606,7 @@ Suparna Bhattacharya" ,Year="2006" ,pages="v2 123-138" ,note="Available: -\url{http://www.linuxsymposium.org/2006/view_abstract.php?content_key=184} +\url{http://www.linuxsymposium.org/2006/index_2006.php} \url{http://www.rdrop.com/users/paulmck/RCU/OLSrtRCU.2006.08.11a.pdf} [Viewed January 1, 2007]" ,annotation=" diff --git a/Documentation/SubmittingDrivers b/Documentation/SubmittingDrivers index 4947fd8fb182..38d2aab59cac 100644 --- a/Documentation/SubmittingDrivers +++ b/Documentation/SubmittingDrivers @@ -161,7 +161,7 @@ How to NOT write kernel driver by Arjan van de Ven: http://www.fenrus.org/how-to-not-write-a-device-driver-paper.pdf Kernel Janitor: - http://janitor.kernelnewbies.org/ + http://kernelnewbies.org/KernelJanitors GIT, Fast Version Control System: http://git-scm.com/ diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches index 72651f788f4e..689e2371095c 100644 --- a/Documentation/SubmittingPatches +++ b/Documentation/SubmittingPatches @@ -98,6 +98,17 @@ system, git, as a "commit log". See #15, below. If your description starts to get long, that's a sign that you probably need to split up your patch. See #3, next. +When you submit or resubmit a patch or patch series, include the +complete patch description and justification for it. Don't just +say that this is version N of the patch (series). Don't expect the +patch merger to refer back to earlier patch versions or referenced +URLs to find the patch description and put that into the patch. +I.e., the patch (series) and its description should be self-contained. +This benefits both the patch merger(s) and reviewers. Some reviewers +probably didn't even receive earlier versions of the patch. + +If the patch fixes a logged bug entry, refer to that bug entry by +number and URL. 3) Separate your changes. diff --git a/Documentation/acpi/method-customizing.txt b/Documentation/acpi/method-customizing.txt index e628cd23ca80..3e1d25aee3fb 100644 --- a/Documentation/acpi/method-customizing.txt +++ b/Documentation/acpi/method-customizing.txt @@ -19,6 +19,8 @@ Note: Only ACPI METHOD can be overridden, any other object types like "Device", "OperationRegion", are not recognized. Note: The same ACPI control method can be overridden for many times, and it's always the latest one that used by Linux/kernel. +Note: To get the ACPI debug object output (Store (AAAA, Debug)), + please run "echo 1 > /sys/module/acpi/parameters/aml_debug_output". 1. override an existing method a) get the ACPI table via ACPI sysfs I/F. e.g. to get the DSDT, diff --git a/Documentation/aoe/aoe.txt b/Documentation/aoe/aoe.txt index 3a4dbe4663c9..b5aada9f20cc 100644 --- a/Documentation/aoe/aoe.txt +++ b/Documentation/aoe/aoe.txt @@ -1,6 +1,6 @@ The EtherDrive (R) HOWTO for users of 2.6 kernels is found at ... - http://www.coraid.com/support/linux/EtherDrive-2.6-HOWTO.html + http://www.coraid.com/SUPPORT/EtherDrive-HBA It has many tips and hints! diff --git a/Documentation/apparmor.txt b/Documentation/apparmor.txt new file mode 100644 index 000000000000..93c1fd7d0635 --- /dev/null +++ b/Documentation/apparmor.txt @@ -0,0 +1,39 @@ +--- What is AppArmor? --- + +AppArmor is MAC style security extension for the Linux kernel. It implements +a task centered policy, with task "profiles" being created and loaded +from user space. Tasks on the system that do not have a profile defined for +them run in an unconfined state which is equivalent to standard Linux DAC +permissions. + +--- How to enable/disable --- + +set CONFIG_SECURITY_APPARMOR=y + +If AppArmor should be selected as the default security module then + set CONFIG_DEFAULT_SECURITY="apparmor" + and CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1 + +Build the kernel + +If AppArmor is not the default security module it can be enabled by passing +security=apparmor on the kernel's command line. + +If AppArmor is the default security module it can be disabled by passing +apparmor=0, security=XXXX (where XXX is valid security module), on the +kernel's command line + +For AppArmor to enforce any restrictions beyond standard Linux DAC permissions +policy must be loaded into the kernel from user space (see the Documentation +and tools links). + +--- Documentation --- + +Documentation can be found on the wiki. + +--- Links --- + +Mailing List - apparmor@lists.ubuntu.com +Wiki - http://apparmor.wiki.kernel.org/ +User space tools - https://launchpad.net/apparmor +Kernel module - git://git.kernel.org/pub/scm/linux/kernel/git/jj/apparmor-dev.git diff --git a/Documentation/arm/IXP2000 b/Documentation/arm/IXP2000 index e0148b6b2c40..68d21d92a30b 100644 --- a/Documentation/arm/IXP2000 +++ b/Documentation/arm/IXP2000 @@ -14,7 +14,7 @@ telecom systems. In addition to an XScale core, it contains up to 8 interfaces (UTOPIA, SPI, etc), a PCI host bridge, one serial port, flash interface, and some other odds and ends. For more information, see: -http://developer.intel.com/design/network/products/npfamily/ixp2xxx.htm +http://developer.intel.com 2. Linux Support diff --git a/Documentation/arm/IXP4xx b/Documentation/arm/IXP4xx index 72fbcc4fcab0..133c5fa6c7a1 100644 --- a/Documentation/arm/IXP4xx +++ b/Documentation/arm/IXP4xx @@ -45,7 +45,7 @@ require the use of Intel's propietary CSR softare: If you need to use any of the above, you need to download Intel's software from: - http://developer.intel.com/design/network/products/npfamily/ixp425swr1.htm + http://developer.intel.com/design/network/products/npfamily/ixp425.htm DO NOT POST QUESTIONS TO THE LINUX MAILING LISTS REGARDING THE PROPIETARY SOFTWARE. @@ -53,7 +53,7 @@ SOFTWARE. There are several websites that provide directions/pointers on using Intel's software: -http://ixp4xx-osdg.sourceforge.net/ + http://sourceforge.net/projects/ixp4xx-osdg/ Open Source Developer's Guide for using uClinux and the Intel libraries http://gatewaymaker.sourceforge.net/ @@ -112,21 +112,21 @@ http://www.adiengineering.com/productsCoyote.html Finally, there is an IDE port hanging off the expansion bus. Gateworks Avila Network Platform -http://www.gateworks.com/avila_sbc.htm +http://www.gateworks.com/support/overview.php The Avila platform is basically and IXDP425 with the 4 PCI slots replaced with mini-PCI slots and a CF IDE interface hanging off the expansion bus. Intel IXDP425 Development Platform -http://developer.intel.com/design/network/products/npfamily/ixdp425.htm +http://www.intel.com/design/network/products/npfamily/ixdpg425.htm This is Intel's standard reference platform for the IXDP425 and is also known as the Richfield board. It contains 4 PCI slots, 16MB of flash, two 10/100 ports and one ADSL port. Intel IXDP465 Development Platform -http://developer.intel.com/design/network/products/npfamily/ixdp465.htm +http://www.intel.com/design/network/products/npfamily/ixdp465.htm This is basically an IXDP425 with an IXP465 and 32M of flash instead of just 16. @@ -141,15 +141,13 @@ Intel IXDPG425 Development Platform a pivot_root to NFS. Motorola PrPMC1100 Processor Mezanine Card -http://www.fountainsys.com/datasheet/PrPMC1100.pdf +http://www.fountainsys.com The PrPMC1100 is based on the IXCP1100 and is meant to plug into and IXP2400/2800 system to act as the system controller. It simply contains a CPU and 16MB of flash on the board and needs to be plugged into a carrier board to function. Currently Linux only supports the Motorola PrPMC carrier board for this platform. - See https://mcg.motorola.com/us/ds/pdf/ds0144.pdf for info - on the carrier board. 5. TODO LIST diff --git a/Documentation/arm/README b/Documentation/arm/README index d98783fbe0c7..aea34095cdcf 100644 --- a/Documentation/arm/README +++ b/Documentation/arm/README @@ -41,12 +41,12 @@ Bug reports etc --------------- Please send patches to the patch system. For more information, see - http://www.arm.linux.org.uk/patches/info.html Always include some + http://www.arm.linux.org.uk/developer/patches/info.php Always include some explanation as to what the patch does and why it is needed. Bug reports should be sent to linux-arm-kernel@lists.arm.linux.org.uk, or submitted through the web form at - http://www.arm.linux.org.uk/forms/solution.shtml + http://www.arm.linux.org.uk/developer/ When sending bug reports, please ensure that they contain all relevant information, eg. the kernel messages that were printed before/during diff --git a/Documentation/arm/SA1100/Assabet b/Documentation/arm/SA1100/Assabet index 91f7ce7ba426..08b885d35674 100644 --- a/Documentation/arm/SA1100/Assabet +++ b/Documentation/arm/SA1100/Assabet @@ -2,8 +2,7 @@ The Intel Assabet (SA-1110 evaluation) board ============================================ Please see: -http://developer.intel.com/design/strong/quicklist/eval-plat/sa-1110.htm -http://developer.intel.com/design/strong/guides/278278.htm +http://developer.intel.com Also some notes from John G Dorsey : http://www.cs.cmu.edu/~wearable/software/assabet.html @@ -64,7 +63,7 @@ Initial RedBoot configuration ----------------------------- The commands used here are explained in The RedBoot User's Guide available -on-line at http://sources.redhat.com/ecos/docs-latest/redboot/redboot.html. +on-line at http://sources.redhat.com/ecos/docs.html. Please refer to it for explanations. If you have a CF network card (my Assabet kit contained a CF+ LP-E from diff --git a/Documentation/arm/SA1100/Brutus b/Documentation/arm/SA1100/Brutus index b1cfd405dccc..6a3aa95e9bfd 100644 --- a/Documentation/arm/SA1100/Brutus +++ b/Documentation/arm/SA1100/Brutus @@ -1,7 +1,7 @@ Brutus is an evaluation platform for the SA1100 manufactured by Intel. For more details, see: -http://developer.intel.com/design/strong/applnots/sa1100lx/getstart.htm +http://developer.intel.com To compile for Brutus, you must issue the following commands: diff --git a/Documentation/arm/SA1100/FreeBird b/Documentation/arm/SA1100/FreeBird index eda28b3232e7..fb23b770aaf4 100644 --- a/Documentation/arm/SA1100/FreeBird +++ b/Documentation/arm/SA1100/FreeBird @@ -1,5 +1,5 @@ Freebird-1.1 is produced by Legned(C) ,Inc. -(http://www.legend.com.cn) +http://web.archive.org/web/*/http://www.legend.com.cn and software/linux mainatined by Coventive(C),Inc. (http://www.coventive.com) diff --git a/Documentation/arm/SA1100/GraphicsClient b/Documentation/arm/SA1100/GraphicsClient index 6c9c4f5a36e1..867bb35943af 100644 --- a/Documentation/arm/SA1100/GraphicsClient +++ b/Documentation/arm/SA1100/GraphicsClient @@ -71,7 +71,7 @@ Supported peripherals: - serial ports (ttyS[0-2]) - ttyS0 is default for serial console - Smart I/O (ADC, keypad, digital inputs, etc) - See http://www.applieddata.com/developers/linux for IOCTL documentation + See http://www.eurotech-inc.com/linux-sbc.asp for IOCTL documentation and example user space code. ps/2 keybd is multiplexed through this driver To do: diff --git a/Documentation/arm/SA1100/GraphicsMaster b/Documentation/arm/SA1100/GraphicsMaster index ee7c6595f23f..9145088a0ba2 100644 --- a/Documentation/arm/SA1100/GraphicsMaster +++ b/Documentation/arm/SA1100/GraphicsMaster @@ -28,7 +28,7 @@ Supported peripherals: - serial ports (ttyS[0-2]) - ttyS0 is default for serial console - Smart I/O (ADC, keypad, digital inputs, etc) - See http://www.applieddata.com/developers/linux for IOCTL documentation + See http://www.eurotech-inc.com/linux-sbc.asp for IOCTL documentation and example user space code. ps/2 keybd is multiplexed through this driver To do: diff --git a/Documentation/arm/SA1100/Itsy b/Documentation/arm/SA1100/Itsy index 3b594534323b..44b94997fa0d 100644 --- a/Documentation/arm/SA1100/Itsy +++ b/Documentation/arm/SA1100/Itsy @@ -4,7 +4,7 @@ research projects at Compaq that are related to pocket computing. For more information, see: - http://www.research.digital.com/wrl/itsy/index.html + http://www.hpl.hp.com/downloads/crl/itsy/ Notes on initial 2.4 Itsy support (8/27/2000) : The port was done on an Itsy version 1.5 machine with a daughtercard with diff --git a/Documentation/arm/SA1100/PLEB b/Documentation/arm/SA1100/PLEB index 92cae066908d..b9c8a631a351 100644 --- a/Documentation/arm/SA1100/PLEB +++ b/Documentation/arm/SA1100/PLEB @@ -6,6 +6,6 @@ PLEB support has yet to be fully integrated. For more information, see: - http://www.cse.unsw.edu.au/~pleb/ + http://www.cse.unsw.edu.au diff --git a/Documentation/arm/SA1100/Victor b/Documentation/arm/SA1100/Victor index f938a29fdc20..9cff415da5a7 100644 --- a/Documentation/arm/SA1100/Victor +++ b/Documentation/arm/SA1100/Victor @@ -3,7 +3,7 @@ VisuAide, Inc. to be used by blind people. For more information related to Victor, see: - http://www.visuaide.com/victor + http://www.humanware.com/en-usa/products Of course Victor is using Linux as its main operating system. The Victor implementation for Linux is maintained by Nicolas Pitre: diff --git a/Documentation/arm/SA1100/nanoEngine b/Documentation/arm/SA1100/nanoEngine index fc431cbfefc2..48a7934f95f6 100644 --- a/Documentation/arm/SA1100/nanoEngine +++ b/Documentation/arm/SA1100/nanoEngine @@ -7,5 +7,5 @@ for more info. (Ref: Stuart Adams ) Also visit Larry Doolittle's "Linux for the nanoEngine" site: -http://recycle.lbl.gov/~ldoolitt/bse/ +http://www.brightstareng.com/arm/nanoeng.htm diff --git a/Documentation/binfmt_misc.txt b/Documentation/binfmt_misc.txt index f609ebf9c78f..c1ed6948ba80 100644 --- a/Documentation/binfmt_misc.txt +++ b/Documentation/binfmt_misc.txt @@ -111,6 +111,6 @@ cause unexpected behaviour and can be a security hazard. There is a web page about binfmt_misc at -http://www.tat.physik.uni-tuebingen.de/~rguenth/linux/binfmt_misc.html +http://www.tat.physik.uni-tuebingen.de Richard Günther diff --git a/Documentation/blackfin/00-INDEX b/Documentation/blackfin/00-INDEX index c34e12440fec..2df0365f2dff 100644 --- a/Documentation/blackfin/00-INDEX +++ b/Documentation/blackfin/00-INDEX @@ -1,11 +1,8 @@ 00-INDEX - This file -cachefeatures.txt - - Supported cache features. - -Filesystems - - Requirements for mounting the root file system. - -bfin-gpio-note.txt +bfin-gpio-notes.txt - Notes in developing/using bfin-gpio driver. + +bfin-spi-notes.txt + - Notes for using bfin spi bus driver. diff --git a/Documentation/blackfin/Filesystems b/Documentation/blackfin/Filesystems deleted file mode 100644 index 51260a1b8032..000000000000 --- a/Documentation/blackfin/Filesystems +++ /dev/null @@ -1,169 +0,0 @@ -/* - * File: Documentation/blackfin/Filesystems - * Based on: - * Author: - * - * Created: - * Description: This file contains the simple DMA Implementation for Blackfin - * - * Rev: $Id: Filesystems 2384 2006-11-01 04:12:43Z magicyang $ - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - */ - - How to mount the root file system in uClinux/Blackfin - ----------------------------------------------------- - -1 Mounting EXT3 File system. - ------------------------ - - Creating an EXT3 File system for uClinux/Blackfin: - - -Please follow the steps to form the EXT3 File system and mount the same as root -file system. - -a Make an ext3 file system as large as you want the final root file - system. - - mkfs.ext3 /dev/ram0 - -b Mount this Empty file system on a free directory as: - - mount -t ext3 /dev/ram0 ./test - where ./test is the empty directory. - -c Copy your root fs directory that you have so carefully made over. - - cp -af /tmp/my_final_rootfs_files/* ./test - - (For ex: cp -af uClinux-dist/romfs/* ./test) - -d If you have done everything right till now you should be able to see - the required "root" dir's (that's etc, root, bin, lib, sbin...) - -e Now unmount the file system - - umount ./test - -f Create the root file system image. - - dd if=/dev/ram0 bs=1k count= \ - > ext3fs.img - - -Now you have to tell the kernel that will be mounting this file system as -rootfs. -So do a make menuconfig under kernel and select the Ext3 journaling file system -support under File system --> submenu. - - -2. Mounting EXT2 File system. - ------------------------- - -By default the ext2 file system image will be created if you invoke make from -the top uClinux-dist directory. - - -3. Mounting CRAMFS File System - ---------------------------- - -To create a CRAMFS file system image execute the command - - mkfs.cramfs ./test cramfs.img - - where ./test is the target directory. - - -4. Mounting ROMFS File System - -------------------------- - -To create a ROMFS file system image execute the command - - genromfs -v -V "ROMdisk" -f romfs.img -d ./test - - where ./test is the target directory - - -5. Mounting the JFFS2 Filesystem - ----------------------------- - -To create a compressed JFFS filesystem (JFFS2), please execute the command - - mkfs.jffs2 -d ./test -o jffs2.img - - where ./test is the target directory. - -However, please make sure the following is in your kernel config. - -/* - * RAM/ROM/Flash chip drivers - */ -#define CONFIG_MTD_CFI 1 -#define CONFIG_MTD_ROM 1 -/* - * Mapping drivers for chip access - */ -#define CONFIG_MTD_COMPLEX_MAPPINGS 1 -#define CONFIG_MTD_BF533 1 -#undef CONFIG_MTD_UCLINUX - -Through the u-boot boot loader, use the jffs2.img in the corresponding -partition made in linux-2.6.x/drivers/mtd/maps/bf533_flash.c. - -NOTE - Currently the Flash driver is available only for EZKIT. Watch out for a - STAMP driver soon. - - -6. Mounting the NFS File system - ----------------------------- - - For mounting the NFS please do the following in the kernel config. - - In Networking Support --> Networking options --> TCP/IP networking --> - IP: kernel level autoconfiguration - - Enable BOOTP Support. - - In Kernel hacking --> Compiled-in kernel boot parameter add the following - - root=/dev/nfs rw ip=bootp - - In File system --> Network File system, Enable - - NFS file system support --> NFSv3 client support - Root File system on NFS - - in uClibc menuconfig, do the following - In Networking Support - enable Remote Procedure Call (RPC) support - Full RPC Support - - On the Host side, ensure that /etc/dhcpd.conf looks something like this - - ddns-update-style ad-hoc; - allow bootp; - subnet 10.100.4.0 netmask 255.255.255.0 { - default-lease-time 122209600; - max-lease-time 31557600; - group { - host bf533 { - hardware ethernet 00:CF:52:49:C3:01; - fixed-address 10.100.4.50; - option root-path "/home/nfsmount"; - } - } - - ensure that /etc/exports looks something like this - /home/nfsmount *(rw,no_root_squash,no_all_squash) - - run the following commands as root (may differ depending on your - distribution) : - - service nfs start - - service portmap start - - service dhcpd start - - /usr/sbin/exportfs diff --git a/Documentation/blackfin/bfin-spi-notes.txt b/Documentation/blackfin/bfin-spi-notes.txt new file mode 100644 index 000000000000..556fa877f2e8 --- /dev/null +++ b/Documentation/blackfin/bfin-spi-notes.txt @@ -0,0 +1,14 @@ +SPI Chip Select behavior: + +With the Blackfin on-chip SPI peripheral, there is some logic tied to the CPHA +bit whether the Slave Select Line is controlled by hardware (CPHA=0) or +controlled by software (CPHA=1). However, the Linux SPI bus driver assumes that +the Slave Select is always under software control and being asserted during +the entire SPI transfer. - And not just bits_per_word duration. + +In most cases you can utilize SPI MODE_3 instead of MODE_0 to work-around this +behavior. If your SPI slave device in question requires SPI MODE_0 or MODE_2 +timing, you can utilize the GPIO controlled SPI Slave Select option instead. + +You can even use the same pin whose peripheral role is a SSEL, +but use it as a GPIO instead. diff --git a/Documentation/blackfin/cachefeatures.txt b/Documentation/blackfin/cachefeatures.txt deleted file mode 100644 index 75de51f94515..000000000000 --- a/Documentation/blackfin/cachefeatures.txt +++ /dev/null @@ -1,55 +0,0 @@ -/* - * File: Documentation/blackfin/cachefeatures.txt - * Based on: - * Author: - * - * Created: - * Description: This file contains the simple DMA Implementation for Blackfin - * - * Rev: $Id: cachefeatures.txt 2384 2006-11-01 04:12:43Z magicyang $ - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - */ - - - Instruction and Data cache initialization. - icache_init(); - dcache_init(); - - - Instruction and Data cache Invalidation Routines, when flushing the - same is not required. - _icache_invalidate(); - _dcache_invalidate(); - - Also, for invalidating the entire instruction and data cache, the below - routines are provided (another method for invalidation, refer page no 267 and 287 of - ADSP-BF533 Hardware Reference manual) - - invalidate_entire_dcache(); - invalidate_entire_icache(); - - -External Flushing of Instruction and data cache routines. - - flush_instruction_cache(); - flush_data_cache(); - - - Internal Flushing of Instruction and Data Cache. - - icplb_flush(); - dcplb_flush(); - - - Miscellaneous cache functions. - - flush_cache_all(); - flush_cache_mm(); - invalidate_dcache_range(); - flush_dcache_range(); - flush_dcache_page(); - flush_cache_range(); - flush_cache_page(); - invalidate_dcache_range(); - flush_page_to_ram(); - diff --git a/Documentation/block/biodoc.txt b/Documentation/block/biodoc.txt index 508b5b2b0289..b9a83dd24732 100644 --- a/Documentation/block/biodoc.txt +++ b/Documentation/block/biodoc.txt @@ -7,7 +7,7 @@ Notes Written on Jan 15, 2002: Last Updated May 2, 2002 September 2003: Updated I/O Scheduler portions - Nick Piggin + Nick Piggin Introduction: diff --git a/Documentation/blockdev/paride.txt b/Documentation/blockdev/paride.txt index e4312676bdda..ee6717e3771d 100644 --- a/Documentation/blockdev/paride.txt +++ b/Documentation/blockdev/paride.txt @@ -412,6 +412,6 @@ have in your mail headers, when sending mail to the list server. You might also find some useful information on the linux-parport web pages (although they are not always up to date) at - http://www.torque.net/parport/ + http://web.archive.org/web/*/http://www.torque.net/parport/ diff --git a/Documentation/cdrom/packet-writing.txt b/Documentation/cdrom/packet-writing.txt index 1c407778c8b2..13c251d5add6 100644 --- a/Documentation/cdrom/packet-writing.txt +++ b/Documentation/cdrom/packet-writing.txt @@ -95,7 +95,7 @@ Using the pktcdvd sysfs interface Since Linux 2.6.20, the pktcdvd module has a sysfs interface and can be controlled by it. For example the "pktcdvd" tool uses -this interface. (see http://people.freenet.de/BalaGi#pktcdvd ) +this interface. (see http://tom.ist-im-web.de/download/pktcdvd ) "pktcdvd" works similar to "pktsetup", e.g.: diff --git a/Documentation/cgroups/cpusets.txt b/Documentation/cgroups/cpusets.txt index 51682ab2dd1a..5d0d5692a365 100644 --- a/Documentation/cgroups/cpusets.txt +++ b/Documentation/cgroups/cpusets.txt @@ -691,7 +691,7 @@ There are ways to query or modify cpusets: cat, rmdir commands from the shell, or their equivalent from C. - via the C library libcpuset. - via the C library libcgroup. - (http://sourceforge.net/proects/libcg/) + (http://sourceforge.net/projects/libcg/) - via the python application cset. (http://developer.novell.com/wiki/index.php/Cpuset) diff --git a/Documentation/coccinelle.txt b/Documentation/coccinelle.txt new file mode 100644 index 000000000000..cd2b02837066 --- /dev/null +++ b/Documentation/coccinelle.txt @@ -0,0 +1,258 @@ +Copyright 2010 Nicolas Palix +Copyright 2010 Julia Lawall +Copyright 2010 Gilles Muller + + + Getting Coccinelle +~~~~~~~~~~~~~~~~~~~~ + +The semantic patches included in the kernel use the 'virtual rule' +feature which was introduced in Coccinelle version 0.1.11. + +Coccinelle (>=0.2.0) is available through the package manager +of many distributions, e.g. : + + - Debian (>=squeeze) + - Fedora (>=13) + - Ubuntu (>=10.04 Lucid Lynx) + - OpenSUSE + - Arch Linux + - NetBSD + - FreeBSD + + +You can get the latest version released from the Coccinelle homepage at +http://coccinelle.lip6.fr/ + +Once you have it, run the following command: + + ./configure + make + +as a regular user, and install it with + + sudo make install + + + Using Coccinelle on the Linux kernel +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +A Coccinelle-specific target is defined in the top level +Makefile. This target is named 'coccicheck' and calls the 'coccicheck' +front-end in the 'scripts' directory. + +Four modes are defined: report, patch, context, and org. The mode to +use is specified by setting the MODE variable with 'MODE='. + +'report' generates a list in the following format: + file:line:column-column: message + +'patch' proposes a fix, when possible. + +'context' highlights lines of interest and their context in a +diff-like style.Lines of interest are indicated with '-'. + +'org' generates a report in the Org mode format of Emacs. + +Note that not all semantic patches implement all modes. + +To make a report for every semantic patch, run the following command: + + make coccicheck MODE=report + +NB: The 'report' mode is the default one. + +To produce patches, run: + + make coccicheck MODE=patch + + +The coccicheck target applies every semantic patch available in the +subdirectories of 'scripts/coccinelle' to the entire Linux kernel. + +For each semantic patch, a changelog message is proposed. It gives a +description of the problem being checked by the semantic patch, and +includes a reference to Coccinelle. + +As any static code analyzer, Coccinelle produces false +positives. Thus, reports must be carefully checked, and patches +reviewed. + + + Using Coccinelle with a single semantic patch +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The optional make variable COCCI can be used to check a single +semantic patch. In that case, the variable must be initialized with +the name of the semantic patch to apply. + +For instance: + + make coccicheck COCCI= MODE=patch +or + make coccicheck COCCI= MODE=report + + + Proposing new semantic patches +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +New semantic patches can be proposed and submitted by kernel +developers. For sake of clarity, they should be organized in the +subdirectories of 'scripts/coccinelle/'. + + + Detailed description of the 'report' mode +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +'report' generates a list in the following format: + file:line:column-column: message + +Example: + +Running + + make coccicheck MODE=report COCCI=scripts/coccinelle/err_cast.cocci + +will execute the following part of the SmPL script. + + +@r depends on !context && !patch && (org || report)@ +expression x; +position p; +@@ + + ERR_PTR@p(PTR_ERR(x)) + +@script:python depends on report@ +p << r.p; +x << r.x; +@@ + +msg="ERR_CAST can be used with %s" % (x) +coccilib.report.print_report(p[0], msg) + + +This SmPL excerpt generates entries on the standard output, as +illustrated below: + +/home/user/linux/crypto/ctr.c:188:9-16: ERR_CAST can be used with alg +/home/user/linux/crypto/authenc.c:619:9-16: ERR_CAST can be used with auth +/home/user/linux/crypto/xts.c:227:9-16: ERR_CAST can be used with alg + + + Detailed description of the 'patch' mode +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +When the 'patch' mode is available, it proposes a fix for each problem +identified. + +Example: + +Running + make coccicheck MODE=patch COCCI=scripts/coccinelle/err_cast.cocci + +will execute the following part of the SmPL script. + + +@ depends on !context && patch && !org && !report @ +expression x; +@@ + +- ERR_PTR(PTR_ERR(x)) ++ ERR_CAST(x) + + +This SmPL excerpt generates patch hunks on the standard output, as +illustrated below: + +diff -u -p a/crypto/ctr.c b/crypto/ctr.c +--- a/crypto/ctr.c 2010-05-26 10:49:38.000000000 +0200 ++++ b/crypto/ctr.c 2010-06-03 23:44:49.000000000 +0200 +@@ -185,7 +185,7 @@ static struct crypto_instance *crypto_ct + alg = crypto_attr_alg(tb[1], CRYPTO_ALG_TYPE_CIPHER, + CRYPTO_ALG_TYPE_MASK); + if (IS_ERR(alg)) +- return ERR_PTR(PTR_ERR(alg)); ++ return ERR_CAST(alg); + + /* Block size must be >= 4 bytes. */ + err = -EINVAL; + + Detailed description of the 'context' mode +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +'context' highlights lines of interest and their context +in a diff-like style. + +NOTE: The diff-like output generated is NOT an applicable patch. The + intent of the 'context' mode is to highlight the important lines + (annotated with minus, '-') and gives some surrounding context + lines around. This output can be used with the diff mode of + Emacs to review the code. + +Example: + +Running + make coccicheck MODE=context COCCI=scripts/coccinelle/err_cast.cocci + +will execute the following part of the SmPL script. + + +@ depends on context && !patch && !org && !report@ +expression x; +@@ + +* ERR_PTR(PTR_ERR(x)) + + +This SmPL excerpt generates diff hunks on the standard output, as +illustrated below: + +diff -u -p /home/user/linux/crypto/ctr.c /tmp/nothing +--- /home/user/linux/crypto/ctr.c 2010-05-26 10:49:38.000000000 +0200 ++++ /tmp/nothing +@@ -185,7 +185,6 @@ static struct crypto_instance *crypto_ct + alg = crypto_attr_alg(tb[1], CRYPTO_ALG_TYPE_CIPHER, + CRYPTO_ALG_TYPE_MASK); + if (IS_ERR(alg)) +- return ERR_PTR(PTR_ERR(alg)); + + /* Block size must be >= 4 bytes. */ + err = -EINVAL; + + Detailed description of the 'org' mode +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +'org' generates a report in the Org mode format of Emacs. + +Example: + +Running + make coccicheck MODE=org COCCI=scripts/coccinelle/err_cast.cocci + +will execute the following part of the SmPL script. + + +@r depends on !context && !patch && (org || report)@ +expression x; +position p; +@@ + + ERR_PTR@p(PTR_ERR(x)) + +@script:python depends on org@ +p << r.p; +x << r.x; +@@ + +msg="ERR_CAST can be used with %s" % (x) +msg_safe=msg.replace("[","@(").replace("]",")") +coccilib.org.print_todo(p[0], msg_safe) + + +This SmPL excerpt generates Org entries on the standard output, as +illustrated below: + +* TODO [[view:/home/user/linux/crypto/ctr.c::face=ovl-face1::linb=188::colb=9::cole=16][ERR_CAST can be used with alg]] +* TODO [[view:/home/user/linux/crypto/authenc.c::face=ovl-face1::linb=619::colb=9::cole=16][ERR_CAST can be used with auth]] +* TODO [[view:/home/user/linux/crypto/xts.c::face=ovl-face1::linb=227::colb=9::cole=16][ERR_CAST can be used with alg]] diff --git a/Documentation/cpu-hotplug.txt b/Documentation/cpu-hotplug.txt index a99d7031cdf9..45d5a217484f 100644 --- a/Documentation/cpu-hotplug.txt +++ b/Documentation/cpu-hotplug.txt @@ -2,7 +2,7 @@ Maintainers: CPU Hotplug Core: - Rusty Russell + Rusty Russell Srivatsa Vaddagiri i386: Zwane Mwaikambo diff --git a/Documentation/development-process/4.Coding b/Documentation/development-process/4.Coding index a5a3450faaa0..2278693c8ffa 100644 --- a/Documentation/development-process/4.Coding +++ b/Documentation/development-process/4.Coding @@ -281,7 +281,7 @@ With sparse, the programmer can be warned about confusion between user-space and kernel-space addresses, mixture of big-endian and small-endian quantities, the passing of integer values where a set of bit flags is expected, and so on. Sparse must be installed separately (it can -be found at http://www.kernel.org/pub/software/devel/sparse/ if your +be found at https://sparse.wiki.kernel.org/index.php/Main_Page if your distributor does not package it); it can then be run on the code by adding "C=1" to your make command. diff --git a/Documentation/device-mapper/dm-crypt.txt b/Documentation/device-mapper/dm-crypt.txt index 6680cab2c705..524de926290d 100644 --- a/Documentation/device-mapper/dm-crypt.txt +++ b/Documentation/device-mapper/dm-crypt.txt @@ -36,7 +36,7 @@ Example scripts =============== LUKS (Linux Unified Key Setup) is now the preferred way to set up disk encryption with dm-crypt using the 'cryptsetup' utility, see -http://luks.endorphin.org/ +http://clemens.endorphin.org/cryptography [[ #!/bin/sh diff --git a/Documentation/devices.txt b/Documentation/devices.txt index 1d83d124056c..d0d1df6cb5de 100644 --- a/Documentation/devices.txt +++ b/Documentation/devices.txt @@ -445,6 +445,7 @@ Your cooperation is appreciated. 233 = /dev/kmview View-OS A process with a view 234 = /dev/btrfs-control Btrfs control device 235 = /dev/autofs Autofs control device + 236 = /dev/mapper/control Device-Mapper control device 240-254 Reserved for local use 255 Reserved for MISC_DYNAMIC_MINOR @@ -1517,7 +1518,7 @@ Your cooperation is appreciated. ... The driver and documentation may be obtained from - http://www.proximity.com.au/~brian/winradio/ + http://www.winradio.com/ 82 block I2O hard disk 0 = /dev/i2o/hdag 33rd I2O hard disk, whole disk @@ -1723,7 +1724,7 @@ Your cooperation is appreciated. 1 = /dev/comedi1 Second comedi device ... - See http://stm.lbl.gov/comedi or http://www.llp.fu-berlin.de/. + See http://stm.lbl.gov/comedi. 98 block User-mode virtual block device 0 = /dev/ubda First user-mode block device @@ -1984,7 +1985,7 @@ Your cooperation is appreciated. 256 NetWare volumes can be supported in a single machine. - http://www.kernel.org/pub/linux/kernel/people/jmerkey/nwfs + http://cgfa.telepac.pt/ftp2/kernel.org/linux/kernel/people/jmerkey/nwfs/ 0 = /dev/nwfs/v0 First NetWare (NWFS) Logical Volume 1 = /dev/nwfs/v1 Second NetWare (NWFS) Logical Volume @@ -2591,7 +2592,8 @@ Your cooperation is appreciated. 1 = /dev/intermezzo1 Second cache manager ... - See http://www.inter-mezzo.org/ for more information. + See http://web.archive.org/web/20080115195241/ + http://inter-mezzo.org/index.html 186 char Object-based storage control device 0 = /dev/obd0 First obd control device diff --git a/Documentation/dvb/faq.txt b/Documentation/dvb/faq.txt index 2511a335abd6..121832e5d899 100644 --- a/Documentation/dvb/faq.txt +++ b/Documentation/dvb/faq.txt @@ -76,7 +76,7 @@ Some very frequently asked questions about linuxtv-dvb the TuxBox CVS many interesting DVB applications and the dBox2 DVB source - http://sourceforge.net/projects/dvbsak/ + http://www.linuxtv.org/downloads/ DVB Swiss Army Knife library and utilities http://www.nenie.org/misc/mpsys/ diff --git a/Documentation/dvb/get_dvb_firmware b/Documentation/dvb/get_dvb_firmware index 239cbdbf4d12..350959f4e41b 100644 --- a/Documentation/dvb/get_dvb_firmware +++ b/Documentation/dvb/get_dvb_firmware @@ -26,7 +26,7 @@ use IO::Handle; "dec3000s", "vp7041", "dibusb", "nxt2002", "nxt2004", "or51211", "or51132_qam", "or51132_vsb", "bluebird", "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", - "af9015", "ngene"); + "af9015", "ngene", "az6027"); # Check args syntax() if (scalar(@ARGV) != 1); @@ -518,11 +518,11 @@ sub bluebird { sub af9015 { my $sourcefile = "download.ashx?file=57"; my $url = "http://www.ite.com.tw/EN/Services/$sourcefile"; - my $hash = "ff5b096ed47c080870eacdab2de33ad6"; + my $hash = "e3f08935158038d385ad382442f4bb2d"; my $outfile = "dvb-usb-af9015.fw"; my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1); - my $fwoffset = 0x22708; - my $fwlength = 18225; + my $fwoffset = 0x25690; + my $fwlength = 18725; my ($chunklength, $buf, $rcount); checkstandard(); @@ -567,6 +567,23 @@ sub ngene { "$file1, $file2"; } +sub az6027{ + my $file = "AZ6027_Linux_Driver.tar.gz"; + my $url = "http://linux.terratec.de/files/$file"; + my $firmware = "dvb-usb-az6027-03.fw"; + + wgetfile($file, $url); + + #untar + if( system("tar xzvf $file $firmware")){ + die "failed to untar firmware"; + } + if( system("rm $file")){ + die ("unable to remove unnecessary files"); + } + + $firmware; +} # --------------------------------------------------------------- # Utilities diff --git a/Documentation/fb/framebuffer.txt b/Documentation/fb/framebuffer.txt index fe79e3c8847d..58c5ae2e9f59 100644 --- a/Documentation/fb/framebuffer.txt +++ b/Documentation/fb/framebuffer.txt @@ -330,7 +330,7 @@ and on its mirrors. The latest version of fbset can be found at - http://home.tvd.be/cr26864/Linux/fbdev/ + http://www.linux-fbdev.org/ 10. Credits diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt index 1571c0c83dba..842aa9de84a6 100644 --- a/Documentation/feature-removal-schedule.txt +++ b/Documentation/feature-removal-schedule.txt @@ -93,7 +93,7 @@ Why: Broken design for runtime control over driver power states, confusing inputs. This framework was never widely used, and most attempts to use it were broken. Drivers should instead be exposing domain-specific interfaces either to kernel or to userspace. -Who: Pavel Machek +Who: Pavel Machek --------------------------- @@ -116,29 +116,6 @@ Who: Mauro Carvalho Chehab --------------------------- -What: PCMCIA control ioctl (needed for pcmcia-cs [cardmgr, cardctl]) -When: 2.6.35/2.6.36 -Files: drivers/pcmcia/: pcmcia_ioctl.c -Why: With the 16-bit PCMCIA subsystem now behaving (almost) like a - normal hotpluggable bus, and with it using the default kernel - infrastructure (hotplug, driver core, sysfs) keeping the PCMCIA - control ioctl needed by cardmgr and cardctl from pcmcia-cs is - unnecessary and potentially harmful (it does not provide for - proper locking), and makes further cleanups and integration of the - PCMCIA subsystem into the Linux kernel device driver model more - difficult. The features provided by cardmgr and cardctl are either - handled by the kernel itself now or are available in the new - pcmciautils package available at - http://kernel.org/pub/linux/utils/kernel/pcmcia/ - - For all architectures except ARM, the associated config symbol - has been removed from kernel 2.6.34; for ARM, it will be likely - be removed from kernel 2.6.35. The actual code will then likely - be removed from kernel 2.6.36. -Who: Dominik Brodowski - ---------------------------- - What: sys_sysctl When: September 2010 Option: CONFIG_SYSCTL_SYSCALL @@ -174,6 +151,31 @@ Who: Eric Biederman --------------------------- +What: /proc//oom_adj +When: August 2012 +Why: /proc//oom_adj allows userspace to influence the oom killer's + badness heuristic used to determine which task to kill when the kernel + is out of memory. + + The badness heuristic has since been rewritten since the introduction of + this tunable such that its meaning is deprecated. The value was + implemented as a bitshift on a score generated by the badness() + function that did not have any precise units of measure. With the + rewrite, the score is given as a proportion of available memory to the + task allocating pages, so using a bitshift which grows the score + exponentially is, thus, impossible to tune with fine granularity. + + A much more powerful interface, /proc//oom_score_adj, was + introduced with the oom killer rewrite that allows users to increase or + decrease the badness() score linearly. This interface will replace + /proc//oom_adj. + + A warning will be emitted to the kernel log if an application uses this + deprecated interface. After it is printed once, future warnings will be + suppressed until the kernel is rebooted. + +--------------------------- + What: remove EXPORT_SYMBOL(kernel_thread) When: August 2006 Files: arch/*/kernel/*_ksyms.c @@ -303,15 +305,6 @@ Who: Johannes Berg --------------------------- -What: CONFIG_NF_CT_ACCT -When: 2.6.29 -Why: Accounting can now be enabled/disabled without kernel recompilation. - Currently used only to set a default value for a feature that is also - controlled by a kernel/module/sysfs/sysctl parameter. -Who: Krzysztof Piotr Oledzki - ---------------------------- - What: sysfs ui for changing p4-clockmod parameters When: September 2009 Why: See commits 129f8ae9b1b5be94517da76009ea956e89104ce8 and @@ -367,24 +360,6 @@ When: 2.6.33 Why: Should be implemented in userspace, policy daemon. Who: Johannes Berg ---------------------------- - -What: CONFIG_INOTIFY -When: 2.6.33 -Why: last user (audit) will be converted to the newer more generic - and more easily maintained fsnotify subsystem -Who: Eric Paris - ----------------------------- - -What: lock_policy_rwsem_* and unlock_policy_rwsem_* will not be - exported interface anymore. -When: 2.6.33 -Why: cpu_policy_rwsem has a new cleaner definition making it local to - cpufreq core and contained inside cpufreq.c. Other dependent - drivers should not use it in order to safely avoid lockdep issues. -Who: Venkatesh Pallipadi - ---------------------------- What: sound-slot/service-* module aliases and related clutters in @@ -459,57 +434,6 @@ Who: Corentin Chary ---------------------------- -What: usbvideo quickcam_messenger driver -When: 2.6.35 -Files: drivers/media/video/usbvideo/quickcam_messenger.[ch] -Why: obsolete v4l1 driver replaced by gspca_stv06xx -Who: Hans de Goede - ----------------------------- - -What: ov511 v4l1 driver -When: 2.6.35 -Files: drivers/media/video/ov511.[ch] -Why: obsolete v4l1 driver replaced by gspca_ov519 -Who: Hans de Goede - ----------------------------- - -What: w9968cf v4l1 driver -When: 2.6.35 -Files: drivers/media/video/w9968cf*.[ch] -Why: obsolete v4l1 driver replaced by gspca_ov519 -Who: Hans de Goede - ----------------------------- - -What: ovcamchip sensor framework -When: 2.6.35 -Files: drivers/media/video/ovcamchip/* -Why: Only used by obsoleted v4l1 drivers -Who: Hans de Goede - ----------------------------- - -What: stv680 v4l1 driver -When: 2.6.35 -Files: drivers/media/video/stv680.[ch] -Why: obsolete v4l1 driver replaced by gspca_stv0680 -Who: Hans de Goede - ----------------------------- - -What: zc0301 v4l driver -When: 2.6.35 -Files: drivers/media/video/zc0301/* -Why: Duplicate functionality with the gspca_zc3xx driver, zc0301 only - supports 2 USB-ID's (because it only supports a limited set of - sensors) wich are also supported by the gspca_zc3xx driver - (which supports 53 USB-ID's in total) -Who: Hans de Goede - ----------------------------- - What: sysfs-class-rfkill state file When: Feb 2014 Files: net/rfkill/core.c @@ -538,37 +462,6 @@ Who: Jan Kiszka ---------------------------- -What: KVM memory aliases support -When: July 2010 -Why: Memory aliasing support is used for speeding up guest vga access - through the vga windows. - - Modern userspace no longer uses this feature, so it's just bitrotted - code and can be removed with no impact. -Who: Avi Kivity - ----------------------------- - -What: xtime, wall_to_monotonic -When: 2.6.36+ -Files: kernel/time/timekeeping.c include/linux/time.h -Why: Cleaning up timekeeping internal values. Please use - existing timekeeping accessor functions to access - the equivalent functionality. -Who: John Stultz - ----------------------------- - -What: KVM kernel-allocated memory slots -When: July 2010 -Why: Since 2.6.25, kvm supports user-allocated memory slots, which are - much more flexible than kernel-allocated slots. All current userspace - supports the newer interface and this code can be removed with no - impact. -Who: Avi Kivity - ----------------------------- - What: KVM paravirt mmu host support When: January 2011 Why: The paravirt mmu host support is slower than non-paravirt mmu, both @@ -654,3 +547,20 @@ Why: superseded by acpi_sleep=nonvs Who: Rafael J. Wysocki ---------------------------- + +What: PCI DMA unmap state API +When: August 2012 +Why: PCI DMA unmap state API (include/linux/pci-dma.h) was replaced + with DMA unmap state API (DMA unmap state API can be used for + any bus). +Who: FUJITA Tomonori + +---------------------------- + +What: DMA_xxBIT_MASK macros +When: Jun 2011 +Why: DMA_xxBIT_MASK macros were replaced with DMA_BIT_MASK() macros. +Who: FUJITA Tomonori + +---------------------------- + diff --git a/Documentation/filesystems/9p.txt b/Documentation/filesystems/9p.txt index c0236e753bc8..f9765e8cf086 100644 --- a/Documentation/filesystems/9p.txt +++ b/Documentation/filesystems/9p.txt @@ -128,7 +128,7 @@ OPTIONS RESOURCES ========= -Our current recommendation is to use Inferno (http://www.vitanuova.com/inferno) +Our current recommendation is to use Inferno (http://www.vitanuova.com/nferno/index.html) as the 9p server. You can start a 9p server under Inferno by issuing the following command: ; styxlisten -A tcp!*!564 export '#U*' diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking index 96d4293607ec..2db4283efa8d 100644 --- a/Documentation/filesystems/Locking +++ b/Documentation/filesystems/Locking @@ -92,8 +92,8 @@ prototypes: void (*destroy_inode)(struct inode *); void (*dirty_inode) (struct inode *); int (*write_inode) (struct inode *, int); - void (*drop_inode) (struct inode *); - void (*delete_inode) (struct inode *); + int (*drop_inode) (struct inode *); + void (*evict_inode) (struct inode *); void (*put_super) (struct super_block *); void (*write_super) (struct super_block *); int (*sync_fs)(struct super_block *sb, int wait); @@ -101,14 +101,13 @@ prototypes: int (*unfreeze_fs) (struct super_block *); int (*statfs) (struct dentry *, struct kstatfs *); int (*remount_fs) (struct super_block *, int *, char *); - void (*clear_inode) (struct inode *); void (*umount_begin) (struct super_block *); int (*show_options)(struct seq_file *, struct vfsmount *); ssize_t (*quota_read)(struct super_block *, int, char *, size_t, loff_t); ssize_t (*quota_write)(struct super_block *, int, const char *, size_t, loff_t); locking rules: - All may block. + All may block [not true, see below] None have BKL s_umount alloc_inode: @@ -116,22 +115,25 @@ destroy_inode: dirty_inode: (must not sleep) write_inode: drop_inode: !!!inode_lock!!! -delete_inode: +evict_inode: put_super: write write_super: read sync_fs: read freeze_fs: read unfreeze_fs: read -statfs: no -remount_fs: maybe (see below) -clear_inode: +statfs: maybe(read) (see below) +remount_fs: write umount_begin: no show_options: no (namespace_sem) quota_read: no (see below) quota_write: no (see below) -->remount_fs() will have the s_umount exclusive lock if it's already mounted. -When called from get_sb_single, it does NOT have the s_umount lock. +->statfs() has s_umount (shared) when called by ustat(2) (native or +compat), but that's an accident of bad API; s_umount is used to pin +the superblock down when we only have dev_t given us by userland to +identify the superblock. Everything else (statfs(), fstatfs(), etc.) +doesn't hold it when calling ->statfs() - superblock is pinned down +by resolving the pathname passed to syscall. ->quota_read() and ->quota_write() functions are both guaranteed to be the only ones operating on the quota file by the quota code (via dqio_sem) (unless an admin really wants to screw up something and @@ -372,8 +374,6 @@ prototypes: ssize_t (*aio_write) (struct kiocb *, const struct iovec *, unsigned long, loff_t); int (*readdir) (struct file *, void *, filldir_t); unsigned int (*poll) (struct file *, struct poll_table_struct *); - int (*ioctl) (struct inode *, struct file *, unsigned int, - unsigned long); long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long); long (*compat_ioctl) (struct file *, unsigned int, unsigned long); int (*mmap) (struct file *, struct vm_area_struct *); @@ -407,8 +407,7 @@ write: no aio_write: no readdir: no poll: no -ioctl: yes (see below) -unlocked_ioctl: no (see below) +unlocked_ioctl: no compat_ioctl: no mmap: no open: no @@ -451,9 +450,6 @@ move ->readdir() to inode_operations and use a separate method for directory anything that resembles union-mount we won't have a struct file for all components. And there are other reasons why the current interface is a mess... -->ioctl() on regular files is superceded by the ->unlocked_ioctl() that -doesn't take the BKL. - ->read on directories probably must go away - we should just enforce -EISDIR in sys_read() and friends. diff --git a/Documentation/filesystems/affs.txt b/Documentation/filesystems/affs.txt index 2d1524469c25..81ac488e3758 100644 --- a/Documentation/filesystems/affs.txt +++ b/Documentation/filesystems/affs.txt @@ -216,4 +216,4 @@ due to an incompatibility with the Amiga floppy controller. If you are interested in an Amiga Emulator for Linux, look at -http://www.freiburg.linux.de/~uae/ +http://web.archive.org/web/*/http://www.freiburg.linux.de/~uae/ diff --git a/Documentation/filesystems/befs.txt b/Documentation/filesystems/befs.txt index 67391a15949a..6e49c363938e 100644 --- a/Documentation/filesystems/befs.txt +++ b/Documentation/filesystems/befs.txt @@ -31,7 +31,7 @@ Current maintainer: Sergey S. Kostyliov WHAT IS THIS DRIVER? ================== -This module implements the native filesystem of BeOS +This module implements the native filesystem of BeOS http://www.beincorporated.com/ for the linux 2.4.1 and later kernels. Currently it is a read-only implementation. @@ -61,7 +61,7 @@ step 2. Configuration & make kernel The linux kernel has many compile-time options. Most of them are beyond the scope of this document. I suggest the Kernel-HOWTO document as a good general -reference on this topic. +reference on this topic. http://www.linuxdocs.org/HOWTOs/Kernel-HOWTO-4.html However, to use the BeFS module, you must enable it at configure time. diff --git a/Documentation/filesystems/caching/fscache.txt b/Documentation/filesystems/caching/fscache.txt index a91e2e2095b0..770267af5b3e 100644 --- a/Documentation/filesystems/caching/fscache.txt +++ b/Documentation/filesystems/caching/fscache.txt @@ -343,8 +343,8 @@ This will look something like: [root@andromeda ~]# head /proc/fs/fscache/objects OBJECT PARENT STAT CHLDN OPS OOP IPR EX READS EM EV F S | NETFS_COOKIE_DEF TY FL NETFS_DATA OBJECT_KEY, AUX_DATA ======== ======== ==== ===== === === === == ===== == == = = | ================ == == ================ ================ - 17e4b 2 ACTV 0 0 0 0 0 0 7b 4 0 8 | NFS.fh DT 0 ffff88001dd82820 010006017edcf8bbc93b43298fdfbe71e50b57b13a172c0117f38472, e567634700000000000000000000000063f2404a000000000000000000000000c9030000000000000000000063f2404a - 1693a 2 ACTV 0 0 0 0 0 0 7b 4 0 8 | NFS.fh DT 0 ffff88002db23380 010006017edcf8bbc93b43298fdfbe71e50b57b1e0162c01a2df0ea6, 420ebc4a000000000000000000000000420ebc4a0000000000000000000000000e1801000000000000000000420ebc4a + 17e4b 2 ACTV 0 0 0 0 0 0 7b 4 0 0 | NFS.fh DT 0 ffff88001dd82820 010006017edcf8bbc93b43298fdfbe71e50b57b13a172c0117f38472, e567634700000000000000000000000063f2404a000000000000000000000000c9030000000000000000000063f2404a + 1693a 2 ACTV 0 0 0 0 0 0 7b 4 0 0 | NFS.fh DT 0 ffff88002db23380 010006017edcf8bbc93b43298fdfbe71e50b57b1e0162c01a2df0ea6, 420ebc4a000000000000000000000000420ebc4a0000000000000000000000000e1801000000000000000000420ebc4a where the first set of columns before the '|' describe the object: @@ -362,7 +362,7 @@ where the first set of columns before the '|' describe the object: EM Object's event mask EV Events raised on this object F Object flags - S Object slow-work work item flags + S Object work item busy state mask (1:pending 2:running) and the second set of columns describe the object's cookie, if present: @@ -395,8 +395,8 @@ and the following paired letters: w Show objects that don't have pending writes R Show objects that have outstanding reads r Show objects that don't have outstanding reads - S Show objects that have slow work queued - s Show objects that don't have slow work queued + S Show objects that have work queued + s Show objects that don't have work queued If neither side of a letter pair is given, then both are implied. For example: diff --git a/Documentation/filesystems/isofs.txt b/Documentation/filesystems/isofs.txt index 3c367c3b3608..ba0a93384de0 100644 --- a/Documentation/filesystems/isofs.txt +++ b/Documentation/filesystems/isofs.txt @@ -41,7 +41,7 @@ Mount options unique to the isofs filesystem. sbsector=xxx Session begins from sector xxx Recommended documents about ISO 9660 standard are located at: -http://www.y-adagio.com/public/standards/iso_cdromr/tocont.htm +http://www.y-adagio.com/ ftp://ftp.ecma.ch/ecma-st/Ecma-119.pdf Quoting from the PDF "This 2nd Edition of Standard ECMA-119 is technically identical with ISO 9660.", so it is a valid and gratis substitute of the diff --git a/Documentation/filesystems/nfs/nfsroot.txt b/Documentation/filesystems/nfs/nfsroot.txt index 3ba0b945aaf8..f2430a7974e1 100644 --- a/Documentation/filesystems/nfs/nfsroot.txt +++ b/Documentation/filesystems/nfs/nfsroot.txt @@ -124,6 +124,8 @@ ip=:::::: Name of the client. May be supplied by autoconfiguration, but its absence will not trigger autoconfiguration. + If specified and DHCP is used, the user provided hostname will + be carried in the DHCP request to hopefully update DNS record. Default: Client IP address is used in ASCII notation. diff --git a/Documentation/filesystems/nilfs2.txt b/Documentation/filesystems/nilfs2.txt index d3e7673995eb..d5c0cef38a71 100644 --- a/Documentation/filesystems/nilfs2.txt +++ b/Documentation/filesystems/nilfs2.txt @@ -49,7 +49,10 @@ Mount options NILFS2 supports the following mount options: (*) == default -nobarrier Disables barriers. +barrier(*) This enables/disables the use of write barriers. This +nobarrier requires an IO stack which can support barriers, and + if nilfs gets an error on a barrier write, it will + disable again with a warning. errors=continue Keep going on a filesystem error. errors=remount-ro(*) Remount the filesystem read-only on an error. errors=panic Panic and halt the machine if an error occurs. @@ -74,9 +77,10 @@ norecovery Disable recovery of the filesystem on mount. This disables every write access on the device for read-only mounts or snapshots. This option will fail for r/w mounts on an unclean volume. -discard Issue discard/TRIM commands to the underlying block - device when blocks are freed. This is useful for SSD - devices and sparse/thinly-provisioned LUNs. +discard This enables/disables the use of discard/TRIM commands. +nodiscard(*) The discard/TRIM commands are sent to the underlying + block device when blocks are freed. This is useful + for SSD devices and sparse/thinly-provisioned LUNs. NILFS2 usage ============ diff --git a/Documentation/filesystems/porting b/Documentation/filesystems/porting index a7e9746ee7ea..b12c89538680 100644 --- a/Documentation/filesystems/porting +++ b/Documentation/filesystems/porting @@ -273,3 +273,48 @@ it's safe to remove it. If you don't need it, remove it. deliberate; as soon as struct block_device * is propagated in a reasonable way by that code fixing will become trivial; until then nothing can be done. + +[mandatory] + + block truncatation on error exit from ->write_begin, and ->direct_IO +moved from generic methods (block_write_begin, cont_write_begin, +nobh_write_begin, blockdev_direct_IO*) to callers. Take a look at +ext2_write_failed and callers for an example. + +[mandatory] + + ->truncate is going away. The whole truncate sequence needs to be +implemented in ->setattr, which is now mandatory for filesystems +implementing on-disk size changes. Start with a copy of the old inode_setattr +and vmtruncate, and the reorder the vmtruncate + foofs_vmtruncate sequence to +be in order of zeroing blocks using block_truncate_page or similar helpers, +size update and on finally on-disk truncation which should not fail. +inode_change_ok now includes the size checks for ATTR_SIZE and must be called +in the beginning of ->setattr unconditionally. + +[mandatory] + + ->clear_inode() and ->delete_inode() are gone; ->evict_inode() should +be used instead. It gets called whenever the inode is evicted, whether it has +remaining links or not. Caller does *not* evict the pagecache or inode-associated +metadata buffers; getting rid of those is responsibility of method, as it had +been for ->delete_inode(). + ->drop_inode() returns int now; it's called on final iput() with inode_lock +held and it returns true if filesystems wants the inode to be dropped. As before, +generic_drop_inode() is still the default and it's been updated appropriately. +generic_delete_inode() is also alive and it consists simply of return 1. Note that +all actual eviction work is done by caller after ->drop_inode() returns. + clear_inode() is gone; use end_writeback() instead. As before, it must +be called exactly once on each call of ->evict_inode() (as it used to be for +each call of ->delete_inode()). Unlike before, if you are using inode-associated +metadata buffers (i.e. mark_buffer_dirty_inode()), it's your responsibility to +call invalidate_inode_buffers() before end_writeback(). + No async writeback (and thus no calls of ->write_inode()) will happen +after end_writeback() returns, so actions that should not overlap with ->write_inode() +(e.g. freeing on-disk inode if i_nlink is 0) ought to be done after that call. + + NOTE: checking i_nlink in the beginning of ->write_inode() and bailing out +if it's zero is not *and* *never* *had* *been* enough. Final unlink() and iput() +may happen while the inode is in the middle of ->write_inode(); e.g. if you blindly +free the on-disk inode, you may end up doing that while ->write_inode() is writing +to it. diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt index 9fb6cbe70bde..a6aca8740883 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.txt @@ -33,7 +33,8 @@ Table of Contents 2 Modifying System Parameters 3 Per-Process Parameters - 3.1 /proc//oom_adj - Adjust the oom-killer score + 3.1 /proc//oom_adj & /proc//oom_score_adj - Adjust the oom-killer + score 3.2 /proc//oom_score - Display current oom-killer score 3.3 /proc//io - Display the IO accounting fields 3.4 /proc//coredump_filter - Core dump filtering settings @@ -73,9 +74,9 @@ contact Bodo Bauer at bb@ricochet.net. We'll be happy to add them to this document. The latest version of this document is available online at -http://skaro.nightcrawler.com/~bb/Docs/Proc as HTML version. +http://tldp.org/LDP/Linux-Filesystem-Hierarchy/html/proc.html -If the above direction does not works for you, ypu could try the kernel +If the above direction does not works for you, you could try the kernel mailing list at linux-kernel@vger.kernel.org and/or try to reach me at comandante@zaralinux.com. @@ -1234,42 +1235,64 @@ of the kernel. CHAPTER 3: PER-PROCESS PARAMETERS ------------------------------------------------------------------------------ -3.1 /proc//oom_adj - Adjust the oom-killer score ------------------------------------------------------- +3.1 /proc//oom_adj & /proc//oom_score_adj- Adjust the oom-killer score +-------------------------------------------------------------------------------- -This file can be used to adjust the score used to select which processes -should be killed in an out-of-memory situation. Giving it a high score will -increase the likelihood of this process being killed by the oom-killer. Valid -values are in the range -16 to +15, plus the special value -17, which disables -oom-killing altogether for this process. +These file can be used to adjust the badness heuristic used to select which +process gets killed in out of memory conditions. -The process to be killed in an out-of-memory situation is selected among all others -based on its badness score. This value equals the original memory size of the process -and is then updated according to its CPU time (utime + stime) and the -run time (uptime - start time). The longer it runs the smaller is the score. -Badness score is divided by the square root of the CPU time and then by -the double square root of the run time. +The badness heuristic assigns a value to each candidate task ranging from 0 +(never kill) to 1000 (always kill) to determine which process is targeted. The +units are roughly a proportion along that range of allowed memory the process +may allocate from based on an estimation of its current memory and swap use. +For example, if a task is using all allowed memory, its badness score will be +1000. If it is using half of its allowed memory, its score will be 500. -Swapped out tasks are killed first. Half of each child's memory size is added to -the parent's score if they do not share the same memory. Thus forking servers -are the prime candidates to be killed. Having only one 'hungry' child will make -parent less preferable than the child. +There is an additional factor included in the badness score: root +processes are given 3% extra memory over other tasks. -/proc//oom_score shows process' current badness score. +The amount of "allowed" memory depends on the context in which the oom killer +was called. If it is due to the memory assigned to the allocating task's cpuset +being exhausted, the allowed memory represents the set of mems assigned to that +cpuset. If it is due to a mempolicy's node(s) being exhausted, the allowed +memory represents the set of mempolicy nodes. If it is due to a memory +limit (or swap limit) being reached, the allowed memory is that configured +limit. Finally, if it is due to the entire system being out of memory, the +allowed memory represents all allocatable resources. -The following heuristics are then applied: - * if the task was reniced, its score doubles - * superuser or direct hardware access tasks (CAP_SYS_ADMIN, CAP_SYS_RESOURCE - or CAP_SYS_RAWIO) have their score divided by 4 - * if oom condition happened in one cpuset and checked process does not belong - to it, its score is divided by 8 - * the resulting score is multiplied by two to the power of oom_adj, i.e. - points <<= oom_adj when it is positive and - points >>= -(oom_adj) otherwise +The value of /proc//oom_score_adj is added to the badness score before it +is used to determine which task to kill. Acceptable values range from -1000 +(OOM_SCORE_ADJ_MIN) to +1000 (OOM_SCORE_ADJ_MAX). This allows userspace to +polarize the preference for oom killing either by always preferring a certain +task or completely disabling it. The lowest possible value, -1000, is +equivalent to disabling oom killing entirely for that task since it will always +report a badness score of 0. + +Consequently, it is very simple for userspace to define the amount of memory to +consider for each task. Setting a /proc//oom_score_adj value of +500, for +example, is roughly equivalent to allowing the remainder of tasks sharing the +same system, cpuset, mempolicy, or memory controller resources to use at least +50% more memory. A value of -500, on the other hand, would be roughly +equivalent to discounting 50% of the task's allowed memory from being considered +as scoring against the task. + +For backwards compatibility with previous kernels, /proc//oom_adj may also +be used to tune the badness score. Its acceptable values range from -16 +(OOM_ADJUST_MIN) to +15 (OOM_ADJUST_MAX) and a special value of -17 +(OOM_DISABLE) to disable oom killing entirely for that task. Its value is +scaled linearly with /proc//oom_score_adj. + +Writing to /proc//oom_score_adj or /proc//oom_adj will change the +other with its scaled value. + +NOTICE: /proc//oom_adj is deprecated and will be removed, please see +Documentation/feature-removal-schedule.txt. + +Caveat: when a parent task is selected, the oom killer will sacrifice any first +generation children with seperate address spaces instead, if possible. This +avoids servers and important system daemons from being killed and loses the +minimal amount of work. -The task with the highest badness score is then selected and its children -are killed, process itself will be killed in an OOM situation when it does -not have children or some of them disabled oom like described above. 3.2 /proc//oom_score - Display current oom-killer score ------------------------------------------------------------- diff --git a/Documentation/filesystems/squashfs.txt b/Documentation/filesystems/squashfs.txt index 203f7202cc9e..66699afd66ca 100644 --- a/Documentation/filesystems/squashfs.txt +++ b/Documentation/filesystems/squashfs.txt @@ -2,7 +2,7 @@ SQUASHFS 4.0 FILESYSTEM ======================= Squashfs is a compressed read-only filesystem for Linux. -It uses zlib compression to compress files, inodes and directories. +It uses zlib/lzo compression to compress files, inodes and directories. Inodes in the system are very small and all blocks are packed to minimise data overhead. Block sizes greater than 4K are supported up to a maximum of 1Mbytes (default block size 128K). diff --git a/Documentation/filesystems/sysfs-pci.txt b/Documentation/filesystems/sysfs-pci.txt index 85354b32d731..74eaac26f8b8 100644 --- a/Documentation/filesystems/sysfs-pci.txt +++ b/Documentation/filesystems/sysfs-pci.txt @@ -39,7 +39,7 @@ files, each with their own function. local_cpus nearby CPU mask (cpumask, ro) remove remove device from kernel's list (ascii, wo) resource PCI resource host addresses (ascii, ro) - resource0..N PCI resource N, if present (binary, mmap) + resource0..N PCI resource N, if present (binary, mmap, rw[1]) resource0_wc..N_wc PCI WC map resource N, if prefetchable (binary, mmap) rom PCI ROM resource, if present (binary, ro) subsystem_device PCI subsystem device (ascii, ro) @@ -54,13 +54,16 @@ files, each with their own function. binary - file contains binary data cpumask - file contains a cpumask type +[1] rw for RESOURCE_IO (I/O port) regions only + The read only files are informational, writes to them will be ignored, with the exception of the 'rom' file. Writable files can be used to perform actions on the device (e.g. changing config space, detaching a device). mmapable files are available via an mmap of the file at offset 0 and can be used to do actual device programming from userspace. Note that some platforms don't support mmapping of certain resources, so be sure to check the return -value from any attempted mmap. +value from any attempted mmap. The most notable of these are I/O port +resources, which also provide read/write access. The 'enable' file provides a counter that indicates how many times the device has been enabled. If the 'enable' file currently returns '4', and a '1' is diff --git a/Documentation/filesystems/sysfs.txt b/Documentation/filesystems/sysfs.txt index 931c806642c5..5d1335faec2d 100644 --- a/Documentation/filesystems/sysfs.txt +++ b/Documentation/filesystems/sysfs.txt @@ -4,7 +4,7 @@ sysfs - _The_ filesystem for exporting kernel objects. Patrick Mochel Mike Murphy -Revised: 22 February 2009 +Revised: 15 July 2010 Original: 10 January 2003 @@ -124,7 +124,7 @@ show and store methods of the attribute owners. struct sysfs_ops { ssize_t (*show)(struct kobject *, struct attribute *, char *); - ssize_t (*store)(struct kobject *, struct attribute *, const char *); + ssize_t (*store)(struct kobject *, struct attribute *, const char *, size_t); }; [ Subsystems should have already defined a struct kobj_type as a @@ -139,18 +139,22 @@ calls the associated methods. To illustrate: +#define to_dev(obj) container_of(obj, struct device, kobj) #define to_dev_attr(_attr) container_of(_attr, struct device_attribute, attr) -#define to_dev(d) container_of(d, struct device, kobj) -static ssize_t -dev_attr_show(struct kobject * kobj, struct attribute * attr, char * buf) +static ssize_t dev_attr_show(struct kobject *kobj, struct attribute *attr, + char *buf) { - struct device_attribute * dev_attr = to_dev_attr(attr); - struct device * dev = to_dev(kobj); - ssize_t ret = 0; + struct device_attribute *dev_attr = to_dev_attr(attr); + struct device *dev = to_dev(kobj); + ssize_t ret = -EIO; if (dev_attr->show) - ret = dev_attr->show(dev, buf); + ret = dev_attr->show(dev, dev_attr, buf); + if (ret >= (ssize_t)PAGE_SIZE) { + print_symbol("dev_attr_show: %s returned bad count\n", + (unsigned long)dev_attr->show); + } return ret; } @@ -163,10 +167,9 @@ To read or write attributes, show() or store() methods must be specified when declaring the attribute. The method types should be as simple as those defined for device attributes: -ssize_t (*show)(struct device * dev, struct device_attribute * attr, - char * buf); -ssize_t (*store)(struct device * dev, struct device_attribute * attr, - const char * buf); +ssize_t (*show)(struct device *dev, struct device_attribute *attr, char *buf); +ssize_t (*store)(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count); IOW, they should take only an object, an attribute, and a buffer as parameters. @@ -209,8 +212,8 @@ Other notes: - show() should always use snprintf(). -- store() should return the number of bytes used from the buffer. This - can be done using strlen(). +- store() should return the number of bytes used from the buffer. If the + entire buffer has been used, just return the count argument. - show() or store() can always return errors. If a bad value comes through, be sure to return an error. @@ -223,15 +226,18 @@ Other notes: A very simple (and naive) implementation of a device attribute is: -static ssize_t show_name(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t show_name(struct device *dev, struct device_attribute *attr, + char *buf) { return snprintf(buf, PAGE_SIZE, "%s\n", dev->name); } -static ssize_t store_name(struct device * dev, const char * buf) +static ssize_t store_name(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) { - sscanf(buf, "%20s", dev->name); - return strnlen(buf, PAGE_SIZE); + snprintf(dev->name, sizeof(dev->name), "%.*s", + (int)min(count, sizeof(dev->name) - 1), buf); + return count; } static DEVICE_ATTR(name, S_IRUGO, show_name, store_name); @@ -327,7 +333,7 @@ Structure: struct bus_attribute { struct attribute attr; ssize_t (*show)(struct bus_type *, char * buf); - ssize_t (*store)(struct bus_type *, const char * buf); + ssize_t (*store)(struct bus_type *, const char * buf, size_t count); }; Declaring: diff --git a/Documentation/filesystems/vfat.txt b/Documentation/filesystems/vfat.txt index eed520fd0c8e..ead764b2728f 100644 --- a/Documentation/filesystems/vfat.txt +++ b/Documentation/filesystems/vfat.txt @@ -165,7 +165,8 @@ TEST SUITE If you plan to make any modifications to the vfat filesystem, please get the test suite that comes with the vfat distribution at - http://bmrc.berkeley.edu/people/chaffee/vfat.html + http://web.archive.org/web/*/http://bmrc.berkeley.edu/ + people/chaffee/vfat.html This tests quite a few parts of the vfat filesystem and additional tests for new features or untested features would be appreciated. diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt index 94677e7dcb13..ed7e5efc06d8 100644 --- a/Documentation/filesystems/vfs.txt +++ b/Documentation/filesystems/vfs.txt @@ -727,7 +727,6 @@ struct file_operations { ssize_t (*aio_write) (struct kiocb *, const struct iovec *, unsigned long, loff_t); int (*readdir) (struct file *, void *, filldir_t); unsigned int (*poll) (struct file *, struct poll_table_struct *); - int (*ioctl) (struct inode *, struct file *, unsigned int, unsigned long); long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long); long (*compat_ioctl) (struct file *, unsigned int, unsigned long); int (*mmap) (struct file *, struct vm_area_struct *); @@ -768,10 +767,7 @@ otherwise noted. activity on this file and (optionally) go to sleep until there is activity. Called by the select(2) and poll(2) system calls - ioctl: called by the ioctl(2) system call - - unlocked_ioctl: called by the ioctl(2) system call. Filesystems that do not - require the BKL should use this method instead of the ioctl() above. + unlocked_ioctl: called by the ioctl(2) system call. compat_ioctl: called by the ioctl(2) system call when 32 bit system calls are used on 64 bit kernels. diff --git a/Documentation/firmware_class/hotplug-script b/Documentation/firmware_class/hotplug-script index 1990130f2ab1..8143a950b607 100644 --- a/Documentation/firmware_class/hotplug-script +++ b/Documentation/firmware_class/hotplug-script @@ -6,11 +6,12 @@ HOTPLUG_FW_DIR=/usr/lib/hotplug/firmware/ -echo 1 > /sys/$DEVPATH/loading -cat $HOTPLUG_FW_DIR/$FIRMWARE > /sys/$DEVPATH/data -echo 0 > /sys/$DEVPATH/loading - -# To cancel the load in case of error: -# -# echo -1 > /sys/$DEVPATH/loading -# +if [ "$SUBSYSTEM" == "firmware" -a "$ACTION" == "add" ]; then + if [ -f $HOTPLUG_FW_DIR/$FIRMWARE ]; then + echo 1 > /sys/$DEVPATH/loading + cat $HOTPLUG_FW_DIR/$FIRMWARE > /sys/$DEVPATH/data + echo 0 > /sys/$DEVPATH/loading + else + echo -1 > /sys/$DEVPATH/loading + fi +fi diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt index c2c6e9b39bbe..d96a6dba5748 100644 --- a/Documentation/gpio.txt +++ b/Documentation/gpio.txt @@ -158,10 +158,11 @@ and configure pullups/pulldowns appropriately.) Spinlock-Safe GPIO access ------------------------- Most GPIO controllers can be accessed with memory read/write instructions. -That doesn't need to sleep, and can safely be done from inside IRQ handlers. -(That includes hardirq contexts on RT kernels.) +Those don't need to sleep, and can safely be done from inside hard +(nonthreaded) IRQ handlers and similar contexts. -Use these calls to access such GPIOs: +Use the following calls to access such GPIOs, +for which gpio_cansleep() will always return false (see below): /* GPIO INPUT: return zero or nonzero */ int gpio_get_value(unsigned gpio); @@ -210,9 +211,31 @@ To access such GPIOs, a different set of accessors is defined: /* GPIO OUTPUT, might sleep */ void gpio_set_value_cansleep(unsigned gpio, int value); -Other than the fact that these calls might sleep, and will not be ignored -for GPIOs that can't be accessed from IRQ handlers, these calls act the -same as the spinlock-safe calls. + +Accessing such GPIOs requires a context which may sleep, for example +a threaded IRQ handler, and those accessors must be used instead of +spinlock-safe accessors without the cansleep() name suffix. + +Other than the fact that these accessors might sleep, and will work +on GPIOs that can't be accessed from hardIRQ handlers, these calls act +the same as the spinlock-safe calls. + + ** IN ADDITION ** calls to setup and configure such GPIOs must be made +from contexts which may sleep, since they may need to access the GPIO +controller chip too: (These setup calls are usually made from board +setup or driver probe/teardown code, so this is an easy constraint.) + + gpio_direction_input() + gpio_direction_output() + gpio_request() + +## gpio_request_one() +## gpio_request_array() +## gpio_free_array() + + gpio_free() + gpio_set_debounce() + Claiming and Releasing GPIOs diff --git a/Documentation/hwmon/adm1026 b/Documentation/hwmon/adm1026 index f4327db2307e..d8fabe0c23ac 100644 --- a/Documentation/hwmon/adm1026 +++ b/Documentation/hwmon/adm1026 @@ -6,7 +6,7 @@ Supported chips: Prefix: 'adm1026' Addresses scanned: I2C 0x2c, 0x2d, 0x2e Datasheet: Publicly available at the Analog Devices website - http://www.analog.com/en/prod/0,,766_825_ADM1026,00.html + http://www.onsemi.com/PowerSolutions/product.do?id=ADM1026 Authors: Philip Pokorny for Penguin Computing diff --git a/Documentation/hwmon/coretemp b/Documentation/hwmon/coretemp index 92267b62db59..25568f844804 100644 --- a/Documentation/hwmon/coretemp +++ b/Documentation/hwmon/coretemp @@ -21,8 +21,8 @@ Temperature is measured in degrees Celsius and measurement resolution is 1 degree C. Valid temperatures are from 0 to TjMax degrees C, because the actual value of temperature register is in fact a delta from TjMax. -Temperature known as TjMax is the maximum junction temperature of processor. -Intel defines this temperature as 85C or 100C. At this temperature, protection +Temperature known as TjMax is the maximum junction temperature of processor, +which depends on the CPU model. See table below. At this temperature, protection mechanism will perform actions to forcibly cool down the processor. Alarm may be raised, if the temperature grows enough (more than TjMax) to trigger the Out-Of-Spec bit. Following table summarizes the exported sysfs files: @@ -38,3 +38,104 @@ temp1_label - Contains string "Core X", where X is processor The TjMax temperature is set to 85 degrees C if undocumented model specific register (UMSR) 0xee has bit 30 set. If not the TjMax is 100 degrees C as (sometimes) documented in processor datasheet. + +Appendix A. Known TjMax lists (TBD): +Some information comes from ark.intel.com + +Process Processor TjMax(C) + +32nm Core i3/i5/i7 Processors + i7 660UM/640/620, 640LM/620, 620M, 610E 105 + i5 540UM/520/430, 540M/520/450/430 105 + i3 330E, 370M/350/330 90 rPGA, 105 BGA + i3 330UM 105 + +32nm Core i7 Extreme Processors + 980X 100 + +32nm Celeron Processors + U3400 105 + P4505/P4500 90 + +45nm Xeon Processors 5400 Quad-Core + X5492, X5482, X5472, X5470, X5460, X5450 85 + E5472, E5462, E5450/40/30/20/10/05 85 + L5408 95 + L5430, L5420, L5410 70 + +45nm Xeon Processors 5200 Dual-Core + X5282, X5272, X5270, X5260 90 + E5240 90 + E5205, E5220 70, 90 + L5240 70 + L5238, L5215 95 + +45nm Atom Processors + D525/510/425/410 100 + Z560/550/540/530P/530/520PT/520/515/510PT/510P 90 + Z510/500 90 + N475/470/455/450 100 + N280/270 90 + 330/230 125 + +45nm Core2 Processors + Solo ULV SU3500/3300 100 + T9900/9800/9600/9550/9500/9400/9300/8300/8100 105 + T6670/6500/6400 105 + T6600 90 + SU9600/9400/9300 105 + SP9600/9400 105 + SL9600/9400/9380/9300 105 + P9700/9600/9500/8800/8700/8600/8400/7570 105 + P7550/7450 90 + +45nm Core2 Quad Processors + Q9100/9000 100 + +45nm Core2 Extreme Processors + X9100/9000 105 + QX9300 100 + +45nm Core i3/i5/i7 Processors + i7 940XM/920 100 + i7 840QM/820/740/720 100 + +45nm Celeron Processors + SU2300 100 + 900 105 + +65nm Core2 Duo Processors + Solo U2200, U2100 100 + U7700/7600/7500 100 + T7800/7700/7600/7500/7400/7300/7250/7200/7100 100 + T5870/5670/5600/5550/5500/5470/5450/5300/5270 100 + T5250 100 + T5800/5750/5200 85 + L7700/7500/7400/7300/7200 100 + +65nm Core2 Extreme Processors + X7900/7800 100 + +65nm Core Duo Processors + U2500/2400 100 + T2700/2600/2450/2400/2350/2300E/2300/2250/2050 100 + L2500/2400/2300 100 + +65nm Core Solo Processors + U1500/1400/1300 100 + T1400/1350/1300/1250 100 + +65nm Xeon Processors 5000 Quad-Core + X5000 90-95 + E5000 80 + L5000 70 + L5318 95 + +65nm Xeon Processors 5000 Dual-Core + 5080, 5063, 5060, 5050, 5030 80-90 + 5160, 5150, 5148, 5140, 5130, 5120, 5110 80 + L5138 100 + +65nm Celeron Processors + T1700/1600 100 + 560/550/540/530 100 diff --git a/Documentation/hwmon/emc2103 b/Documentation/hwmon/emc2103 new file mode 100644 index 000000000000..a12b2c127140 --- /dev/null +++ b/Documentation/hwmon/emc2103 @@ -0,0 +1,33 @@ +Kernel driver emc2103 +====================== + +Supported chips: + * SMSC EMC2103 + Addresses scanned: I2C 0x2e + Prefix: 'emc2103' + Datasheet: Not public + +Authors: + Steve Glendinning + +Description +----------- + +The Standard Microsystems Corporation (SMSC) EMC2103 chips +contain up to 4 temperature sensors and a single fan controller. + +Fan rotation speeds are reported in RPM (rotations per minute). An alarm is +triggered if the rotation speed has dropped below a programmable limit. Fan +readings can be divided by a programmable divider (1, 2, 4 or 8) to give +the readings more range or accuracy. Not all RPM values can accurately be +represented, so some rounding is done. With a divider of 1, the lowest +representable value is 480 RPM. + +This driver supports RPM based control, to use this a fan target +should be written to fan1_target and pwm1_enable should be set to 3. + +The 2103-2 and 2103-4 variants have a third temperature sensor, which can +be connected to two anti-parallel diodes. These values can be read +as temp3 and temp4. If only one diode is attached to this channel, temp4 +will show as "fault". The module parameter "apd=0" can be used to suppress +this 4th channel when anti-parallel diodes are not fitted. diff --git a/Documentation/hwmon/f71882fg b/Documentation/hwmon/f71882fg index a7952c2bd959..1a07fd674cd0 100644 --- a/Documentation/hwmon/f71882fg +++ b/Documentation/hwmon/f71882fg @@ -2,6 +2,10 @@ Kernel driver f71882fg ====================== Supported chips: + * Fintek F71808E + Prefix: 'f71808fg' + Addresses scanned: none, address read from Super I/O config space + Datasheet: Not public * Fintek F71858FG Prefix: 'f71858fg' Addresses scanned: none, address read from Super I/O config space diff --git a/Documentation/hwmon/g760a b/Documentation/hwmon/g760a index e032eeb75629..cfc894537061 100644 --- a/Documentation/hwmon/g760a +++ b/Documentation/hwmon/g760a @@ -5,7 +5,7 @@ Supported chips: * Global Mixed-mode Technology Inc. G760A Prefix: 'g760a' Datasheet: Publicly available at the GMT website - http://www.gmt.com.tw/datasheet/g760a.pdf + http://www.gmt.com.tw/product/datasheet/EDS-760A.pdf Author: Herbert Valerio Riedel diff --git a/Documentation/hwmon/gl518sm b/Documentation/hwmon/gl518sm index 229f8b789185..26f9f3c02dc7 100644 --- a/Documentation/hwmon/gl518sm +++ b/Documentation/hwmon/gl518sm @@ -5,11 +5,10 @@ Supported chips: * Genesys Logic GL518SM release 0x00 Prefix: 'gl518sm' Addresses scanned: I2C 0x2c and 0x2d - Datasheet: http://www.genesyslogic.com/pdf * Genesys Logic GL518SM release 0x80 Prefix: 'gl518sm' Addresses scanned: I2C 0x2c and 0x2d - Datasheet: http://www.genesyslogic.com/pdf + Datasheet: http://www.genesyslogic.com/ Authors: Frodo Looijaard , diff --git a/Documentation/hwmon/hpfall.c b/Documentation/hwmon/hpfall.c index 681ec22b9d0e..a4a8fc5d05d4 100644 --- a/Documentation/hwmon/hpfall.c +++ b/Documentation/hwmon/hpfall.c @@ -1,7 +1,7 @@ /* Disk protection for HP machines. * * Copyright 2008 Eric Piel - * Copyright 2009 Pavel Machek + * Copyright 2009 Pavel Machek * * GPLv2. */ diff --git a/Documentation/hwmon/jc42 b/Documentation/hwmon/jc42 new file mode 100644 index 000000000000..0e76ef12e4c6 --- /dev/null +++ b/Documentation/hwmon/jc42 @@ -0,0 +1,97 @@ +Kernel driver jc42 +================== + +Supported chips: + * Analog Devices ADT7408 + Prefix: 'adt7408' + Addresses scanned: I2C 0x18 - 0x1f + Datasheets: + http://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf + * IDT TSE2002B3, TS3000B3 + Prefix: 'tse2002b3', 'ts3000b3' + Addresses scanned: I2C 0x18 - 0x1f + Datasheets: + http://www.idt.com/products/getdoc.cfm?docid=18715691 + http://www.idt.com/products/getdoc.cfm?docid=18715692 + * Maxim MAX6604 + Prefix: 'max6604' + Addresses scanned: I2C 0x18 - 0x1f + Datasheets: + http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf + * Microchip MCP9805, MCP98242, MCP98243, MCP9843 + Prefixes: 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843' + Addresses scanned: I2C 0x18 - 0x1f + Datasheets: + http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf + http://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf + http://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf + * NXP Semiconductors SE97, SE97B + Prefix: 'se97' + Addresses scanned: I2C 0x18 - 0x1f + Datasheets: + http://www.nxp.com/documents/data_sheet/SE97.pdf + http://www.nxp.com/documents/data_sheet/SE97B.pdf + * NXP Semiconductors SE98 + Prefix: 'se98' + Addresses scanned: I2C 0x18 - 0x1f + Datasheets: + http://www.nxp.com/documents/data_sheet/SE98.pdf + * ON Semiconductor CAT34TS02, CAT6095 + Prefix: 'cat34ts02', 'cat6095' + Addresses scanned: I2C 0x18 - 0x1f + Datasheet: + http://www.onsemi.com/pub_link/Collateral/CAT34TS02-D.PDF + http://www.onsemi.com/pub/Collateral/CAT6095-D.PDF + * ST Microelectronics STTS424, STTS424E02 + Prefix: 'stts424' + Addresses scanned: I2C 0x18 - 0x1f + Datasheets: + http://www.st.com/stonline/products/literature/ds/13447/stts424.pdf + http://www.st.com/stonline/products/literature/ds/13448/stts424e02.pdf + * JEDEC JC 42.4 compliant temperature sensor chips + Prefix: 'jc42' + Addresses scanned: I2C 0x18 - 0x1f + Datasheet: - + +Author: + Guenter Roeck + + +Description +----------- + +This driver implements support for JEDEC JC 42.4 compliant temperature sensors. +The driver auto-detects the chips listed above, but can be manually instantiated +to support other JC 42.4 compliant chips. + +Example: the following will load the driver for a generic JC 42.4 compliant +temperature sensor at address 0x18 on I2C bus #1: + +# modprobe jc42 +# echo jc42 0x18 > /sys/bus/i2c/devices/i2c-1/new_device + +A JC 42.4 compliant chip supports a single temperature sensor. Minimum, maximum, +and critical temperature can be configured. There are alarms for high, low, +and critical thresholds. + +There is also an hysteresis to control the thresholds for resetting alarms. +Per JC 42.4 specification, the hysteresis threshold can be configured to 0, 1.5, +3.0, and 6.0 degrees C. Configured hysteresis values will be rounded to those +limits. The chip supports only a single register to configure the hysteresis, +which applies to all limits. This register can be written by writing into +temp1_crit_hyst. Other hysteresis attributes are read-only. + +Sysfs entries +------------- + +temp1_input Temperature (RO) +temp1_min Minimum temperature (RW) +temp1_max Maximum temperature (RW) +temp1_crit Critical high temperature (RW) + +temp1_crit_hyst Critical hysteresis temperature (RW) +temp1_max_hyst Maximum hysteresis temperature (RO) + +temp1_min_alarm Temperature low alarm +temp1_max_alarm Temperature high alarm +temp1_crit_alarm Temperature critical alarm diff --git a/Documentation/hwmon/k8temp b/Documentation/hwmon/k8temp index 0005c7166146..716dc24c7237 100644 --- a/Documentation/hwmon/k8temp +++ b/Documentation/hwmon/k8temp @@ -5,7 +5,7 @@ Supported chips: * AMD Athlon64/FX or Opteron CPUs Prefix: 'k8temp' Addresses scanned: PCI space - Datasheet: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf + Datasheet: http://support.amd.com/us/Processor_TechDocs/32559.pdf Author: Rudolf Marek Contact: Rudolf Marek diff --git a/Documentation/hwmon/lm85 b/Documentation/hwmon/lm85 index a76aefeeb68a..b98e0e0d1910 100644 --- a/Documentation/hwmon/lm85 +++ b/Documentation/hwmon/lm85 @@ -9,15 +9,15 @@ Supported chips: * Analog Devices ADM1027 Prefix: 'adm1027' Addresses scanned: I2C 0x2c, 0x2d, 0x2e - Datasheet: http://www.analog.com/en/prod/0,,766_825_ADM1027,00.html + Datasheet: http://www.onsemi.com/PowerSolutions/product.do?id=ADM1027 * Analog Devices ADT7463 Prefix: 'adt7463' Addresses scanned: I2C 0x2c, 0x2d, 0x2e - Datasheet: http://www.analog.com/en/prod/0,,766_825_ADT7463,00.html + Datasheet: http://www.onsemi.com/PowerSolutions/product.do?id=ADT7463 * SMSC EMC6D100, SMSC EMC6D101 Prefix: 'emc6d100' Addresses scanned: I2C 0x2c, 0x2d, 0x2e - Datasheet: http://www.smsc.com/main/tools/discontinued/6d100.pdf + Datasheet: http://www.smsc.com/media/Downloads_Public/discontinued/6d100.pdf * SMSC EMC6D102 Prefix: 'emc6d102' Addresses scanned: I2C 0x2c, 0x2d, 0x2e diff --git a/Documentation/hwmon/ltc4245 b/Documentation/hwmon/ltc4245 index 86b5880d8502..b478b0864965 100644 --- a/Documentation/hwmon/ltc4245 +++ b/Documentation/hwmon/ltc4245 @@ -72,9 +72,31 @@ in6_min_alarm 5v output undervoltage alarm in7_min_alarm 3v output undervoltage alarm in8_min_alarm Vee (-12v) output undervoltage alarm -in9_input GPIO voltage data +in9_input GPIO voltage data (see note 1) +in10_input GPIO voltage data (see note 1) +in11_input GPIO voltage data (see note 1) power1_input 12v power usage (mW) power2_input 5v power usage (mW) power3_input 3v power usage (mW) power4_input Vee (-12v) power usage (mW) + + +Note 1 +------ + +If you have NOT configured the driver to sample all GPIO pins as analog +voltages, then the in10_input and in11_input sysfs attributes will not be +created. The driver will sample the GPIO pin that is currently connected to the +ADC as an analog voltage, and report the value in in9_input. + +If you have configured the driver to sample all GPIO pins as analog voltages, +then they will be sampled in round-robin fashion. If userspace reads too +slowly, -EAGAIN will be returned when you read the sysfs attribute containing +the sensor reading. + +The LTC4245 chip can be configured to sample all GPIO pins with two methods: +1) platform data -- see include/linux/i2c/ltc4245.h +2) OF device tree -- add the "ltc4245,use-extra-gpios" property to each chip + +The default mode of operation is to sample a single GPIO pin. diff --git a/Documentation/hwmon/pc87427 b/Documentation/hwmon/pc87427 index db5cc1227a83..8fdd08c9e48b 100644 --- a/Documentation/hwmon/pc87427 +++ b/Documentation/hwmon/pc87427 @@ -18,10 +18,11 @@ Description The National Semiconductor Super I/O chip includes complete hardware monitoring capabilities. It can monitor up to 18 voltages, 8 fans and -6 temperature sensors. Only the fans are supported at the moment. +6 temperature sensors. Only the fans and temperatures are supported at +the moment, voltages aren't. -This chip also has fan controlling features, which are not yet supported -by this driver either. +This chip also has fan controlling features (up to 4 PWM outputs), +which are partly supported by this driver. The driver assumes that no more than one chip is present, which seems reasonable. @@ -36,3 +37,23 @@ signal. Speeds down to 83 RPM can be measured. An alarm is triggered if the rotation speed drops below a programmable limit. Another alarm is triggered if the speed is too low to be measured (including stalled or missing fan). + + +Fan Speed Control +----------------- + +Fan speed can be controlled by PWM outputs. There are 4 possible modes: +always off, always on, manual and automatic. The latter isn't supported +by the driver: you can only return to that mode if it was the original +setting, and the configuration interface is missing. + + +Temperature Monitoring +---------------------- + +The PC87427 relies on external sensors (following the SensorPath +standard), so the resolution and range depend on the type of sensor +connected. The integer part can be 8-bit or 9-bit, and can be signed or +not. I couldn't find a way to figure out the external sensor data +temperature format, so user-space adjustment (typically by a factor 2) +may be required. diff --git a/Documentation/hwmon/pkgtemp b/Documentation/hwmon/pkgtemp new file mode 100644 index 000000000000..c8e1fb0fadd3 --- /dev/null +++ b/Documentation/hwmon/pkgtemp @@ -0,0 +1,36 @@ +Kernel driver pkgtemp +====================== + +Supported chips: + * Intel family + Prefix: 'pkgtemp' + CPUID: + Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual + Volume 3A: System Programming Guide + +Author: Fenghua Yu + +Description +----------- + +This driver permits reading package level temperature sensor embedded inside +Intel CPU package. The sensors can be in core, uncore, memory controller, or +other components in a package. The feature is first implemented in Intel Sandy +Bridge platform. + +Temperature is measured in degrees Celsius and measurement resolution is +1 degree C. Valid temperatures are from 0 to TjMax degrees C, because the actual +value of temperature register is in fact a delta from TjMax. + +Temperature known as TjMax is the maximum junction temperature of package. +We get this from MSR_IA32_TEMPERATURE_TARGET. If the MSR is not accessible, +we define TjMax as 100 degrees Celsius. At this temperature, protection +mechanism will perform actions to forcibly cool down the package. Alarm +may be raised, if the temperature grows enough (more than TjMax) to trigger +the Out-Of-Spec bit. Following table summarizes the exported sysfs files: + +temp1_input - Package temperature (in millidegrees Celsius). +temp1_max - All cooling devices should be turned on. +temp1_crit - Maximum junction temperature (in millidegrees Celsius). +temp1_crit_alarm - Set when Out-of-spec bit is set, never clears. + Correct CPU operation is no longer guaranteed. diff --git a/Documentation/hwmon/smm665 b/Documentation/hwmon/smm665 new file mode 100644 index 000000000000..3820fc9ca52d --- /dev/null +++ b/Documentation/hwmon/smm665 @@ -0,0 +1,157 @@ +Kernel driver smm665 +==================== + +Supported chips: + * Summit Microelectronics SMM465 + Prefix: 'smm465' + Addresses scanned: - + Datasheet: + http://www.summitmicro.com/prod_select/summary/SMM465/SMM465DS.pdf + * Summit Microelectronics SMM665, SMM665B + Prefix: 'smm665' + Addresses scanned: - + Datasheet: + http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf + * Summit Microelectronics SMM665C + Prefix: 'smm665c' + Addresses scanned: - + Datasheet: + http://www.summitmicro.com/prod_select/summary/SMM665C/SMM665C_2125.pdf + * Summit Microelectronics SMM764 + Prefix: 'smm764' + Addresses scanned: - + Datasheet: + http://www.summitmicro.com/prod_select/summary/SMM764/SMM764_2098.pdf + * Summit Microelectronics SMM766, SMM766B + Prefix: 'smm766' + Addresses scanned: - + Datasheets: + http://www.summitmicro.com/prod_select/summary/SMM766/SMM766_2086.pdf + http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf + +Author: Guenter Roeck + + +Module Parameters +----------------- + +* vref: int + Default: 1250 (mV) + Reference voltage on VREF_ADC pin in mV. It should not be necessary to set + this parameter unless a non-default reference voltage is used. + + +Description +----------- + +[From datasheet] The SMM665 is an Active DC Output power supply Controller +that monitors, margins and cascade sequences power. The part monitors six +power supply channels as well as VDD, 12V input, two general-purpose analog +inputs and an internal temperature sensor using a 10-bit ADC. + +Each monitored channel has its own high and low limits, plus a critical +limit. + +Support for SMM465, SMM764, and SMM766 has been implemented but is untested. + + +Usage Notes +----------- + +This driver does not probe for devices, since there is no register which +can be safely used to identify the chip. You will have to instantiate +the devices explicitly. When instantiating the device, you have to specify +its configuration register address. + +Example: the following will load the driver for an SMM665 at address 0x57 +on I2C bus #1: +$ modprobe smm665 +$ echo smm665 0x57 > /sys/bus/i2c/devices/i2c-1/new_device + + +Sysfs entries +------------- + +This driver uses the values in the datasheet to convert ADC register values +into the values specified in the sysfs-interface document. All attributes are +read only. + +Min, max, lcrit, and crit values are used by the chip to trigger external signals +and/or other activity. Triggered signals can include HEALTHY, RST, Power Off, +or Fault depending on the chip configuration. The driver reports values as lcrit +or crit if exceeding the limits triggers RST, Power Off, or Fault, and as min or +max otherwise. For details please see the SMM665 datasheet. + +For SMM465 and SMM764, values for Channel E and F are reported but undefined. + +in1_input 12V input voltage (mV) +in2_input 3.3V (VDD) input voltage (mV) +in3_input Channel A voltage (mV) +in4_input Channel B voltage (mV) +in5_input Channel C voltage (mV) +in6_input Channel D voltage (mV) +in7_input Channel E voltage (mV) +in8_input Channel F voltage (mV) +in9_input AIN1 voltage (mV) +in10_input AIN2 voltage (mV) + +in1_min 12v input minimum voltage (mV) +in2_min 3.3V (VDD) input minimum voltage (mV) +in3_min Channel A minimum voltage (mV) +in4_min Channel B minimum voltage (mV) +in5_min Channel C minimum voltage (mV) +in6_min Channel D minimum voltage (mV) +in7_min Channel E minimum voltage (mV) +in8_min Channel F minimum voltage (mV) +in9_min AIN1 minimum voltage (mV) +in10_min AIN2 minimum voltage (mV) + +in1_max 12v input maximum voltage (mV) +in2_max 3.3V (VDD) input maximum voltage (mV) +in3_max Channel A maximum voltage (mV) +in4_max Channel B maximum voltage (mV) +in5_max Channel C maximum voltage (mV) +in6_max Channel D maximum voltage (mV) +in7_max Channel E maximum voltage (mV) +in8_max Channel F maximum voltage (mV) +in9_max AIN1 maximum voltage (mV) +in10_max AIN2 maximum voltage (mV) + +in1_lcrit 12v input critical minimum voltage (mV) +in2_lcrit 3.3V (VDD) input critical minimum voltage (mV) +in3_lcrit Channel A critical minimum voltage (mV) +in4_lcrit Channel B critical minimum voltage (mV) +in5_lcrit Channel C critical minimum voltage (mV) +in6_lcrit Channel D critical minimum voltage (mV) +in7_lcrit Channel E critical minimum voltage (mV) +in8_lcrit Channel F critical minimum voltage (mV) +in9_lcrit AIN1 critical minimum voltage (mV) +in10_lcrit AIN2 critical minimum voltage (mV) + +in1_crit 12v input critical maximum voltage (mV) +in2_crit 3.3V (VDD) input critical maximum voltage (mV) +in3_crit Channel A critical maximum voltage (mV) +in4_crit Channel B critical maximum voltage (mV) +in5_crit Channel C critical maximum voltage (mV) +in6_crit Channel D critical maximum voltage (mV) +in7_crit Channel E critical maximum voltage (mV) +in8_crit Channel F critical maximum voltage (mV) +in9_crit AIN1 critical maximum voltage (mV) +in10_crit AIN2 critical maximum voltage (mV) + +in1_crit_alarm 12v input critical alarm +in2_crit_alarm 3.3V (VDD) input critical alarm +in3_crit_alarm Channel A critical alarm +in4_crit_alarm Channel B critical alarm +in5_crit_alarm Channel C critical alarm +in6_crit_alarm Channel D critical alarm +in7_crit_alarm Channel E critical alarm +in8_crit_alarm Channel F critical alarm +in9_crit_alarm AIN1 critical alarm +in10_crit_alarm AIN2 critical alarm + +temp1_input Chip tempererature +temp1_min Mimimum chip tempererature +temp1_max Maximum chip tempererature +temp1_crit Critical chip tempererature +temp1_crit_alarm Temperature critical alarm diff --git a/Documentation/hwmon/smsc47m1 b/Documentation/hwmon/smsc47m1 index 42c8431b3c9d..2a13378dcf22 100644 --- a/Documentation/hwmon/smsc47m1 +++ b/Documentation/hwmon/smsc47m1 @@ -7,13 +7,10 @@ Supported chips: Addresses scanned: none, address read from Super I/O config space Prefix: 'smsc47m1' Datasheets: - http://www.smsc.com/main/datasheets/47b27x.pdf - http://www.smsc.com/main/datasheets/47m10x.pdf - http://www.smsc.com/main/datasheets/47m112.pdf - http://www.smsc.com/main/tools/discontinued/47m13x.pdf - http://www.smsc.com/main/datasheets/47m14x.pdf - http://www.smsc.com/main/tools/discontinued/47m15x.pdf - http://www.smsc.com/main/datasheets/47m192.pdf + http://www.smsc.com/media/Downloads_Public/Data_Sheets/47b272.pdf + http://www.smsc.com/media/Downloads_Public/Data_Sheets/47m10x.pdf + http://www.smsc.com/media/Downloads_Public/Data_Sheets/47m112.pdf + http://www.smsc.com/ * SMSC LPC47M292 Addresses scanned: none, address read from Super I/O config space Prefix: 'smsc47m2' diff --git a/Documentation/hwmon/sysfs-interface b/Documentation/hwmon/sysfs-interface index d4e2917c6f18..ff45d1f837c8 100644 --- a/Documentation/hwmon/sysfs-interface +++ b/Documentation/hwmon/sysfs-interface @@ -107,10 +107,24 @@ in[0-*]_min Voltage min value. Unit: millivolt RW +in[0-*]_lcrit Voltage critical min value. + Unit: millivolt + RW + If voltage drops to or below this limit, the system may + take drastic action such as power down or reset. At the very + least, it should report a fault. + in[0-*]_max Voltage max value. Unit: millivolt RW +in[0-*]_crit Voltage critical max value. + Unit: millivolt + RW + If voltage reaches or exceeds this limit, the system may + take drastic action such as power down or reset. At the very + least, it should report a fault. + in[0-*]_input Voltage input value. Unit: millivolt RO @@ -284,7 +298,7 @@ temp[1-*]_input Temperature input value. Unit: millidegree Celsius RO -temp[1-*]_crit Temperature critical value, typically greater than +temp[1-*]_crit Temperature critical max value, typically greater than corresponding temp_max values. Unit: millidegree Celsius RW @@ -296,6 +310,11 @@ temp[1-*]_crit_hyst from the critical value. RW +temp[1-*]_lcrit Temperature critical min value, typically lower than + corresponding temp_min values. + Unit: millidegree Celsius + RW + temp[1-*]_offset Temperature offset which is added to the temperature reading by the chip. @@ -344,9 +363,6 @@ Also see the Alarms section for status flags associated with temperatures. * Currents * ************ -Note that no known chip provides current measurements as of writing, -so this part is theoretical, so to say. - curr[1-*]_max Current max value Unit: milliampere RW @@ -471,6 +487,7 @@ limit-related alarms, not both. The driver should just reflect the hardware implementation. in[0-*]_alarm +curr[1-*]_alarm fan[1-*]_alarm temp[1-*]_alarm Channel alarm @@ -482,6 +499,8 @@ OR in[0-*]_min_alarm in[0-*]_max_alarm +curr[1-*]_min_alarm +curr[1-*]_max_alarm fan[1-*]_min_alarm fan[1-*]_max_alarm temp[1-*]_min_alarm @@ -497,7 +516,6 @@ to notify open diodes, unconnected fans etc. where the hardware supports it. When this boolean has value 1, the measurement for that channel should not be trusted. -in[0-*]_fault fan[1-*]_fault temp[1-*]_fault Input fault condition @@ -513,6 +531,7 @@ beep_enable Master beep enable RW in[0-*]_beep +curr[1-*]_beep fan[1-*]_beep temp[1-*]_beep Channel beep diff --git a/Documentation/hwmon/thmc50 b/Documentation/hwmon/thmc50 index 9639ca93d559..8a7772ade8d0 100644 --- a/Documentation/hwmon/thmc50 +++ b/Documentation/hwmon/thmc50 @@ -9,7 +9,7 @@ Supported chips: * Texas Instruments THMC50 Prefix: 'thmc50' Addresses scanned: I2C 0x2c - 0x2e - Datasheet: http://focus.ti.com/docs/prod/folders/print/thmc50.html + Datasheet: http://www.ti.com/ Author: Krzysztof Helt diff --git a/Documentation/hwmon/via686a b/Documentation/hwmon/via686a index d651b25f7519..e5f90ab5c48d 100644 --- a/Documentation/hwmon/via686a +++ b/Documentation/hwmon/via686a @@ -5,7 +5,7 @@ Supported chips: * Via VT82C686A, VT82C686B Southbridge Integrated Hardware Monitor Prefix: 'via686a' Addresses scanned: ISA in PCI-space encoded address - Datasheet: On request through web form (http://www.via.com.tw/en/support/datasheets/) + Datasheet: On request through web form (http://www.via.com.tw/en/resources/download-center/) Authors: Kyösti Mälkki , diff --git a/Documentation/hwmon/w83627ehf b/Documentation/hwmon/w83627ehf index b7e42ec4b26b..13d556112fc0 100644 --- a/Documentation/hwmon/w83627ehf +++ b/Documentation/hwmon/w83627ehf @@ -20,6 +20,10 @@ Supported chips: Prefix: 'w83667hg' Addresses scanned: ISA address retrieved from Super I/O registers Datasheet: not available + * Winbond W83667HG-B + Prefix: 'w83667hg' + Addresses scanned: ISA address retrieved from Super I/O registers + Datasheet: Available from Nuvoton upon request Authors: Jean Delvare @@ -32,8 +36,8 @@ Description ----------- This driver implements support for the Winbond W83627EHF, W83627EHG, -W83627DHG, W83627DHG-P and W83667HG super I/O chips. We will refer to them -collectively as Winbond chips. +W83627DHG, W83627DHG-P, W83667HG and W83667HG-B super I/O chips. +We will refer to them collectively as Winbond chips. The chips implement three temperature sensors, five fan rotation speed sensors, ten analog voltage sensors (only nine for the 627DHG), one @@ -68,14 +72,15 @@ follows: temp1 -> pwm1 temp2 -> pwm2 temp3 -> pwm3 -prog -> pwm4 (not on 667HG; the programmable setting is not supported by - the driver) +prog -> pwm4 (not on 667HG and 667HG-B; the programmable setting is not + supported by the driver) /sys files ---------- name - this is a standard hwmon device entry. For the W83627EHF and W83627EHG, - it is set to "w83627ehf" and for the W83627DHG it is set to "w83627dhg" + it is set to "w83627ehf", for the W83627DHG it is set to "w83627dhg", + and for the W83667HG it is set to "w83667hg". pwm[1-4] - this file stores PWM duty cycle or DC value (fan speed) in range: 0 (stop) to 255 (full) diff --git a/Documentation/hwmon/w83627hf b/Documentation/hwmon/w83627hf index 44dd2bcc72bd..fb145e5e722a 100644 --- a/Documentation/hwmon/w83627hf +++ b/Documentation/hwmon/w83627hf @@ -5,23 +5,19 @@ Supported chips: * Winbond W83627HF (ISA accesses ONLY) Prefix: 'w83627hf' Addresses scanned: ISA address retrieved from Super I/O registers - Datasheet: http://www.winbond.com/PDF/sheet/w83627hf.pdf * Winbond W83627THF Prefix: 'w83627thf' Addresses scanned: ISA address retrieved from Super I/O registers - Datasheet: http://www.winbond.com/PDF/sheet/w83627thf.pdf * Winbond W83697HF Prefix: 'w83697hf' Addresses scanned: ISA address retrieved from Super I/O registers - Datasheet: http://www.winbond.com/PDF/sheet/697hf.pdf * Winbond W83637HF Prefix: 'w83637hf' Addresses scanned: ISA address retrieved from Super I/O registers - Datasheet: http://www.winbond.com/PDF/sheet/w83637hf.pdf * Winbond W83687THF Prefix: 'w83687thf' Addresses scanned: ISA address retrieved from Super I/O registers - Datasheet: Provided by Winbond on request + Datasheet: Provided by Winbond on request(http://www.winbond.com/hq/enu) Authors: Frodo Looijaard , diff --git a/Documentation/hwmon/w83781d b/Documentation/hwmon/w83781d index c91e0b63ea1d..ecbc1e4574b4 100644 --- a/Documentation/hwmon/w83781d +++ b/Documentation/hwmon/w83781d @@ -9,7 +9,7 @@ Supported chips: * Winbond W83782D Prefix: 'w83782d' Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) - Datasheet: http://www.winbond.com/PDF/sheet/w83782d.pdf + Datasheet: http://www.winbond.com * Winbond W83783S Prefix: 'w83783s' Addresses scanned: I2C 0x2d diff --git a/Documentation/hwmon/w83792d b/Documentation/hwmon/w83792d index 14a668ed8aaa..8a023ce0b72e 100644 --- a/Documentation/hwmon/w83792d +++ b/Documentation/hwmon/w83792d @@ -5,7 +5,7 @@ Supported chips: * Winbond W83792D Prefix: 'w83792d' Addresses scanned: I2C 0x2c - 0x2f - Datasheet: http://www.winbond.com.tw/E-WINBONDHTM/partner/PDFresult.asp?Pname=1035 + Datasheet: http://www.winbond.com.tw Author: Chunhao Huang Contact: DZShen diff --git a/Documentation/i2c/busses/i2c-ali1535 b/Documentation/i2c/busses/i2c-ali1535 index acbc65a08097..5d46342e486a 100644 --- a/Documentation/i2c/busses/i2c-ali1535 +++ b/Documentation/i2c/busses/i2c-ali1535 @@ -3,7 +3,7 @@ Kernel driver i2c-ali1535 Supported adapters: * Acer Labs, Inc. ALI 1535 (south bridge) Datasheet: Now under NDA - http://www.ali.com.tw/eng/support/datasheet_request.php + http://www.ali.com.tw/ Authors: Frodo Looijaard , diff --git a/Documentation/i2c/busses/i2c-ali1563 b/Documentation/i2c/busses/i2c-ali1563 index 54691698d2dd..41b1a077e4c7 100644 --- a/Documentation/i2c/busses/i2c-ali1563 +++ b/Documentation/i2c/busses/i2c-ali1563 @@ -3,7 +3,7 @@ Kernel driver i2c-ali1563 Supported adapters: * Acer Labs, Inc. ALI 1563 (south bridge) Datasheet: Now under NDA - http://www.ali.com.tw/eng/support/datasheet_request.php + http://www.ali.com.tw/ Author: Patrick Mochel diff --git a/Documentation/i2c/busses/i2c-ali15x3 b/Documentation/i2c/busses/i2c-ali15x3 index 600da90b8f12..42888d8ac124 100644 --- a/Documentation/i2c/busses/i2c-ali15x3 +++ b/Documentation/i2c/busses/i2c-ali15x3 @@ -3,7 +3,7 @@ Kernel driver i2c-ali15x3 Supported adapters: * Acer Labs, Inc. ALI 1533 and 1543C (south bridge) Datasheet: Now under NDA - http://www.ali.com.tw/eng/support/datasheet_request.php + http://www.ali.com.tw/ Authors: Frodo Looijaard , diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index ac540c71c7eb..475bb4ae0720 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 @@ -97,4 +97,4 @@ of all affected systems, so the only safe solution was to prevent access to the SMBus on all IBM systems (detected using DMI data.) For additional information, read: -http://www.lm-sensors.org/browser/lm-sensors/trunk/README.thinkpad +http://www.lm-sensors.org/browser/lm-sensors/trunk/README diff --git a/Documentation/i2c/busses/i2c-sis630 b/Documentation/i2c/busses/i2c-sis630 index 629ea2c356fd..0b9697366930 100644 --- a/Documentation/i2c/busses/i2c-sis630 +++ b/Documentation/i2c/busses/i2c-sis630 @@ -2,7 +2,7 @@ Kernel driver i2c-sis630 Supported adapters: * Silicon Integrated Systems Corp (SiS) - 630 chipset (Datasheet: available at http://amalysh.bei.t-online.de/docs/SIS/) + 630 chipset (Datasheet: available at http://www.sfr-fresh.com/linux) 730 chipset * Possible other SiS chipsets ? diff --git a/Documentation/i2c/instantiating-devices b/Documentation/i2c/instantiating-devices index e89490270aba..87da405a8597 100644 --- a/Documentation/i2c/instantiating-devices +++ b/Documentation/i2c/instantiating-devices @@ -102,7 +102,7 @@ static int __devinit usb_hcd_pnx4008_probe(struct platform_device *pdev) memset(&i2c_info, 0, sizeof(struct i2c_board_info)); strlcpy(i2c_info.name, "isp1301_pnx", I2C_NAME_SIZE); isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info, - normal_i2c); + normal_i2c, NULL); i2c_put_adapter(i2c_adap); (...) } diff --git a/Documentation/ia64/aliasing.txt b/Documentation/ia64/aliasing.txt index aa3e953f0f7b..5a4dea6abebd 100644 --- a/Documentation/ia64/aliasing.txt +++ b/Documentation/ia64/aliasing.txt @@ -168,8 +168,6 @@ PAST PROBLEM CASES mmap of 0x0-0x9FFFF /dev/mem by "hwinfo" on HP sx1000 with VGA enabled - See https://bugzilla.novell.com/show_bug.cgi?id=140858. - The EFI memory map reports the following attributes: 0x00000-0x9FFFF WB only 0xA0000-0xBFFFF UC only (VGA frame buffer) diff --git a/Documentation/ia64/serial.txt b/Documentation/ia64/serial.txt index 040b9773209f..6869c73de4e2 100644 --- a/Documentation/ia64/serial.txt +++ b/Documentation/ia64/serial.txt @@ -133,7 +133,7 @@ TROUBLESHOOTING SERIAL CONSOLE PROBLEMS -[1] http://www.dig64.org/specifications/DIG64_PCDPv20.pdf +[1] http://www.dig64.org/specifications/agreement The table was originally defined as the "HCDP" for "Headless Console/Debug Port." The current version is the "PCDP" for "Primary Console and Debug Port Devices." diff --git a/Documentation/infiniband/user_verbs.txt b/Documentation/infiniband/user_verbs.txt index afe3f8da9018..e5092d696da2 100644 --- a/Documentation/infiniband/user_verbs.txt +++ b/Documentation/infiniband/user_verbs.txt @@ -5,7 +5,7 @@ USERSPACE VERBS ACCESS described in chapter 11 of the InfiniBand Architecture Specification. To use the verbs, the libibverbs library, available from - , is required. libibverbs contains a + http://www.openfabrics.org/, is required. libibverbs contains a device-independent API for using the ib_uverbs interface. libibverbs also requires appropriate device-dependent kernel and userspace driver for your InfiniBand hardware. For example, to use diff --git a/Documentation/input/appletouch.txt b/Documentation/input/appletouch.txt index 4f7c633a76d2..b13de3f89108 100644 --- a/Documentation/input/appletouch.txt +++ b/Documentation/input/appletouch.txt @@ -82,4 +82,4 @@ Links: ------ [1]: http://johannes.sipsolutions.net/PowerBook/touchpad/ -[2]: http://web.telia.com/~u89404340/touchpad/index.html +[2]: http://web.archive.org/web/*/http://web.telia.com/~u89404340/touchpad/index.html diff --git a/Documentation/input/bcm5974.txt b/Documentation/input/bcm5974.txt index 5e22dcf6d48d..74d3876d6f34 100644 --- a/Documentation/input/bcm5974.txt +++ b/Documentation/input/bcm5974.txt @@ -62,4 +62,4 @@ Links ----- [1] http://ubuntuforums.org/showthread.php?t=840040 -[2] http://http://bitmath.org/code/ +[2] http://bitmath.org/code/ diff --git a/Documentation/input/iforce-protocol.txt b/Documentation/input/iforce-protocol.txt index 3ac92413c874..2d5fbfd6023e 100644 --- a/Documentation/input/iforce-protocol.txt +++ b/Documentation/input/iforce-protocol.txt @@ -251,7 +251,7 @@ Check www.immerse.com for Immersion Studio, and www.fcoder.com for ComPortSpy. ** Author of this document ** Johann Deneux -Home page at http://www.esil.univ-mrs.fr/~jdeneux/projects/ff/ +Home page at http://web.archive.org/web/*/http://www.esil.univ-mrs.fr Additions by Vojtech Pavlik. diff --git a/Documentation/input/multi-touch-protocol.txt b/Documentation/input/multi-touch-protocol.txt index c0fc1c75fd88..bdcba154b83e 100644 --- a/Documentation/input/multi-touch-protocol.txt +++ b/Documentation/input/multi-touch-protocol.txt @@ -6,31 +6,149 @@ Multi-touch (MT) Protocol Introduction ------------ -In order to utilize the full power of the new multi-touch devices, a way to -report detailed finger data to user space is needed. This document -describes the multi-touch (MT) protocol which allows kernel drivers to -report details for an arbitrary number of fingers. +In order to utilize the full power of the new multi-touch and multi-user +devices, a way to report detailed data from multiple contacts, i.e., +objects in direct contact with the device surface, is needed. This +document describes the multi-touch (MT) protocol which allows kernel +drivers to report details for an arbitrary number of contacts. + +The protocol is divided into two types, depending on the capabilities of the +hardware. For devices handling anonymous contacts (type A), the protocol +describes how to send the raw data for all contacts to the receiver. For +devices capable of tracking identifiable contacts (type B), the protocol +describes how to send updates for individual contacts via event slots. -Usage ------ +Protocol Usage +-------------- -Anonymous finger details are sent sequentially as separate packets of ABS -events. Only the ABS_MT events are recognized as part of a finger -packet. The end of a packet is marked by calling the input_mt_sync() -function, which generates a SYN_MT_REPORT event. This instructs the -receiver to accept the data for the current finger and prepare to receive -another. The end of a multi-touch transfer is marked by calling the usual +Contact details are sent sequentially as separate packets of ABS_MT +events. Only the ABS_MT events are recognized as part of a contact +packet. Since these events are ignored by current single-touch (ST) +applications, the MT protocol can be implemented on top of the ST protocol +in an existing driver. + +Drivers for type A devices separate contact packets by calling +input_mt_sync() at the end of each packet. This generates a SYN_MT_REPORT +event, which instructs the receiver to accept the data for the current +contact and prepare to receive another. + +Drivers for type B devices separate contact packets by calling +input_mt_slot(), with a slot as argument, at the beginning of each packet. +This generates an ABS_MT_SLOT event, which instructs the receiver to +prepare for updates of the given slot. + +All drivers mark the end of a multi-touch transfer by calling the usual input_sync() function. This instructs the receiver to act upon events -accumulated since last EV_SYN/SYN_REPORT and prepare to receive a new -set of events/packets. +accumulated since last EV_SYN/SYN_REPORT and prepare to receive a new set +of events/packets. + +The main difference between the stateless type A protocol and the stateful +type B slot protocol lies in the usage of identifiable contacts to reduce +the amount of data sent to userspace. The slot protocol requires the use of +the ABS_MT_TRACKING_ID, either provided by the hardware or computed from +the raw data [5]. + +For type A devices, the kernel driver should generate an arbitrary +enumeration of the full set of anonymous contacts currently on the +surface. The order in which the packets appear in the event stream is not +important. Event filtering and finger tracking is left to user space [3]. + +For type B devices, the kernel driver should associate a slot with each +identified contact, and use that slot to propagate changes for the contact. +Creation, replacement and destruction of contacts is achieved by modifying +the ABS_MT_TRACKING_ID of the associated slot. A non-negative tracking id +is interpreted as a contact, and the value -1 denotes an unused slot. A +tracking id not previously present is considered new, and a tracking id no +longer present is considered removed. Since only changes are propagated, +the full state of each initiated contact has to reside in the receiving +end. Upon receiving an MT event, one simply updates the appropriate +attribute of the current slot. + + +Protocol Example A +------------------ + +Here is what a minimal event sequence for a two-contact touch would look +like for a type A device: + + ABS_MT_POSITION_X x[0] + ABS_MT_POSITION_Y y[0] + SYN_MT_REPORT + ABS_MT_POSITION_X x[1] + ABS_MT_POSITION_Y y[1] + SYN_MT_REPORT + SYN_REPORT + +The sequence after moving one of the contacts looks exactly the same; the +raw data for all present contacts are sent between every synchronization +with SYN_REPORT. + +Here is the sequence after lifting the first contact: + + ABS_MT_POSITION_X x[1] + ABS_MT_POSITION_Y y[1] + SYN_MT_REPORT + SYN_REPORT + +And here is the sequence after lifting the second contact: + + SYN_MT_REPORT + SYN_REPORT + +If the driver reports one of BTN_TOUCH or ABS_PRESSURE in addition to the +ABS_MT events, the last SYN_MT_REPORT event may be omitted. Otherwise, the +last SYN_REPORT will be dropped by the input core, resulting in no +zero-contact event reaching userland. + + +Protocol Example B +------------------ + +Here is what a minimal event sequence for a two-contact touch would look +like for a type B device: + + ABS_MT_SLOT 0 + ABS_MT_TRACKING_ID 45 + ABS_MT_POSITION_X x[0] + ABS_MT_POSITION_Y y[0] + ABS_MT_SLOT 1 + ABS_MT_TRACKING_ID 46 + ABS_MT_POSITION_X x[1] + ABS_MT_POSITION_Y y[1] + SYN_REPORT + +Here is the sequence after moving contact 45 in the x direction: + + ABS_MT_SLOT 0 + ABS_MT_POSITION_X x[0] + SYN_REPORT + +Here is the sequence after lifting the contact in slot 0: + + ABS_MT_TRACKING_ID -1 + SYN_REPORT + +The slot being modified is already 0, so the ABS_MT_SLOT is omitted. The +message removes the association of slot 0 with contact 45, thereby +destroying contact 45 and freeing slot 0 to be reused for another contact. + +Finally, here is the sequence after lifting the second contact: + + ABS_MT_SLOT 1 + ABS_MT_TRACKING_ID -1 + SYN_REPORT + + +Event Usage +----------- A set of ABS_MT events with the desired properties is defined. The events are divided into categories, to allow for partial implementation. The minimum set consists of ABS_MT_POSITION_X and ABS_MT_POSITION_Y, which -allows for multiple fingers to be tracked. If the device supports it, the +allows for multiple contacts to be tracked. If the device supports it, the ABS_MT_TOUCH_MAJOR and ABS_MT_WIDTH_MAJOR may be used to provide the size -of the contact area and approaching finger, respectively. +of the contact area and approaching contact, respectively. The TOUCH and WIDTH parameters have a geometrical interpretation; imagine looking through a window at someone gently holding a finger against the @@ -41,56 +159,26 @@ ABS_MT_TOUCH_MAJOR, the diameter of the outer region is ABS_MT_WIDTH_MAJOR. Now imagine the person pressing the finger harder against the glass. The inner region will increase, and in general, the ratio ABS_MT_TOUCH_MAJOR / ABS_MT_WIDTH_MAJOR, which is always smaller than -unity, is related to the finger pressure. For pressure-based devices, +unity, is related to the contact pressure. For pressure-based devices, ABS_MT_PRESSURE may be used to provide the pressure on the contact area instead. -In addition to the MAJOR parameters, the oval shape of the finger can be +In addition to the MAJOR parameters, the oval shape of the contact can be described by adding the MINOR parameters, such that MAJOR and MINOR are the major and minor axis of an ellipse. Finally, the orientation of the oval shape can be describe with the ORIENTATION parameter. The ABS_MT_TOOL_TYPE may be used to specify whether the touching tool is a -finger or a pen or something else. Devices with more granular information +contact or a pen or something else. Devices with more granular information may specify general shapes as blobs, i.e., as a sequence of rectangular shapes grouped together by an ABS_MT_BLOB_ID. Finally, for the few devices that currently support it, the ABS_MT_TRACKING_ID event may be used to -report finger tracking from hardware [5]. +report contact tracking from hardware [5]. -Here is what a minimal event sequence for a two-finger touch would look -like: - - ABS_MT_POSITION_X - ABS_MT_POSITION_Y - SYN_MT_REPORT - ABS_MT_POSITION_X - ABS_MT_POSITION_Y - SYN_MT_REPORT - SYN_REPORT - -Here is the sequence after lifting one of the fingers: - - ABS_MT_POSITION_X - ABS_MT_POSITION_Y - SYN_MT_REPORT - SYN_REPORT - -And here is the sequence after lifting the remaining finger: - - SYN_MT_REPORT - SYN_REPORT - -If the driver reports one of BTN_TOUCH or ABS_PRESSURE in addition to the -ABS_MT events, the last SYN_MT_REPORT event may be omitted. Otherwise, the -last SYN_REPORT will be dropped by the input core, resulting in no -zero-finger event reaching userland. Event Semantics --------------- -The word "contact" is used to describe a tool which is in direct contact -with the surface. A finger, a pen or a rubber all classify as contacts. - ABS_MT_TOUCH_MAJOR The length of the major axis of the contact. The length should be given in @@ -157,15 +245,16 @@ MT_TOOL_PEN [2]. ABS_MT_BLOB_ID The BLOB_ID groups several packets together into one arbitrarily shaped -contact. This is a low-level anonymous grouping, and should not be confused -with the high-level trackingID [5]. Most kernel drivers will not have blob -capability, and can safely omit the event. +contact. This is a low-level anonymous grouping for type A devices, and +should not be confused with the high-level trackingID [5]. Most type A +devices do not have blob capability, so drivers can safely omit this event. ABS_MT_TRACKING_ID The TRACKING_ID identifies an initiated contact throughout its life cycle -[5]. There are currently only a few devices that support it, so this event -should normally be omitted. +[5]. This event is mandatory for type B devices. The value range of the +TRACKING_ID should be large enough to ensure unique identification of a +contact maintained over an extended period of time. Event Computation @@ -192,20 +281,11 @@ finger along the X axis (1). Finger Tracking --------------- -The kernel driver should generate an arbitrary enumeration of the set of -anonymous contacts currently on the surface. The order in which the packets -appear in the event stream is not important. - The process of finger tracking, i.e., to assign a unique trackingID to each -initiated contact on the surface, is left to user space; preferably the -multi-touch X driver [3]. In that driver, the trackingID stays the same and -unique until the contact vanishes (when the finger leaves the surface). The -problem of assigning a set of anonymous fingers to a set of identified -fingers is a euclidian bipartite matching problem at each event update, and -relies on a sufficiently rapid update rate. - -There are a few devices that support trackingID in hardware. User space can -make use of these native identifiers to reduce bandwidth and cpu usage. +initiated contact on the surface, is a Euclidian Bipartite Matching +problem. At each event synchronization, the set of actual contacts is +matched to the set of contacts from the previous synchronization. A full +implementation can be found in [3]. Gestures diff --git a/Documentation/input/sentelic.txt b/Documentation/input/sentelic.txt index b35affd5c649..b2ef125b71f8 100644 --- a/Documentation/input/sentelic.txt +++ b/Documentation/input/sentelic.txt @@ -341,7 +341,7 @@ Byte 5~8: Don't care (Absolute packet) FSP supports basic PS/2 commanding set and modes, refer to following URL for details about PS/2 commands: -http://www.computer-engineering.org/index.php?title=PS/2_Mouse_Interface +http://www.computer-engineering.org/ps2mouse/ ============================================================================== * Programming Sequence for Determining Packet Parsing Flow diff --git a/Documentation/input/xpad.txt b/Documentation/input/xpad.txt index aae0d404c566..7cc9a436e6a1 100644 --- a/Documentation/input/xpad.txt +++ b/Documentation/input/xpad.txt @@ -150,7 +150,7 @@ the basic functionality. 1. http://euc.jp/periphs/xbox-controller.ja.html (ITO Takayuki) 2. http://xpad.xbox-scene.com/ -3. http://www.xboxhackz.com/Hackz-Reference.htm +3. http://www.markosweb.com/www/xboxhackz.com/ 4. /proc/bus/usb/devices - dump from InterAct PowerPad Pro (Germany): diff --git a/Documentation/intel_txt.txt b/Documentation/intel_txt.txt index 5dc59b04a71f..849de1a78e77 100644 --- a/Documentation/intel_txt.txt +++ b/Documentation/intel_txt.txt @@ -25,20 +25,18 @@ which has been updated for the new released platforms. Intel TXT has been presented at various events over the past few years, some of which are: LinuxTAG 2008: - http://www.linuxtag.org/2008/en/conf/events/vp-donnerstag/ - details.html?talkid=110 + http://www.linuxtag.org/2008/en/conf/events/vp-donnerstag.html TRUST2008: - http://www.trust2008.eu/downloads/Keynote-Speakers/ + http://www.trust-conference.eu/downloads/Keynote-Speakers/ 3_David-Grawrock_The-Front-Door-of-Trusted-Computing.pdf - IDF 2008, Shanghai: - http://inteldeveloperforum.com.edgesuite.net/shanghai_2008/ - aep/PROS003/index.html + IDF, Shanghai: + http://www.prcidf.com.cn/index_en.html IDFs 2006, 2007 (I'm not sure if/where they are online) Trusted Boot Project Overview: ============================= -Trusted Boot (tboot) is an open source, pre- kernel/VMM module that +Trusted Boot (tboot) is an open source, pre-kernel/VMM module that uses Intel TXT to perform a measured and verified launch of an OS kernel/VMM. diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt index dd5806f4fcc4..33223ff121d8 100644 --- a/Documentation/ioctl/ioctl-number.txt +++ b/Documentation/ioctl/ioctl-number.txt @@ -74,11 +74,12 @@ Code Seq#(hex) Include File Comments 0x10 00-0F drivers/char/s390/vmcp.h 0x12 all linux/fs.h linux/blkpg.h -0x1b all InfiniBand Subsystem +0x1b all InfiniBand Subsystem 0x20 all drivers/cdrom/cm206.h 0x22 all scsi/sg.h '#' 00-3F IEEE 1394 Subsystem Block for the entire subsystem '$' 00-0F linux/perf_counter.h, linux/perf_event.h +'&' 00-07 drivers/firewire/nosy-user.h '1' 00-1F PPS kit from Ulrich Windl '2' 01-04 linux/i2o.h @@ -190,7 +191,7 @@ Code Seq#(hex) Include File Comments '[' 00-07 linux/usb/tmc.h USB Test and Measurement Devices 'a' all linux/atm*.h, linux/sonet.h ATM on linux - + 'b' 00-FF conflict! bit3 vme host bridge 'b' 00-0F media/bt819.h conflict! @@ -225,7 +226,7 @@ Code Seq#(hex) Include File Comments 'k' 00-0F linux/spi/spidev.h conflict! 'k' 00-05 video/kyro.h conflict! 'l' 00-3F linux/tcfs_fs.h transparent cryptographic file system - + 'l' 40-7F linux/udf_fs_i.h in development: 'm' 00-09 linux/mmtimer.h conflict! @@ -252,7 +253,7 @@ Code Seq#(hex) Include File Comments 'q' 00-1F linux/serio.h 'q' 80-FF linux/telephony.h Internet PhoneJACK, Internet LineJACK - linux/ixjuser.h + linux/ixjuser.h 'r' 00-1F linux/msdos_fs.h and fs/fat/dir.c 's' all linux/cdk.h 't' 00-7F linux/if_ppp.h @@ -286,7 +287,7 @@ Code Seq#(hex) Include File Comments 0x89 F0-FF linux/sockios.h SIOCDEVPRIVATE range 0x8B all linux/wireless.h 0x8C 00-3F WiNRADiO driver - + 0x90 00 drivers/cdrom/sbpcd.h 0x92 00-0F drivers/usb/mon/mon_bin.c 0x93 60-7F linux/auto_fs.h diff --git a/Documentation/isdn/INTERFACE.CAPI b/Documentation/isdn/INTERFACE.CAPI index f172091fb7cd..309eb5ed942b 100644 --- a/Documentation/isdn/INTERFACE.CAPI +++ b/Documentation/isdn/INTERFACE.CAPI @@ -113,12 +113,16 @@ char *driver_name int (*load_firmware)(struct capi_ctr *ctrlr, capiloaddata *ldata) (optional) pointer to a callback function for sending firmware and configuration data to the device + The function may return before the operation has completed. + Completion must be signalled by a call to capi_ctr_ready(). Return value: 0 on success, error code on error Called in process context. void (*reset_ctr)(struct capi_ctr *ctrlr) - (optional) pointer to a callback function for performing a reset on - the device, releasing all registered applications + (optional) pointer to a callback function for stopping the device, + releasing all registered applications + The function may return before the operation has completed. + Completion must be signalled by a call to capi_ctr_down(). Called in process context. void (*register_appl)(struct capi_ctr *ctrlr, u16 applid, diff --git a/Documentation/isdn/README b/Documentation/isdn/README index 6783437f21c2..cfb1884342ee 100644 --- a/Documentation/isdn/README +++ b/Documentation/isdn/README @@ -36,7 +36,7 @@ README for the ISDN-subsystem http://www.mhessler.de/i4lfaq/ It can be viewed online, or downloaded in sgml/text/html format. The FAQ can also be viewed online at - http://www.isdn4inux.de/faq/ + http://www.isdn4linux.de/faq/ or downloaded from ftp://ftp.isdn4linux.de/pub/isdn4linux/FAQ/ diff --git a/Documentation/isdn/README.HiSax b/Documentation/isdn/README.HiSax index 031c8d814337..99e87a61897d 100644 --- a/Documentation/isdn/README.HiSax +++ b/Documentation/isdn/README.HiSax @@ -486,7 +486,7 @@ Appendix: Teles PCMCIA driver ----------------------------- See - http://www.stud.uni-wuppertal.de/~ea0141/pcmcia.html + http://www.linux.no/teles_cs.txt for instructions. Appendix: Linux and ISDN-leased lines diff --git a/Documentation/isdn/README.gigaset b/Documentation/isdn/README.gigaset index e472df842323..ef3343eaa002 100644 --- a/Documentation/isdn/README.gigaset +++ b/Documentation/isdn/README.gigaset @@ -47,9 +47,9 @@ GigaSet 307x Device Driver 1.2. Software -------- - The driver works with ISDN4linux and so can be used with any software - which is able to use ISDN4linux for ISDN connections (voice or data). - Experimental Kernel CAPI support is available as a compilation option. + The driver works with the Kernel CAPI subsystem as well as the old + ISDN4Linux subsystem, so it can be used with any software which is able + to use CAPI 2.0 or ISDN4Linux for ISDN connections (voice or data). There are some user space tools available at http://sourceforge.net/projects/gigaset307x/ @@ -152,61 +152,42 @@ GigaSet 307x Device Driver - GIGVER_FWBASE: retrieve the firmware version of the base Upon return, version[] is filled with the requested version information. -2.3. ISDN4linux - ---------- - This is the "normal" mode of operation. After loading the module you can - set up the ISDN system just as you'd do with any ISDN card supported by - the ISDN4Linux subsystem. Most distributions provide some configuration - utility. If not, you can use some HOWTOs like - http://www.linuxhaven.de/dlhp/HOWTO/DE-ISDN-HOWTO-5.html - If this doesn't work, because you have some device like SX100 where - debug output (see section 3.2.) shows something like this when dialing - CMD Received: ERROR - Available Params: 0 - Connection State: 0, Response: -1 - gigaset_process_response: resp_code -1 in ConState 0 ! - Timeout occurred - you probably need to use unimodem mode. (see section 2.5.) - -2.4. CAPI +2.3. CAPI ---- If the driver is compiled with CAPI support (kernel configuration option - GIGASET_CAPI, experimental) it can also be used with CAPI 2.0 kernel and - user space applications. For user space access, the module capi.ko must - be loaded. The capiinit command (included in the capi4k-utils package) - does this for you. + GIGASET_CAPI) the devices will show up as CAPI controllers as soon as the + corresponding driver module is loaded, and can then be used with CAPI 2.0 + kernel and user space applications. For user space access, the module + capi.ko must be loaded. - The CAPI variant of the driver supports legacy ISDN4Linux applications - via the capidrv compatibility driver. The kernel module capidrv.ko must - be loaded explicitly with the command + Legacy ISDN4Linux applications are supported via the capidrv + compatibility driver. The kernel module capidrv.ko must be loaded + explicitly with the command modprobe capidrv if needed, and cannot be unloaded again without unloading the driver first. (These are limitations of capidrv.) - The note about unimodem mode in the preceding section applies here, too. + Most distributions handle loading and unloading of the various CAPI + modules automatically via the command capiinit(1) from the capi4k-utils + package or a similar mechanism. Note that capiinit(1) cannot unload the + Gigaset drivers because it doesn't support more than one module per + driver. + +2.4. ISDN4Linux + ---------- + If the driver is compiled without CAPI support (native ISDN4Linux + variant), it registers the device with the legacy ISDN4Linux subsystem + after loading the module. It can then be used with ISDN4Linux + applications only. Most distributions provide some configuration utility + for setting up that subsystem. Otherwise you can use some HOWTOs like + http://www.linuxhaven.de/dlhp/HOWTO/DE-ISDN-HOWTO-5.html + 2.5. Unimodem mode ------------- - This is needed for some devices [e.g. SX100] as they have problems with - the "normal" commands. - - If you have installed the command line tool gigacontr, you can enter - unimodem mode using - gigacontr --mode unimodem - You can switch back using - gigacontr --mode isdn - - You can also put the driver directly into Unimodem mode when it's loaded, - by passing the module parameter startmode=0 to the hardware specific - module, e.g. - modprobe usb_gigaset startmode=0 - or by adding a line like - options usb_gigaset startmode=0 - to an appropriate module configuration file, like /etc/modprobe.d/gigaset - or /etc/modprobe.conf.local. - In this mode the device works like a modem connected to a serial port (the /dev/ttyGU0, ... mentioned above) which understands the commands + ATZ init, reset => OK or ERROR ATD @@ -234,6 +215,31 @@ GigaSet 307x Device Driver to an appropriate module configuration file, like /etc/modprobe.d/gigaset or /etc/modprobe.conf.local. + Unimodem mode is needed for making some devices [e.g. SX100] work which + do not support the regular Gigaset command set. If debug output (see + section 3.2.) shows something like this when dialing: + CMD Received: ERROR + Available Params: 0 + Connection State: 0, Response: -1 + gigaset_process_response: resp_code -1 in ConState 0 ! + Timeout occurred + then switching to unimodem mode may help. + + If you have installed the command line tool gigacontr, you can enter + unimodem mode using + gigacontr --mode unimodem + You can switch back using + gigacontr --mode isdn + + You can also put the driver directly into Unimodem mode when it's loaded, + by passing the module parameter startmode=0 to the hardware specific + module, e.g. + modprobe usb_gigaset startmode=0 + or by adding a line like + options usb_gigaset startmode=0 + to an appropriate module configuration file, like /etc/modprobe.d/gigaset + or /etc/modprobe.conf.local. + 2.6. Call-ID (CID) mode ------------------ Call-IDs are numbers used to tag commands to, and responses from, the @@ -263,7 +269,22 @@ GigaSet 307x Device Driver change its CID mode while the driver is loaded, eg. echo 0 > /sys/class/tty/ttyGU0/cidmode -2.7. Unregistered Wireless Devices (M101/M105) +2.7. Dialing Numbers + --------------- + The called party number provided by an application for dialing out must + be a public network number according to the local dialing plan, without + any dial prefix for getting an outside line. + + Internal calls can be made by providing an internal extension number + prefixed with "**" (two asterisks) as the called party number. So to dial + eg. the first registered DECT handset, give "**11" as the called party + number. Dialing "***" (three asterisks) calls all extensions + simultaneously (global call). + + This holds for both CAPI 2.0 and ISDN4Linux applications. Unimodem mode + does not support internal calls. + +2.8. Unregistered Wireless Devices (M101/M105) ----------------------------------------- The main purpose of the ser_gigaset and usb_gigaset drivers is to allow the M101 and M105 wireless devices to be used as ISDN devices for ISDN diff --git a/Documentation/ja_JP/HOWTO b/Documentation/ja_JP/HOWTO index 55476982b5ca..b63301a03811 100644 --- a/Documentation/ja_JP/HOWTO +++ b/Documentation/ja_JP/HOWTO @@ -223,7 +223,7 @@ web サイトã«ã¯ã€ã‚³ãƒ¼ãƒ‰ã®æ§‹æˆã€ã‚µãƒ–システムã€ç¾åœ¨å­˜åœ¨ã™ ã‚ãªãŸãŒã©ã“ã‹ã‚‰ã‚¹ã‚¿ãƒ¼ãƒˆã—ã¦è‰¯ã„ã‹ã‚ã‹ã‚‰ãªã„ãŒã€Linux カーãƒãƒ«é–‹ç™ºã‚³ãƒŸãƒ¥ ニティã«å‚加ã—ã¦ä½•ã‹ã™ã‚‹ã“ã¨ã‚’ã•ãŒã—ã¦ã„ã‚‹å ´åˆã«ã¯ã€Linux kernel Janitor's プロジェクトã«ã„ã‘ã°è‰¯ã„ã§ã—ょㆠ- - http://janitor.kernelnewbies.org/ + http://kernelnewbies.org/KernelJanitors ã“ã“ã¯ãã®ã‚ˆã†ãªã‚¹ã‚¿ãƒ¼ãƒˆã‚’ã™ã‚‹ã®ã«ã†ã£ã¦ã¤ã‘ã®å ´æ‰€ã§ã™ã€‚ã“ã“ã«ã¯ã€ Linux カーãƒãƒ«ã‚½ãƒ¼ã‚¹ãƒ„リーã®ä¸­ã«å«ã¾ã‚Œã‚‹ã€ãã‚Œã„ã«ã—ã€ä¿®æ­£ã—ãªã‘ã‚Œã°ãª らãªã„ã€å˜ç´”ãªå•é¡Œã®ãƒªã‚¹ãƒˆãŒè¨˜è¿°ã•ã‚Œã¦ã„ã¾ã™ã€‚ã“ã®ãƒ—ロジェクトã«é–¢ã‚ã‚‹ diff --git a/Documentation/ja_JP/SubmittingPatches b/Documentation/ja_JP/SubmittingPatches index a9dc1243e859..f107c834d242 100644 --- a/Documentation/ja_JP/SubmittingPatches +++ b/Documentation/ja_JP/SubmittingPatches @@ -97,7 +97,7 @@ Quilt: http://savannah.nongnu.org/projects/quilt Andrew Morton's patch scripts: -http://www.zip.com.au/~akpm/linux/patches/ +http://userweb.kernel.org/~akpm/stuff/tpp.txt ã“ã®ãƒªãƒ³ã‚¯ã®å…ˆã®ã‚¹ã‚¯ãƒªãƒ—トã®ä»£ã‚ã‚Šã¨ã—ã¦ã€quilt ãŒãƒ‘ッãƒãƒžãƒã‚¸ãƒ¡ãƒ³ãƒˆ ツールã¨ã—ã¦æŽ¨å¥¨ã•ã‚Œã¦ã„ã¾ã™(上ã®ãƒªãƒ³ã‚¯ã‚’見ã¦ãã ã•ã„)。 @@ -210,7 +210,7 @@ VGER.KERNEL.ORG ã§ãƒ›ã‚¹ãƒ†ã‚£ãƒ³ã‚°ã•ã‚Œã¦ã„るメーリングリスト㮠・移æ¤æ€§ã®ãªã„コードã‹ã‚‰ç§»æ¤æ€§ã®ã‚るコードã¸ã®ç½®ãæ›ãˆ(å°ã•ã„範囲㧠ã‚ã‚Œã°ã‚¢ãƒ¼ã‚­ãƒ†ã‚¯ãƒãƒ£ç‰¹æœ‰ã®ã“ã¨ã§ã‚‚ä»–ã®äººãŒã‚³ãƒ”ーã§ãã¾ã™) ・作者やメンテナã«ã‚ˆã‚‹ä¿®æ­£(ã™ãªã‚ã¡ patch monkey ã®å†è»¢é€ãƒ¢ãƒ¼ãƒ‰) -URL: +EMAIL: 7) MIME やリンクや圧縮ファイルや添付ファイルã§ã¯ãªãプレインテキストã®ã¿ @@ -534,7 +534,7 @@ gcc ã«ãŠã„ã¦ã¯ã€ãƒžã‚¯ãƒ­ã¨åŒã˜ãらã„軽ã„ã§ã™ã€‚ ---------------------- Andrew Morton, "The perfect patch" (tpp). - + Jeff Garzik, "Linux kernel patch submission format". diff --git a/Documentation/kbuild/kbuild.txt b/Documentation/kbuild/kbuild.txt index 634c625da8ce..1e5165aa9e4e 100644 --- a/Documentation/kbuild/kbuild.txt +++ b/Documentation/kbuild/kbuild.txt @@ -22,11 +22,33 @@ building C files and assembler files. KAFLAGS -------------------------------------------------- -Additional options to the assembler. +Additional options to the assembler (for built-in and modules). + +AFLAGS_MODULE +-------------------------------------------------- +Addtional module specific options to use for $(AS). + +AFLAGS_KERNEL +-------------------------------------------------- +Addtional options for $(AS) when used for assembler +code for code that is compiled as built-in. KCFLAGS -------------------------------------------------- -Additional options to the C compiler. +Additional options to the C compiler (for built-in and modules). + +CFLAGS_KERNEL +-------------------------------------------------- +Addtional options for $(CC) when used to compile +code that is compiled as built-in. + +CFLAGS_MODULE +-------------------------------------------------- +Addtional module specific options to use for $(CC). + +LDFLAGS_MODULE +-------------------------------------------------- +Additional options used for $(LD) when linking modules. KBUILD_VERBOSE -------------------------------------------------- @@ -40,15 +62,15 @@ Set the directory to look for the kernel source when building external modules. The directory can be specified in several ways: 1) Use "M=..." on the command line -2) Environmnet variable KBUILD_EXTMOD -3) Environmnet variable SUBDIRS +2) Environment variable KBUILD_EXTMOD +3) Environment variable SUBDIRS The possibilities are listed in the order they take precedence. Using "M=..." will always override the others. KBUILD_OUTPUT -------------------------------------------------- Specify the output directory when building the kernel. -The output directory can also be specificed using "O=...". +The output directory can also be specified using "O=...". Setting "O=..." takes precedence over KBUILD_OUTPUT. ARCH @@ -90,7 +112,7 @@ The script will be called with the following arguments: $3 - kernel map file $4 - default install path (use root directory if blank) -The implmentation of "make install" is architecture specific +The implementation of "make install" is architecture specific and it may differ from the above. INSTALLKERNEL is provided to enable the possibility to diff --git a/Documentation/kbuild/kconfig.txt b/Documentation/kbuild/kconfig.txt index b2cb16ebcb16..cca46b1a0f6c 100644 --- a/Documentation/kbuild/kconfig.txt +++ b/Documentation/kbuild/kconfig.txt @@ -65,7 +65,7 @@ also use the environment variable KCONFIG_ALLCONFIG as a flag or a filename that contains config symbols that the user requires to be set to a specific value. If KCONFIG_ALLCONFIG is used without a filename, "make *config" checks for a file named -"all{yes/mod/no/random}.config" (corresponding to the *config command +"all{yes/mod/no/def/random}.config" (corresponding to the *config command that was used) for symbol values that are to be forced. If this file is not found, it checks for a file named "all.config" to contain forced values. diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt index 71c602d61680..c787ae512120 100644 --- a/Documentation/kbuild/makefiles.txt +++ b/Documentation/kbuild/makefiles.txt @@ -45,7 +45,6 @@ This document describes the Linux kernel Makefiles. --- 7.1 header-y --- 7.2 objhdr-y --- 7.3 destination-y - --- 7.4 unifdef-y (deprecated) === 8 Kbuild Variables === 9 Makefile language @@ -168,7 +167,7 @@ more details, with real examples. #drivers/isdn/i4l/Makefile # Makefile for the kernel ISDN subsystem and device drivers. # Each configuration option enables a list of files. - obj-$(CONFIG_ISDN) += isdn.o + obj-$(CONFIG_ISDN_I4L) += isdn.o obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o --- 3.3 Loadable module goals - obj-m @@ -187,34 +186,35 @@ more details, with real examples. Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm' If a kernel module is built from several source files, you specify - that you want to build a module in the same way as above. - - Kbuild needs to know which the parts that you want to build your - module from, so you have to tell it by setting an - $(-objs) variable. + that you want to build a module in the same way as above; however, + kbuild needs to know which object files you want to build your + module from, so you have to tell it by setting a $(-y) + variable. Example: #drivers/isdn/i4l/Makefile - obj-$(CONFIG_ISDN) += isdn.o - isdn-objs := isdn_net_lib.o isdn_v110.o isdn_common.o + obj-$(CONFIG_ISDN_I4L) += isdn.o + isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o In this example, the module name will be isdn.o. Kbuild will - compile the objects listed in $(isdn-objs) and then run + compile the objects listed in $(isdn-y) and then run "$(LD) -r" on the list of these files to generate isdn.o. - Kbuild recognises objects used for composite objects by the suffix - -objs, and the suffix -y. This allows the Makefiles to use - the value of a CONFIG_ symbol to determine if an object is part - of a composite object. + Due to kbuild recognizing $(-y) for composite objects, + you can use the value of a CONFIG_ symbol to optionally include an + object file as part of a composite object. Example: #fs/ext2/Makefile - obj-$(CONFIG_EXT2_FS) += ext2.o - ext2-y := balloc.o bitmap.o - ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o + obj-$(CONFIG_EXT2_FS) += ext2.o + ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \ + namei.o super.o symlink.o + ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \ + xattr_trusted.o - In this example, xattr.o is only part of the composite object - ext2.o if $(CONFIG_EXT2_FS_XATTR) evaluates to 'y'. + In this example, xattr.o, xattr_user.o and xattr_trusted.o are only + part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR) + evaluates to 'y'. Note: Of course, when you are building objects into the kernel, the syntax above will also work. So, if you have CONFIG_EXT2_FS=y, @@ -244,12 +244,12 @@ more details, with real examples. may contain both a built-in.o and a lib.a file. Example: - #arch/i386/lib/Makefile - lib-y := checksum.o delay.o + #arch/x86/lib/Makefile + lib-y := delay.o - This will create a library lib.a based on checksum.o and delay.o. - For kbuild to actually recognize that there is a lib.a being built, - the directory shall be listed in libs-y. + This will create a library lib.a based on delay.o. For kbuild to + actually recognize that there is a lib.a being built, the directory + shall be listed in libs-y. See also "6.3 List directories to visit when descending". Use of lib-y is normally restricted to lib/ and arch/*/lib. @@ -284,43 +284,40 @@ more details, with real examples. --- 3.7 Compilation flags ccflags-y, asflags-y and ldflags-y - The three flags listed above applies only to the kbuild makefile - where they are assigned. They are used for all the normal - cc, as and ld invocation happenign during a recursive build. + These three flags apply only to the kbuild makefile in which they + are assigned. They are used for all the normal cc, as and ld + invocations happening during a recursive build. Note: Flags with the same behaviour were previously named: EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS. - They are yet supported but their use are deprecated. + They are still supported but their usage is deprecated. - ccflags-y specifies options for compiling C files with $(CC). + ccflags-y specifies options for compiling with $(CC). Example: - # drivers/sound/emu10k1/Makefile - ccflags-y += -I$(obj) - ccflags-$(DEBUG) += -DEMU10K1_DEBUG - + # drivers/acpi/Makefile + ccflags-y := -Os + ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT This variable is necessary because the top Makefile owns the variable $(KBUILD_CFLAGS) and uses it for compilation flags for the entire tree. - asflags-y is a similar string for per-directory options - when compiling assembly language source. + asflags-y specifies options for assembling with $(AS). Example: - #arch/x86_64/kernel/Makefile - asflags-y := -traditional + #arch/sparc/kernel/Makefile + asflags-y := -ansi - - ldflags-y is a string for per-directory options to $(LD). + ldflags-y specifies options for linking with $(LD). Example: - #arch/m68k/fpsp040/Makefile - ldflags-y := -x + #arch/cris/boot/compressed/Makefile + ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds subdir-ccflags-y, subdir-asflags-y - The two flags listed above are similar to ccflags-y and as-falgs-y. - The difference is that the subdir- variants has effect for the kbuild - file where tey are present and all subdirectories. + The two flags listed above are similar to ccflags-y and asflags-y. + The difference is that the subdir- variants have effect for the kbuild + file where they are present and all subdirectories. Options specified using subdir-* are added to the commandline before the options specified using the non-subdir variants. @@ -340,18 +337,18 @@ more details, with real examples. CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \ -DGDTH_STATISTICS - CFLAGS_seagate.o = -DARBITRATE -DPARITY -DSEAGATE_USE_ASM - These three lines specify compilation flags for aha152x.o, - gdth.o, and seagate.o + These two lines specify compilation flags for aha152x.o and gdth.o. $(AFLAGS_$@) is a similar feature for source files in assembly languages. Example: # arch/arm/kernel/Makefile - AFLAGS_head-armv.o := -DTEXTADDR=$(TEXTADDR) -traditional - AFLAGS_head-armo.o := -DTEXTADDR=$(TEXTADDR) -traditional + AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET) + AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 + AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt + --- 3.9 Dependency tracking @@ -923,16 +920,33 @@ When kbuild executes, the following steps are followed (roughly): The first example utilises the trick that a config option expands to 'y' when selected. - CFLAGS_KERNEL $(CC) options specific for built-in + KBUILD_AFLAGS_KERNEL $(AS) options specific for built-in - $(CFLAGS_KERNEL) contains extra C compiler flags used to compile + $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile resident kernel code. - CFLAGS_MODULE $(CC) options specific for modules + KBUILD_AFLAGS_MODULE Options for $(AS) when building modules - $(CFLAGS_MODULE) contains extra C compiler flags used to compile code - for loadable kernel modules. + $(KBUILD_AFLAGS_MODULE) is used to add arch specific options that + are used for $(AS). + From commandline AFLAGS_MODULE shall be used (see kbuild.txt). + KBUILD_CFLAGS_KERNEL $(CC) options specific for built-in + + $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile + resident kernel code. + + KBUILD_CFLAGS_MODULE Options for $(CC) when building modules + + $(KBUILD_CFLAGS_MODULE) is used to add arch specific options that + are used for $(CC). + From commandline CFLAGS_MODULE shall be used (see kbuild.txt). + + KBUILD_LDFLAGS_MODULE Options for $(LD) when linking modules + + $(KBUILD_LDFLAGS_MODULE) is used to add arch specific options + used when linking modules. This is often a linker script. + From commandline LDFLAGS_MODULE shall be used (see kbuild.txt). --- 6.2 Add prerequisites to archprepare: @@ -1176,14 +1190,14 @@ When kbuild executes, the following steps are followed (roughly): === 7 Kbuild syntax for exported headers The kernel include a set of headers that is exported to userspace. -Many headers can be exported as-is but other headers requires a +Many headers can be exported as-is but other headers require a minimal pre-processing before they are ready for user-space. The pre-processing does: - drop kernel specific annotations - drop include of compiler.h -- drop all sections that is kernel internat (guarded by ifdef __KERNEL__) +- drop all sections that are kernel internal (guarded by ifdef __KERNEL__) -Each relevant directory contain a file name "Kbuild" which specify the +Each relevant directory contains a file name "Kbuild" which specifies the headers to be exported. See subsequent chapter for the syntax of the Kbuild file. @@ -1230,11 +1244,6 @@ See subsequent chapter for the syntax of the Kbuild file. will be located in the directory "include/linux" when exported. - --- 7.4 unifdef-y (deprecated) - - unifdef-y is deprecated. A direct replacement is header-y. - - === 8 Kbuild Variables The top Makefile exports the following variables: diff --git a/Documentation/kernel-docs.txt b/Documentation/kernel-docs.txt index ec8d31ee12e0..715eaaf1519d 100644 --- a/Documentation/kernel-docs.txt +++ b/Documentation/kernel-docs.txt @@ -75,7 +75,7 @@ * Title: "Conceptual Architecture of the Linux Kernel" Author: Ivan T. Bowman. - URL: http://plg.uwaterloo.ca/~itbowman/papers/CS746G-a1.html + URL: http://plg.uwaterloo.ca/ Keywords: conceptual software architecture, extracted design, reverse engineering, system structure. Description: Conceptual software architecture of the Linux kernel, @@ -84,7 +84,7 @@ * Title: "Concrete Architecture of the Linux Kernel" Author: Ivan T. Bowman, Saheem Siddiqi, and Meyer C. Tanuan. - URL: http://plg.uwaterloo.ca/~itbowman/papers/CS746G-a2.html + URL: http://plg.uwaterloo.ca/ Keywords: concrete architecture, extracted design, reverse engineering, system structure, dependencies. Description: Concrete architecture of the Linux kernel, @@ -95,7 +95,7 @@ * Title: "Linux as a Case Study: Its Extracted Software Architecture" Author: Ivan T. Bowman, Richard C. Holt and Neil V. Brewster. - URL: http://plg.uwaterloo.ca/~itbowman/papers/linuxcase.html + URL: http://plg.uwaterloo.ca/ Keywords: software architecture, architecture recovery, redocumentation. Description: Paper appeared at ICSE'99, Los Angeles, May 16-22, @@ -104,7 +104,7 @@ * Title: "Overview of the Virtual File System" Author: Richard Gooch. - URL: http://www.atnf.csiro.au/~rgooch/linux/vfs.txt + URL: http://www.mjmwired.net/kernel/Documentation/filesystems/vfs.txt Keywords: VFS, File System, mounting filesystems, opening files, dentries, dcache. Description: Brief introduction to the Linux Virtual File System. @@ -267,15 +267,13 @@ * Title: "Kernel API changes from 2.0 to 2.2" Author: Richard Gooch. URL: - http://www.atnf.csiro.au/~rgooch/linux/docs/porting-to-2.2.html + http://www.linuxhq.com/guides/LKMPG/node28.html Keywords: 2.2, changes. Description: Kernel functions/structures/variables which changed from 2.0.x to 2.2.x. * Title: "Kernel API changes from 2.2 to 2.4" Author: Richard Gooch. - URL: - http://www.atnf.csiro.au/~rgooch/linux/docs/porting-to-2.4.html Keywords: 2.4, changes. Description: Kernel functions/structures/variables which changed from 2.2.x to 2.4.x. @@ -290,7 +288,6 @@ * Title: "I/O Event Handling Under Linux" Author: Richard Gooch. - URL: http://www.atnf.csiro.au/~rgooch/linux/docs/io-events.html Keywords: IO, I/O, select(2), poll(2), FDs, aio_read(2), readiness event queues. Description: From the Introduction: "I/O Event handling is about @@ -386,64 +383,64 @@ * Title: "Porting Device Drivers To Linux 2.2: part II" Author: Alan Cox. - URL: http://www.linux-mag.com/1999-06/gear_01.html + URL: http://www.linux-mag.com/id/238 Keywords: ports, porting. Description: Second part on porting from 2.0 to 2.2 kernels. * Title: "How To Make Sure Your Driver Will Work On The Power Macintosh" Author: Paul Mackerras. - URL: http://www.linux-mag.com/1999-07/gear_01.html + URL: http://www.linux-mag.com/id/261 Keywords: Mac, Power Macintosh, porting, drivers, compatibility. Description: The title says it all. * Title: "An Introduction to SCSI Drivers" Author: Alan Cox. - URL: http://www.linux-mag.com/1999-08/gear_01.html + URL: http://www.linux-mag.com/id/284 Keywords: SCSI, device, driver. Description: The title says it all. * Title: "Advanced SCSI Drivers And Other Tales" Author: Alan Cox. - URL: http://www.linux-mag.com/1999-09/gear_01.html + URL: http://www.linux-mag.com/id/307 Keywords: SCSI, device, driver, advanced. Description: The title says it all. * Title: "Writing Linux Mouse Drivers" Author: Alan Cox. - URL: http://www.linux-mag.com/1999-10/gear_01.html + URL: http://www.linux-mag.com/id/330 Keywords: mouse, driver, gpm. Description: The title says it all. * Title: "More on Mouse Drivers" Author: Alan Cox. - URL: http://www.linux-mag.com/1999-11/gear_01.html + URL: http://www.linux-mag.com/id/356 Keywords: mouse, driver, gpm, races, asynchronous I/O. Description: The title still says it all. * Title: "Writing Video4linux Radio Driver" Author: Alan Cox. - URL: http://www.linux-mag.com/1999-12/gear_01.html + URL: http://www.linux-mag.com/id/381 Keywords: video4linux, driver, radio, radio devices. Description: The title says it all. * Title: "Video4linux Drivers, Part 1: Video-Capture Device" Author: Alan Cox. - URL: http://www.linux-mag.com/2000-01/gear_01.html + URL: http://www.linux-mag.com/id/406 Keywords: video4linux, driver, video capture, capture devices, camera driver. Description: The title says it all. * Title: "Video4linux Drivers, Part 2: Video-capture Devices" Author: Alan Cox. - URL: http://www.linux-mag.com/2000-02/gear_01.html + URL: http://www.linux-mag.com/id/429 Keywords: video4linux, driver, video capture, capture devices, camera driver, control, query capabilities, capability, facility. Description: The title says it all. * Title: "PCI Management in Linux 2.2" Author: Alan Cox. - URL: http://www.linux-mag.com/2000-03/gear_01.html + URL: http://www.linux-mag.com/id/452 Keywords: PCI, bus, bus-mastering. Description: The title says it all. @@ -502,7 +499,7 @@ * Title: "A Linux vm README" Author: Kanoj Sarcar. - URL: http://reality.sgi.com/kanoj_engr/vm229.html + URL: http://kos.enix.org/pub/linux-vmm.html Keywords: virtual memory, mm, pgd, vma, page, page flags, page cache, swap cache, kswapd. Description: Telegraphic, short descriptions and definitions @@ -659,7 +656,7 @@ * Name: "Linux Kernel Source Reference" Author: Thomas Graichen. - URL: http://innominate.org/~graichen/projects/lksr/ + URL: http://marc.info/?l=linux-kernel&m=96446640102205&w=4 Keywords: CVS, web, cvsweb, browsing source code. Description: Web interface to a CVS server with the kernel sources. "Here you can have a look at any file of the Linux kernel @@ -682,7 +679,7 @@ produced during the week. Published every Thursday. * Name: "Kernel Traffic" - URL: http://kt.zork.net/kernel-traffic/ + URL: http://kt.earth.li/kernel-traffic/index.html Keywords: linux-kernel mailing list, weekly kernel news. Description: Weekly newsletter covering the most relevant discussions of the linux-kernel mailing list. diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 2b2407d9a6d0..2c85c0692b01 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -73,7 +73,6 @@ parameter is applicable: MTD MTD (Memory Technology Device) support is enabled. NET Appropriate network support is enabled. NUMA NUMA support is enabled. - GENERIC_TIME The generic timeofday code is enabled. NFS Appropriate NFS support is enabled. OSS OSS sound support is enabled. PV_OPS A paravirtualized kernel is enabled. @@ -89,10 +88,11 @@ parameter is applicable: RAM RAM disk support is enabled. S390 S390 architecture is enabled. SCSI Appropriate SCSI support is enabled. - A lot of drivers has their options described inside of - Documentation/scsi/. + A lot of drivers have their options described inside + the Documentation/scsi/ sub-directory. SECURITY Different security models are enabled. SELINUX SELinux support is enabled. + APPARMOR AppArmor support is enabled. SERIAL Serial support is enabled. SH SuperH architecture is enabled. SMP The kernel is an SMP kernel. @@ -115,6 +115,7 @@ parameter is applicable: More X86-64 boot options can be found in Documentation/x86/x86_64/boot-options.txt . X86 Either 32bit or 64bit x86 (same as X86-32+X86-64) + XEN Xen support is enabled In addition, the following text indicates that the option: @@ -280,36 +281,17 @@ and is between 256 and 4096 characters. It is defined in the file no: ACPI OperationRegions are not marked as reserved, no further checks are performed. - ad1848= [HW,OSS] - Format: ,,,, - add_efi_memmap [EFI; X86] Include EFI memory map in kernel's map of available physical RAM. - advansys= [HW,SCSI] - See header of drivers/scsi/advansys.c. - - aedsp16= [HW,OSS] Audio Excel DSP 16 - Format: ,,,,, - See also header of sound/oss/aedsp16.c. - agp= [AGP] { off | try_unsupported } off: disable AGP support try_unsupported: try to drive unsupported chipsets (may crash computer or cause data corruption) - aha152x= [HW,SCSI] - See Documentation/scsi/aha152x.txt. - - aha1542= [HW,SCSI] - Format: [,,[,]] - - aic7xxx= [HW,SCSI] - See Documentation/scsi/aic7xxx.txt. - - aic79xx= [HW,SCSI] - See Documentation/scsi/aic79xx.txt. + ALSA [HW,ALSA] + See Documentation/sound/alsa/alsa-parameters.txt alignment= [KNL,ARM] Allow the default userspace alignment fault handler @@ -371,8 +353,6 @@ and is between 256 and 4096 characters. It is defined in the file atarimouse= [HW,MOUSE] Atari Mouse - atascsi= [HW,SCSI] Atari SCSI - atkbd.extra= [HW] Enable extra LEDs and keys on IBM RapidAccess, EzKey and similar keyboards @@ -422,10 +402,6 @@ and is between 256 and 4096 characters. It is defined in the file bttv.pll= See Documentation/video4linux/bttv/Insmod-options bttv.tuner= and Documentation/video4linux/bttv/CARDLIST - BusLogic= [HW,SCSI] - See drivers/scsi/BusLogic.c, comment before function - BusLogic_ParseDriverOptions(). - c101= [NET] Moxa C101 synchronous serial card cachesize= [BUGS=X86-32] Override level 2 CPU cache size detection. @@ -468,7 +444,7 @@ and is between 256 and 4096 characters. It is defined in the file clocksource is not available, it defaults to PIT. Format: { pit | tsc | cyclone | pmtmr } - clocksource= [GENERIC_TIME] Override the default clocksource + clocksource= Override the default clocksource Format: Override the default clocksource and use the clocksource with the name specified. @@ -655,8 +631,6 @@ and is between 256 and 4096 characters. It is defined in the file Disable PIN 1 of APIC timer Can be useful to work around chipset bugs. - dmasound= [HW,OSS] Sound subsystem buffers - dma_debug=off If the kernel is compiled with DMA_API_DEBUG support, this option disables the debugging code at boot. @@ -676,8 +650,6 @@ and is between 256 and 4096 characters. It is defined in the file dscc4.setup= [NET] - dtc3181e= [HW,SCSI] - dynamic_printk Enables pr_debug()/dev_dbg() calls if CONFIG_DYNAMIC_PRINTK_DEBUG has been enabled. These can also be switched on/off via @@ -686,8 +658,11 @@ and is between 256 and 4096 characters. It is defined in the file earlycon= [KNL] Output early console device and options. uart[8250],io,[,options] uart[8250],mmio,[,options] + uart[8250],mmio32,[,options] Start an early, polled-mode console on the 8250/16550 UART at the specified I/O port or MMIO address. + MMIO inter-register address stride is either 8bit (mmio) + or 32bit (mmio32). The options are the same as for ttyS, above. earlyprintk= [X86,SH,BLACKFIN] @@ -715,8 +690,6 @@ and is between 256 and 4096 characters. It is defined in the file This is desgined to be used in conjunction with the boot argument: earlyprintk=vga - eata= [HW,SCSI] - edd= [EDD] Format: {"off" | "on" | "skip[mbr]"} @@ -772,12 +745,6 @@ and is between 256 and 4096 characters. It is defined in the file Format: ,,, See also /Documentation/fault-injection/. - fd_mcs= [HW,SCSI] - See header of drivers/scsi/fd_mcs.c. - - fdomain= [HW,SCSI] - See header of drivers/scsi/fdomain.c. - floppy= [HW] See Documentation/blockdev/floppy.txt. @@ -837,14 +804,9 @@ and is between 256 and 4096 characters. It is defined in the file When zero, profiling data is discarded and associated debugfs files are removed at module unload time. - gdth= [HW,SCSI] - See header of drivers/scsi/gdth.c. - gpt [EFI] Forces disk with valid GPT signature but invalid Protective MBR to be treated as GPT. - gvp11= [HW,SCSI] - hashdist= [KNL,NUMA] Large hashes allocated during boot are distributed across NUMA nodes. Defaults on for 64bit NUMA, off otherwise. @@ -917,9 +879,6 @@ and is between 256 and 4096 characters. It is defined in the file controller i8042.nopnp [HW] Don't use ACPIPnP / PnPBIOS to discover KBD/AUX controllers - i8042.panicblink= - [HW] Frequency with which keyboard LEDs should blink - when kernel panics (default is 0.5 sec) i8042.reset [HW] Reset the controller during init and cleanup i8042.unlock [HW] Unlock (ignore) the keylock @@ -936,9 +895,6 @@ and is between 256 and 4096 characters. It is defined in the file i8k.restricted [HW] Allow controlling fans only if SYS_ADMIN capability is set. - ibmmcascsi= [HW,MCA,SCSI] IBM MicroChannel SCSI adapter - See Documentation/mca.txt. - icn= [HW,ISDN] Format: [,[,[,]]] @@ -988,9 +944,6 @@ and is between 256 and 4096 characters. It is defined in the file programs exec'd, files mmap'd for exec, and all files opened for read by uid=0. - in2000= [HW,SCSI] - See header of drivers/scsi/in2000.c. - init= [KNL] Format: Run specified binary instead of /sbin/init as init @@ -1028,6 +981,12 @@ and is between 256 and 4096 characters. It is defined in the file result in a hardware IOTLB flush operation as opposed to batching them for performance. + intremap= [X86-64, Intel-IOMMU] + Format: { on (default) | off | nosid } + on enable Interrupt Remapping (default) + off disable Interrupt Remapping + nosid disable Source ID checking + inttest= [IA64] iomem= Disable strict checking of access to MMIO memory @@ -1068,9 +1027,6 @@ and is between 256 and 4096 characters. It is defined in the file See comment before ip2_setup() in drivers/char/ip2/ip2base.c. - ips= [HW,SCSI] Adaptec / IBM ServeRAID controller - See header of drivers/scsi/ips.c. - irqfixup [HW] When an interrupt is not handled search all handlers for it. Intended to get systems with badly broken @@ -1143,9 +1099,12 @@ and is between 256 and 4096 characters. It is defined in the file kgdboc= [KGDB,HW] kgdb over consoles. Requires a tty driver that supports console polling, or a supported polling keyboard driver (non-usb). - Serial only format: [,baud] - keyboard only format: kbd - keyboard and serial format: kbd,[,baud] + Serial only format: [,baud] + keyboard only format: kbd + keyboard and serial format: kbd,[,baud] + Optional Kernel mode setting: + kms, kbd format: kms,kbd + kms, kbd and serial format: kms,kbd,[,baud] kgdbwait [KGDB] Stop kernel execution and enter the kernel debugger at the earliest opportunity. @@ -1343,9 +1302,6 @@ and is between 256 and 4096 characters. It is defined in the file ltpc= [NET] Format: ,, - mac5380= [HW,SCSI] Format: - ,,,, - machvec= [IA64] Force the use of a particular machine-vector (machvec) in a generic kernel. Example: machvec=hpzx1_swiotlb @@ -1367,13 +1323,6 @@ and is between 256 and 4096 characters. It is defined in the file be mounted Format: <1-256> - max_luns= [SCSI] Maximum number of LUNs to probe. - Should be between 1 and 2^32-1. - - max_report_luns= - [SCSI] Maximum number of LUNs received. - Should be between 1 and 16384. - mcatest= [IA-64] mce [X86-32] Machine Check Exception @@ -1523,9 +1472,6 @@ and is between 256 and 4096 characters. It is defined in the file that the amount of memory usable for all allocations is not too small. - mpu401= [HW,OSS] - Format: , - MTD_Partition= [MTD] Format: ,,, @@ -1573,19 +1519,6 @@ and is between 256 and 4096 characters. It is defined in the file n2= [NET] SDL Inc. RISCom/N2 synchronous serial card - NCR_D700= [HW,SCSI] - See header of drivers/scsi/NCR_D700.c. - - ncr5380= [HW,SCSI] - - ncr53c400= [HW,SCSI] - - ncr53c400a= [HW,SCSI] - - ncr53c406a= [HW,SCSI] - - ncr53c8xx= [HW,SCSI] - netdev= [NET] Network devices parameters Format: ,,,, Note that mem_start is often overloaded to mean @@ -1597,8 +1530,7 @@ and is between 256 and 4096 characters. It is defined in the file [NETFILTER] Enable connection tracking flow accounting 0 to disable accounting 1 to enable accounting - Default value depends on CONFIG_NF_CT_ACCT that is - going to be removed in 2.6.29. + Default value is 0. nfsaddrs= [NFS] See Documentation/filesystems/nfs/nfsroot.txt. @@ -1755,6 +1687,7 @@ and is between 256 and 4096 characters. It is defined in the file nointremap [X86-64, Intel-IOMMU] Do not enable interrupt remapping. + [Deprecated - use intremap=off] nointroute [IA-64] @@ -1812,6 +1745,8 @@ and is between 256 and 4096 characters. It is defined in the file nousb [USB] Disable the USB subsystem + nowatchdog [KNL] Disable the lockup detector. + nowb [ARM] nox2apic [X86-64,APIC] Do not enable x2APIC mode. @@ -1849,9 +1784,6 @@ and is between 256 and 4096 characters. It is defined in the file For example, to override I2C bus2: omap_mux=i2c2_scl.i2c2_scl=0x100,i2c2_sda.i2c2_sda=0x100 - opl3= [HW,OSS] - Format: - oprofile.timer= [HW] Use timer interrupt instead of performance counters @@ -1863,9 +1795,8 @@ and is between 256 and 4096 characters. It is defined in the file perfmon on Intel CPUs instead of the CPU specific event set. - osst= [HW,SCSI] SCSI Tape Driver - Format: , - See also Documentation/scsi/st.txt. + OSS [HW,OSS] + See Documentation/sound/oss/oss-parameters.txt panic= [KNL] Kernel behaviour on panic Format: @@ -1899,12 +1830,6 @@ and is between 256 and 4096 characters. It is defined in the file Currently this function knows 686a and 8231 chips. Format: [spp|ps2|epp|ecp|ecpepp] - pas2= [HW,OSS] Format: - ,,,,,,, - - pas16= [HW,SCSI] - See header of drivers/scsi/pas16.c. - pause_on_oops= Halt all CPUs after the first oops has been printed for the specified number of seconds. This is to be used if @@ -1970,6 +1895,8 @@ and is between 256 and 4096 characters. It is defined in the file norom [X86] Do not assign address space to expansion ROMs that do not already have BIOS assigned address ranges. + nobar [X86] Do not assign address space to the + BARs that weren't assigned by the BIOS. irqmask=0xMMMM [X86] Set a bit mask of IRQs allowed to be assigned automatically to PCI devices. You can make the kernel exclude IRQs of your ISA cards @@ -2171,10 +2098,6 @@ and is between 256 and 4096 characters. It is defined in the file [HW,MOUSE] Controls Logitech smartscroll autorepeat. 0 = disabled, 1 = enabled (default). - pss= [HW,OSS] Personal Sound System (ECHO ESC614) - Format: - ,,,,, - pt. [PARIDE] See Documentation/blockdev/paride.txt. @@ -2273,30 +2196,6 @@ and is between 256 and 4096 characters. It is defined in the file sched_debug [KNL] Enables verbose scheduler debug messages. - scsi_debug_*= [SCSI] - See drivers/scsi/scsi_debug.c. - - scsi_default_dev_flags= - [SCSI] SCSI default device flags - Format: - - scsi_dev_flags= [SCSI] Black/white list entry for vendor and model - Format: :: - (flags are integer value) - - scsi_logging_level= [SCSI] a bit mask of logging levels - See drivers/scsi/scsi_logging.h for bits. Also - settable via sysctl at dev.scsi.logging_level - (/proc/sys/dev/scsi/logging_level). - There is also a nice 'scsi_logging_level' script in the - S390-tools package, available for download at - http://www-128.ibm.com/developerworks/linux/linux390/s390-tools-1.5.4.html - - scsi_mod.scan= [SCSI] sync (default) scans SCSI busses as they are - discovered. async scans them in kernel threads, - allowing boot to proceed. none ignores them, expecting - user space to do the scan. - security= [SECURITY] Choose a security module to enable at boot. If this boot parameter is not specified, only the first security module asking for security registration will be @@ -2312,6 +2211,13 @@ and is between 256 and 4096 characters. It is defined in the file If enabled at boot time, /selinux/disable can be used later to disable prior to initial policy load. + apparmor= [APPARMOR] Disable or enable AppArmor at boot time + Format: { "0" | "1" } + See security/apparmor/Kconfig help text + 0 -- disable. + 1 -- enable. + Default value is set via kernel config option. + serialnumber [BUGS=X86-32] shapers= [NET] @@ -2323,9 +2229,6 @@ and is between 256 and 4096 characters. It is defined in the file The parameter means the number of CPUs to show, for example 1 means boot CPU only. - sim710= [SCSI,HW] - See header of drivers/scsi/sim710.c. - simeth= [IA-64] simscsi= @@ -2383,128 +2286,6 @@ and is between 256 and 4096 characters. It is defined in the file 1: Fast pin select (default) 2: ATC IRMode - snd-ad1816a= [HW,ALSA] - - snd-ad1848= [HW,ALSA] - - snd-ali5451= [HW,ALSA] - - snd-als100= [HW,ALSA] - - snd-als4000= [HW,ALSA] - - snd-azt2320= [HW,ALSA] - - snd-cmi8330= [HW,ALSA] - - snd-cmipci= [HW,ALSA] - - snd-cs4231= [HW,ALSA] - - snd-cs4232= [HW,ALSA] - - snd-cs4236= [HW,ALSA] - - snd-cs4281= [HW,ALSA] - - snd-cs46xx= [HW,ALSA] - - snd-dt019x= [HW,ALSA] - - snd-dummy= [HW,ALSA] - - snd-emu10k1= [HW,ALSA] - - snd-ens1370= [HW,ALSA] - - snd-ens1371= [HW,ALSA] - - snd-es968= [HW,ALSA] - - snd-es1688= [HW,ALSA] - - snd-es18xx= [HW,ALSA] - - snd-es1938= [HW,ALSA] - - snd-es1968= [HW,ALSA] - - snd-fm801= [HW,ALSA] - - snd-gusclassic= [HW,ALSA] - - snd-gusextreme= [HW,ALSA] - - snd-gusmax= [HW,ALSA] - - snd-hdsp= [HW,ALSA] - - snd-ice1712= [HW,ALSA] - - snd-intel8x0= [HW,ALSA] - - snd-interwave= [HW,ALSA] - - snd-interwave-stb= - [HW,ALSA] - - snd-korg1212= [HW,ALSA] - - snd-maestro3= [HW,ALSA] - - snd-mpu401= [HW,ALSA] - - snd-mtpav= [HW,ALSA] - - snd-nm256= [HW,ALSA] - - snd-opl3sa2= [HW,ALSA] - - snd-opti92x-ad1848= - [HW,ALSA] - - snd-opti92x-cs4231= - [HW,ALSA] - - snd-opti93x= [HW,ALSA] - - snd-pmac= [HW,ALSA] - - snd-rme32= [HW,ALSA] - - snd-rme96= [HW,ALSA] - - snd-rme9652= [HW,ALSA] - - snd-sb8= [HW,ALSA] - - snd-sb16= [HW,ALSA] - - snd-sbawe= [HW,ALSA] - - snd-serial= [HW,ALSA] - - snd-sgalaxy= [HW,ALSA] - - snd-sonicvibes= [HW,ALSA] - - snd-sun-amd7930= - [HW,ALSA] - - snd-sun-cs4231= [HW,ALSA] - - snd-trident= [HW,ALSA] - - snd-usb-audio= [HW,ALSA,USB] - - snd-via82xx= [HW,ALSA] - - snd-virmidi= [HW,ALSA] - - snd-wavefront= [HW,ALSA] - - snd-ymfpci= [HW,ALSA] - softlockup_panic= [KNL] Should the soft-lockup detector generate panics. @@ -2519,12 +2300,6 @@ and is between 256 and 4096 characters. It is defined in the file spia_pedr= spia_peddr= - sscape= [HW,OSS] - Format: ,,,, - - st= [HW,SCSI] SCSI tape parameters (buffers, etc.) - See Documentation/scsi/st.txt. - stacktrace [FTRACE] Enabled the stack tracer on boot up. @@ -2582,18 +2357,12 @@ and is between 256 and 4096 characters. It is defined in the file switches= [HW,M68k] - sym53c416= [HW,SCSI] - See header of drivers/scsi/sym53c416.c. - sysrq_always_enabled [KNL] Ignore sysrq setting - this boot parameter will neutralize any effect of /proc/sys/kernel/sysrq. Useful for debugging. - t128= [HW,SCSI] - See header of drivers/scsi/t128.c. - tdfx= [HW,DRM] test_suspend= [SUSPEND] @@ -2630,10 +2399,6 @@ and is between 256 and 4096 characters. It is defined in the file : poll all this frequency 0: no polling (default) - tmscsim= [HW,SCSI] - See comment before function dc390_setup() in - drivers/scsi/tmscsim.c. - topology= [S390] Format: {off | on} Specify if the kernel should make use of the cpu @@ -2661,10 +2426,6 @@ and is between 256 and 4096 characters. It is defined in the file to facilitate early boot debugging. See also Documentation/trace/events.txt - trix= [HW,OSS] MediaTrix AudioTrix Pro - Format: - ,,,,,,,, - tsc= Disable clocksource-must-verify flag for TSC. Format: [x86] reliable: mark tsc clocksource as reliable, this @@ -2678,15 +2439,6 @@ and is between 256 and 4096 characters. It is defined in the file ,,,,,,, See also Documentation/input/joystick-parport.txt - u14-34f= [HW,SCSI] UltraStor 14F/34F SCSI host adapter - See header of drivers/scsi/u14-34f.c. - - uart401= [HW,OSS] - Format: , - - uart6850= [HW,OSS] - Format: , - uhash_entries= [KNL,NET] Set number of hash buckets for UDP/UDP-Lite connections @@ -2852,15 +2604,6 @@ and is between 256 and 4096 characters. It is defined in the file overridden by individual drivers. 0 will hide cursors, 1 will display them. - waveartist= [HW,OSS] - Format: ,,, - - wd33c93= [HW,SCSI] - See header of drivers/scsi/wd33c93.c. - - wd7000= [HW,SCSI] - See header of drivers/scsi/wd7000.c. - watchdog timers [HW,WDT] For information on watchdog timers, see Documentation/watchdog/watchdog-parameters.txt or other driver-specific files in the @@ -2879,6 +2622,16 @@ and is between 256 and 4096 characters. It is defined in the file xd= [HW,XT] Original XT pre-IDE (RLL encoded) disks. xd_geo= See header of drivers/block/xd.c. + xen_emul_unplug= [HW,X86,XEN] + Unplug Xen emulated devices + Format: [unplug0,][unplug1] + ide-disks -- unplug primary master IDE devices + aux-ide-disks -- unplug non-primary-master IDE devices + nics -- unplug network devices + all -- unplug all emulated devices (NICs and IDE disks) + ignore -- continue loading the Xen platform PCI driver even + if the version check failed + xirc2ps_cs= [NET,PCMCIA] Format: ,,,,,[,[,[,]]] @@ -2887,5 +2640,4 @@ ______________________________________________________________________ TODO: - Add documentation for ALSA options. Add more DRM drivers. diff --git a/Documentation/ko_KR/HOWTO b/Documentation/ko_KR/HOWTO index 029fca914c05..e3a55b6091e9 100644 --- a/Documentation/ko_KR/HOWTO +++ b/Documentation/ko_KR/HOWTO @@ -122,7 +122,7 @@ mtk.manpages@gmail.comì˜ ë©”ì¸í…Œì´ë„ˆì—게 보낼 ê²ƒì„ ê¶Œìž¥í•œë‹¤. 올바른 íŒ¨ì¹˜ë“¤ì„ ë§Œë“œëŠ” ë²•ì— ê´€í•œ 훌륭한 다른 ë¬¸ì„œë“¤ì´ ìžˆë‹¤. "The Perfect Patch" - http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt + http://userweb.kernel.org/~akpm/stuff/tpp.txt "Linux kernel patch submission format" http://linux.yyz.us/patch-format.html @@ -192,7 +192,7 @@ Documentation/DocBook/ 디렉토리 ë‚´ì—ì„œ 만들어지며 PDF, Postscript, H ì—¬ëŸ¬ë¶„ì´ ì–´ë””ì„œ 시작해야 할진 모르지만 ì»¤ë„ ê°œë°œ ì»¤ë®¤ë‹ˆí‹°ì— ì°¸ì—¬í•  수 있는 ì¼ë“¤ì„ 찾길 ì›í•œë‹¤ë©´ 리눅스 ì»¤ë„ Janitor 프로ì íŠ¸ë¥¼ 살펴ë´ë¼. - http://janitor.kernelnewbies.org/ + http://kernelnewbies.org/KernelJanitors ê·¸ê³³ì€ ì‹œìž‘í•˜ê¸°ì— í›Œë¥­í•œ 장소ì´ë‹¤. ê·¸ê³³ì€ ë¦¬ëˆ…ìŠ¤ ì»¤ë„ ì†ŒìŠ¤ íŠ¸ë¦¬ë‚´ì— ê°„ë‹¨ížˆ 정리ë˜ê³  ìˆ˜ì •ë  ìˆ˜ 있는 ë¬¸ì œë“¤ì— ê´€í•˜ì—¬ 설명한다. ì—¬ëŸ¬ë¶„ì€ ì´ í”„ë¡œì íŠ¸ë¥¼ 대표하는 개발ìžë“¤ê³¼ ì¼í•˜ë©´ì„œ ìžì‹ ì˜ 패치를 리눅스 ì»¤ë„ íŠ¸ë¦¬ì— @@ -596,7 +596,7 @@ Patì´ë¼ëŠ” ì´ë¦„ì„ ê°€ì§„ ì—¬ìžê°€ ìžˆì„ ìˆ˜ë„ ìžˆëŠ” 것ì´ë‹¤. 리눅 ì´ê²ƒì´ 무엇ì¸ì§€ ë” ìžì„¸í•œ ê²ƒì„ ì•Œê³  싶다면 ë‹¤ìŒ ë¬¸ì„œì˜ ChageLog í•­ì„ ë´ë¼. "The Perfect Patch" - http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt + http://userweb.kernel.org/~akpm/stuff/tpp.txt @@ -610,7 +610,7 @@ Patì´ë¼ëŠ” ì´ë¦„ì„ ê°€ì§„ ì—¬ìžê°€ ìžˆì„ ìˆ˜ë„ ìžˆëŠ” 것ì´ë‹¤. 리눅 ---------- -"개발 프로세스"(http://linux.tar.gz/articles/2.6-development_process) ì„¹ì…˜ì„ +"개발 프로세스"(http://lwn.net/Articles/94386/) ì„¹ì…˜ì„ ìž‘ì„±í•˜ëŠ”ë° ìžˆì–´ 참고할 문서를 사용하ë„ë¡ í—ˆë½í•´ì¤€ Paolo Ciarrocchiì—게 ê°ì‚¬í•œë‹¤. ì—¬ëŸ¬ë¶„ë“¤ì´ ë§í•´ì•¼ í•  것과 ë§í•´ì„œëŠ” 안ë˜ëŠ” ê²ƒì˜ ëª©ë¡ ì¤‘ ì¼ë¶€ë¥¼ 제공해준 Randy Dunlapê³¼ Gerrit Huizengaì—게 ê°ì‚¬í•œë‹¤. ë˜í•œ 검토와 ì˜ê²¬ 그리고 diff --git a/Documentation/kprobes.txt b/Documentation/kprobes.txt index 6653017680dd..1762b81fcdf2 100644 --- a/Documentation/kprobes.txt +++ b/Documentation/kprobes.txt @@ -285,6 +285,7 @@ architectures: - sparc64 (Return probes not yet implemented.) - arm - ppc +- mips 3. Configuring Kprobes diff --git a/Documentation/kvm/api.txt b/Documentation/kvm/api.txt index a237518e51b9..5f5b64982b1a 100644 --- a/Documentation/kvm/api.txt +++ b/Documentation/kvm/api.txt @@ -126,6 +126,10 @@ user fills in the size of the indices array in nmsrs, and in return kvm adjusts nmsrs to reflect the actual number of msrs and fills in the indices array with their numbers. +Note: if kvm indicates supports MCE (KVM_CAP_MCE), then the MCE bank MSRs are +not returned in the MSR list, as different vcpus can have a different number +of banks, as set via the KVM_X86_SETUP_MCE ioctl. + 4.4 KVM_CHECK_EXTENSION Capability: basic @@ -160,29 +164,7 @@ Type: vm ioctl Parameters: struct kvm_memory_region (in) Returns: 0 on success, -1 on error -struct kvm_memory_region { - __u32 slot; - __u32 flags; - __u64 guest_phys_addr; - __u64 memory_size; /* bytes */ -}; - -/* for kvm_memory_region::flags */ -#define KVM_MEM_LOG_DIRTY_PAGES 1UL - -This ioctl allows the user to create or modify a guest physical memory -slot. When changing an existing slot, it may be moved in the guest -physical memory space, or its flags may be modified. It may not be -resized. Slots may not overlap. - -The flags field supports just one flag, KVM_MEM_LOG_DIRTY_PAGES, which -instructs kvm to keep track of writes to memory within the slot. See -the KVM_GET_DIRTY_LOG ioctl. - -It is recommended to use the KVM_SET_USER_MEMORY_REGION ioctl instead -of this API, if available. This newer API allows placing guest memory -at specified locations in the host address space, yielding better -control and easy access. +This ioctl is obsolete and has been removed. 4.6 KVM_CREATE_VCPU @@ -226,17 +208,7 @@ Type: vm ioctl Parameters: struct kvm_memory_alias (in) Returns: 0 (success), -1 (error) -struct kvm_memory_alias { - __u32 slot; /* this has a different namespace than memory slots */ - __u32 flags; - __u64 guest_phys_addr; - __u64 memory_size; - __u64 target_phys_addr; -}; - -Defines a guest physical address space region as an alias to another -region. Useful for aliased address, for example the VGA low memory -window. Should not be used with userspace memory. +This ioctl is obsolete and has been removed. 4.9 KVM_RUN @@ -892,6 +864,174 @@ arguments. This ioctl is only useful after KVM_CREATE_IRQCHIP. Without an in-kernel irqchip, the multiprocessing state must be maintained by userspace. +4.39 KVM_SET_IDENTITY_MAP_ADDR + +Capability: KVM_CAP_SET_IDENTITY_MAP_ADDR +Architectures: x86 +Type: vm ioctl +Parameters: unsigned long identity (in) +Returns: 0 on success, -1 on error + +This ioctl defines the physical address of a one-page region in the guest +physical address space. The region must be within the first 4GB of the +guest physical address space and must not conflict with any memory slot +or any mmio address. The guest may malfunction if it accesses this memory +region. + +This ioctl is required on Intel-based hosts. This is needed on Intel hardware +because of a quirk in the virtualization implementation (see the internals +documentation when it pops into existence). + +4.40 KVM_SET_BOOT_CPU_ID + +Capability: KVM_CAP_SET_BOOT_CPU_ID +Architectures: x86, ia64 +Type: vm ioctl +Parameters: unsigned long vcpu_id +Returns: 0 on success, -1 on error + +Define which vcpu is the Bootstrap Processor (BSP). Values are the same +as the vcpu id in KVM_CREATE_VCPU. If this ioctl is not called, the default +is vcpu 0. + +4.41 KVM_GET_XSAVE + +Capability: KVM_CAP_XSAVE +Architectures: x86 +Type: vcpu ioctl +Parameters: struct kvm_xsave (out) +Returns: 0 on success, -1 on error + +struct kvm_xsave { + __u32 region[1024]; +}; + +This ioctl would copy current vcpu's xsave struct to the userspace. + +4.42 KVM_SET_XSAVE + +Capability: KVM_CAP_XSAVE +Architectures: x86 +Type: vcpu ioctl +Parameters: struct kvm_xsave (in) +Returns: 0 on success, -1 on error + +struct kvm_xsave { + __u32 region[1024]; +}; + +This ioctl would copy userspace's xsave struct to the kernel. + +4.43 KVM_GET_XCRS + +Capability: KVM_CAP_XCRS +Architectures: x86 +Type: vcpu ioctl +Parameters: struct kvm_xcrs (out) +Returns: 0 on success, -1 on error + +struct kvm_xcr { + __u32 xcr; + __u32 reserved; + __u64 value; +}; + +struct kvm_xcrs { + __u32 nr_xcrs; + __u32 flags; + struct kvm_xcr xcrs[KVM_MAX_XCRS]; + __u64 padding[16]; +}; + +This ioctl would copy current vcpu's xcrs to the userspace. + +4.44 KVM_SET_XCRS + +Capability: KVM_CAP_XCRS +Architectures: x86 +Type: vcpu ioctl +Parameters: struct kvm_xcrs (in) +Returns: 0 on success, -1 on error + +struct kvm_xcr { + __u32 xcr; + __u32 reserved; + __u64 value; +}; + +struct kvm_xcrs { + __u32 nr_xcrs; + __u32 flags; + struct kvm_xcr xcrs[KVM_MAX_XCRS]; + __u64 padding[16]; +}; + +This ioctl would set vcpu's xcr to the value userspace specified. + +4.45 KVM_GET_SUPPORTED_CPUID + +Capability: KVM_CAP_EXT_CPUID +Architectures: x86 +Type: system ioctl +Parameters: struct kvm_cpuid2 (in/out) +Returns: 0 on success, -1 on error + +struct kvm_cpuid2 { + __u32 nent; + __u32 padding; + struct kvm_cpuid_entry2 entries[0]; +}; + +#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1 +#define KVM_CPUID_FLAG_STATEFUL_FUNC 2 +#define KVM_CPUID_FLAG_STATE_READ_NEXT 4 + +struct kvm_cpuid_entry2 { + __u32 function; + __u32 index; + __u32 flags; + __u32 eax; + __u32 ebx; + __u32 ecx; + __u32 edx; + __u32 padding[3]; +}; + +This ioctl returns x86 cpuid features which are supported by both the hardware +and kvm. Userspace can use the information returned by this ioctl to +construct cpuid information (for KVM_SET_CPUID2) that is consistent with +hardware, kernel, and userspace capabilities, and with user requirements (for +example, the user may wish to constrain cpuid to emulate older hardware, +or for feature consistency across a cluster). + +Userspace invokes KVM_GET_SUPPORTED_CPUID by passing a kvm_cpuid2 structure +with the 'nent' field indicating the number of entries in the variable-size +array 'entries'. If the number of entries is too low to describe the cpu +capabilities, an error (E2BIG) is returned. If the number is too high, +the 'nent' field is adjusted and an error (ENOMEM) is returned. If the +number is just right, the 'nent' field is adjusted to the number of valid +entries in the 'entries' array, which is then filled. + +The entries returned are the host cpuid as returned by the cpuid instruction, +with unknown or unsupported features masked out. The fields in each entry +are defined as follows: + + function: the eax value used to obtain the entry + index: the ecx value used to obtain the entry (for entries that are + affected by ecx) + flags: an OR of zero or more of the following: + KVM_CPUID_FLAG_SIGNIFCANT_INDEX: + if the index field is valid + KVM_CPUID_FLAG_STATEFUL_FUNC: + if cpuid for this function returns different values for successive + invocations; there will be several entries with the same function, + all with this flag set + KVM_CPUID_FLAG_STATE_READ_NEXT: + for KVM_CPUID_FLAG_STATEFUL_FUNC entries, set if this entry is + the first entry to be read by a cpu + eax, ebx, ecx, edx: the values returned by the cpuid instruction for + this function/index combination + 5. The kvm_run structure Application code obtains a pointer to the kvm_run structure by diff --git a/Documentation/kvm/mmu.txt b/Documentation/kvm/mmu.txt index aaed6ab9d7ab..142cc5136650 100644 --- a/Documentation/kvm/mmu.txt +++ b/Documentation/kvm/mmu.txt @@ -77,10 +77,10 @@ Memory Guest memory (gpa) is part of the user address space of the process that is using kvm. Userspace defines the translation between guest addresses and user -addresses (gpa->hva); note that two gpas may alias to the same gva, but not +addresses (gpa->hva); note that two gpas may alias to the same hva, but not vice versa. -These gvas may be backed using any method available to the host: anonymous +These hvas may be backed using any method available to the host: anonymous memory, file backed memory, and device memory. Memory might be paged by the host at any time. @@ -161,7 +161,7 @@ Shadow pages contain the following information: role.cr4_pae: Contains the value of cr4.pae for which the page is valid (e.g. whether 32-bit or 64-bit gptes are in use). - role.cr4_nxe: + role.nxe: Contains the value of efer.nxe for which the page is valid. role.cr0_wp: Contains the value of cr0.wp for which the page is valid. @@ -180,7 +180,9 @@ Shadow pages contain the following information: guest pages as leaves. gfns: An array of 512 guest frame numbers, one for each present pte. Used to - perform a reverse map from a pte to a gfn. + perform a reverse map from a pte to a gfn. When role.direct is set, any + element of this array can be calculated from the gfn field when used, in + this case, the array of gfns is not allocated. See role.direct and gfn. slot_bitmap: A bitmap containing one bit per memory slot. If the page contains a pte mapping a page from memory slot n, then bit n of slot_bitmap will be set @@ -296,6 +298,48 @@ Host translation updates: - look up affected sptes through reverse map - drop (or update) translations +Emulating cr0.wp +================ + +If tdp is not enabled, the host must keep cr0.wp=1 so page write protection +works for the guest kernel, not guest guest userspace. When the guest +cr0.wp=1, this does not present a problem. However when the guest cr0.wp=0, +we cannot map the permissions for gpte.u=1, gpte.w=0 to any spte (the +semantics require allowing any guest kernel access plus user read access). + +We handle this by mapping the permissions to two possible sptes, depending +on fault type: + +- kernel write fault: spte.u=0, spte.w=1 (allows full kernel access, + disallows user access) +- read fault: spte.u=1, spte.w=0 (allows full read access, disallows kernel + write access) + +(user write faults generate a #PF) + +Large pages +=========== + +The mmu supports all combinations of large and small guest and host pages. +Supported page sizes include 4k, 2M, 4M, and 1G. 4M pages are treated as +two separate 2M pages, on both guest and host, since the mmu always uses PAE +paging. + +To instantiate a large spte, four constraints must be satisfied: + +- the spte must point to a large host page +- the guest pte must be a large pte of at least equivalent size (if tdp is + enabled, there is no guest pte and this condition is satisified) +- if the spte will be writeable, the large page frame may not overlap any + write-protected pages +- the guest page must be wholly contained by a single memory slot + +To check the last two conditions, the mmu maintains a ->write_count set of +arrays for each memory slot and large page size. Every write protected page +causes its write_count to be incremented, thus preventing instantiation of +a large spte. The frames at the end of an unaligned memory slot have +artificically inflated ->write_counts so they can never be instantiated. + Further reading =============== diff --git a/Documentation/kvm/msr.txt b/Documentation/kvm/msr.txt new file mode 100644 index 000000000000..8ddcfe84c09a --- /dev/null +++ b/Documentation/kvm/msr.txt @@ -0,0 +1,153 @@ +KVM-specific MSRs. +Glauber Costa , Red Hat Inc, 2010 +===================================================== + +KVM makes use of some custom MSRs to service some requests. +At present, this facility is only used by kvmclock. + +Custom MSRs have a range reserved for them, that goes from +0x4b564d00 to 0x4b564dff. There are MSRs outside this area, +but they are deprecated and their use is discouraged. + +Custom MSR list +-------- + +The current supported Custom MSR list is: + +MSR_KVM_WALL_CLOCK_NEW: 0x4b564d00 + + data: 4-byte alignment physical address of a memory area which must be + in guest RAM. This memory is expected to hold a copy of the following + structure: + + struct pvclock_wall_clock { + u32 version; + u32 sec; + u32 nsec; + } __attribute__((__packed__)); + + whose data will be filled in by the hypervisor. The hypervisor is only + guaranteed to update this data at the moment of MSR write. + Users that want to reliably query this information more than once have + to write more than once to this MSR. Fields have the following meanings: + + version: guest has to check version before and after grabbing + time information and check that they are both equal and even. + An odd version indicates an in-progress update. + + sec: number of seconds for wallclock. + + nsec: number of nanoseconds for wallclock. + + Note that although MSRs are per-CPU entities, the effect of this + particular MSR is global. + + Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid + leaf prior to usage. + +MSR_KVM_SYSTEM_TIME_NEW: 0x4b564d01 + + data: 4-byte aligned physical address of a memory area which must be in + guest RAM, plus an enable bit in bit 0. This memory is expected to hold + a copy of the following structure: + + struct pvclock_vcpu_time_info { + u32 version; + u32 pad0; + u64 tsc_timestamp; + u64 system_time; + u32 tsc_to_system_mul; + s8 tsc_shift; + u8 flags; + u8 pad[2]; + } __attribute__((__packed__)); /* 32 bytes */ + + whose data will be filled in by the hypervisor periodically. Only one + write, or registration, is needed for each VCPU. The interval between + updates of this structure is arbitrary and implementation-dependent. + The hypervisor may update this structure at any time it sees fit until + anything with bit0 == 0 is written to it. + + Fields have the following meanings: + + version: guest has to check version before and after grabbing + time information and check that they are both equal and even. + An odd version indicates an in-progress update. + + tsc_timestamp: the tsc value at the current VCPU at the time + of the update of this structure. Guests can subtract this value + from current tsc to derive a notion of elapsed time since the + structure update. + + system_time: a host notion of monotonic time, including sleep + time at the time this structure was last updated. Unit is + nanoseconds. + + tsc_to_system_mul: a function of the tsc frequency. One has + to multiply any tsc-related quantity by this value to get + a value in nanoseconds, besides dividing by 2^tsc_shift + + tsc_shift: cycle to nanosecond divider, as a power of two, to + allow for shift rights. One has to shift right any tsc-related + quantity by this value to get a value in nanoseconds, besides + multiplying by tsc_to_system_mul. + + With this information, guests can derive per-CPU time by + doing: + + time = (current_tsc - tsc_timestamp) + time = (time * tsc_to_system_mul) >> tsc_shift + time = time + system_time + + flags: bits in this field indicate extended capabilities + coordinated between the guest and the hypervisor. Availability + of specific flags has to be checked in 0x40000001 cpuid leaf. + Current flags are: + + flag bit | cpuid bit | meaning + ------------------------------------------------------------- + | | time measures taken across + 0 | 24 | multiple cpus are guaranteed to + | | be monotonic + ------------------------------------------------------------- + + Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid + leaf prior to usage. + + +MSR_KVM_WALL_CLOCK: 0x11 + + data and functioning: same as MSR_KVM_WALL_CLOCK_NEW. Use that instead. + + This MSR falls outside the reserved KVM range and may be removed in the + future. Its usage is deprecated. + + Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid + leaf prior to usage. + +MSR_KVM_SYSTEM_TIME: 0x12 + + data and functioning: same as MSR_KVM_SYSTEM_TIME_NEW. Use that instead. + + This MSR falls outside the reserved KVM range and may be removed in the + future. Its usage is deprecated. + + Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid + leaf prior to usage. + + The suggested algorithm for detecting kvmclock presence is then: + + if (!kvm_para_available()) /* refer to cpuid.txt */ + return NON_PRESENT; + + flags = cpuid_eax(0x40000001); + if (flags & 3) { + msr_kvm_system_time = MSR_KVM_SYSTEM_TIME_NEW; + msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK_NEW; + return PRESENT; + } else if (flags & 0) { + msr_kvm_system_time = MSR_KVM_SYSTEM_TIME; + msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK; + return PRESENT; + } else + return NON_PRESENT; diff --git a/Documentation/kvm/review-checklist.txt b/Documentation/kvm/review-checklist.txt new file mode 100644 index 000000000000..730475ae1b8d --- /dev/null +++ b/Documentation/kvm/review-checklist.txt @@ -0,0 +1,38 @@ +Review checklist for kvm patches +================================ + +1. The patch must follow Documentation/CodingStyle and + Documentation/SubmittingPatches. + +2. Patches should be against kvm.git master branch. + +3. If the patch introduces or modifies a new userspace API: + - the API must be documented in Documentation/kvm/api.txt + - the API must be discoverable using KVM_CHECK_EXTENSION + +4. New state must include support for save/restore. + +5. New features must default to off (userspace should explicitly request them). + Performance improvements can and should default to on. + +6. New cpu features should be exposed via KVM_GET_SUPPORTED_CPUID2 + +7. Emulator changes should be accompanied by unit tests for qemu-kvm.git + kvm/test directory. + +8. Changes should be vendor neutral when possible. Changes to common code + are better than duplicating changes to vendor code. + +9. Similarly, prefer changes to arch independent code than to arch dependent + code. + +10. User/kernel interfaces and guest/host interfaces must be 64-bit clean + (all variables and sizes naturally aligned on 64-bit; use specific types + only - u64 rather than ulong). + +11. New guest visible features must either be documented in a hardware manual + or be accompanied by documentation. + +12. Features must be robust against reset and kexec - for example, shared + host/guest memory must be unshared to prevent the host from writing to + guest memory that the guest has not reserved for this purpose. diff --git a/Documentation/laptops/acer-wmi.txt b/Documentation/laptops/acer-wmi.txt index 0768fcc3ba3e..4beafa663dd6 100644 --- a/Documentation/laptops/acer-wmi.txt +++ b/Documentation/laptops/acer-wmi.txt @@ -173,7 +173,7 @@ Credits ******* Olaf Tauber, who did the real hard work when he developed acerhk -http://www.informatik.hu-berlin.de/~tauber/acerhk +http://www.cakey.de/acerhk/ All the authors of laptop ACPI modules in the kernel, whose work was an inspiration in the early days of acer_acpi Mathieu Segaud, who solved the problem with having to modprobe the driver diff --git a/Documentation/laptops/thinkpad-acpi.txt b/Documentation/laptops/thinkpad-acpi.txt index fc15538d8b46..f6f80257addb 100644 --- a/Documentation/laptops/thinkpad-acpi.txt +++ b/Documentation/laptops/thinkpad-acpi.txt @@ -960,70 +960,21 @@ Sysfs notes: subsystem, and follow all of the hwmon guidelines at Documentation/hwmon. +EXPERIMENTAL: Embedded controller register dump +----------------------------------------------- -EXPERIMENTAL: Embedded controller register dump -- /proc/acpi/ibm/ecdump ------------------------------------------------------------------------- +This feature is not included in the thinkpad driver anymore. +Instead the EC can be accessed through /sys/kernel/debug/ec with +a userspace tool which can be found here: +ftp://ftp.suse.com/pub/people/trenn/sources/ec -This feature is marked EXPERIMENTAL because the implementation -directly accesses hardware registers and may not work as expected. USE -WITH CAUTION! To use this feature, you need to supply the -experimental=1 parameter when loading the module. - -This feature dumps the values of 256 embedded controller -registers. Values which have changed since the last time the registers -were dumped are marked with a star: - -[root@x40 ibm-acpi]# cat /proc/acpi/ibm/ecdump -EC +00 +01 +02 +03 +04 +05 +06 +07 +08 +09 +0a +0b +0c +0d +0e +0f -EC 0x00: a7 47 87 01 fe 96 00 08 01 00 cb 00 00 00 40 00 -EC 0x10: 00 00 ff ff f4 3c 87 09 01 ff 42 01 ff ff 0d 00 -EC 0x20: 00 00 00 00 00 00 00 00 00 00 00 03 43 00 00 80 -EC 0x30: 01 07 1a 00 30 04 00 00 *85 00 00 10 00 50 00 00 -EC 0x40: 00 00 00 00 00 00 14 01 00 04 00 00 00 00 00 00 -EC 0x50: 00 c0 02 0d 00 01 01 02 02 03 03 03 03 *bc *02 *bc -EC 0x60: *02 *bc *02 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0x70: 00 00 00 00 00 12 30 40 *24 *26 *2c *27 *20 80 *1f 80 -EC 0x80: 00 00 00 06 *37 *0e 03 00 00 00 0e 07 00 00 00 00 -EC 0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0xa0: *ff 09 ff 09 ff ff *64 00 *00 *00 *a2 41 *ff *ff *e0 00 -EC 0xb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0xc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0xd0: 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0xe0: 00 00 00 00 00 00 00 00 11 20 49 04 24 06 55 03 -EC 0xf0: 31 55 48 54 35 38 57 57 08 2f 45 73 07 65 6c 1a - -This feature can be used to determine the register holding the fan +Use it to determine the register holding the fan speed on some models. To do that, do the following: - - make sure the battery is fully charged - make sure the fan is running - - run 'cat /proc/acpi/ibm/ecdump' several times, once per second or so + - use above mentioned tool to read out the EC -The first step makes sure various charging-related values don't -vary. The second ensures that the fan-related values do vary, since -the fan speed fluctuates a bit. The third will (hopefully) mark the -fan register with a star: - -[root@x40 ibm-acpi]# cat /proc/acpi/ibm/ecdump -EC +00 +01 +02 +03 +04 +05 +06 +07 +08 +09 +0a +0b +0c +0d +0e +0f -EC 0x00: a7 47 87 01 fe 96 00 08 01 00 cb 00 00 00 40 00 -EC 0x10: 00 00 ff ff f4 3c 87 09 01 ff 42 01 ff ff 0d 00 -EC 0x20: 00 00 00 00 00 00 00 00 00 00 00 03 43 00 00 80 -EC 0x30: 01 07 1a 00 30 04 00 00 85 00 00 10 00 50 00 00 -EC 0x40: 00 00 00 00 00 00 14 01 00 04 00 00 00 00 00 00 -EC 0x50: 00 c0 02 0d 00 01 01 02 02 03 03 03 03 bc 02 bc -EC 0x60: 02 bc 02 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0x70: 00 00 00 00 00 12 30 40 24 27 2c 27 21 80 1f 80 -EC 0x80: 00 00 00 06 *be 0d 03 00 00 00 0e 07 00 00 00 00 -EC 0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0xa0: ff 09 ff 09 ff ff 64 00 00 00 a2 41 ff ff e0 00 -EC 0xb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0xc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0xd0: 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -EC 0xe0: 00 00 00 00 00 00 00 00 11 20 49 04 24 06 55 03 -EC 0xf0: 31 55 48 54 35 38 57 57 08 2f 45 73 07 65 6c 1a - -Another set of values that varies often is the temperature +Often fan and temperature values vary between readings. Since temperatures don't change vary fast, you can take several quick dumps to eliminate them. diff --git a/Documentation/ldm.txt b/Documentation/ldm.txt index 718085bc9f1a..4f80edd14d0a 100644 --- a/Documentation/ldm.txt +++ b/Documentation/ldm.txt @@ -98,7 +98,7 @@ More Documentation There is an Overview of the LDM together with complete Technical Documentation. It is available for download. - http://www.linux-ntfs.org/content/view/19/37/ + http://www.linux-ntfs.org/ If you have any LDM questions that aren't answered in the documentation, email me. diff --git a/Documentation/md.txt b/Documentation/md.txt index e4e893ef3e01..a81c7b4790f2 100644 --- a/Documentation/md.txt +++ b/Documentation/md.txt @@ -1,5 +1,5 @@ Tools that manage md devices can be found at - http://www..kernel.org/pub/linux/utils/raid/.... + http://www.kernel.org/pub/linux/utils/raid/ Boot time assembly of RAID arrays diff --git a/Documentation/misc-devices/c2port.txt b/Documentation/misc-devices/c2port.txt index d9bf93ea4398..ea7344465610 100644 --- a/Documentation/misc-devices/c2port.txt +++ b/Documentation/misc-devices/c2port.txt @@ -32,10 +32,10 @@ The C2 Interface main references are at (http://www.silabs.com) Silicon Laboratories site], see: - AN127: FLASH Programming via the C2 Interface at -http://www.silabs.com/public/documents/tpub_doc/anote/Microcontrollers/Small_Form_Factor/en/an127.pdf, and +http://www.silabs.com/Support Documents/TechnicalDocs/an127.pdf - C2 Specification at -http://www.silabs.com/public/documents/tpub_doc/spec/Microcontrollers/en/C2spec.pdf, +http://www.silabs.com/pages/DownloadDoc.aspx?FILEURL=Support%20Documents/TechnicalDocs/an127.pdf&src=SearchResults however it implements a two wire serial communication protocol (bit banging) designed to enable in-system programming, debugging, and diff --git a/Documentation/mmc/00-INDEX b/Documentation/mmc/00-INDEX new file mode 100644 index 000000000000..fca586f5b853 --- /dev/null +++ b/Documentation/mmc/00-INDEX @@ -0,0 +1,4 @@ +00-INDEX + - this file +mmc-dev-attrs.txt + - info on SD and MMC device attributes diff --git a/Documentation/mmc/mmc-dev-attrs.txt b/Documentation/mmc/mmc-dev-attrs.txt new file mode 100644 index 000000000000..ff2bd685bced --- /dev/null +++ b/Documentation/mmc/mmc-dev-attrs.txt @@ -0,0 +1,56 @@ +SD and MMC Device Attributes +============================ + +All attributes are read-only. + + cid Card Identifaction Register + csd Card Specific Data Register + scr SD Card Configuration Register (SD only) + date Manufacturing Date (from CID Register) + fwrev Firmware/Product Revision (from CID Register) (SD and MMCv1 only) + hwrev Hardware/Product Revision (from CID Register) (SD and MMCv1 only) + manfid Manufacturer ID (from CID Register) + name Product Name (from CID Register) + oemid OEM/Application ID (from CID Register) + serial Product Serial Number (from CID Register) + erase_size Erase group size + preferred_erase_size Preferred erase size + +Note on Erase Size and Preferred Erase Size: + + "erase_size" is the minimum size, in bytes, of an erase + operation. For MMC, "erase_size" is the erase group size + reported by the card. Note that "erase_size" does not apply + to trim or secure trim operations where the minimum size is + always one 512 byte sector. For SD, "erase_size" is 512 + if the card is block-addressed, 0 otherwise. + + SD/MMC cards can erase an arbitrarily large area up to and + including the whole card. When erasing a large area it may + be desirable to do it in smaller chunks for three reasons: + 1. A single erase command will make all other I/O on + the card wait. This is not a problem if the whole card + is being erased, but erasing one partition will make + I/O for another partition on the same card wait for the + duration of the erase - which could be a several + minutes. + 2. To be able to inform the user of erase progress. + 3. The erase timeout becomes too large to be very + useful. Because the erase timeout contains a margin + which is multiplied by the size of the erase area, + the value can end up being several minutes for large + areas. + + "erase_size" is not the most efficient unit to erase + (especially for SD where it is just one sector), + hence "preferred_erase_size" provides a good chunk + size for erasing large areas. + + For MMC, "preferred_erase_size" is the high-capacity + erase size if a card specifies one, otherwise it is + based on the capacity of the card. + + For SD, "preferred_erase_size" is the allocation unit + size specified by the card. + + "preferred_erase_size" is in bytes. diff --git a/Documentation/mtd/nand_ecc.txt b/Documentation/mtd/nand_ecc.txt index 274821b35a7f..990efd7a9818 100644 --- a/Documentation/mtd/nand_ecc.txt +++ b/Documentation/mtd/nand_ecc.txt @@ -91,7 +91,7 @@ ECC 1 rp15 rp14 rp13 rp12 rp11 rp10 rp09 rp08 ECC 2 cp5 cp4 cp3 cp2 cp1 cp0 1 1 I detected after writing this that ST application note AN1823 -(http://www.st.com/stonline/books/pdf/docs/10123.pdf) gives a much +(http://www.st.com/stonline/) gives a much nicer picture.(but they use line parity as term where I use row parity) Oh well, I'm graphically challenged, so suffer with me for a moment :-) And I could not reuse the ST picture anyway for copyright reasons. diff --git a/Documentation/networking/3c509.txt b/Documentation/networking/3c509.txt index 3c45d5dcd63b..dcc9eaf59395 100644 --- a/Documentation/networking/3c509.txt +++ b/Documentation/networking/3c509.txt @@ -31,7 +31,7 @@ models: Large portions of this documentation were heavily borrowed from the guide written the original author of the 3c509 driver, Donald Becker. The master copy of that document, which contains notes on older versions of the driver, -currently resides on Scyld web server: http://www.scyld.com/network/3c509.html. +currently resides on Scyld web server: http://www.scyld.com/. (1) Special Driver Features diff --git a/Documentation/networking/README.ipw2100 b/Documentation/networking/README.ipw2100 index f3fcaa41f774..6f85e1d06031 100644 --- a/Documentation/networking/README.ipw2100 +++ b/Documentation/networking/README.ipw2100 @@ -72,8 +72,7 @@ such, if you are interested in deploying or shipping a driver as part of solution intended to be used for purposes other than development, please obtain a tested driver from Intel Customer Support at: -http://support.intel.com/support/notebook/sb/CS-006408.htm - +http://www.intel.com/support/wireless/sb/CS-006408.htm 1. Introduction ----------------------------------------------- diff --git a/Documentation/networking/README.ipw2200 b/Documentation/networking/README.ipw2200 index 80c728522c4c..616a8e540b0b 100644 --- a/Documentation/networking/README.ipw2200 +++ b/Documentation/networking/README.ipw2200 @@ -85,7 +85,7 @@ such, if you are interested in deploying or shipping a driver as part of solution intended to be used for purposes other than development, please obtain a tested driver from Intel Customer Support at: -http://support.intel.com/support/notebook/sb/CS-006408.htm +http://support.intel.com 1. Introduction @@ -171,7 +171,7 @@ Where the supported parameter are: led Can be used to turn on experimental LED code. - 0 = Off, 1 = On. Default is 0. + 0 = Off, 1 = On. Default is 1. mode Can be used to set the default mode of the adapter. diff --git a/Documentation/networking/README.sb1000 b/Documentation/networking/README.sb1000 index f82d42584e98..f92c2aac56a9 100644 --- a/Documentation/networking/README.sb1000 +++ b/Documentation/networking/README.sb1000 @@ -27,8 +27,8 @@ cable modem easy. in Franco's original source code distribution .tar.gz file. Support for the sb1000 driver can be found at: - http://home.adelphia.net/~siglercm/sb1000.html - http://linuxpower.cx/~cable/ + http://web.archive.org/web/*/http://home.adelphia.net/~siglercm/sb1000.html + http://web.archive.org/web/*/http://linuxpower.cx/~cable/ along with these utilities. diff --git a/Documentation/networking/arcnet.txt b/Documentation/networking/arcnet.txt index 796012540386..9ff579502151 100644 --- a/Documentation/networking/arcnet.txt +++ b/Documentation/networking/arcnet.txt @@ -68,7 +68,7 @@ REAL NAME" to listserv@tichy.ch.uj.edu.pl. Then, to submit messages to the list, mail to linux-arcnet@tichy.ch.uj.edu.pl. There are archives of the mailing list at: - http://tichy.ch.uj.edu.pl/lists/linux-arcnet + http://epistolary.org/mailman/listinfo.cgi/arcnet The people on linux-net@vger.kernel.org have also been known to be very helpful, especially when we're talking about ALPHA Linux kernels that may or @@ -79,7 +79,7 @@ Other Drivers and Info ---------------------- You can try my ARCNET page on the World Wide Web at: - http://www.worldvisions.ca/~apenwarr/arcnet/ + http://www.qis.net/~jschmitz/arcnet/ Also, SMC (one of the companies that makes ARCnet cards) has a WWW site you might be interested in, which includes several drivers for various cards diff --git a/Documentation/networking/bonding.txt b/Documentation/networking/bonding.txt index 61f516b135b4..d2b62b71b617 100644 --- a/Documentation/networking/bonding.txt +++ b/Documentation/networking/bonding.txt @@ -49,6 +49,7 @@ Table of Contents 3.3 Configuring Bonding Manually with Ifenslave 3.3.1 Configuring Multiple Bonds Manually 3.4 Configuring Bonding Manually via Sysfs +3.5 Overriding Configuration for Special Cases 4. Querying Bonding Configuration 4.1 Bonding Configuration @@ -1318,8 +1319,87 @@ echo 2000 > /sys/class/net/bond1/bonding/arp_interval echo +eth2 > /sys/class/net/bond1/bonding/slaves echo +eth3 > /sys/class/net/bond1/bonding/slaves +3.5 Overriding Configuration for Special Cases +---------------------------------------------- +When using the bonding driver, the physical port which transmits a frame is +typically selected by the bonding driver, and is not relevant to the user or +system administrator. The output port is simply selected using the policies of +the selected bonding mode. On occasion however, it is helpful to direct certain +classes of traffic to certain physical interfaces on output to implement +slightly more complex policies. For example, to reach a web server over a +bonded interface in which eth0 connects to a private network, while eth1 +connects via a public network, it may be desirous to bias the bond to send said +traffic over eth0 first, using eth1 only as a fall back, while all other traffic +can safely be sent over either interface. Such configurations may be achieved +using the traffic control utilities inherent in linux. -4. Querying Bonding Configuration +By default the bonding driver is multiqueue aware and 16 queues are created +when the driver initializes (see Documentation/networking/multiqueue.txt +for details). If more or less queues are desired the module parameter +tx_queues can be used to change this value. There is no sysfs parameter +available as the allocation is done at module init time. + +The output of the file /proc/net/bonding/bondX has changed so the output Queue +ID is now printed for each slave: + +Bonding Mode: fault-tolerance (active-backup) +Primary Slave: None +Currently Active Slave: eth0 +MII Status: up +MII Polling Interval (ms): 0 +Up Delay (ms): 0 +Down Delay (ms): 0 + +Slave Interface: eth0 +MII Status: up +Link Failure Count: 0 +Permanent HW addr: 00:1a:a0:12:8f:cb +Slave queue ID: 0 + +Slave Interface: eth1 +MII Status: up +Link Failure Count: 0 +Permanent HW addr: 00:1a:a0:12:8f:cc +Slave queue ID: 2 + +The queue_id for a slave can be set using the command: + +# echo "eth1:2" > /sys/class/net/bond0/bonding/queue_id + +Any interface that needs a queue_id set should set it with multiple calls +like the one above until proper priorities are set for all interfaces. On +distributions that allow configuration via initscripts, multiple 'queue_id' +arguments can be added to BONDING_OPTS to set all needed slave queues. + +These queue id's can be used in conjunction with the tc utility to configure +a multiqueue qdisc and filters to bias certain traffic to transmit on certain +slave devices. For instance, say we wanted, in the above configuration to +force all traffic bound to 192.168.1.100 to use eth1 in the bond as its output +device. The following commands would accomplish this: + +# tc qdisc add dev bond0 handle 1 root multiq + +# tc filter add dev bond0 protocol ip parent 1: prio 1 u32 match ip dst \ + 192.168.1.100 action skbedit queue_mapping 2 + +These commands tell the kernel to attach a multiqueue queue discipline to the +bond0 interface and filter traffic enqueued to it, such that packets with a dst +ip of 192.168.1.100 have their output queue mapping value overwritten to 2. +This value is then passed into the driver, causing the normal output path +selection policy to be overridden, selecting instead qid 2, which maps to eth1. + +Note that qid values begin at 1. Qid 0 is reserved to initiate to the driver +that normal output policy selection should take place. One benefit to simply +leaving the qid for a slave to 0 is the multiqueue awareness in the bonding +driver that is now present. This awareness allows tc filters to be placed on +slave devices as well as bond devices and the bonding driver will simply act as +a pass-through for selecting output queues on the slave device rather than +output port selection. + +This feature first appeared in bonding driver version 3.7.0 and support for +output slave selection was limited to round-robin and active-backup modes. + +4 Querying Bonding Configuration ================================= 4.1 Bonding Configuration @@ -2432,7 +2512,7 @@ be found at: https://lists.sourceforge.net/lists/listinfo/bonding-devel Donald Becker's Ethernet Drivers and diag programs may be found at : - - http://www.scyld.com/network/ + - http://web.archive.org/web/*/http://www.scyld.com/network/ You will also find a lot of information regarding Ethernet, NWay, MII, etc. at www.scyld.com. diff --git a/Documentation/networking/caif/spi_porting.txt b/Documentation/networking/caif/spi_porting.txt new file mode 100644 index 000000000000..61d7c9247453 --- /dev/null +++ b/Documentation/networking/caif/spi_porting.txt @@ -0,0 +1,208 @@ +- CAIF SPI porting - + +- CAIF SPI basics: + +Running CAIF over SPI needs some extra setup, owing to the nature of SPI. +Two extra GPIOs have been added in order to negotiate the transfers + between the master and the slave. The minimum requirement for running +CAIF over SPI is a SPI slave chip and two GPIOs (more details below). +Please note that running as a slave implies that you need to keep up +with the master clock. An overrun or underrun event is fatal. + +- CAIF SPI framework: + +To make porting as easy as possible, the CAIF SPI has been divided in +two parts. The first part (called the interface part) deals with all +generic functionality such as length framing, SPI frame negotiation +and SPI frame delivery and transmission. The other part is the CAIF +SPI slave device part, which is the module that you have to write if +you want to run SPI CAIF on a new hardware. This part takes care of +the physical hardware, both with regard to SPI and to GPIOs. + +- Implementing a CAIF SPI device: + + - Functionality provided by the CAIF SPI slave device: + + In order to implement a SPI device you will, as a minimum, + need to implement the following + functions: + + int (*init_xfer) (struct cfspi_xfer * xfer, struct cfspi_dev *dev): + + This function is called by the CAIF SPI interface to give + you a chance to set up your hardware to be ready to receive + a stream of data from the master. The xfer structure contains + both physical and logical adresses, as well as the total length + of the transfer in both directions.The dev parameter can be used + to map to different CAIF SPI slave devices. + + void (*sig_xfer) (bool xfer, struct cfspi_dev *dev): + + This function is called by the CAIF SPI interface when the output + (SPI_INT) GPIO needs to change state. The boolean value of the xfer + variable indicates whether the GPIO should be asserted (HIGH) or + deasserted (LOW). The dev parameter can be used to map to different CAIF + SPI slave devices. + + - Functionality provided by the CAIF SPI interface: + + void (*ss_cb) (bool assert, struct cfspi_ifc *ifc); + + This function is called by the CAIF SPI slave device in order to + signal a change of state of the input GPIO (SS) to the interface. + Only active edges are mandatory to be reported. + This function can be called from IRQ context (recommended in order + not to introduce latency). The ifc parameter should be the pointer + returned from the platform probe function in the SPI device structure. + + void (*xfer_done_cb) (struct cfspi_ifc *ifc); + + This function is called by the CAIF SPI slave device in order to + report that a transfer is completed. This function should only be + called once both the transmission and the reception are completed. + This function can be called from IRQ context (recommended in order + not to introduce latency). The ifc parameter should be the pointer + returned from the platform probe function in the SPI device structure. + + - Connecting the bits and pieces: + + - Filling in the SPI slave device structure: + + Connect the necessary callback functions. + Indicate clock speed (used to calculate toggle delays). + Chose a suitable name (helps debugging if you use several CAIF + SPI slave devices). + Assign your private data (can be used to map to your structure). + + - Filling in the SPI slave platform device structure: + Add name of driver to connect to ("cfspi_sspi"). + Assign the SPI slave device structure as platform data. + +- Padding: + +In order to optimize throughput, a number of SPI padding options are provided. +Padding can be enabled independently for uplink and downlink transfers. +Padding can be enabled for the head, the tail and for the total frame size. +The padding needs to be correctly configured on both sides of the link. +The padding can be changed via module parameters in cfspi_sspi.c or via +the sysfs directory of the cfspi_sspi driver (before device registration). + +- CAIF SPI device template: + +/* + * Copyright (C) ST-Ericsson AB 2010 + * Author: Daniel Martensson / Daniel.Martensson@stericsson.com + * License terms: GNU General Public License (GPL), version 2. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +MODULE_LICENSE("GPL"); + +struct sspi_struct { + struct cfspi_dev sdev; + struct cfspi_xfer *xfer; +}; + +static struct sspi_struct slave; +static struct platform_device slave_device; + +static irqreturn_t sspi_irq(int irq, void *arg) +{ + /* You only need to trigger on an edge to the active state of the + * SS signal. Once a edge is detected, the ss_cb() function should be + * called with the parameter assert set to true. It is OK + * (and even advised) to call the ss_cb() function in IRQ context in + * order not to add any delay. */ + + return IRQ_HANDLED; +} + +static void sspi_complete(void *context) +{ + /* Normally the DMA or the SPI framework will call you back + * in something similar to this. The only thing you need to + * do is to call the xfer_done_cb() function, providing the pointer + * to the CAIF SPI interface. It is OK to call this function + * from IRQ context. */ +} + +static int sspi_init_xfer(struct cfspi_xfer *xfer, struct cfspi_dev *dev) +{ + /* Store transfer info. For a normal implementation you should + * set up your DMA here and make sure that you are ready to + * receive the data from the master SPI. */ + + struct sspi_struct *sspi = (struct sspi_struct *)dev->priv; + + sspi->xfer = xfer; + + return 0; +} + +void sspi_sig_xfer(bool xfer, struct cfspi_dev *dev) +{ + /* If xfer is true then you should assert the SPI_INT to indicate to + * the master that you are ready to recieve the data from the master + * SPI. If xfer is false then you should de-assert SPI_INT to indicate + * that the transfer is done. + */ + + struct sspi_struct *sspi = (struct sspi_struct *)dev->priv; +} + +static void sspi_release(struct device *dev) +{ + /* + * Here you should release your SPI device resources. + */ +} + +static int __init sspi_init(void) +{ + /* Here you should initialize your SPI device by providing the + * necessary functions, clock speed, name and private data. Once + * done, you can register your device with the + * platform_device_register() function. This function will return + * with the CAIF SPI interface initialized. This is probably also + * the place where you should set up your GPIOs, interrupts and SPI + * resources. */ + + int res = 0; + + /* Initialize slave device. */ + slave.sdev.init_xfer = sspi_init_xfer; + slave.sdev.sig_xfer = sspi_sig_xfer; + slave.sdev.clk_mhz = 13; + slave.sdev.priv = &slave; + slave.sdev.name = "spi_sspi"; + slave_device.dev.release = sspi_release; + + /* Initialize platform device. */ + slave_device.name = "cfspi_sspi"; + slave_device.dev.platform_data = &slave.sdev; + + /* Register platform device. */ + res = platform_device_register(&slave_device); + if (res) { + printk(KERN_WARNING "sspi_init: failed to register dev.\n"); + return -ENODEV; + } + + return res; +} + +static void __exit sspi_exit(void) +{ + platform_device_del(&slave_device); +} + +module_init(sspi_init); +module_exit(sspi_exit); diff --git a/Documentation/networking/decnet.txt b/Documentation/networking/decnet.txt index d8968958d839..e12a4900cf72 100644 --- a/Documentation/networking/decnet.txt +++ b/Documentation/networking/decnet.txt @@ -4,7 +4,7 @@ 1) Other documentation.... o Project Home Pages - http://www.chygwyn.com/DECnet/ - Kernel info + http://www.chygwyn.com/ - Kernel info http://linux-decnet.sourceforge.net/ - Userland tools http://www.sourceforge.net/projects/linux-decnet/ - Status page diff --git a/Documentation/networking/dns_resolver.txt b/Documentation/networking/dns_resolver.txt new file mode 100644 index 000000000000..aefd1e681804 --- /dev/null +++ b/Documentation/networking/dns_resolver.txt @@ -0,0 +1,146 @@ + =================== + DNS Resolver Module + =================== + +Contents: + + - Overview. + - Compilation. + - Setting up. + - Usage. + - Mechanism. + - Debugging. + + +======== +OVERVIEW +======== + +The DNS resolver module provides a way for kernel services to make DNS queries +by way of requesting a key of key type dns_resolver. These queries are +upcalled to userspace through /sbin/request-key. + +These routines must be supported by userspace tools dns.upcall, cifs.upcall and +request-key. It is under development and does not yet provide the full feature +set. The features it does support include: + + (*) Implements the dns_resolver key_type to contact userspace. + +It does not yet support the following AFS features: + + (*) Dns query support for AFSDB resource record. + +This code is extracted from the CIFS filesystem. + + +=========== +COMPILATION +=========== + +The module should be enabled by turning on the kernel configuration options: + + CONFIG_DNS_RESOLVER - tristate "DNS Resolver support" + + +========== +SETTING UP +========== + +To set up this facility, the /etc/request-key.conf file must be altered so that +/sbin/request-key can appropriately direct the upcalls. For example, to handle +basic dname to IPv4/IPv6 address resolution, the following line should be +added: + + #OP TYPE DESC CO-INFO PROGRAM ARG1 ARG2 ARG3 ... + #====== ============ ======= ======= ========================== + create dns_resolver * * /usr/sbin/cifs.upcall %k + +To direct a query for query type 'foo', a line of the following should be added +before the more general line given above as the first match is the one taken. + + create dns_resolver foo:* * /usr/sbin/dns.foo %k + + + +===== +USAGE +===== + +To make use of this facility, one of the following functions that are +implemented in the module can be called after doing: + + #include + + (1) int dns_query(const char *type, const char *name, size_t namelen, + const char *options, char **_result, time_t *_expiry); + + This is the basic access function. It looks for a cached DNS query and if + it doesn't find it, it upcalls to userspace to make a new DNS query, which + may then be cached. The key description is constructed as a string of the + form: + + [:] + + where optionally specifies the particular upcall program to invoke, + and thus the type of query to do, and specifies the string to be + looked up. The default query type is a straight hostname to IP address + set lookup. + + The name parameter is not required to be a NUL-terminated string, and its + length should be given by the namelen argument. + + The options parameter may be NULL or it may be a set of options + appropriate to the query type. + + The return value is a string appropriate to the query type. For instance, + for the default query type it is just a list of comma-separated IPv4 and + IPv6 addresses. The caller must free the result. + + The length of the result string is returned on success, and a negative + error code is returned otherwise. -EKEYREJECTED will be returned if the + DNS lookup failed. + + If _expiry is non-NULL, the expiry time (TTL) of the result will be + returned also. + + +========= +MECHANISM +========= + +The dnsresolver module registers a key type called "dns_resolver". Keys of +this type are used to transport and cache DNS lookup results from userspace. + +When dns_query() is invoked, it calls request_key() to search the local +keyrings for a cached DNS result. If that fails to find one, it upcalls to +userspace to get a new result. + +Upcalls to userspace are made through the request_key() upcall vector, and are +directed by means of configuration lines in /etc/request-key.conf that tell +/sbin/request-key what program to run to instantiate the key. + +The upcall handler program is responsible for querying the DNS, processing the +result into a form suitable for passing to the keyctl_instantiate_key() +routine. This then passes the data to dns_resolver_instantiate() which strips +off and processes any options included in the data, and then attaches the +remainder of the string to the key as its payload. + +The upcall handler program should set the expiry time on the key to that of the +lowest TTL of all the records it has extracted a result from. This means that +the key will be discarded and recreated when the data it holds has expired. + +dns_query() returns a copy of the value attached to the key, or an error if +that is indicated instead. + +See for further information about +request-key function. + + +========= +DEBUGGING +========= + +Debugging messages can be turned on dynamically by writing a 1 into the +following file: + + /sys/module/dnsresolver/parameters/debug diff --git a/Documentation/networking/fore200e.txt b/Documentation/networking/fore200e.txt index b1f337f0f4ca..6e0d2a9613ec 100644 --- a/Documentation/networking/fore200e.txt +++ b/Documentation/networking/fore200e.txt @@ -39,7 +39,7 @@ version. Alternative binary firmware images can be found somewhere on the ForeThought CD-ROM supplied with your adapter by FORE Systems. You can also get the latest firmware images from FORE Systems at -http://www.fore.com. Register TACTics Online and go to +http://en.wikipedia.org/wiki/FORE_Systems. Register TACTics Online and go to the 'software updates' pages. The firmware binaries are part of the various ForeThought software distributions. diff --git a/Documentation/networking/igb.txt b/Documentation/networking/igb.txt new file mode 100644 index 000000000000..ab2d71831892 --- /dev/null +++ b/Documentation/networking/igb.txt @@ -0,0 +1,132 @@ +Linux* Base Driver for Intel(R) Network Connection +================================================== + +Intel Gigabit Linux driver. +Copyright(c) 1999 - 2010 Intel Corporation. + +Contents +======== + +- Identifying Your Adapter +- Additional Configurations +- Support + +Identifying Your Adapter +======================== + +This driver supports all 82575, 82576 and 82580-based Intel (R) gigabit network +connections. + +For specific information on how to identify your adapter, go to the Adapter & +Driver ID Guide at: + + http://support.intel.com/support/go/network/adapter/idguide.htm + +Command Line Parameters +======================= + +The default value for each parameter is generally the recommended setting, +unless otherwise noted. + +max_vfs +------- +Valid Range: 0-7 +Default Value: 0 + +This parameter adds support for SR-IOV. It causes the driver to spawn up to +max_vfs worth of virtual function. + +Additional Configurations +========================= + + Jumbo Frames + ------------ + Jumbo Frames support is enabled by changing the MTU to a value larger than + the default of 1500. Use the ifconfig command to increase the MTU size. + For example: + + ifconfig eth mtu 9000 up + + This setting is not saved across reboots. + + Notes: + + - The maximum MTU setting for Jumbo Frames is 9216. This value coincides + with the maximum Jumbo Frames size of 9234 bytes. + + - Using Jumbo Frames at 10 or 100 Mbps may result in poor performance or + loss of link. + + Ethtool + ------- + The driver utilizes the ethtool interface for driver configuration and + diagnostics, as well as displaying statistical information. + + http://sourceforge.net/projects/gkernel. + + Enabling Wake on LAN* (WoL) + --------------------------- + WoL is configured through the Ethtool* utility. + + For instructions on enabling WoL with Ethtool, refer to the Ethtool man page. + + WoL will be enabled on the system during the next shut down or reboot. + For this driver version, in order to enable WoL, the igb driver must be + loaded when shutting down or rebooting the system. + + Wake On LAN is only supported on port A of multi-port adapters. + + Wake On LAN is not supported for the Intel(R) Gigabit VT Quad Port Server + Adapter. + + Multiqueue + ---------- + In this mode, a separate MSI-X vector is allocated for each queue and one + for "other" interrupts such as link status change and errors. All + interrupts are throttled via interrupt moderation. Interrupt moderation + must be used to avoid interrupt storms while the driver is processing one + interrupt. The moderation value should be at least as large as the expected + time for the driver to process an interrupt. Multiqueue is off by default. + + REQUIREMENTS: MSI-X support is required for Multiqueue. If MSI-X is not + found, the system will fallback to MSI or to Legacy interrupts. + + LRO + --- + Large Receive Offload (LRO) is a technique for increasing inbound throughput + of high-bandwidth network connections by reducing CPU overhead. It works by + aggregating multiple incoming packets from a single stream into a larger + buffer before they are passed higher up the networking stack, thus reducing + the number of packets that have to be processed. LRO combines multiple + Ethernet frames into a single receive in the stack, thereby potentially + decreasing CPU utilization for receives. + + NOTE: You need to have inet_lro enabled via either the CONFIG_INET_LRO or + CONFIG_INET_LRO_MODULE kernel config option. Additionally, if + CONFIG_INET_LRO_MODULE is used, the inet_lro module needs to be loaded + before the igb driver. + + You can verify that the driver is using LRO by looking at these counters in + Ethtool: + + lro_aggregated - count of total packets that were combined + lro_flushed - counts the number of packets flushed out of LRO + lro_no_desc - counts the number of times an LRO descriptor was not available + for the LRO packet + + NOTE: IPv6 and UDP are not supported by LRO. + +Support +======= + +For general information, go to the Intel support website at: + + www.intel.com/support/ + +or the Intel Wired Networking project hosted by Sourceforge at: + + http://sourceforge.net/projects/e1000 + +If an issue is identified with the released source code on the supported +kernel with a supported adapter, email the specific information related +to the issue to e1000-devel@lists.sf.net diff --git a/Documentation/networking/igbvf.txt b/Documentation/networking/igbvf.txt new file mode 100644 index 000000000000..056028138d9c --- /dev/null +++ b/Documentation/networking/igbvf.txt @@ -0,0 +1,78 @@ +Linux* Base Driver for Intel(R) Network Connection +================================================== + +Intel Gigabit Linux driver. +Copyright(c) 1999 - 2010 Intel Corporation. + +Contents +======== + +- Identifying Your Adapter +- Additional Configurations +- Support + +This file describes the igbvf Linux* Base Driver for Intel Network Connection. + +The igbvf driver supports 82576-based virtual function devices that can only +be activated on kernels that support SR-IOV. SR-IOV requires the correct +platform and OS support. + +The igbvf driver requires the igb driver, version 2.0 or later. The igbvf +driver supports virtual functions generated by the igb driver with a max_vfs +value of 1 or greater. For more information on the max_vfs parameter refer +to the README included with the igb driver. + +The guest OS loading the igbvf driver must support MSI-X interrupts. + +This driver is only supported as a loadable module at this time. Intel is +not supplying patches against the kernel source to allow for static linking +of the driver. For questions related to hardware requirements, refer to the +documentation supplied with your Intel Gigabit adapter. All hardware +requirements listed apply to use with Linux. + +Instructions on updating ethtool can be found in the section "Additional +Configurations" later in this document. + +VLANs: There is a limit of a total of 32 shared VLANs to 1 or more VFs. + +Identifying Your Adapter +======================== + +The igbvf driver supports 82576-based virtual function devices that can only +be activated on kernels that support SR-IOV. + +For more information on how to identify your adapter, go to the Adapter & +Driver ID Guide at: + + http://support.intel.com/support/go/network/adapter/idguide.htm + +For the latest Intel network drivers for Linux, refer to the following +website. In the search field, enter your adapter name or type, or use the +networking link on the left to search for your adapter: + + http://downloadcenter.intel.com/scripts-df-external/Support_Intel.aspx + +Additional Configurations +========================= + + Ethtool + ------- + The driver utilizes the ethtool interface for driver configuration and + diagnostics, as well as displaying statistical information. + + http://sourceforge.net/projects/gkernel. + +Support +======= + +For general information, go to the Intel support website at: + + http://support.intel.com + +or the Intel Wired Networking project hosted by Sourceforge at: + + http://sourceforge.net/projects/e1000 + +If an issue is identified with the released source code on the supported +kernel with a supported adapter, email the specific information related +to the issue to e1000-devel@lists.sf.net diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt index d0536b5a4e01..f350c69b2bb4 100644 --- a/Documentation/networking/ip-sysctl.txt +++ b/Documentation/networking/ip-sysctl.txt @@ -903,7 +903,7 @@ arp_ignore - INTEGER arp_notify - BOOLEAN Define mode for notification of address and device changes. 0 - (default): do nothing - 1 - Generate gratuitous arp replies when device is brought up + 1 - Generate gratuitous arp requests when device is brought up or hardware address changes. arp_accept - BOOLEAN diff --git a/Documentation/networking/ipddp.txt b/Documentation/networking/ipddp.txt index 661a5558dd8e..ba5c217fffe0 100644 --- a/Documentation/networking/ipddp.txt +++ b/Documentation/networking/ipddp.txt @@ -36,11 +36,6 @@ AppleTalk-IP to IP decapsulation. Basic instructions for user space tools ======================================= -To enable AppleTalk-IP decapsulation/encapsulation you will need the -proper tools. You can get the tools for decapsulation from -http://spacs1.spacs.k12.wi.us/~jschlst/index.html and for encapsulation -from http://www.maths.unm.edu/~bradford/ltpc.html - I will briefly describe the operation of the tools, but you will need to consult the supporting documentation for each set of tools. diff --git a/Documentation/networking/iphase.txt b/Documentation/networking/iphase.txt index 55eac4a784e2..670b72f16585 100644 --- a/Documentation/networking/iphase.txt +++ b/Documentation/networking/iphase.txt @@ -22,7 +22,7 @@ The features and limitations of this driver are as follows: - All variants of Interphase ATM PCI (i)Chip adapter cards are supported, including x575 (OC3, control memory 128K , 512K and packet memory 128K, 512K and 1M), x525 (UTP25) and x531 (DS3 and E3). See - http://www.iphase.com/site/iphase-web/?epi_menuItemID=e196f04b4b3b40502f150882e21046a0 + http://www.iphase.com/ for details. - Only x86 platforms are supported. - SMP is supported. diff --git a/Documentation/networking/packet_mmap.txt b/Documentation/networking/packet_mmap.txt index 98f71a5cef00..073894d1c093 100644 --- a/Documentation/networking/packet_mmap.txt +++ b/Documentation/networking/packet_mmap.txt @@ -8,7 +8,7 @@ capture network traffic with utilities like tcpdump or any other that needs raw access to network interface. You can find the latest version of this document at: - http://pusa.uv.es/~ulisses/packet_mmap/ + http://wiki.ipxwarzone.com/index.php5?title=Linux_packet_mmap Howto can be found at: http://wiki.gnu-log.net (packet_mmap) @@ -56,7 +56,7 @@ support for PACKET_MMAP, and also probably the libpcap included in your distribu I'm aware of two implementations of PACKET_MMAP in libpcap: - http://pusa.uv.es/~ulisses/packet_mmap/ (by Simon Patarin, based on libpcap 0.6.2) + http://wiki.ipxwarzone.com/ (by Simon Patarin, based on libpcap 0.6.2) http://public.lanl.gov/cpw/ (by Phil Wood, based on lastest libpcap) The rest of this document is intended for people who want to understand @@ -493,6 +493,32 @@ The user can also use poll() to check if a buffer is available: pfd.events = POLLOUT; retval = poll(&pfd, 1, timeout); +------------------------------------------------------------------------------- ++ PACKET_TIMESTAMP +------------------------------------------------------------------------------- + +The PACKET_TIMESTAMP setting determines the source of the timestamp in +the packet meta information. If your NIC is capable of timestamping +packets in hardware, you can request those hardware timestamps to used. +Note: you may need to enable the generation of hardware timestamps with +SIOCSHWTSTAMP. + +PACKET_TIMESTAMP accepts the same integer bit field as +SO_TIMESTAMPING. However, only the SOF_TIMESTAMPING_SYS_HARDWARE +and SOF_TIMESTAMPING_RAW_HARDWARE values are recognized by +PACKET_TIMESTAMP. SOF_TIMESTAMPING_SYS_HARDWARE takes precedence over +SOF_TIMESTAMPING_RAW_HARDWARE if both bits are set. + + int req = 0; + req |= SOF_TIMESTAMPING_SYS_HARDWARE; + setsockopt(fd, SOL_PACKET, PACKET_TIMESTAMP, (void *) &req, sizeof(req)) + +If PACKET_TIMESTAMP is not set, a software timestamp generated inside +the networking stack is used (the behavior before this setting was added). + +See include/linux/net_tstamp.h and Documentation/networking/timestamping +for more information on hardware timestamps. + -------------------------------------------------------------------------------- + THANKS -------------------------------------------------------------------------------- diff --git a/Documentation/networking/pktgen.txt b/Documentation/networking/pktgen.txt index 61bb645d50e0..75e4fd708ccb 100644 --- a/Documentation/networking/pktgen.txt +++ b/Documentation/networking/pktgen.txt @@ -151,6 +151,8 @@ Examples: pgset stop aborts injection. Also, ^C aborts generator. + pgset "rate 300M" set rate to 300 Mb/s + pgset "ratep 1000000" set rate to 1Mpps Example scripts =============== @@ -241,6 +243,9 @@ src6 flows flowlen +rate +ratep + References: ftp://robur.slu.se/pub/Linux/net-development/pktgen-testing/ ftp://robur.slu.se/pub/Linux/net-development/pktgen-testing/examples/ diff --git a/Documentation/networking/ray_cs.txt b/Documentation/networking/ray_cs.txt index 145d27a52395..c0c12307ed9d 100644 --- a/Documentation/networking/ray_cs.txt +++ b/Documentation/networking/ray_cs.txt @@ -13,8 +13,8 @@ wireless LAN cards. As of kernel 2.3.18, the ray_cs driver is part of the Linux kernel source. My web page for the development of ray_cs is at -http://world.std.com/~corey/raylink.html and I can be emailed at -corey@world.std.com +http://web.ralinktech.com/ralink/Home/Support/Linux.html +and I can be emailed at corey@world.std.com The kernel driver is based on ray_cs-1.62.tgz diff --git a/Documentation/networking/s2io.txt b/Documentation/networking/s2io.txt index c3d6b4d5d014..9d4e0f4df5a8 100644 --- a/Documentation/networking/s2io.txt +++ b/Documentation/networking/s2io.txt @@ -133,7 +133,8 @@ bring down CPU utilization. ** For AMD opteron platforms with 8131 chipset, MMRBC=1 and MOST=1 are recommended as safe parameters. For more information, please review the AMD8131 errata at -http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/26310.pdf +http://vip.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/ +26310_AMD-8131_HyperTransport_PCI-X_Tunnel_Revision_Guide_rev_3_18.pdf 6. Available Downloads Neterion "s2io" driver in Red Hat and Suse 2.6-based distributions is kept up diff --git a/Documentation/networking/tlan.txt b/Documentation/networking/tlan.txt index 7e6aa5b20c37..34550dfcef74 100644 --- a/Documentation/networking/tlan.txt +++ b/Documentation/networking/tlan.txt @@ -2,7 +2,7 @@ (C) 1998 James Banks (C) 1999-2001 Torben Mathiasen -For driver information/updates visit http://opensource.compaq.com +For driver information/updates visit http://www.compaq.com TLAN driver for Linux, version 1.14a @@ -113,5 +113,5 @@ III. Things to try if you have problems. There is also a tlan mailing list which you can join by sending "subscribe tlan" in the body of an email to majordomo@vuser.vu.union.edu. -There is also a tlan website at http://opensource.compaq.com +There is also a tlan website at http://www.compaq.com diff --git a/Documentation/networking/udplite.txt b/Documentation/networking/udplite.txt index 855d8da57a23..d727a3829100 100644 --- a/Documentation/networking/udplite.txt +++ b/Documentation/networking/udplite.txt @@ -11,11 +11,13 @@ This file briefly describes the existing kernel support and the socket API. For in-depth information, you can consult: - o The UDP-Lite Homepage: http://www.erg.abdn.ac.uk/users/gerrit/udp-lite/ + o The UDP-Lite Homepage: + http://web.archive.org/web/*/http://www.erg.abdn.ac.uk/users/gerrit/udp-lite/ From here you can also download some example application source code. o The UDP-Lite HOWTO on - http://www.erg.abdn.ac.uk/users/gerrit/udp-lite/files/UDP-Lite-HOWTO.txt + http://web.archive.org/web/*/http://www.erg.abdn.ac.uk/users/gerrit/udp-lite/ + files/UDP-Lite-HOWTO.txt o The Wireshark UDP-Lite WiKi (with capture files): http://wiki.wireshark.org/Lightweight_User_Datagram_Protocol @@ -26,12 +28,7 @@ I) APPLICATIONS Several applications have been ported successfully to UDP-Lite. Ethereal - (now called wireshark) has UDP-Litev4/v6 support by default. The tarball on - - http://www.erg.abdn.ac.uk/users/gerrit/udp-lite/files/udplite_linux.tar.gz - - has source code for several v4/v6 client-server and network testing examples. - + (now called wireshark) has UDP-Litev4/v6 support by default. Porting applications to UDP-Lite is straightforward: only socket level and IPPROTO need to be changed; senders additionally set the checksum coverage length (default = header length = 8). Details are in the next section. diff --git a/Documentation/networking/wavelan.txt b/Documentation/networking/wavelan.txt deleted file mode 100644 index afa6e521c685..000000000000 --- a/Documentation/networking/wavelan.txt +++ /dev/null @@ -1,73 +0,0 @@ - The Wavelan drivers saga - ------------------------ - - By Jean Tourrilhes - - The Wavelan is a Radio network adapter designed by -Lucent. Under this generic name is hidden quite a variety of hardware, -and many Linux driver to support it. - The get the full story on Wireless LANs, please consult : - http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/ - -"wavelan" driver (old ISA Wavelan) ----------------- - o Config : Network device -> Wireless LAN -> AT&T WaveLAN - o Location : .../drivers/net/wireless/wavelan* - o in-line doc : .../drivers/net/wireless/wavelan.p.h - o on-line doc : - http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html - - This is the driver for the ISA version of the first generation -of the Wavelan, now discontinued. The device is 2 Mb/s, composed of a -Intel 82586 controller and a Lucent Modem, and is NOT 802.11 compliant. - The driver has been tested with the following hardware : - o Wavelan ISA 915 MHz (full length ISA card) - o Wavelan ISA 915 MHz 2.0 (half length ISA card) - o Wavelan ISA 2.4 GHz (full length ISA card, fixed frequency) - o Wavelan ISA 2.4 GHz 2.0 (half length ISA card, frequency selectable) - o Above cards with the optional DES encryption feature - -"wavelan_cs" driver (old Pcmcia Wavelan) -------------------- - o Config : Network device -> PCMCIA network -> - Pcmcia Wireless LAN -> AT&T/Lucent WaveLAN - o Location : .../drivers/net/pcmcia/wavelan* - o in-line doc : .../drivers/net/pcmcia/wavelan_cs.h - o on-line doc : - http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html - - This is the driver for the PCMCIA version of the first -generation of the Wavelan, now discontinued. The device is 2 Mb/s, -composed of a Intel 82593 controller (totally different from the 82586) -and a Lucent Modem, and NOT 802.11 compatible. - The driver has been tested with the following hardware : - o Wavelan Pcmcia 915 MHz 2.0 (Pcmcia card + separate - modem/antenna block) - o Wavelan Pcmcia 2.4 GHz 2.0 (Pcmcia card + separate - modem/antenna block) - -"wvlan_cs" driver (Wavelan IEEE, GPL) ------------------ - o Config : Not yet in kernel - o Location : Pcmcia package 3.1.10+ - o on-line doc : http://www.fasta.fh-dortmund.de/users/andy/wvlan/ - - This is the driver for the current generation of Wavelan IEEE, -which is 802.11 compatible. Depending on version, it is 2 Mb/s or 11 -Mb/s, with or without encryption, all implemented in Lucent specific -DSP (the Hermes). - This is a GPL full source PCMCIA driver (ISA is just a Pcmcia -card with ISA-Pcmcia bridge). - -"wavelan2_cs" driver (Wavelan IEEE, binary) --------------------- - o Config : Not yet in kernel - o Location : ftp://sourceforge.org/pcmcia/contrib/ - - This driver support exactly the same hardware as the previous -driver, the main difference is that it is based on a binary library -and supported by Lucent. - - I hope it clears the confusion ;-) - - Jean diff --git a/Documentation/padata.txt b/Documentation/padata.txt index 269d7d0d8335..7ddfe216a0aa 100644 --- a/Documentation/padata.txt +++ b/Documentation/padata.txt @@ -1,5 +1,5 @@ The padata parallel execution mechanism -Last updated for 2.6.34 +Last updated for 2.6.36 Padata is a mechanism by which the kernel can farm work out to be done in parallel on multiple CPUs while retaining the ordering of tasks. It was @@ -13,31 +13,86 @@ overall control of how tasks are to be run: #include - struct padata_instance *padata_alloc(const struct cpumask *cpumask, - struct workqueue_struct *wq); + struct padata_instance *padata_alloc(struct workqueue_struct *wq, + const struct cpumask *pcpumask, + const struct cpumask *cbcpumask); -The cpumask describes which processors will be used to execute work -submitted to this instance. The workqueue wq is where the work will -actually be done; it should be a multithreaded queue, naturally. +The pcpumask describes which processors will be used to execute work +submitted to this instance in parallel. The cbcpumask defines which +processors are allowed to be used as the serialization callback processor. +The workqueue wq is where the work will actually be done; it should be +a multithreaded queue, naturally. + +To allocate a padata instance with the cpu_possible_mask for both +cpumasks this helper function can be used: + + struct padata_instance *padata_alloc_possible(struct workqueue_struct *wq); + +Note: Padata maintains two kinds of cpumasks internally. The user supplied +cpumasks, submitted by padata_alloc/padata_alloc_possible and the 'usable' +cpumasks. The usable cpumasks are always a subset of active CPUs in the +user supplied cpumasks; these are the cpumasks padata actually uses. So +it is legal to supply a cpumask to padata that contains offline CPUs. +Once an offline CPU in the user supplied cpumask comes online, padata +is going to use it. There are functions for enabling and disabling the instance: - void padata_start(struct padata_instance *pinst); + int padata_start(struct padata_instance *pinst); void padata_stop(struct padata_instance *pinst); -These functions literally do nothing beyond setting or clearing the -"padata_start() was called" flag; if that flag is not set, other functions -will refuse to work. +These functions are setting or clearing the "PADATA_INIT" flag; +if that flag is not set, other functions will refuse to work. +padata_start returns zero on success (flag set) or -EINVAL if the +padata cpumask contains no active CPU (flag not set). +padata_stop clears the flag and blocks until the padata instance +is unused. The list of CPUs to be used can be adjusted with these functions: - int padata_set_cpumask(struct padata_instance *pinst, + int padata_set_cpumasks(struct padata_instance *pinst, + cpumask_var_t pcpumask, + cpumask_var_t cbcpumask); + int padata_set_cpumask(struct padata_instance *pinst, int cpumask_type, cpumask_var_t cpumask); - int padata_add_cpu(struct padata_instance *pinst, int cpu); - int padata_remove_cpu(struct padata_instance *pinst, int cpu); + int padata_add_cpu(struct padata_instance *pinst, int cpu, int mask); + int padata_remove_cpu(struct padata_instance *pinst, int cpu, int mask); -Changing the CPU mask has the look of an expensive operation, though, so it -probably should not be done with great frequency. +Changing the CPU masks are expensive operations, though, so it should not be +done with great frequency. + +It's possible to change both cpumasks of a padata instance with +padata_set_cpumasks by specifying the cpumasks for parallel execution (pcpumask) +and for the serial callback function (cbcpumask). padata_set_cpumask is used to +change just one of the cpumasks. Here cpumask_type is one of PADATA_CPU_SERIAL, +PADATA_CPU_PARALLEL and cpumask specifies the new cpumask to use. +To simply add or remove one CPU from a certain cpumask the functions +padata_add_cpu/padata_remove_cpu are used. cpu specifies the CPU to add or +remove and mask is one of PADATA_CPU_SERIAL, PADATA_CPU_PARALLEL. + +If a user is interested in padata cpumask changes, he can register to +the padata cpumask change notifier: + + int padata_register_cpumask_notifier(struct padata_instance *pinst, + struct notifier_block *nblock); + +To unregister from that notifier: + + int padata_unregister_cpumask_notifier(struct padata_instance *pinst, + struct notifier_block *nblock); + +The padata cpumask change notifier notifies about changes of the usable +cpumasks, i.e. the subset of active CPUs in the user supplied cpumask. + +Padata calls the notifier chain with: + + blocking_notifier_call_chain(&pinst->cpumask_change_notifier, + notification_mask, + &pd_new->cpumask); + +Here cpumask_change_notifier is registered notifier, notification_mask +is one of PADATA_CPU_SERIAL, PADATA_CPU_PARALLEL and cpumask is a pointer +to a struct padata_cpumask that contains the new cpumask information. Actually submitting work to the padata instance requires the creation of a padata_priv structure: @@ -49,8 +104,8 @@ padata_priv structure: }; This structure will almost certainly be embedded within some larger -structure specific to the work to be done. Most its fields are private to -padata, but the structure should be zeroed at initialization time, and the +structure specific to the work to be done. Most of its fields are private to +padata, but the structure should be zeroed at initialisation time, and the parallel() and serial() functions should be provided. Those functions will be called in the process of getting the work done as we will see momentarily. @@ -63,12 +118,10 @@ The submission of work is done with: The pinst and padata structures must be set up as described above; cb_cpu specifies which CPU will be used for the final callback when the work is done; it must be in the current instance's CPU mask. The return value from -padata_do_parallel() is a little strange; zero is an error return -indicating that the caller forgot the padata_start() formalities. -EBUSY -means that somebody, somewhere else is messing with the instance's CPU -mask, while -EINVAL is a complaint about cb_cpu not being in that CPU mask. -If all goes well, this function will return -EINPROGRESS, indicating that -the work is in progress. +padata_do_parallel() is zero on success, indicating that the work is in +progress. -EBUSY means that somebody, somewhere else is messing with the +instance's CPU mask, while -EINVAL is a complaint about cb_cpu not being +in that CPU mask or about a not running instance. Each task submitted to padata_do_parallel() will, in turn, be passed to exactly one call to the above-mentioned parallel() function, on one CPU, so diff --git a/Documentation/pcmcia/driver-changes.txt b/Documentation/pcmcia/driver-changes.txt index 61bc4e943116..26c0f9c00545 100644 --- a/Documentation/pcmcia/driver-changes.txt +++ b/Documentation/pcmcia/driver-changes.txt @@ -1,4 +1,16 @@ This file details changes in 2.6 which affect PCMCIA card driver authors: +* pcmcia_request_io changes (as of 2.6.36) + Instead of io_req_t, drivers are now requested to fill out + struct pcmcia_device *p_dev->resource[0,1] for up to two ioport + ranges. After a call to pcmcia_request_io(), the ports found there + are reserved, after calling pcmcia_request_configuration(), they may + be used. + +* No dev_info_t, no cs_types.h (as of 2.6.36) + dev_info_t and a few other typedefs are removed. No longer use them + in PCMCIA device drivers. Also, do not include pcmcia/cs_types.h, as + this file is gone. + * No dev_node_t (as of 2.6.35) There is no more need to fill out a "dev_node_t" structure. diff --git a/Documentation/power/apm-acpi.txt b/Documentation/power/apm-acpi.txt index 1bd799dc17e8..6cc423d3662e 100644 --- a/Documentation/power/apm-acpi.txt +++ b/Documentation/power/apm-acpi.txt @@ -28,5 +28,5 @@ and be sure that they are started sometime in the system boot process. Go ahead and start both. If ACPI or APM is not available on your system the associated daemon will exit gracefully. - apmd: http://worldvisions.ca/~apenwarr/apmd/ + apmd: http://ftp.debian.org/pool/main/a/apmd/ acpid: http://acpid.sf.net/ diff --git a/Documentation/power/basic-pm-debugging.txt b/Documentation/power/basic-pm-debugging.txt index 1555001bc733..ddd78172ef73 100644 --- a/Documentation/power/basic-pm-debugging.txt +++ b/Documentation/power/basic-pm-debugging.txt @@ -179,8 +179,7 @@ use the PM_TRACE mechanism documented in Documentation/s2ram.txt . To verify that the STR works, it is generally more convenient to use the s2ram tool available from http://suspend.sf.net and documented at -http://en.opensuse.org/s2ram . However, before doing that it is recommended to -carry out STR testing using the facility described in section 1. +http://en.opensuse.org/SDB:Suspend_to_RAM. Namely, after writing "freezer", "devices", "platform", "processors", or "core" into /sys/power/pm_test (available if the kernel is compiled with diff --git a/Documentation/power/tricks.txt b/Documentation/power/tricks.txt index 3b26bb502a4a..a1b8f7249f4c 100644 --- a/Documentation/power/tricks.txt +++ b/Documentation/power/tricks.txt @@ -1,6 +1,6 @@ swsusp/S3 tricks ~~~~~~~~~~~~~~~~ -Pavel Machek +Pavel Machek If you want to trick swsusp/S3 into working, you might want to try: diff --git a/Documentation/power/video.txt b/Documentation/power/video.txt index 2b358498d095..3e6272bc4472 100644 --- a/Documentation/power/video.txt +++ b/Documentation/power/video.txt @@ -67,11 +67,11 @@ There are a few types of systems where video works after S3 resume: POSTing bios works. Ole Rohne has patch to do just that at http://dev.gentoo.org/~marineam/patch-radeonfb-2.6.11-rc2-mm2. -(8) on some systems, you can use the video_post utility mentioned here: - http://bugzilla.kernel.org/show_bug.cgi?id=3670. Do echo 3 > /sys/power/state - && /usr/sbin/video_post - which will initialize the display in console mode. - If you are in X, you can switch to a virtual terminal and back to X using - CTRL+ALT+F1 - CTRL+ALT+F7 to get the display working in graphical mode again. +(8) on some systems, you can use the video_post utility and or + do echo 3 > /sys/power/state && /usr/sbin/video_post - which will + initialize the display in console mode. If you are in X, you can switch + to a virtual terminal and back to X using CTRL+ALT+F1 - CTRL+ALT+F7 to get + the display working in graphical mode again. Now, if you pass acpi_sleep=something, and it does not work with your bios, you'll get a hard crash during resume. Be careful. Also it is @@ -177,7 +177,7 @@ Mainboard Graphics card hack (or "how to do it") Asus A7V8X nVidia RIVA TNT2 model 64 s3_bios,s3_mode (4) -(*) from http://www.ubuntulinux.org/wiki/HoaryPMResults, not sure +(*) from https://wiki.ubuntu.com/HoaryPMResults, not sure which options to use. If you know, please tell me. (***) To be tested with a newer kernel. diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 46d22105aa07..568fa08e82e5 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt @@ -1048,7 +1048,7 @@ IV - "dtc", the device tree compiler dtc source code can be found at - + WARNING: This version is still in early development stage; the resulting device-tree "blobs" have not yet been validated with the diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt index deb35de70988..b66cb6d31d69 100644 --- a/Documentation/powerpc/dts-bindings/fsl/diu.txt +++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt @@ -4,10 +4,17 @@ The Freescale DIU is a LCD controller, with proper hardware, it can also drive DVI monitors. Required properties: -- compatible : should be "fsl-diu". +- compatible : should be "fsl,diu" or "fsl,mpc5121-diu". - reg : should contain at least address and length of the DIU register set. -- Interrupts : one DIU interrupt should be describe here. +- interrupts : one DIU interrupt should be described here. +- interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. + +Optional properties: +- edid : verbatim EDID data block describing attached display. + Data from the detailed timing descriptor will be used to + program the display controller. Example (MPC8610HPCD): display@2c000 { @@ -16,3 +23,12 @@ Example (MPC8610HPCD): interrupts = <72 2>; interrupt-parent = <&mpic>; }; + +Example for MPC5121: + display@2100 { + compatible = "fsl,mpc5121-diu"; + reg = <0x2100 0x100>; + interrupts = <64 0x8>; + interrupt-parent = <&ipic>; + edid = [edid-data]; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt index 8a0040738969..64bcb8be973c 100644 --- a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt +++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt @@ -14,6 +14,8 @@ Required properties: reports inverted write-protect state; - sdhci,1-bit-only : (optional) specifies that a controller can only handle 1-bit data transfers. + - sdhci,auto-cmd12: (optional) specifies that a controller can + only handle auto CMD12. Example: diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt b/Documentation/powerpc/dts-bindings/fsl/i2c.txt index 50da20310585..1eacd6b20ed5 100644 --- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt +++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt @@ -20,6 +20,7 @@ Recommended properties : - fsl,preserve-clocking : boolean; if defined, the clock settings from the bootloader are preserved (not touched). - clock-frequency : desired I2C bus clock frequency in Hz. + - fsl,timeout : I2C bus timeout in microseconds. Examples : @@ -59,4 +60,5 @@ Examples : interrupts = <43 2>; interrupt-parent = <&mpic>; clock-frequency = <400000>; + fsl,timeout = <10000>; }; diff --git a/Documentation/rt-mutex-design.txt b/Documentation/rt-mutex-design.txt index 8df0b782c4d7..33ed8007a845 100644 --- a/Documentation/rt-mutex-design.txt +++ b/Documentation/rt-mutex-design.txt @@ -364,7 +364,7 @@ process this is rather easy to know what needs to be adjusted. The functions implementing the task adjustments are rt_mutex_adjust_prio, __rt_mutex_adjust_prio (same as the former, but expects the task pi_lock -to already be taken), rt_mutex_get_prio, and rt_mutex_setprio. +to already be taken), rt_mutex_getprio, and rt_mutex_setprio. rt_mutex_getprio and rt_mutex_setprio are only used in __rt_mutex_adjust_prio. diff --git a/Documentation/s390/Debugging390.txt b/Documentation/s390/Debugging390.txt index 1eb576a023bd..86f9f74b2b34 100644 --- a/Documentation/s390/Debugging390.txt +++ b/Documentation/s390/Debugging390.txt @@ -2531,5 +2531,5 @@ Special Thanks ============== Special thanks to Neale Ferguson who maintains a much prettier HTML version of this page at -http://penguinvm.princeton.edu/notes.html#Debug390 +http://linuxvm.org/penguinvm/ Bob Grainger Stefan Bader & others for reporting bugs diff --git a/Documentation/scsi/BusLogic.txt b/Documentation/scsi/BusLogic.txt index 98023baa0f0d..d7fbc9488b98 100644 --- a/Documentation/scsi/BusLogic.txt +++ b/Documentation/scsi/BusLogic.txt @@ -47,7 +47,7 @@ tune driver performance and error recovery to their particular needs. The latest information on Linux support for BusLogic SCSI Host Adapters, as well as the most recent release of this driver and the latest firmware for the BT-948/958/958D, will always be available from my Linux Home Page at URL -"http://www.dandelion.com/Linux/". +"http://sourceforge.net/projects/dandelion/". Bug reports should be sent via electronic mail to "lnz@dandelion.com". Please include with the bug report the complete configuration messages reported by the diff --git a/Documentation/scsi/ChangeLog.lpfc b/Documentation/scsi/ChangeLog.lpfc index e759e92e286d..337c924cc81f 100644 --- a/Documentation/scsi/ChangeLog.lpfc +++ b/Documentation/scsi/ChangeLog.lpfc @@ -807,7 +807,7 @@ Changes from 20040908 to 20040920 lpfc_disc_done/lpfc_do_dpc cleanup - lpfc_disc_done can return void - move lpfc_do_dpc and lpfc_disc_done to lpfc_hbadisc.c - remove checking of list emptiness before calling lpfc_disc_done, - it handles the emtpy list case just fine and the additional + it handles the empty list case just fine and the additional instructions cost less then the bustlocked spinlock operations. * Integrated patch from Christoph Hellwig: This adds a new 64bit counter instead, brd_no isn't reused anymore. Also some tiny diff --git a/Documentation/scsi/ChangeLog.megaraid b/Documentation/scsi/ChangeLog.megaraid index 38e9e7cadc90..5e07d320817d 100644 --- a/Documentation/scsi/ChangeLog.megaraid +++ b/Documentation/scsi/ChangeLog.megaraid @@ -215,7 +215,7 @@ Older Version : 2.20.4.5 (scsi module), 2.20.2.5 (cmm module) 3. Convert pci_module_init to pci_register_driver Convert from pci_module_init to pci_register_driver - (from:http://kerneljanitors.org/TODO) + (from:http://kernelnewbies.org/KernelJanitors/TODO) - Signed-off-by: Domen Puncer 4. Use the pre defined DMA mask constants from dma-mapping.h diff --git a/Documentation/scsi/FlashPoint.txt b/Documentation/scsi/FlashPoint.txt index 1540a92f6d2b..5b5f29cb9f8b 100644 --- a/Documentation/scsi/FlashPoint.txt +++ b/Documentation/scsi/FlashPoint.txt @@ -13,7 +13,7 @@ operating system support to its BusLogic brand of FlashPoint Ultra SCSI host adapters. All of BusLogic's other SCSI host adapters, including the MultiMaster line, currently support the Linux operating system. Linux drivers and information will be available on October 15th at -http://www.dandelion.com/Linux/. +http://sourceforge.net/projects/dandelion/. "Mylex is committed to supporting the Linux community," says Peter Shambora, vice president of marketing for Mylex. "We have supported Linux driver @@ -27,7 +27,7 @@ Linux is a freely-distributed implementation of UNIX for Intel x86, Sun SPARC, SGI MIPS, Motorola 68k, Digital Alpha AXP and Motorola PowerPC machines. It supports a wide range of software, including the X Window System, Emacs, and TCP/IP networking. Further information is available at -http://www.linux.org and http://www.ssc.com/linux. +http://www.linux.org and http://www.ssc.com/. FlashPoint Host Adapters diff --git a/Documentation/scsi/Mylex.txt b/Documentation/scsi/Mylex.txt index cdf69293f7d5..3797f3e6c2b5 100644 --- a/Documentation/scsi/Mylex.txt +++ b/Documentation/scsi/Mylex.txt @@ -2,4 +2,4 @@ Please see the file README.BusLogic for information about Linux support for Mylex (formerly BusLogic) MultiMaster and FlashPoint SCSI Host Adapters. The Mylex DAC960 PCI RAID Controllers are now supported. Please consult -http://www.dandelion.com/Linux/ for further information on the DAC960 driver. +http://sourceforge.net/projects/dandelion for further information on the DAC960 driver. diff --git a/Documentation/scsi/NinjaSCSI.txt b/Documentation/scsi/NinjaSCSI.txt index 3229b64cf24e..ac8db8ceec77 100644 --- a/Documentation/scsi/NinjaSCSI.txt +++ b/Documentation/scsi/NinjaSCSI.txt @@ -3,8 +3,6 @@ 1. Comment This is Workbit corp.'s(http://www.workbit.co.jp/) NinjaSCSI-3 -(http://www.workbit.co.jp/ts/z_nj3r.html) and NinjaSCSI-32Bi -(http://www.workbit.co.jp/ts/z_njsc32bi.html) PCMCIA card driver module for Linux. 2. My Linux environment diff --git a/Documentation/scsi/aic79xx.txt b/Documentation/scsi/aic79xx.txt index c014eccaf19f..16e054c9c70b 100644 --- a/Documentation/scsi/aic79xx.txt +++ b/Documentation/scsi/aic79xx.txt @@ -447,7 +447,7 @@ The following information is available in this file: http://www.adaptec.com/buy-cables/. Europe - - Visit our Web site at http://www.adaptec-europe.com/. + - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. - To speak with a Technical Support Specialist, call, or email, * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/. diff --git a/Documentation/scsi/aic7xxx.txt b/Documentation/scsi/aic7xxx.txt index b7e238cbb5a7..18f8d1905e6a 100644 --- a/Documentation/scsi/aic7xxx.txt +++ b/Documentation/scsi/aic7xxx.txt @@ -344,7 +344,7 @@ The following information is available in this file: http://www.adaptec.com/buy-cables/. Europe - - Visit our Web site at http://www.adaptec-europe.com/. + - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. - To speak with a Technical Support Specialist, call, or email, * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/. diff --git a/Documentation/scsi/hpsa.txt b/Documentation/scsi/hpsa.txt new file mode 100644 index 000000000000..dca658362cbf --- /dev/null +++ b/Documentation/scsi/hpsa.txt @@ -0,0 +1,107 @@ + +HPSA - Hewlett Packard Smart Array driver +----------------------------------------- + +This file describes the hpsa SCSI driver for HP Smart Array controllers. +The hpsa driver is intended to supplant the cciss driver for newer +Smart Array controllers. The hpsa driver is a SCSI driver, while the +cciss driver is a "block" driver. Actually cciss is both a block +driver (for logical drives) AND a SCSI driver (for tape drives). This +"split-brained" design of the cciss driver is a source of excess +complexity and eliminating that complexity is one of the reasons +for hpsa to exist. + +Supported devices: +------------------ + +Smart Array P212 +Smart Array P410 +Smart Array P410i +Smart Array P411 +Smart Array P812 +Smart Array P712m +Smart Array P711m +StorageWorks P1210m + +Additionally, older Smart Arrays may work with the hpsa driver if the kernel +boot parameter "hpsa_allow_any=1" is specified, however these are not tested +nor supported by HP with this driver. For older Smart Arrays, the cciss +driver should still be used. + +HPSA specific entries in /sys +----------------------------- + + In addition to the generic SCSI attributes available in /sys, hpsa supports + the following attributes: + + HPSA specific host attributes: + ------------------------------ + + /sys/class/scsi_host/host*/rescan + /sys/class/scsi_host/host*/firmware_revision + + the host "rescan" attribute is a write only attribute. Writing to this + attribute will cause the driver to scan for new, changed, or removed devices + (e.g. hot-plugged tape drives, or newly configured or deleted logical drives, + etc.) and notify the SCSI midlayer of any changes detected. Normally this is + triggered automatically by HP's Array Configuration Utility (either the GUI or + command line variety) so for logical drive changes, the user should not + normally have to use this. It may be useful when hot plugging devices like + tape drives, or entire storage boxes containing pre-configured logical drives. + + The "firmware_revision" attribute contains the firmware version of the Smart Array. + For example: + + root@host:/sys/class/scsi_host/host4# cat firmware_revision + 7.14 + + HPSA specific disk attributes: + ------------------------------ + + /sys/class/scsi_disk/c:b:t:l/device/unique_id + /sys/class/scsi_disk/c:b:t:l/device/raid_level + /sys/class/scsi_disk/c:b:t:l/device/lunid + + (where c:b:t:l are the controller, bus, target and lun of the device) + + For example: + + root@host:/sys/class/scsi_disk/4:0:0:0/device# cat unique_id + 600508B1001044395355323037570F77 + root@host:/sys/class/scsi_disk/4:0:0:0/device# cat lunid + 0x0000004000000000 + root@host:/sys/class/scsi_disk/4:0:0:0/device# cat raid_level + RAID 0 + +HPSA specific ioctls: +--------------------- + + For compatibility with applications written for the cciss driver, many, but + not all of the ioctls supported by the cciss driver are also supported by the + hpsa driver. The data structures used by these are described in + include/linux/cciss_ioctl.h + + CCISS_DEREGDISK + CCISS_REGNEWDISK + CCISS_REGNEWD + + The above three ioctls all do exactly the same thing, which is to cause the driver + to rescan for new devices. This does exactly the same thing as writing to the + hpsa specific host "rescan" attribute. + + CCISS_GETPCIINFO + + Returns PCI domain, bus, device and function and "board ID" (PCI subsystem ID). + + CCISS_GETDRIVVER + + Returns driver version in three bytes encoded as: + (major_version << 16) | (minor_version << 8) | (subminor_version) + + CCISS_PASSTHRU + CCISS_BIG_PASSTHRU + + Allows "BMIC" and "CISS" commands to be passed through to the Smart Array. + These are used extensively by the HP Array Configuration Utility, SNMP storage + agents, etc. See cciss_vol_status at http://cciss.sf.net for some examples. + diff --git a/Documentation/scsi/ibmmca.txt b/Documentation/scsi/ibmmca.txt index 3920f28710c4..45d61ad8c6f7 100644 --- a/Documentation/scsi/ibmmca.txt +++ b/Documentation/scsi/ibmmca.txt @@ -1109,7 +1109,7 @@ Q: Where can I find the latest info about this driver? A: See the file MAINTAINERS for the current WWW-address, which offers updates, info and Q/A lists. At this file's origin, the webaddress - was: http://www.uni-mainz.de/~langm000/linux.html + was: http://www.staff.uni-mainz.de/mlang/linux.html Q: My SCSI-adapter is not recognized by the driver, what can I do? A: Just force it to be recognized by kernel parameters. See section 5.1. If this really happens, do also send e-mail to the maintainer, as diff --git a/Documentation/scsi/osst.txt b/Documentation/scsi/osst.txt index 2b21890bc983..ad86c6d1e898 100644 --- a/Documentation/scsi/osst.txt +++ b/Documentation/scsi/osst.txt @@ -135,7 +135,7 @@ The driver development is coordinated through a mailing list a CVS repository and some web pages. The tester's pages which contain recent news and updated drivers to download can be found on -http://linux1.onstream.nl/test/ +http://sourceforge.net/projects/osst/ If you find any problems, please have a look at the tester's page in order to see whether the problem is already known and solved. Otherwise, please diff --git a/Documentation/scsi/ppa.txt b/Documentation/scsi/ppa.txt index 067ac394e0b2..05ff47dbe8d1 100644 --- a/Documentation/scsi/ppa.txt +++ b/Documentation/scsi/ppa.txt @@ -1,13 +1,13 @@ -------- Terse where to get ZIP Drive help info -------- General Iomega ZIP drive page for Linux: -http://www.torque.net/~campbell/ +http://web.archive.org/web/*/http://www.torque.net/~campbell/ Driver archive for old drivers: -http://www.torque.net/~campbell/ppa/ +http://web.archive.org/web/*/http://www.torque.net/~campbell/ppa Linux Parport page (parallel port) -http://www.torque.net/parport/ +http://web.archive.org/web/*/http://www.torque.net/parport/ Email list for Linux Parport linux-parport@torque.net diff --git a/Documentation/scsi/scsi-generic.txt b/Documentation/scsi/scsi-generic.txt index c38e2b3648e4..0a22ab8ea0c1 100644 --- a/Documentation/scsi/scsi-generic.txt +++ b/Documentation/scsi/scsi-generic.txt @@ -34,11 +34,11 @@ http://www.tldp.org/HOWTO/SCSI-Generic-HOWTO This describes the sg version 3 driver found in the lk 2.4 series. The LDP renders documents in single and multiple page HTML, postscript and pdf. This document can also be found at: -http://www.torque.net/sg/p/sg_v3_ho.html +http://sg.danny.cz/sg/p/sg_v3_ho.html Documentation for the version 2 sg driver found in the lk 2.2 series can -be found at http://www.torque.net/sg/p/scsi-generic.txt . A larger version -is at: http://www.torque.net/sg/p/scsi-generic_long.txt . +be found at http://sg.danny.cz/sg/. A larger version +is at: http://sg.danny.cz/sg/p/scsi-generic_long.txt. The original documentation for the sg driver (prior to lk 2.2.6) can be found at http://www.torque.net/sg/p/original/SCSI-Programming-HOWTO.txt @@ -61,7 +61,7 @@ There are two packages of sg utilities: - sg_utils for the sg version 2 (and original) driver found in lk 2.2 and earlier Both packages will work in the lk 2.4 series however sg3_utils offers more -capabilities. They can be found at: http://www.torque.net/sg and +capabilities. They can be found at: http://sg.danny.cz/sg/sg3_utils.html and freshmeat.net Another approach is to look at the applications that use the sg driver. diff --git a/Documentation/scsi/scsi-parameters.txt b/Documentation/scsi/scsi-parameters.txt new file mode 100644 index 000000000000..21e5798526ee --- /dev/null +++ b/Documentation/scsi/scsi-parameters.txt @@ -0,0 +1,139 @@ + SCSI Kernel Parameters + ~~~~~~~~~~~~~~~~~~~~~~ + +See Documentation/kernel-parameters.txt for general information on +specifying module parameters. + +This document may not be entirely up to date and comprehensive. The command +"modinfo -p ${modulename}" shows a current list of all parameters of a loadable +module. Loadable modules, after being loaded into the running kernel, also +reveal their parameters in /sys/module/${modulename}/parameters/. Some of these +parameters may be changed at runtime by the command +"echo -n ${value} > /sys/module/${modulename}/parameters/${parm}". + + + advansys= [HW,SCSI] + See header of drivers/scsi/advansys.c. + + aha152x= [HW,SCSI] + See Documentation/scsi/aha152x.txt. + + aha1542= [HW,SCSI] + Format: [,,[,]] + + aic7xxx= [HW,SCSI] + See Documentation/scsi/aic7xxx.txt. + + aic79xx= [HW,SCSI] + See Documentation/scsi/aic79xx.txt. + + atascsi= [HW,SCSI] Atari SCSI + + BusLogic= [HW,SCSI] + See drivers/scsi/BusLogic.c, comment before function + BusLogic_ParseDriverOptions(). + + dtc3181e= [HW,SCSI] + + eata= [HW,SCSI] + + fd_mcs= [HW,SCSI] + See header of drivers/scsi/fd_mcs.c. + + fdomain= [HW,SCSI] + See header of drivers/scsi/fdomain.c. + + gdth= [HW,SCSI] + See header of drivers/scsi/gdth.c. + + gvp11= [HW,SCSI] + + ibmmcascsi= [HW,MCA,SCSI] IBM MicroChannel SCSI adapter + See Documentation/mca.txt. + + in2000= [HW,SCSI] + See header of drivers/scsi/in2000.c. + + ips= [HW,SCSI] Adaptec / IBM ServeRAID controller + See header of drivers/scsi/ips.c. + + mac5380= [HW,SCSI] Format: + ,,,, + + max_luns= [SCSI] Maximum number of LUNs to probe. + Should be between 1 and 2^32-1. + + max_report_luns= + [SCSI] Maximum number of LUNs received. + Should be between 1 and 16384. + + NCR_D700= [HW,SCSI] + See header of drivers/scsi/NCR_D700.c. + + ncr5380= [HW,SCSI] + + ncr53c400= [HW,SCSI] + + ncr53c400a= [HW,SCSI] + + ncr53c406a= [HW,SCSI] + + ncr53c8xx= [HW,SCSI] + + nodisconnect [HW,SCSI,M68K] Disables SCSI disconnects. + + osst= [HW,SCSI] SCSI Tape Driver + Format: , + See also Documentation/scsi/st.txt. + + pas16= [HW,SCSI] + See header of drivers/scsi/pas16.c. + + scsi_debug_*= [SCSI] + See drivers/scsi/scsi_debug.c. + + scsi_default_dev_flags= + [SCSI] SCSI default device flags + Format: + + scsi_dev_flags= [SCSI] Black/white list entry for vendor and model + Format: :: + (flags are integer value) + + scsi_logging_level= [SCSI] a bit mask of logging levels + See drivers/scsi/scsi_logging.h for bits. Also + settable via sysctl at dev.scsi.logging_level + (/proc/sys/dev/scsi/logging_level). + There is also a nice 'scsi_logging_level' script in the + S390-tools package, available for download at + http://www-128.ibm.com/developerworks/linux/linux390/s390-tools-1.5.4.html + + scsi_mod.scan= [SCSI] sync (default) scans SCSI busses as they are + discovered. async scans them in kernel threads, + allowing boot to proceed. none ignores them, expecting + user space to do the scan. + + sim710= [SCSI,HW] + See header of drivers/scsi/sim710.c. + + st= [HW,SCSI] SCSI tape parameters (buffers, etc.) + See Documentation/scsi/st.txt. + + sym53c416= [HW,SCSI] + See header of drivers/scsi/sym53c416.c. + + t128= [HW,SCSI] + See header of drivers/scsi/t128.c. + + tmscsim= [HW,SCSI] + See comment before function dc390_setup() in + drivers/scsi/tmscsim.c. + + u14-34f= [HW,SCSI] UltraStor 14F/34F SCSI host adapter + See header of drivers/scsi/u14-34f.c. + + wd33c93= [HW,SCSI] + See header of drivers/scsi/wd33c93.c. + + wd7000= [HW,SCSI] + See header of drivers/scsi/wd7000.c. diff --git a/Documentation/scsi/scsi.txt b/Documentation/scsi/scsi.txt index dd1bbf4e98e3..3d99d38cb62a 100644 --- a/Documentation/scsi/scsi.txt +++ b/Documentation/scsi/scsi.txt @@ -4,8 +4,8 @@ The Linux Documentation Project (LDP) maintains a document describing the SCSI subsystem in the Linux kernel (lk) 2.4 series. See: http://www.tldp.org/HOWTO/SCSI-2.4-HOWTO . The LDP has single and multiple page HTML renderings as well as postscript and pdf. -It can also be found at http://www.torque.net/scsi/SCSI-2.4-HOWTO . - +It can also be found at: +http://web.archive.org/web/*/http://www.torque.net/scsi/SCSI-2.4-HOWTO Notes on using modules in the SCSI subsystem ============================================ diff --git a/Documentation/scsi/scsi_mid_low_api.txt b/Documentation/scsi/scsi_mid_low_api.txt index de67229251d8..570ef2b3d79b 100644 --- a/Documentation/scsi/scsi_mid_low_api.txt +++ b/Documentation/scsi/scsi_mid_low_api.txt @@ -43,7 +43,7 @@ There is a SCSI documentation directory within the kernel source tree, typically Documentation/scsi . Most documents are in plain (i.e. ASCII) text. This file is named scsi_mid_low_api.txt and can be found in that directory. A more recent copy of this document may be found -at http://www.torque.net/scsi/scsi_mid_low_api.txt.gz . +at http://web.archive.org/web/20070107183357rn_1/sg.torque.net/scsi/. Many LLDs are documented there (e.g. aic7xxx.txt). The SCSI mid-level is briefly described in scsi.txt which contains a url to a document describing the SCSI subsystem in the lk 2.4 series. Two upper level diff --git a/Documentation/serial/moxa-smartio b/Documentation/serial/moxa-smartio index 5337e80a5b96..d10443918684 100644 --- a/Documentation/serial/moxa-smartio +++ b/Documentation/serial/moxa-smartio @@ -76,7 +76,7 @@ Content GNU General Public License in this version. Please refer to GNU General Public License announcement in each source code file for more detail. - In Moxa's Web sites, you may always find latest driver at http://web.moxa.com. + In Moxa's Web sites, you may always find latest driver at http://www.moxa.com/. This version of driver can be installed as Loadable Module (Module driver) or built-in into kernel (Static driver). You may refer to following diff --git a/Documentation/slow-work.txt b/Documentation/slow-work.txt deleted file mode 100644 index 9dbf4470c7e1..000000000000 --- a/Documentation/slow-work.txt +++ /dev/null @@ -1,322 +0,0 @@ - ==================================== - SLOW WORK ITEM EXECUTION THREAD POOL - ==================================== - -By: David Howells - -The slow work item execution thread pool is a pool of threads for performing -things that take a relatively long time, such as making mkdir calls. -Typically, when processing something, these items will spend a lot of time -blocking a thread on I/O, thus making that thread unavailable for doing other -work. - -The standard workqueue model is unsuitable for this class of work item as that -limits the owner to a single thread or a single thread per CPU. For some -tasks, however, more threads - or fewer - are required. - -There is just one pool per system. It contains no threads unless something -wants to use it - and that something must register its interest first. When -the pool is active, the number of threads it contains is dynamic, varying -between a maximum and minimum setting, depending on the load. - - -==================== -CLASSES OF WORK ITEM -==================== - -This pool support two classes of work items: - - (*) Slow work items. - - (*) Very slow work items. - -The former are expected to finish much quicker than the latter. - -An operation of the very slow class may do a batch combination of several -lookups, mkdirs, and a create for instance. - -An operation of the ordinarily slow class may, for example, write stuff or -expand files, provided the time taken to do so isn't too long. - -Operations of both types may sleep during execution, thus tying up the thread -loaned to it. - -A further class of work item is available, based on the slow work item class: - - (*) Delayed slow work items. - -These are slow work items that have a timer to defer queueing of the item for -a while. - - -THREAD-TO-CLASS ALLOCATION --------------------------- - -Not all the threads in the pool are available to work on very slow work items. -The number will be between one and one fewer than the number of active threads. -This is configurable (see the "Pool Configuration" section). - -All the threads are available to work on ordinarily slow work items, but a -percentage of the threads will prefer to work on very slow work items. - -The configuration ensures that at least one thread will be available to work on -very slow work items, and at least one thread will be available that won't work -on very slow work items at all. - - -===================== -USING SLOW WORK ITEMS -===================== - -Firstly, a module or subsystem wanting to make use of slow work items must -register its interest: - - int ret = slow_work_register_user(struct module *module); - -This will return 0 if successful, or a -ve error upon failure. The module -pointer should be the module interested in using this facility (almost -certainly THIS_MODULE). - - -Slow work items may then be set up by: - - (1) Declaring a slow_work struct type variable: - - #include - - struct slow_work myitem; - - (2) Declaring the operations to be used for this item: - - struct slow_work_ops myitem_ops = { - .get_ref = myitem_get_ref, - .put_ref = myitem_put_ref, - .execute = myitem_execute, - }; - - [*] For a description of the ops, see section "Item Operations". - - (3) Initialising the item: - - slow_work_init(&myitem, &myitem_ops); - - or: - - delayed_slow_work_init(&myitem, &myitem_ops); - - or: - - vslow_work_init(&myitem, &myitem_ops); - - depending on its class. - -A suitably set up work item can then be enqueued for processing: - - int ret = slow_work_enqueue(&myitem); - -This will return a -ve error if the thread pool is unable to gain a reference -on the item, 0 otherwise, or (for delayed work): - - int ret = delayed_slow_work_enqueue(&myitem, my_jiffy_delay); - - -The items are reference counted, so there ought to be no need for a flush -operation. But as the reference counting is optional, means to cancel -existing work items are also included: - - cancel_slow_work(&myitem); - cancel_delayed_slow_work(&myitem); - -can be used to cancel pending work. The above cancel function waits for -existing work to have been executed (or prevent execution of them, depending -on timing). - - -When all a module's slow work items have been processed, and the -module has no further interest in the facility, it should unregister its -interest: - - slow_work_unregister_user(struct module *module); - -The module pointer is used to wait for all outstanding work items for that -module before completing the unregistration. This prevents the put_ref() code -from being taken away before it completes. module should almost certainly be -THIS_MODULE. - - -================ -HELPER FUNCTIONS -================ - -The slow-work facility provides a function by which it can be determined -whether or not an item is queued for later execution: - - bool queued = slow_work_is_queued(struct slow_work *work); - -If it returns false, then the item is not on the queue (it may be executing -with a requeue pending). This can be used to work out whether an item on which -another depends is on the queue, thus allowing a dependent item to be queued -after it. - -If the above shows an item on which another depends not to be queued, then the -owner of the dependent item might need to wait. However, to avoid locking up -the threads unnecessarily be sleeping in them, it can make sense under some -circumstances to return the work item to the queue, thus deferring it until -some other items have had a chance to make use of the yielded thread. - -To yield a thread and defer an item, the work function should simply enqueue -the work item again and return. However, this doesn't work if there's nothing -actually on the queue, as the thread just vacated will jump straight back into -the item's work function, thus busy waiting on a CPU. - -Instead, the item should use the thread to wait for the dependency to go away, -but rather than using schedule() or schedule_timeout() to sleep, it should use -the following function: - - bool requeue = slow_work_sleep_till_thread_needed( - struct slow_work *work, - signed long *_timeout); - -This will add a second wait and then sleep, such that it will be woken up if -either something appears on the queue that could usefully make use of the -thread - and behind which this item can be queued, or if the event the caller -set up to wait for happens. True will be returned if something else appeared -on the queue and this work function should perhaps return, of false if -something else woke it up. The timeout is as for schedule_timeout(). - -For example: - - wq = bit_waitqueue(&my_flags, MY_BIT); - init_wait(&wait); - requeue = false; - do { - prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE); - if (!test_bit(MY_BIT, &my_flags)) - break; - requeue = slow_work_sleep_till_thread_needed(&my_work, - &timeout); - } while (timeout > 0 && !requeue); - finish_wait(wq, &wait); - if (!test_bit(MY_BIT, &my_flags) - goto do_my_thing; - if (requeue) - return; // to slow_work - - -=============== -ITEM OPERATIONS -=============== - -Each work item requires a table of operations of type struct slow_work_ops. -Only ->execute() is required; the getting and putting of a reference and the -describing of an item are all optional. - - (*) Get a reference on an item: - - int (*get_ref)(struct slow_work *work); - - This allows the thread pool to attempt to pin an item by getting a - reference on it. This function should return 0 if the reference was - granted, or a -ve error otherwise. If an error is returned, - slow_work_enqueue() will fail. - - The reference is held whilst the item is queued and whilst it is being - executed. The item may then be requeued with the same reference held, or - the reference will be released. - - (*) Release a reference on an item: - - void (*put_ref)(struct slow_work *work); - - This allows the thread pool to unpin an item by releasing the reference on - it. The thread pool will not touch the item again once this has been - called. - - (*) Execute an item: - - void (*execute)(struct slow_work *work); - - This should perform the work required of the item. It may sleep, it may - perform disk I/O and it may wait for locks. - - (*) View an item through /proc: - - void (*desc)(struct slow_work *work, struct seq_file *m); - - If supplied, this should print to 'm' a small string describing the work - the item is to do. This should be no more than about 40 characters, and - shouldn't include a newline character. - - See the 'Viewing executing and queued items' section below. - - -================== -POOL CONFIGURATION -================== - -The slow-work thread pool has a number of configurables: - - (*) /proc/sys/kernel/slow-work/min-threads - - The minimum number of threads that should be in the pool whilst it is in - use. This may be anywhere between 2 and max-threads. - - (*) /proc/sys/kernel/slow-work/max-threads - - The maximum number of threads that should in the pool. This may be - anywhere between min-threads and 255 or NR_CPUS * 2, whichever is greater. - - (*) /proc/sys/kernel/slow-work/vslow-percentage - - The percentage of active threads in the pool that may be used to execute - very slow work items. This may be between 1 and 99. The resultant number - is bounded to between 1 and one fewer than the number of active threads. - This ensures there is always at least one thread that can process very - slow work items, and always at least one thread that won't. - - -================================== -VIEWING EXECUTING AND QUEUED ITEMS -================================== - -If CONFIG_SLOW_WORK_DEBUG is enabled, a debugfs file is made available: - - /sys/kernel/debug/slow_work/runqueue - -through which the list of work items being executed and the queues of items to -be executed may be viewed. The owner of a work item is given the chance to -add some information of its own. - -The contents look something like the following: - - THR PID ITEM ADDR FL MARK DESC - === ===== ================ == ===== ========== - 0 3005 ffff880023f52348 a 952ms FSC: OBJ17d3: LOOK - 1 3006 ffff880024e33668 2 160ms FSC: OBJ17e5 OP60d3b: Write1/Store fl=2 - 2 3165 ffff8800296dd180 a 424ms FSC: OBJ17e4: LOOK - 3 4089 ffff8800262c8d78 a 212ms FSC: OBJ17ea: CRTN - 4 4090 ffff88002792bed8 2 388ms FSC: OBJ17e8 OP60d36: Write1/Store fl=2 - 5 4092 ffff88002a0ef308 2 388ms FSC: OBJ17e7 OP60d2e: Write1/Store fl=2 - 6 4094 ffff88002abaf4b8 2 132ms FSC: OBJ17e2 OP60d4e: Write1/Store fl=2 - 7 4095 ffff88002bb188e0 a 388ms FSC: OBJ17e9: CRTN - vsq - ffff880023d99668 1 308ms FSC: OBJ17e0 OP60f91: Write1/EnQ fl=2 - vsq - ffff8800295d1740 1 212ms FSC: OBJ16be OP4d4b6: Write1/EnQ fl=2 - vsq - ffff880025ba3308 1 160ms FSC: OBJ179a OP58dec: Write1/EnQ fl=2 - vsq - ffff880024ec83e0 1 160ms FSC: OBJ17ae OP599f2: Write1/EnQ fl=2 - vsq - ffff880026618e00 1 160ms FSC: OBJ17e6 OP60d33: Write1/EnQ fl=2 - vsq - ffff880025a2a4b8 1 132ms FSC: OBJ16a2 OP4d583: Write1/EnQ fl=2 - vsq - ffff880023cbe6d8 9 212ms FSC: OBJ17eb: LOOK - vsq - ffff880024d37590 9 212ms FSC: OBJ17ec: LOOK - vsq - ffff880027746cb0 9 212ms FSC: OBJ17ed: LOOK - vsq - ffff880024d37ae8 9 212ms FSC: OBJ17ee: LOOK - vsq - ffff880024d37cb0 9 212ms FSC: OBJ17ef: LOOK - vsq - ffff880025036550 9 212ms FSC: OBJ17f0: LOOK - vsq - ffff8800250368e0 9 212ms FSC: OBJ17f1: LOOK - vsq - ffff880025036aa8 9 212ms FSC: OBJ17f2: LOOK - -In the 'THR' column, executing items show the thread they're occupying and -queued threads indicate which queue they're on. 'PID' shows the process ID of -a slow-work thread that's executing something. 'FL' shows the work item flags. -'MARK' indicates how long since an item was queued or began executing. Lastly, -the 'DESC' column permits the owner of an item to give some information. - diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt index 2075bbb8b3e2..7f4dcebda9c6 100644 --- a/Documentation/sound/alsa/ALSA-Configuration.txt +++ b/Documentation/sound/alsa/ALSA-Configuration.txt @@ -1285,7 +1285,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. about this driver. Note that it has been discontinued, but the Voyetra Turtle Beach knowledge base entry for it is still available at - http://www.turtlebeach.com/site/kb_ftp/790.asp + http://www.turtlebeach.com Module snd-msnd-pinnacle ------------------------ diff --git a/Documentation/sound/alsa/HD-Audio-Models.txt b/Documentation/sound/alsa/HD-Audio-Models.txt index 1d38b0dfba95..ce46fa1e643e 100644 --- a/Documentation/sound/alsa/HD-Audio-Models.txt +++ b/Documentation/sound/alsa/HD-Audio-Models.txt @@ -83,8 +83,8 @@ ALC269 ====== basic Basic preset quanta Quanta FL1 - eeepc-p703 ASUS Eeepc P703 P900A - eeepc-p901 ASUS Eeepc P901 S101 + laptop-amic Laptops with analog-mic input + laptop-dmic Laptops with digital-mic input fujitsu FSC Amilo lifebook Fujitsu Lifebook S6420 auto auto-config reading BIOS (default) @@ -109,11 +109,18 @@ ALC662/663/272 asus-mode4 ASUS asus-mode5 ASUS asus-mode6 ASUS + asus-mode7 ASUS + asus-mode8 ASUS dell Dell with ALC272 dell-zm1 Dell ZM1 with ALC272 samsung-nc10 Samsung NC10 mini notebook auto auto-config reading BIOS (default) +ALC680 +====== + base Base model (ASUS NX90) + auto auto-config reading BIOS (default) + ALC882/883/885/888/889 ====================== 3stack-dig 3-jack with SPDIF I/O @@ -282,6 +289,7 @@ Conexant 5051 hp HP Spartan laptop hp-dv6736 HP dv6736 hp-f700 HP Compaq Presario F700 + ideapad Lenovo IdeaPad laptop lenovo-x200 Lenovo X200 laptop toshiba Toshiba Satellite M300 @@ -289,8 +297,10 @@ Conexant 5066 ============= laptop Basic Laptop config (default) dell-laptop Dell laptops + dell-vostro Dell Vostro olpc-xo-1_5 OLPC XO 1.5 ideapad Lenovo IdeaPad U150 + thinkpad Lenovo Thinkpad STAC9200 ======== @@ -398,6 +408,7 @@ STAC92HD83* mic-ref Reference board with power management for ports dell-s14 Dell laptop hp HP laptops with (inverted) mute-LED + hp-dv7-4000 HP dv-7 4000 auto BIOS setup (default) STAC9872 @@ -410,3 +421,7 @@ Cirrus Logic CS4206/4207 mbp55 MacBook Pro 5,5 imac27 IMac 27 Inch auto BIOS setup (default) + +VIA VT17xx/VT18xx/VT20xx +======================== + auto BIOS setup (default) diff --git a/Documentation/sound/alsa/HD-Audio.txt b/Documentation/sound/alsa/HD-Audio.txt index bdafdbd32561..278cc2122ea0 100644 --- a/Documentation/sound/alsa/HD-Audio.txt +++ b/Documentation/sound/alsa/HD-Audio.txt @@ -562,7 +562,7 @@ compare the codec registers directly. Send a bug report either the followings: kernel-bugzilla:: - http://bugme.linux-foundation.org/ + https://bugzilla.kernel.org/ alsa-devel ML:: alsa-devel@alsa-project.org diff --git a/Documentation/sound/alsa/Procfile.txt b/Documentation/sound/alsa/Procfile.txt index 07301de12cc4..7fcd1ad96fcc 100644 --- a/Documentation/sound/alsa/Procfile.txt +++ b/Documentation/sound/alsa/Procfile.txt @@ -103,6 +103,8 @@ card*/pcm*/xrun_debug bit 2 = Enable additional jiffies check bit 3 = Log hwptr update at each period interrupt bit 4 = Log hwptr update at each snd_pcm_update_hw_ptr() + bit 5 = Show last 10 positions on error + bit 6 = Do above only once When the bit 0 is set, the driver will show the messages to kernel log when an xrun is detected. The debug message is @@ -122,6 +124,12 @@ card*/pcm*/xrun_debug Bits 3 and 4 are for logging the hwptr records. Note that these will give flood of kernel messages. + When bit 5 is set, the driver logs the last 10 xrun errors and + the proc file shows each jiffies, position, period_size, + buffer_size, old_hw_ptr, and hw_ptr_base values. + + When bit 6 is set, the full xrun log is shown only once. + card*/pcm*/sub*/info The general information of this PCM sub-stream. diff --git a/Documentation/sound/alsa/alsa-parameters.txt b/Documentation/sound/alsa/alsa-parameters.txt new file mode 100644 index 000000000000..0fa40679b080 --- /dev/null +++ b/Documentation/sound/alsa/alsa-parameters.txt @@ -0,0 +1,135 @@ + ALSA Kernel Parameters + ~~~~~~~~~~~~~~~~~~~~~~ + +See Documentation/kernel-parameters.txt for general information on +specifying module parameters. + +This document may not be entirely up to date and comprehensive. The command +"modinfo -p ${modulename}" shows a current list of all parameters of a loadable +module. Loadable modules, after being loaded into the running kernel, also +reveal their parameters in /sys/module/${modulename}/parameters/. Some of these +parameters may be changed at runtime by the command +"echo -n ${value} > /sys/module/${modulename}/parameters/${parm}". + + + snd-ad1816a= [HW,ALSA] + + snd-ad1848= [HW,ALSA] + + snd-ali5451= [HW,ALSA] + + snd-als100= [HW,ALSA] + + snd-als4000= [HW,ALSA] + + snd-azt2320= [HW,ALSA] + + snd-cmi8330= [HW,ALSA] + + snd-cmipci= [HW,ALSA] + + snd-cs4231= [HW,ALSA] + + snd-cs4232= [HW,ALSA] + + snd-cs4236= [HW,ALSA] + + snd-cs4281= [HW,ALSA] + + snd-cs46xx= [HW,ALSA] + + snd-dt019x= [HW,ALSA] + + snd-dummy= [HW,ALSA] + + snd-emu10k1= [HW,ALSA] + + snd-ens1370= [HW,ALSA] + + snd-ens1371= [HW,ALSA] + + snd-es968= [HW,ALSA] + + snd-es1688= [HW,ALSA] + + snd-es18xx= [HW,ALSA] + + snd-es1938= [HW,ALSA] + + snd-es1968= [HW,ALSA] + + snd-fm801= [HW,ALSA] + + snd-gusclassic= [HW,ALSA] + + snd-gusextreme= [HW,ALSA] + + snd-gusmax= [HW,ALSA] + + snd-hdsp= [HW,ALSA] + + snd-ice1712= [HW,ALSA] + + snd-intel8x0= [HW,ALSA] + + snd-interwave= [HW,ALSA] + + snd-interwave-stb= + [HW,ALSA] + + snd-korg1212= [HW,ALSA] + + snd-maestro3= [HW,ALSA] + + snd-mpu401= [HW,ALSA] + + snd-mtpav= [HW,ALSA] + + snd-nm256= [HW,ALSA] + + snd-opl3sa2= [HW,ALSA] + + snd-opti92x-ad1848= + [HW,ALSA] + + snd-opti92x-cs4231= + [HW,ALSA] + + snd-opti93x= [HW,ALSA] + + snd-pmac= [HW,ALSA] + + snd-rme32= [HW,ALSA] + + snd-rme96= [HW,ALSA] + + snd-rme9652= [HW,ALSA] + + snd-sb8= [HW,ALSA] + + snd-sb16= [HW,ALSA] + + snd-sbawe= [HW,ALSA] + + snd-serial= [HW,ALSA] + + snd-sgalaxy= [HW,ALSA] + + snd-sonicvibes= [HW,ALSA] + + snd-sun-amd7930= + [HW,ALSA] + + snd-sun-cs4231= [HW,ALSA] + + snd-trident= [HW,ALSA] + + snd-usb-audio= [HW,ALSA,USB] + + snd-via82xx= [HW,ALSA] + + snd-virmidi= [HW,ALSA] + + snd-wavefront= [HW,ALSA] + + snd-ymfpci= [HW,ALSA] diff --git a/Documentation/sound/alsa/soc/DAI.txt b/Documentation/sound/alsa/soc/DAI.txt index 0ebd7ea9706c..c9679264c559 100644 --- a/Documentation/sound/alsa/soc/DAI.txt +++ b/Documentation/sound/alsa/soc/DAI.txt @@ -13,7 +13,7 @@ frame (FRAME) (usually 48kHz) is always driven by the controller. Each AC97 frame is 21uS long and is divided into 13 time slots. The AC97 specification can be found at :- -http://www.intel.com/design/chipsets/audio/ac97_r23.pdf +http://www.intel.com/p/en_US/business/design I2S diff --git a/Documentation/sound/alsa/soc/codec.txt b/Documentation/sound/alsa/soc/codec.txt index 1e95342ed72e..37ba3a72cb76 100644 --- a/Documentation/sound/alsa/soc/codec.txt +++ b/Documentation/sound/alsa/soc/codec.txt @@ -143,7 +143,7 @@ struct snd_soc_ops { }; Please refer to the ALSA driver PCM documentation for details. -http://www.alsa-project.org/~iwai/writing-an-alsa-driver/c436.htm +http://www.alsa-project.org/~iwai/writing-an-alsa-driver/ 5 - DAPM description. diff --git a/Documentation/sound/alsa/soc/platform.txt b/Documentation/sound/alsa/soc/platform.txt index b681d17fc388..06d835987c6a 100644 --- a/Documentation/sound/alsa/soc/platform.txt +++ b/Documentation/sound/alsa/soc/platform.txt @@ -39,7 +39,7 @@ struct snd_soc_platform { }; Please refer to the ALSA driver documentation for details of audio DMA. -http://www.alsa-project.org/~iwai/writing-an-alsa-driver/c436.htm +http://www.alsa-project.org/~iwai/writing-an-alsa-driver/ An example DMA driver is soc/pxa/pxa2xx-pcm.c diff --git a/Documentation/sound/oss/README.OSS b/Documentation/sound/oss/README.OSS index fd42b05b2f55..c615debbf08d 100644 --- a/Documentation/sound/oss/README.OSS +++ b/Documentation/sound/oss/README.OSS @@ -36,7 +36,7 @@ with OSS API. Packages "snd-util-3.8.tar.gz" and "snd-data-0.1.tar.Z" contain useful utilities to be used with this driver. -See http://www.opensound.com/ossfree/getting.html for +See http://www.opensound.com/ossfree/ for download instructions. If you are looking for the installation instructions, please @@ -1438,7 +1438,7 @@ of this driver (see http://www.4Front-tech.com/oss.html for more info). There are some common audio chipsets that are not supported yet. For example Sierra Aria and IBM Mwave. It's possible that these architectures get some support in future but I can't make any promises. Just look -at the home page (http://www.opensound.com/ossfree/new_cards.html) +at the home page (http://www.opensound.com/ossfree/) for latest info. Information about unsupported sound cards and chipsets is welcome as well @@ -1449,7 +1449,6 @@ If you have any corrections and/or comments, please contact me. Hannu Savolainen hannu@opensound.com -Personal home page: http://www.compusonic.fi/~hannu home page of OSS/Free: http://www.opensound.com/ossfree home page of commercial OSS diff --git a/Documentation/sound/oss/oss-parameters.txt b/Documentation/sound/oss/oss-parameters.txt new file mode 100644 index 000000000000..3ab391e7c295 --- /dev/null +++ b/Documentation/sound/oss/oss-parameters.txt @@ -0,0 +1,51 @@ + OSS Kernel Parameters + ~~~~~~~~~~~~~~~~~~~~~ + +See Documentation/kernel-parameters.txt for general information on +specifying module parameters. + +This document may not be entirely up to date and comprehensive. The command +"modinfo -p ${modulename}" shows a current list of all parameters of a loadable +module. Loadable modules, after being loaded into the running kernel, also +reveal their parameters in /sys/module/${modulename}/parameters/. Some of these +parameters may be changed at runtime by the command +"echo -n ${value} > /sys/module/${modulename}/parameters/${parm}". + + + ad1848= [HW,OSS] + Format: ,,,, + + aedsp16= [HW,OSS] Audio Excel DSP 16 + Format: ,,,,, + See also header of sound/oss/aedsp16.c. + + dmasound= [HW,OSS] Sound subsystem buffers + + mpu401= [HW,OSS] + Format: , + + opl3= [HW,OSS] + Format: + + pas2= [HW,OSS] Format: + ,,,,,,, + + pss= [HW,OSS] Personal Sound System (ECHO ESC614) + Format: + ,,,,, + + sscape= [HW,OSS] + Format: ,,,, + + trix= [HW,OSS] MediaTrix AudioTrix Pro + Format: + ,,,,,,,, + + uart401= [HW,OSS] + Format: , + + uart6850= [HW,OSS] + Format: , + + waveartist= [HW,OSS] + Format: ,,, diff --git a/Documentation/sparse.txt b/Documentation/sparse.txt index 9b659c79a547..4909d4116356 100644 --- a/Documentation/sparse.txt +++ b/Documentation/sparse.txt @@ -1,5 +1,5 @@ Copyright 2004 Linus Torvalds -Copyright 2004 Pavel Machek +Copyright 2004 Pavel Machek Copyright 2006 Bob Copeland Using sparse for typechecking diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm.txt index 5fdbb612aeb8..b606c2c4dd37 100644 --- a/Documentation/sysctl/vm.txt +++ b/Documentation/sysctl/vm.txt @@ -196,7 +196,7 @@ controlled by this knob are discussed in Documentation/laptops/laptop-mode.txt. legacy_va_layout -If non-zero, this sysctl disables the new 32-bit mmap mmap layout - the kernel +If non-zero, this sysctl disables the new 32-bit mmap layout - the kernel will use the legacy (2.4) layout for all processes. ============================================================== @@ -511,7 +511,7 @@ information may not be desired. If this is set to non-zero, this information is shown whenever the OOM killer actually kills a memory-hogging task. -The default value is 0. +The default value is 1 (enabled). ============================================================== diff --git a/Documentation/telephony/ixj.txt b/Documentation/telephony/ixj.txt index 44d124005bad..4fb314d51702 100644 --- a/Documentation/telephony/ixj.txt +++ b/Documentation/telephony/ixj.txt @@ -108,14 +108,9 @@ applications. 1.4 Where to get things -You can download the latest versions of the driver from: - -http://www.quicknet.net/develop.htm - -You can download the latest version of this document from: - -http://www.quicknet.net/develop.htm +Info on latest versions of the driver are here: +http://web.archive.org/web/*/http://www.quicknet.net/develop.htm 1.5 Mailing List diff --git a/Documentation/timers/timers-howto.txt b/Documentation/timers/timers-howto.txt new file mode 100644 index 000000000000..c9ef29d2ede3 --- /dev/null +++ b/Documentation/timers/timers-howto.txt @@ -0,0 +1,105 @@ +delays - Information on the various kernel delay / sleep mechanisms +------------------------------------------------------------------- + +This document seeks to answer the common question: "What is the +RightWay (TM) to insert a delay?" + +This question is most often faced by driver writers who have to +deal with hardware delays and who may not be the most intimately +familiar with the inner workings of the Linux Kernel. + + +Inserting Delays +---------------- + +The first, and most important, question you need to ask is "Is my +code in an atomic context?" This should be followed closely by "Does +it really need to delay in atomic context?" If so... + +ATOMIC CONTEXT: + You must use the *delay family of functions. These + functions use the jiffie estimation of clock speed + and will busy wait for enough loop cycles to achieve + the desired delay: + + ndelay(unsigned long nsecs) + udelay(unsigned long usecs) + mdelay(unsgined long msecs) + + udelay is the generally preferred API; ndelay-level + precision may not actually exist on many non-PC devices. + + mdelay is macro wrapper around udelay, to account for + possible overflow when passing large arguments to udelay. + In general, use of mdelay is discouraged and code should + be refactored to allow for the use of msleep. + +NON-ATOMIC CONTEXT: + You should use the *sleep[_range] family of functions. + There are a few more options here, while any of them may + work correctly, using the "right" sleep function will + help the scheduler, power management, and just make your + driver better :) + + -- Backed by busy-wait loop: + udelay(unsigned long usecs) + -- Backed by hrtimers: + usleep_range(unsigned long min, unsigned long max) + -- Backed by jiffies / legacy_timers + msleep(unsigned long msecs) + msleep_interruptible(unsigned long msecs) + + Unlike the *delay family, the underlying mechanism + driving each of these calls varies, thus there are + quirks you should be aware of. + + + SLEEPING FOR "A FEW" USECS ( < ~10us? ): + * Use udelay + + - Why not usleep? + On slower systems, (embedded, OR perhaps a speed- + stepped PC!) the overhead of setting up the hrtimers + for usleep *may* not be worth it. Such an evaluation + will obviously depend on your specific situation, but + it is something to be aware of. + + SLEEPING FOR ~USECS OR SMALL MSECS ( 10us - 20ms): + * Use usleep_range + + - Why not msleep for (1ms - 20ms)? + Explained originally here: + http://lkml.org/lkml/2007/8/3/250 + msleep(1~20) may not do what the caller intends, and + will often sleep longer (~20 ms actual sleep for any + value given in the 1~20ms range). In many cases this + is not the desired behavior. + + - Why is there no "usleep" / What is a good range? + Since usleep_range is built on top of hrtimers, the + wakeup will be very precise (ish), thus a simple + usleep function would likely introduce a large number + of undesired interrupts. + + With the introduction of a range, the scheduler is + free to coalesce your wakeup with any other wakeup + that may have happened for other reasons, or at the + worst case, fire an interrupt for your upper bound. + + The larger a range you supply, the greater a chance + that you will not trigger an interrupt; this should + be balanced with what is an acceptable upper bound on + delay / performance for your specific code path. Exact + tolerances here are very situation specific, thus it + is left to the caller to determine a reasonable range. + + SLEEPING FOR LARGER MSECS ( 10ms+ ) + * Use msleep or possibly msleep_interruptible + + - What's the difference? + msleep sets the current task to TASK_UNINTERRUPTIBLE + whereas msleep_interruptible sets the current task to + TASK_INTERRUPTIBLE before scheduling the sleep. In + short, the difference is whether the sleep can be ended + early by a signal. In general, just use msleep unless + you know you have a need for the interruptible variant. diff --git a/Documentation/tomoyo.txt b/Documentation/tomoyo.txt index b3a232cae7f8..200a2d37cbc8 100644 --- a/Documentation/tomoyo.txt +++ b/Documentation/tomoyo.txt @@ -3,8 +3,8 @@ TOMOYO is a name-based MAC extension (LSM module) for the Linux kernel. LiveCD-based tutorials are available at -http://tomoyo.sourceforge.jp/en/1.6.x/1st-step/ubuntu8.04-live/ -http://tomoyo.sourceforge.jp/en/1.6.x/1st-step/centos5-live/ . +http://tomoyo.sourceforge.jp/1.7/1st-step/ubuntu10.04-live/ +http://tomoyo.sourceforge.jp/1.7/1st-step/centos5-live/ . Though these tutorials use non-LSM version of TOMOYO, they are useful for you to know what TOMOYO is. @@ -13,12 +13,12 @@ to know what TOMOYO is. Build the kernel with CONFIG_SECURITY_TOMOYO=y and pass "security=tomoyo" on kernel's command line. -Please see http://tomoyo.sourceforge.jp/en/2.2.x/ for details. +Please see http://tomoyo.sourceforge.jp/2.3/ for details. --- Where is documentation? --- User <-> Kernel interface documentation is available at -http://tomoyo.sourceforge.jp/en/2.2.x/policy-reference.html . +http://tomoyo.sourceforge.jp/2.3/policy-reference.html . Materials we prepared for seminars and symposiums are available at http://sourceforge.jp/projects/tomoyo/docs/?category_id=532&language_id=1 . @@ -50,6 +50,6 @@ multiple LSM modules at the same time. We feel sorry that you have to give up SELinux/SMACK/AppArmor etc. when you want to use TOMOYO. We hope that LSM becomes stackable in future. Meanwhile, you can use non-LSM -version of TOMOYO, available at http://tomoyo.sourceforge.jp/en/1.6.x/ . +version of TOMOYO, available at http://tomoyo.sourceforge.jp/1.7/ . LSM version of TOMOYO is a subset of non-LSM version of TOMOYO. We are planning to port non-LSM version's functionalities to LSM versions. diff --git a/Documentation/trace/ftrace-design.txt b/Documentation/trace/ftrace-design.txt index f1f81afee8a0..dc52bd442c92 100644 --- a/Documentation/trace/ftrace-design.txt +++ b/Documentation/trace/ftrace-design.txt @@ -13,6 +13,9 @@ Note that this focuses on architecture implementation details only. If you want more explanation of a feature in terms of common code, review the common ftrace.txt file. +Ideally, everyone who wishes to retain performance while supporting tracing in +their kernel should make it all the way to dynamic ftrace support. + Prerequisites ------------- @@ -215,7 +218,7 @@ An arch may pass in a unique value (frame pointer) to both the entering and exiting of a function. On exit, the value is compared and if it does not match, then it will panic the kernel. This is largely a sanity check for bad code generation with gcc. If gcc for your port sanely updates the frame -pointer under different opitmization levels, then ignore this option. +pointer under different optimization levels, then ignore this option. However, adding support for it isn't terribly difficult. In your assembly code that calls prepare_ftrace_return(), pass the frame pointer as the 3rd argument. @@ -234,7 +237,7 @@ If you can't trace NMI functions, then skip this option. HAVE_SYSCALL_TRACEPOINTS ---------------------- +------------------------ You need very few things to get the syscalls tracing in an arch. @@ -250,12 +253,152 @@ You need very few things to get the syscalls tracing in an arch. HAVE_FTRACE_MCOUNT_RECORD ------------------------- -See scripts/recordmcount.pl for more info. - -
+See scripts/recordmcount.pl for more info. Just fill in the arch-specific +details for how to locate the addresses of mcount call sites via objdump. +This option doesn't make much sense without also implementing dynamic ftrace. HAVE_DYNAMIC_FTRACE ---------------------- +------------------- + +You will first need HAVE_FTRACE_MCOUNT_RECORD and HAVE_FUNCTION_TRACER, so +scroll your reader back up if you got over eager. + +Once those are out of the way, you will need to implement: + - asm/ftrace.h: + - MCOUNT_ADDR + - ftrace_call_adjust() + - struct dyn_arch_ftrace{} + - asm code: + - mcount() (new stub) + - ftrace_caller() + - ftrace_call() + - ftrace_stub() + - C code: + - ftrace_dyn_arch_init() + - ftrace_make_nop() + - ftrace_make_call() + - ftrace_update_ftrace_func() + +First you will need to fill out some arch details in your asm/ftrace.h. + +Define MCOUNT_ADDR as the address of your mcount symbol similar to: + #define MCOUNT_ADDR ((unsigned long)mcount) +Since no one else will have a decl for that function, you will need to: + extern void mcount(void); + +You will also need the helper function ftrace_call_adjust(). Most people +will be able to stub it out like so: + static inline unsigned long ftrace_call_adjust(unsigned long addr) + { + return addr; + } +
+ +Lastly you will need the custom dyn_arch_ftrace structure. If you need +some extra state when runtime patching arbitrary call sites, this is the +place. For now though, create an empty struct: + struct dyn_arch_ftrace { + /* No extra data needed */ + }; + +With the header out of the way, we can fill out the assembly code. While we +did already create a mcount() function earlier, dynamic ftrace only wants a +stub function. This is because the mcount() will only be used during boot +and then all references to it will be patched out never to return. Instead, +the guts of the old mcount() will be used to create a new ftrace_caller() +function. Because the two are hard to merge, it will most likely be a lot +easier to have two separate definitions split up by #ifdefs. Same goes for +the ftrace_stub() as that will now be inlined in ftrace_caller(). + +Before we get confused anymore, let's check out some pseudo code so you can +implement your own stuff in assembly: + +void mcount(void) +{ + return; +} + +void ftrace_caller(void) +{ + /* implement HAVE_FUNCTION_TRACE_MCOUNT_TEST if you desire */ + + /* save all state needed by the ABI (see paragraph above) */ + + unsigned long frompc = ...; + unsigned long selfpc = - MCOUNT_INSN_SIZE; + +ftrace_call: + ftrace_stub(frompc, selfpc); + + /* restore all state needed by the ABI */ + +ftrace_stub: + return; +} + +This might look a little odd at first, but keep in mind that we will be runtime +patching multiple things. First, only functions that we actually want to trace +will be patched to call ftrace_caller(). Second, since we only have one tracer +active at a time, we will patch the ftrace_caller() function itself to call the +specific tracer in question. That is the point of the ftrace_call label. + +With that in mind, let's move on to the C code that will actually be doing the +runtime patching. You'll need a little knowledge of your arch's opcodes in +order to make it through the next section. + +Every arch has an init callback function. If you need to do something early on +to initialize some state, this is the time to do that. Otherwise, this simple +function below should be sufficient for most people: + +int __init ftrace_dyn_arch_init(void *data) +{ + /* return value is done indirectly via data */ + *(unsigned long *)data = 0; + + return 0; +} + +There are two functions that are used to do runtime patching of arbitrary +functions. The first is used to turn the mcount call site into a nop (which +is what helps us retain runtime performance when not tracing). The second is +used to turn the mcount call site into a call to an arbitrary location (but +typically that is ftracer_caller()). See the general function definition in +linux/ftrace.h for the functions: + ftrace_make_nop() + ftrace_make_call() +The rec->ip value is the address of the mcount call site that was collected +by the scripts/recordmcount.pl during build time. + +The last function is used to do runtime patching of the active tracer. This +will be modifying the assembly code at the location of the ftrace_call symbol +inside of the ftrace_caller() function. So you should have sufficient padding +at that location to support the new function calls you'll be inserting. Some +people will be using a "call" type instruction while others will be using a +"branch" type instruction. Specifically, the function is: + ftrace_update_ftrace_func() + + +HAVE_DYNAMIC_FTRACE + HAVE_FUNCTION_GRAPH_TRACER +------------------------------------------------ + +The function grapher needs a few tweaks in order to work with dynamic ftrace. +Basically, you will need to: + - update: + - ftrace_caller() + - ftrace_graph_call() + - ftrace_graph_caller() + - implement: + - ftrace_enable_ftrace_graph_caller() + - ftrace_disable_ftrace_graph_caller()
+Quick notes: + - add a nop stub after the ftrace_call location named ftrace_graph_call; + stub needs to be large enough to support a call to ftrace_graph_caller() + - update ftrace_graph_caller() to work with being called by the new + ftrace_caller() since some semantics may have changed + - ftrace_enable_ftrace_graph_caller() will runtime patch the + ftrace_graph_call location with a call to ftrace_graph_caller() + - ftrace_disable_ftrace_graph_caller() will runtime patch the + ftrace_graph_call location with nops diff --git a/Documentation/trace/kmemtrace.txt b/Documentation/trace/kmemtrace.txt deleted file mode 100644 index 6308735e58ca..000000000000 --- a/Documentation/trace/kmemtrace.txt +++ /dev/null @@ -1,126 +0,0 @@ - kmemtrace - Kernel Memory Tracer - - by Eduard - Gabriel Munteanu - - -I. Introduction -=============== - -kmemtrace helps kernel developers figure out two things: -1) how different allocators (SLAB, SLUB etc.) perform -2) how kernel code allocates memory and how much - -To do this, we trace every allocation and export information to the userspace -through the relay interface. We export things such as the number of requested -bytes, the number of bytes actually allocated (i.e. including internal -fragmentation), whether this is a slab allocation or a plain kmalloc() and so -on. - -The actual analysis is performed by a userspace tool (see section III for -details on where to get it from). It logs the data exported by the kernel, -processes it and (as of writing this) can provide the following information: -- the total amount of memory allocated and fragmentation per call-site -- the amount of memory allocated and fragmentation per allocation -- total memory allocated and fragmentation in the collected dataset -- number of cross-CPU allocation and frees (makes sense in NUMA environments) - -Moreover, it can potentially find inconsistent and erroneous behavior in -kernel code, such as using slab free functions on kmalloc'ed memory or -allocating less memory than requested (but not truly failed allocations). - -kmemtrace also makes provisions for tracing on some arch and analysing the -data on another. - -II. Design and goals -==================== - -kmemtrace was designed to handle rather large amounts of data. Thus, it uses -the relay interface to export whatever is logged to userspace, which then -stores it. Analysis and reporting is done asynchronously, that is, after the -data is collected and stored. By design, it allows one to log and analyse -on different machines and different arches. - -As of writing this, the ABI is not considered stable, though it might not -change much. However, no guarantees are made about compatibility yet. When -deemed stable, the ABI should still allow easy extension while maintaining -backward compatibility. This is described further in Documentation/ABI. - -Summary of design goals: - - allow logging and analysis to be done across different machines - - be fast and anticipate usage in high-load environments (*) - - be reasonably extensible - - make it possible for GNU/Linux distributions to have kmemtrace - included in their repositories - -(*) - one of the reasons Pekka Enberg's original userspace data analysis - tool's code was rewritten from Perl to C (although this is more than a - simple conversion) - - -III. Quick usage guide -====================== - -1) Get a kernel that supports kmemtrace and build it accordingly (i.e. enable -CONFIG_KMEMTRACE). - -2) Get the userspace tool and build it: -$ git clone git://repo.or.cz/kmemtrace-user.git # current repository -$ cd kmemtrace-user/ -$ ./autogen.sh -$ ./configure -$ make - -3) Boot the kmemtrace-enabled kernel if you haven't, preferably in the -'single' runlevel (so that relay buffers don't fill up easily), and run -kmemtrace: -# '$' does not mean user, but root here. -$ mount -t debugfs none /sys/kernel/debug -$ mount -t proc none /proc -$ cd path/to/kmemtrace-user/ -$ ./kmemtraced -Wait a bit, then stop it with CTRL+C. -$ cat /sys/kernel/debug/kmemtrace/total_overruns # Check if we didn't - # overrun, should - # be zero. -$ (Optionally) [Run kmemtrace_check separately on each cpu[0-9]*.out file to - check its correctness] -$ ./kmemtrace-report - -Now you should have a nice and short summary of how the allocator performs. - -IV. FAQ and known issues -======================== - -Q: 'cat /sys/kernel/debug/kmemtrace/total_overruns' is non-zero, how do I fix -this? Should I worry? -A: If it's non-zero, this affects kmemtrace's accuracy, depending on how -large the number is. You can fix it by supplying a higher -'kmemtrace.subbufs=N' kernel parameter. ---- - -Q: kmemtrace_check reports errors, how do I fix this? Should I worry? -A: This is a bug and should be reported. It can occur for a variety of -reasons: - - possible bugs in relay code - - possible misuse of relay by kmemtrace - - timestamps being collected unorderly -Or you may fix it yourself and send us a patch. ---- - -Q: kmemtrace_report shows many errors, how do I fix this? Should I worry? -A: This is a known issue and I'm working on it. These might be true errors -in kernel code, which may have inconsistent behavior (e.g. allocating memory -with kmem_cache_alloc() and freeing it with kfree()). Pekka Enberg pointed -out this behavior may work with SLAB, but may fail with other allocators. - -It may also be due to lack of tracing in some unusual allocator functions. - -We don't want bug reports regarding this issue yet. ---- - -V. See also -=========== - -Documentation/kernel-parameters.txt -Documentation/ABI/testing/debugfs-kmemtrace - diff --git a/Documentation/trace/kprobetrace.txt b/Documentation/trace/kprobetrace.txt index ec94748ae65b..5f77d94598dd 100644 --- a/Documentation/trace/kprobetrace.txt +++ b/Documentation/trace/kprobetrace.txt @@ -42,7 +42,7 @@ Synopsis of kprobe_events +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(**) NAME=FETCHARG : Set NAME as the argument name of FETCHARG. FETCHARG:TYPE : Set TYPE as the type of FETCHARG. Currently, basic types - (u8/u16/u32/u64/s8/s16/s32/s64) are supported. + (u8/u16/u32/u64/s8/s16/s32/s64) and string are supported. (*) only for return probe. (**) this is useful for fetching a field of data structures. diff --git a/Documentation/trace/postprocess/trace-vmscan-postprocess.pl b/Documentation/trace/postprocess/trace-vmscan-postprocess.pl new file mode 100644 index 000000000000..1b55146d1c8d --- /dev/null +++ b/Documentation/trace/postprocess/trace-vmscan-postprocess.pl @@ -0,0 +1,686 @@ +#!/usr/bin/perl +# This is a POC for reading the text representation of trace output related to +# page reclaim. It makes an attempt to extract some high-level information on +# what is going on. The accuracy of the parser may vary +# +# Example usage: trace-vmscan-postprocess.pl < /sys/kernel/debug/tracing/trace_pipe +# other options +# --read-procstat If the trace lacks process info, get it from /proc +# --ignore-pid Aggregate processes of the same name together +# +# Copyright (c) IBM Corporation 2009 +# Author: Mel Gorman +use strict; +use Getopt::Long; + +# Tracepoint events +use constant MM_VMSCAN_DIRECT_RECLAIM_BEGIN => 1; +use constant MM_VMSCAN_DIRECT_RECLAIM_END => 2; +use constant MM_VMSCAN_KSWAPD_WAKE => 3; +use constant MM_VMSCAN_KSWAPD_SLEEP => 4; +use constant MM_VMSCAN_LRU_SHRINK_ACTIVE => 5; +use constant MM_VMSCAN_LRU_SHRINK_INACTIVE => 6; +use constant MM_VMSCAN_LRU_ISOLATE => 7; +use constant MM_VMSCAN_WRITEPAGE_FILE_SYNC => 8; +use constant MM_VMSCAN_WRITEPAGE_ANON_SYNC => 9; +use constant MM_VMSCAN_WRITEPAGE_FILE_ASYNC => 10; +use constant MM_VMSCAN_WRITEPAGE_ANON_ASYNC => 11; +use constant MM_VMSCAN_WRITEPAGE_ASYNC => 12; +use constant EVENT_UNKNOWN => 13; + +# Per-order events +use constant MM_VMSCAN_DIRECT_RECLAIM_BEGIN_PERORDER => 11; +use constant MM_VMSCAN_WAKEUP_KSWAPD_PERORDER => 12; +use constant MM_VMSCAN_KSWAPD_WAKE_PERORDER => 13; +use constant HIGH_KSWAPD_REWAKEUP_PERORDER => 14; + +# Constants used to track state +use constant STATE_DIRECT_BEGIN => 15; +use constant STATE_DIRECT_ORDER => 16; +use constant STATE_KSWAPD_BEGIN => 17; +use constant STATE_KSWAPD_ORDER => 18; + +# High-level events extrapolated from tracepoints +use constant HIGH_DIRECT_RECLAIM_LATENCY => 19; +use constant HIGH_KSWAPD_LATENCY => 20; +use constant HIGH_KSWAPD_REWAKEUP => 21; +use constant HIGH_NR_SCANNED => 22; +use constant HIGH_NR_TAKEN => 23; +use constant HIGH_NR_RECLAIM => 24; +use constant HIGH_NR_CONTIG_DIRTY => 25; + +my %perprocesspid; +my %perprocess; +my %last_procmap; +my $opt_ignorepid; +my $opt_read_procstat; + +my $total_wakeup_kswapd; +my ($total_direct_reclaim, $total_direct_nr_scanned); +my ($total_direct_latency, $total_kswapd_latency); +my ($total_direct_writepage_file_sync, $total_direct_writepage_file_async); +my ($total_direct_writepage_anon_sync, $total_direct_writepage_anon_async); +my ($total_kswapd_nr_scanned, $total_kswapd_wake); +my ($total_kswapd_writepage_file_sync, $total_kswapd_writepage_file_async); +my ($total_kswapd_writepage_anon_sync, $total_kswapd_writepage_anon_async); + +# Catch sigint and exit on request +my $sigint_report = 0; +my $sigint_exit = 0; +my $sigint_pending = 0; +my $sigint_received = 0; +sub sigint_handler { + my $current_time = time; + if ($current_time - 2 > $sigint_received) { + print "SIGINT received, report pending. Hit ctrl-c again to exit\n"; + $sigint_report = 1; + } else { + if (!$sigint_exit) { + print "Second SIGINT received quickly, exiting\n"; + } + $sigint_exit++; + } + + if ($sigint_exit > 3) { + print "Many SIGINTs received, exiting now without report\n"; + exit; + } + + $sigint_received = $current_time; + $sigint_pending = 1; +} +$SIG{INT} = "sigint_handler"; + +# Parse command line options +GetOptions( + 'ignore-pid' => \$opt_ignorepid, + 'read-procstat' => \$opt_read_procstat, +); + +# Defaults for dynamically discovered regex's +my $regex_direct_begin_default = 'order=([0-9]*) may_writepage=([0-9]*) gfp_flags=([A-Z_|]*)'; +my $regex_direct_end_default = 'nr_reclaimed=([0-9]*)'; +my $regex_kswapd_wake_default = 'nid=([0-9]*) order=([0-9]*)'; +my $regex_kswapd_sleep_default = 'nid=([0-9]*)'; +my $regex_wakeup_kswapd_default = 'nid=([0-9]*) zid=([0-9]*) order=([0-9]*)'; +my $regex_lru_isolate_default = 'isolate_mode=([0-9]*) order=([0-9]*) nr_requested=([0-9]*) nr_scanned=([0-9]*) nr_taken=([0-9]*) contig_taken=([0-9]*) contig_dirty=([0-9]*) contig_failed=([0-9]*)'; +my $regex_lru_shrink_inactive_default = 'lru=([A-Z_]*) nr_scanned=([0-9]*) nr_reclaimed=([0-9]*) priority=([0-9]*)'; +my $regex_lru_shrink_active_default = 'lru=([A-Z_]*) nr_scanned=([0-9]*) nr_rotated=([0-9]*) priority=([0-9]*)'; +my $regex_writepage_default = 'page=([0-9a-f]*) pfn=([0-9]*) flags=([A-Z_|]*)'; + +# Dyanically discovered regex +my $regex_direct_begin; +my $regex_direct_end; +my $regex_kswapd_wake; +my $regex_kswapd_sleep; +my $regex_wakeup_kswapd; +my $regex_lru_isolate; +my $regex_lru_shrink_inactive; +my $regex_lru_shrink_active; +my $regex_writepage; + +# Static regex used. Specified like this for readability and for use with /o +# (process_pid) (cpus ) ( time ) (tpoint ) (details) +my $regex_traceevent = '\s*([a-zA-Z0-9-]*)\s*(\[[0-9]*\])\s*([0-9.]*):\s*([a-zA-Z_]*):\s*(.*)'; +my $regex_statname = '[-0-9]*\s\((.*)\).*'; +my $regex_statppid = '[-0-9]*\s\(.*\)\s[A-Za-z]\s([0-9]*).*'; + +sub generate_traceevent_regex { + my $event = shift; + my $default = shift; + my $regex; + + # Read the event format or use the default + if (!open (FORMAT, "/sys/kernel/debug/tracing/events/$event/format")) { + print("WARNING: Event $event format string not found\n"); + return $default; + } else { + my $line; + while (!eof(FORMAT)) { + $line = ; + $line =~ s/, REC->.*//; + if ($line =~ /^print fmt:\s"(.*)".*/) { + $regex = $1; + $regex =~ s/%s/\([0-9a-zA-Z|_]*\)/g; + $regex =~ s/%p/\([0-9a-f]*\)/g; + $regex =~ s/%d/\([-0-9]*\)/g; + $regex =~ s/%ld/\([-0-9]*\)/g; + $regex =~ s/%lu/\([0-9]*\)/g; + } + } + } + + # Can't handle the print_flags stuff but in the context of this + # script, it really doesn't matter + $regex =~ s/\(REC.*\) \? __print_flags.*//; + + # Verify fields are in the right order + my $tuple; + foreach $tuple (split /\s/, $regex) { + my ($key, $value) = split(/=/, $tuple); + my $expected = shift; + if ($key ne $expected) { + print("WARNING: Format not as expected for event $event '$key' != '$expected'\n"); + $regex =~ s/$key=\((.*)\)/$key=$1/; + } + } + + if (defined shift) { + die("Fewer fields than expected in format"); + } + + return $regex; +} + +$regex_direct_begin = generate_traceevent_regex( + "vmscan/mm_vmscan_direct_reclaim_begin", + $regex_direct_begin_default, + "order", "may_writepage", + "gfp_flags"); +$regex_direct_end = generate_traceevent_regex( + "vmscan/mm_vmscan_direct_reclaim_end", + $regex_direct_end_default, + "nr_reclaimed"); +$regex_kswapd_wake = generate_traceevent_regex( + "vmscan/mm_vmscan_kswapd_wake", + $regex_kswapd_wake_default, + "nid", "order"); +$regex_kswapd_sleep = generate_traceevent_regex( + "vmscan/mm_vmscan_kswapd_sleep", + $regex_kswapd_sleep_default, + "nid"); +$regex_wakeup_kswapd = generate_traceevent_regex( + "vmscan/mm_vmscan_wakeup_kswapd", + $regex_wakeup_kswapd_default, + "nid", "zid", "order"); +$regex_lru_isolate = generate_traceevent_regex( + "vmscan/mm_vmscan_lru_isolate", + $regex_lru_isolate_default, + "isolate_mode", "order", + "nr_requested", "nr_scanned", "nr_taken", + "contig_taken", "contig_dirty", "contig_failed"); +$regex_lru_shrink_inactive = generate_traceevent_regex( + "vmscan/mm_vmscan_lru_shrink_inactive", + $regex_lru_shrink_inactive_default, + "nid", "zid", + "lru", + "nr_scanned", "nr_reclaimed", "priority"); +$regex_lru_shrink_active = generate_traceevent_regex( + "vmscan/mm_vmscan_lru_shrink_active", + $regex_lru_shrink_active_default, + "nid", "zid", + "lru", + "nr_scanned", "nr_rotated", "priority"); +$regex_writepage = generate_traceevent_regex( + "vmscan/mm_vmscan_writepage", + $regex_writepage_default, + "page", "pfn", "flags"); + +sub read_statline($) { + my $pid = $_[0]; + my $statline; + + if (open(STAT, "/proc/$pid/stat")) { + $statline = ; + close(STAT); + } + + if ($statline eq '') { + $statline = "-1 (UNKNOWN_PROCESS_NAME) R 0"; + } + + return $statline; +} + +sub guess_process_pid($$) { + my $pid = $_[0]; + my $statline = $_[1]; + + if ($pid == 0) { + return "swapper-0"; + } + + if ($statline !~ /$regex_statname/o) { + die("Failed to math stat line for process name :: $statline"); + } + return "$1-$pid"; +} + +# Convert sec.usec timestamp format +sub timestamp_to_ms($) { + my $timestamp = $_[0]; + + my ($sec, $usec) = split (/\./, $timestamp); + return ($sec * 1000) + ($usec / 1000); +} + +sub process_events { + my $traceevent; + my $process_pid; + my $cpus; + my $timestamp; + my $tracepoint; + my $details; + my $statline; + + # Read each line of the event log +EVENT_PROCESS: + while ($traceevent = ) { + if ($traceevent =~ /$regex_traceevent/o) { + $process_pid = $1; + $timestamp = $3; + $tracepoint = $4; + + $process_pid =~ /(.*)-([0-9]*)$/; + my $process = $1; + my $pid = $2; + + if ($process eq "") { + $process = $last_procmap{$pid}; + $process_pid = "$process-$pid"; + } + $last_procmap{$pid} = $process; + + if ($opt_read_procstat) { + $statline = read_statline($pid); + if ($opt_read_procstat && $process eq '') { + $process_pid = guess_process_pid($pid, $statline); + } + } + } else { + next; + } + + # Perl Switch() sucks majorly + if ($tracepoint eq "mm_vmscan_direct_reclaim_begin") { + $timestamp = timestamp_to_ms($timestamp); + $perprocesspid{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN}++; + $perprocesspid{$process_pid}->{STATE_DIRECT_BEGIN} = $timestamp; + + $details = $5; + if ($details !~ /$regex_direct_begin/o) { + print "WARNING: Failed to parse mm_vmscan_direct_reclaim_begin as expected\n"; + print " $details\n"; + print " $regex_direct_begin\n"; + next; + } + my $order = $1; + $perprocesspid{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN_PERORDER}[$order]++; + $perprocesspid{$process_pid}->{STATE_DIRECT_ORDER} = $order; + } elsif ($tracepoint eq "mm_vmscan_direct_reclaim_end") { + # Count the event itself + my $index = $perprocesspid{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_END}; + $perprocesspid{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_END}++; + + # Record how long direct reclaim took this time + if (defined $perprocesspid{$process_pid}->{STATE_DIRECT_BEGIN}) { + $timestamp = timestamp_to_ms($timestamp); + my $order = $perprocesspid{$process_pid}->{STATE_DIRECT_ORDER}; + my $latency = ($timestamp - $perprocesspid{$process_pid}->{STATE_DIRECT_BEGIN}); + $perprocesspid{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$index] = "$order-$latency"; + } + } elsif ($tracepoint eq "mm_vmscan_kswapd_wake") { + $details = $5; + if ($details !~ /$regex_kswapd_wake/o) { + print "WARNING: Failed to parse mm_vmscan_kswapd_wake as expected\n"; + print " $details\n"; + print " $regex_kswapd_wake\n"; + next; + } + + my $order = $2; + $perprocesspid{$process_pid}->{STATE_KSWAPD_ORDER} = $order; + if (!$perprocesspid{$process_pid}->{STATE_KSWAPD_BEGIN}) { + $timestamp = timestamp_to_ms($timestamp); + $perprocesspid{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE}++; + $perprocesspid{$process_pid}->{STATE_KSWAPD_BEGIN} = $timestamp; + $perprocesspid{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE_PERORDER}[$order]++; + } else { + $perprocesspid{$process_pid}->{HIGH_KSWAPD_REWAKEUP}++; + $perprocesspid{$process_pid}->{HIGH_KSWAPD_REWAKEUP_PERORDER}[$order]++; + } + } elsif ($tracepoint eq "mm_vmscan_kswapd_sleep") { + + # Count the event itself + my $index = $perprocesspid{$process_pid}->{MM_VMSCAN_KSWAPD_SLEEP}; + $perprocesspid{$process_pid}->{MM_VMSCAN_KSWAPD_SLEEP}++; + + # Record how long kswapd was awake + $timestamp = timestamp_to_ms($timestamp); + my $order = $perprocesspid{$process_pid}->{STATE_KSWAPD_ORDER}; + my $latency = ($timestamp - $perprocesspid{$process_pid}->{STATE_KSWAPD_BEGIN}); + $perprocesspid{$process_pid}->{HIGH_KSWAPD_LATENCY}[$index] = "$order-$latency"; + $perprocesspid{$process_pid}->{STATE_KSWAPD_BEGIN} = 0; + } elsif ($tracepoint eq "mm_vmscan_wakeup_kswapd") { + $perprocesspid{$process_pid}->{MM_VMSCAN_WAKEUP_KSWAPD}++; + + $details = $5; + if ($details !~ /$regex_wakeup_kswapd/o) { + print "WARNING: Failed to parse mm_vmscan_wakeup_kswapd as expected\n"; + print " $details\n"; + print " $regex_wakeup_kswapd\n"; + next; + } + my $order = $3; + $perprocesspid{$process_pid}->{MM_VMSCAN_WAKEUP_KSWAPD_PERORDER}[$order]++; + } elsif ($tracepoint eq "mm_vmscan_lru_isolate") { + $details = $5; + if ($details !~ /$regex_lru_isolate/o) { + print "WARNING: Failed to parse mm_vmscan_lru_isolate as expected\n"; + print " $details\n"; + print " $regex_lru_isolate/o\n"; + next; + } + my $nr_scanned = $4; + my $nr_contig_dirty = $7; + $perprocesspid{$process_pid}->{HIGH_NR_SCANNED} += $nr_scanned; + $perprocesspid{$process_pid}->{HIGH_NR_CONTIG_DIRTY} += $nr_contig_dirty; + } elsif ($tracepoint eq "mm_vmscan_writepage") { + $details = $5; + if ($details !~ /$regex_writepage/o) { + print "WARNING: Failed to parse mm_vmscan_writepage as expected\n"; + print " $details\n"; + print " $regex_writepage\n"; + next; + } + + my $flags = $3; + my $file = 0; + my $sync_io = 0; + if ($flags =~ /RECLAIM_WB_FILE/) { + $file = 1; + } + if ($flags =~ /RECLAIM_WB_SYNC/) { + $sync_io = 1; + } + if ($sync_io) { + if ($file) { + $perprocesspid{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_SYNC}++; + } else { + $perprocesspid{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_SYNC}++; + } + } else { + if ($file) { + $perprocesspid{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_ASYNC}++; + } else { + $perprocesspid{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_ASYNC}++; + } + } + } else { + $perprocesspid{$process_pid}->{EVENT_UNKNOWN}++; + } + + if ($sigint_pending) { + last EVENT_PROCESS; + } + } +} + +sub dump_stats { + my $hashref = shift; + my %stats = %$hashref; + + # Dump per-process stats + my $process_pid; + my $max_strlen = 0; + + # Get the maximum process name + foreach $process_pid (keys %perprocesspid) { + my $len = length($process_pid); + if ($len > $max_strlen) { + $max_strlen = $len; + } + } + $max_strlen += 2; + + # Work out latencies + printf("\n") if !$opt_ignorepid; + printf("Reclaim latencies expressed as order-latency_in_ms\n") if !$opt_ignorepid; + foreach $process_pid (keys %stats) { + + if (!$stats{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[0] && + !$stats{$process_pid}->{HIGH_KSWAPD_LATENCY}[0]) { + next; + } + + printf "%-" . $max_strlen . "s ", $process_pid if !$opt_ignorepid; + my $index = 0; + while (defined $stats{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$index] || + defined $stats{$process_pid}->{HIGH_KSWAPD_LATENCY}[$index]) { + + if ($stats{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$index]) { + printf("%s ", $stats{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$index]) if !$opt_ignorepid; + my ($dummy, $latency) = split(/-/, $stats{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$index]); + $total_direct_latency += $latency; + } else { + printf("%s ", $stats{$process_pid}->{HIGH_KSWAPD_LATENCY}[$index]) if !$opt_ignorepid; + my ($dummy, $latency) = split(/-/, $stats{$process_pid}->{HIGH_KSWAPD_LATENCY}[$index]); + $total_kswapd_latency += $latency; + } + $index++; + } + print "\n" if !$opt_ignorepid; + } + + # Print out process activity + printf("\n"); + printf("%-" . $max_strlen . "s %8s %10s %8s %8s %8s %8s %8s\n", "Process", "Direct", "Wokeup", "Pages", "Pages", "Pages", "Time"); + printf("%-" . $max_strlen . "s %8s %10s %8s %8s %8s %8s %8s\n", "details", "Rclms", "Kswapd", "Scanned", "Sync-IO", "ASync-IO", "Stalled"); + foreach $process_pid (keys %stats) { + + if (!$stats{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN}) { + next; + } + + $total_direct_reclaim += $stats{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN}; + $total_wakeup_kswapd += $stats{$process_pid}->{MM_VMSCAN_WAKEUP_KSWAPD}; + $total_direct_nr_scanned += $stats{$process_pid}->{HIGH_NR_SCANNED}; + $total_direct_writepage_file_sync += $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_SYNC}; + $total_direct_writepage_anon_sync += $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_SYNC}; + $total_direct_writepage_file_async += $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_ASYNC}; + + $total_direct_writepage_anon_async += $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_ASYNC}; + + my $index = 0; + my $this_reclaim_delay = 0; + while (defined $stats{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$index]) { + my ($dummy, $latency) = split(/-/, $stats{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$index]); + $this_reclaim_delay += $latency; + $index++; + } + + printf("%-" . $max_strlen . "s %8d %10d %8u %8u %8u %8.3f", + $process_pid, + $stats{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN}, + $stats{$process_pid}->{MM_VMSCAN_WAKEUP_KSWAPD}, + $stats{$process_pid}->{HIGH_NR_SCANNED}, + $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_SYNC} + $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_SYNC}, + $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_ASYNC} + $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_ASYNC}, + $this_reclaim_delay / 1000); + + if ($stats{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN}) { + print " "; + for (my $order = 0; $order < 20; $order++) { + my $count = $stats{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN_PERORDER}[$order]; + if ($count != 0) { + print "direct-$order=$count "; + } + } + } + if ($stats{$process_pid}->{MM_VMSCAN_WAKEUP_KSWAPD}) { + print " "; + for (my $order = 0; $order < 20; $order++) { + my $count = $stats{$process_pid}->{MM_VMSCAN_WAKEUP_KSWAPD_PERORDER}[$order]; + if ($count != 0) { + print "wakeup-$order=$count "; + } + } + } + if ($stats{$process_pid}->{HIGH_NR_CONTIG_DIRTY}) { + print " "; + my $count = $stats{$process_pid}->{HIGH_NR_CONTIG_DIRTY}; + if ($count != 0) { + print "contig-dirty=$count "; + } + } + + print "\n"; + } + + # Print out kswapd activity + printf("\n"); + printf("%-" . $max_strlen . "s %8s %10s %8s %8s %8s %8s\n", "Kswapd", "Kswapd", "Order", "Pages", "Pages", "Pages"); + printf("%-" . $max_strlen . "s %8s %10s %8s %8s %8s %8s\n", "Instance", "Wakeups", "Re-wakeup", "Scanned", "Sync-IO", "ASync-IO"); + foreach $process_pid (keys %stats) { + + if (!$stats{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE}) { + next; + } + + $total_kswapd_wake += $stats{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE}; + $total_kswapd_nr_scanned += $stats{$process_pid}->{HIGH_NR_SCANNED}; + $total_kswapd_writepage_file_sync += $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_SYNC}; + $total_kswapd_writepage_anon_sync += $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_SYNC}; + $total_kswapd_writepage_file_async += $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_ASYNC}; + $total_kswapd_writepage_anon_async += $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_ASYNC}; + + printf("%-" . $max_strlen . "s %8d %10d %8u %8i %8u", + $process_pid, + $stats{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE}, + $stats{$process_pid}->{HIGH_KSWAPD_REWAKEUP}, + $stats{$process_pid}->{HIGH_NR_SCANNED}, + $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_SYNC} + $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_SYNC}, + $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_ASYNC} + $stats{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_ASYNC}); + + if ($stats{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE}) { + print " "; + for (my $order = 0; $order < 20; $order++) { + my $count = $stats{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE_PERORDER}[$order]; + if ($count != 0) { + print "wake-$order=$count "; + } + } + } + if ($stats{$process_pid}->{HIGH_KSWAPD_REWAKEUP}) { + print " "; + for (my $order = 0; $order < 20; $order++) { + my $count = $stats{$process_pid}->{HIGH_KSWAPD_REWAKEUP_PERORDER}[$order]; + if ($count != 0) { + print "rewake-$order=$count "; + } + } + } + printf("\n"); + } + + # Print out summaries + $total_direct_latency /= 1000; + $total_kswapd_latency /= 1000; + print "\nSummary\n"; + print "Direct reclaims: $total_direct_reclaim\n"; + print "Direct reclaim pages scanned: $total_direct_nr_scanned\n"; + print "Direct reclaim write file sync I/O: $total_direct_writepage_file_sync\n"; + print "Direct reclaim write anon sync I/O: $total_direct_writepage_anon_sync\n"; + print "Direct reclaim write file async I/O: $total_direct_writepage_file_async\n"; + print "Direct reclaim write anon async I/O: $total_direct_writepage_anon_async\n"; + print "Wake kswapd requests: $total_wakeup_kswapd\n"; + printf "Time stalled direct reclaim: %-1.2f seconds\n", $total_direct_latency; + print "\n"; + print "Kswapd wakeups: $total_kswapd_wake\n"; + print "Kswapd pages scanned: $total_kswapd_nr_scanned\n"; + print "Kswapd reclaim write file sync I/O: $total_kswapd_writepage_file_sync\n"; + print "Kswapd reclaim write anon sync I/O: $total_kswapd_writepage_anon_sync\n"; + print "Kswapd reclaim write file async I/O: $total_kswapd_writepage_file_async\n"; + print "Kswapd reclaim write anon async I/O: $total_kswapd_writepage_anon_async\n"; + printf "Time kswapd awake: %-1.2f seconds\n", $total_kswapd_latency; +} + +sub aggregate_perprocesspid() { + my $process_pid; + my $process; + undef %perprocess; + + foreach $process_pid (keys %perprocesspid) { + $process = $process_pid; + $process =~ s/-([0-9])*$//; + if ($process eq '') { + $process = "NO_PROCESS_NAME"; + } + + $perprocess{$process}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN} += $perprocesspid{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN}; + $perprocess{$process}->{MM_VMSCAN_KSWAPD_WAKE} += $perprocesspid{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE}; + $perprocess{$process}->{MM_VMSCAN_WAKEUP_KSWAPD} += $perprocesspid{$process_pid}->{MM_VMSCAN_WAKEUP_KSWAPD}; + $perprocess{$process}->{HIGH_KSWAPD_REWAKEUP} += $perprocesspid{$process_pid}->{HIGH_KSWAPD_REWAKEUP}; + $perprocess{$process}->{HIGH_NR_SCANNED} += $perprocesspid{$process_pid}->{HIGH_NR_SCANNED}; + $perprocess{$process}->{MM_VMSCAN_WRITEPAGE_FILE_SYNC} += $perprocesspid{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_SYNC}; + $perprocess{$process}->{MM_VMSCAN_WRITEPAGE_ANON_SYNC} += $perprocesspid{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_SYNC}; + $perprocess{$process}->{MM_VMSCAN_WRITEPAGE_FILE_ASYNC} += $perprocesspid{$process_pid}->{MM_VMSCAN_WRITEPAGE_FILE_ASYNC}; + $perprocess{$process}->{MM_VMSCAN_WRITEPAGE_ANON_ASYNC} += $perprocesspid{$process_pid}->{MM_VMSCAN_WRITEPAGE_ANON_ASYNC}; + + for (my $order = 0; $order < 20; $order++) { + $perprocess{$process}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN_PERORDER}[$order] += $perprocesspid{$process_pid}->{MM_VMSCAN_DIRECT_RECLAIM_BEGIN_PERORDER}[$order]; + $perprocess{$process}->{MM_VMSCAN_WAKEUP_KSWAPD_PERORDER}[$order] += $perprocesspid{$process_pid}->{MM_VMSCAN_WAKEUP_KSWAPD_PERORDER}[$order]; + $perprocess{$process}->{MM_VMSCAN_KSWAPD_WAKE_PERORDER}[$order] += $perprocesspid{$process_pid}->{MM_VMSCAN_KSWAPD_WAKE_PERORDER}[$order]; + + } + + # Aggregate direct reclaim latencies + my $wr_index = $perprocess{$process}->{MM_VMSCAN_DIRECT_RECLAIM_END}; + my $rd_index = 0; + while (defined $perprocesspid{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$rd_index]) { + $perprocess{$process}->{HIGH_DIRECT_RECLAIM_LATENCY}[$wr_index] = $perprocesspid{$process_pid}->{HIGH_DIRECT_RECLAIM_LATENCY}[$rd_index]; + $rd_index++; + $wr_index++; + } + $perprocess{$process}->{MM_VMSCAN_DIRECT_RECLAIM_END} = $wr_index; + + # Aggregate kswapd latencies + my $wr_index = $perprocess{$process}->{MM_VMSCAN_KSWAPD_SLEEP}; + my $rd_index = 0; + while (defined $perprocesspid{$process_pid}->{HIGH_KSWAPD_LATENCY}[$rd_index]) { + $perprocess{$process}->{HIGH_KSWAPD_LATENCY}[$wr_index] = $perprocesspid{$process_pid}->{HIGH_KSWAPD_LATENCY}[$rd_index]; + $rd_index++; + $wr_index++; + } + $perprocess{$process}->{MM_VMSCAN_DIRECT_RECLAIM_END} = $wr_index; + } +} + +sub report() { + if (!$opt_ignorepid) { + dump_stats(\%perprocesspid); + } else { + aggregate_perprocesspid(); + dump_stats(\%perprocess); + } +} + +# Process events or signals until neither is available +sub signal_loop() { + my $sigint_processed; + do { + $sigint_processed = 0; + process_events(); + + # Handle pending signals if any + if ($sigint_pending) { + my $current_time = time; + + if ($sigint_exit) { + print "Received exit signal\n"; + $sigint_pending = 0; + } + if ($sigint_report) { + if ($current_time >= $sigint_received + 2) { + report(); + $sigint_report = 0; + $sigint_pending = 0; + $sigint_processed = 1; + } + } + } + } while ($sigint_pending || $sigint_processed); +} + +signal_loop(); +report(); diff --git a/Documentation/uml/UserModeLinux-HOWTO.txt b/Documentation/uml/UserModeLinux-HOWTO.txt index 628013f944c4..9b7e1904db1c 100644 --- a/Documentation/uml/UserModeLinux-HOWTO.txt +++ b/Documentation/uml/UserModeLinux-HOWTO.txt @@ -8,62 +8,6 @@ Table of Contents - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1. Introduction 1.1 How is User Mode Linux Different? @@ -277,8 +221,7 @@ 1. Download the latest UML patch from - the download page + the download page know, and + know, and they'll be "taken care of". @@ -498,8 +441,8 @@ You will need a filesystem to boot UML from. There are a number available for download from here . There are also several tools - which can be + linux.sourceforge.net/> . There are also several tools + which can be used to generate UML-compatible filesystem images from media. The kernel will boot up and present you with a login prompt. @@ -1236,7 +1179,7 @@ Harald's original README is here and explains these in detail, as well as + forge.net/> and explains these in detail, as well as some other issues. @@ -1311,7 +1254,7 @@ kernel. These were pointed out by Tim Robinson in - name="this uml- + name="this uml- user post"> . @@ -2038,7 +1981,7 @@ uml_moo is installed with the UML deb and RPM. If you didn't install UML from one of those packages, you can also get it from the UML - utilities tar file in tools/moo. @@ -4599,7 +4542,7 @@ Michael Jennings sent in some material which is now gracing the top of the index page of this site. + linux.sourceforge.net/> of this site. SGI (and more specifically Ralf Baechle ) gave me an account on oss.sgi.com diff --git a/Documentation/usb/ehci.txt b/Documentation/usb/ehci.txt index 1536b7e75134..9dcafa7d930d 100644 --- a/Documentation/usb/ehci.txt +++ b/Documentation/usb/ehci.txt @@ -9,7 +9,7 @@ compatible with the USB 1.1 standard. It defines three transfer speeds: - "Low Speed" 1.5 Mbit/sec USB 1.1 only addressed full speed and low speed. High speed devices -can be used on USB 1.1 systems, but they slow down to USB 1.1 speeds. +can be used on USB 1.1 systems, but they slow down to USB 1.1 speeds. USB 1.1 devices may also be used on USB 2.0 systems. When plugged into an EHCI controller, they are given to a USB 1.1 "companion" diff --git a/Documentation/usb/gadget_multi.txt b/Documentation/usb/gadget_multi.txt new file mode 100644 index 000000000000..80f4ef0eb75b --- /dev/null +++ b/Documentation/usb/gadget_multi.txt @@ -0,0 +1,150 @@ + -*- org -*- + +* Overview + +The Multifunction Composite Gadget (or g_multi) is a composite gadget +that makes extensive use of the composite framework to provide +a... multifunction gadget. + +In it's standard configuration it provides a single USB configuration +with RNDIS[1] (that is Ethernet), USB CDC[2] ACM (that is serial) and +USB Mass Storage functions. + +A CDC ECM (Ethernet) function may be turned on via a Kconfig option +and RNDIS can be turned off. If they are both enabled the gadget will +have two configurations -- one with RNDIS and another with CDC ECM[3]. + +Please not that if you use non-standard configuration (that is enable +CDC ECM) you may need to change vendor and/or product ID. + +* Host drivers + +To make use of the gadget one needs to make it work on host side -- +without that there's no hope of achieving anything with the gadget. +As one might expect, things one need to do very from system to system. + +** Linux host drivers + +Since the gadget uses standard composite framework and appears as such +to Linux host it does not need any additional drivers on Linux host +side. All the functions are handled by respective drivers developed +for them. + +This is also true for two configuration set-up with RNDIS +configuration being the first one. Linux host will use the second +configuration with CDC ECM which should work better under Linux. + +** Windows host drivers + +For the gadget two work under Windows two conditions have to be met: + +*** Detecting as composite gadget + +First of all, Windows need to detect the gadget as an USB composite +gadget which on its own have some conditions[4]. If they are met, +Windows lets USB Generic Parent Driver[5] handle the device which then +tries to much drivers for each individual interface (sort of, don't +get into too many details). + +The good news is: you do not have to worry about most of the +conditions! + +The only thing to worry is that the gadget has to have a single +configuration so a dual RNDIS and CDC ECM gadget won't work unless you +create a proper INF -- and of course, if you do submit it! + +*** Installing drivers for each function + +The other, trickier thing is making Windows install drivers for each +individual function. + +For mass storage it is trivial since Windows detect it's an interface +implementing USB Mass Storage class and selects appropriate driver. + +Things are harder with RDNIS and CDC ACM. + +**** RNDIS + +To make Windows select RNDIS drivers for the first function in the +gadget, one needs to use the [[file:linux.inf]] file provided with this +document. It "attaches" Window's RNDIS driver to the first interface +of the gadget. + +Please note, that while testing we encountered some issues[6] when +RNDIS was not the first interface. You do not need to worry abut it +unless you are trying to develop your own gadget in which case watch +out for this bug. + +**** CDC ACM + +Similarly, [[file:linux-cdc-acm.inf]] is provided for CDC ACM. + +**** Customising the gadget + +If you intend to hack the g_multi gadget be advised that rearranging +functions will obviously change interface numbers for each of the +functionality. As an effect provided INFs won't work since they have +interface numbers hard-coded in them (it's not hard to change those +though[7]). + +This also means, that after experimenting with g_multi and changing +provided functions one should change gadget's vendor and/or product ID +so there will be no collision with other customised gadgets or the +original gadget. + +Failing to comply may cause brain damage after wondering for hours why +things don't work as intended before realising Windows have cached +some drivers information (changing USB port may sometimes help plus +you might try using USBDeview[8] to remove the phantom device). + +**** INF testing + +Provided INF files have been tested on Windows XP SP3, Windows Vista +and Windows 7, all 32-bit versions. It should work on 64-bit versions +as well. It most likely won't work on Windows prior to Windows XP +SP2. + +** Other systems + +At this moment, drivers for any other systems have not been tested. +Knowing how MacOS is based on BSD and BSD is an Open Source it is +believed that it should (read: "I have no idea whether it will") work +out-of-the-box. + +For more exotic systems I have even less to say... + +Any testing and drivers *are* *welcome*! + +* Authors + +This document has been written by Michal Nazarewicz +([[mailto:mina86@mina86.com]]). INF files have been hacked with +support of Marek Szyprowski ([[mailto:m.szyprowski@samsung.com]]) and +Xiaofan Chen ([[mailto:xiaofanc@gmail.com]]) basing on the MS RNDIS +template[9], Microchip's CDC ACM INF file and David Brownell's +([[mailto:dbrownell@users.sourceforge.net]]) original INF files. + +* Footnotes + +[1] Remote Network Driver Interface Specification, +[[http://msdn.microsoft.com/en-us/library/ee484414.aspx]]. + +[2] Communications Device Class Abstract Control Model, spec for this +and other USB classes can be found at +[[http://www.usb.org/developers/devclass_docs/]]. + +[3] CDC Ethernet Control Model. + +[4] [[http://msdn.microsoft.com/en-us/library/ff537109(v=VS.85).aspx]] + +[5] [[http://msdn.microsoft.com/en-us/library/ff539234(v=VS.85).aspx]] + +[6] To put it in some other nice words, Windows failed to respond to +any user input. + +[7] You may find [[http://www.cygnal.org/ubb/Forum9/HTML/001050.html]] +useful. + +[8] http://www.nirsoft.net/utils/usb_devices_view.html + +[9] [[http://msdn.microsoft.com/en-us/library/ff570620.aspx]] diff --git a/Documentation/usb/gadget_serial.txt b/Documentation/usb/gadget_serial.txt index eac7df94d8e3..61e67f6a20a0 100644 --- a/Documentation/usb/gadget_serial.txt +++ b/Documentation/usb/gadget_serial.txt @@ -151,88 +151,23 @@ instructions below to install the host side driver. Installing the Windows Host ACM Driver -------------------------------------- -To use the Windows ACM driver you must have the files "gserial.inf" -and "usbser.sys" together in a folder on the Windows machine. - -The "gserial.inf" file is given here. - --------------------- CUT HERE -------------------- -[Version] -Signature="$Windows NT$" -Class=Ports -ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} -Provider=%LINUX% -DriverVer=08/17/2004,0.0.2.0 -; Copyright (C) 2004 Al Borchers (alborchers@steinerpoint.com) - -[Manufacturer] -%LINUX%=GSerialDeviceList - -[GSerialDeviceList] -%GSERIAL%=GSerialInstall, USB\VID_0525&PID_A4A7 - -[DestinationDirs] -DefaultDestDir=10,System32\Drivers - -[GSerialInstall] -CopyFiles=GSerialCopyFiles -AddReg=GSerialAddReg - -[GSerialCopyFiles] -usbser.sys - -[GSerialAddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[GSerialInstall.Services] -AddService = usbser,0x0002,GSerialService - -[GSerialService] -DisplayName = %GSERIAL_DISPLAY_NAME% -ServiceType = 1 ; SERVICE_KERNEL_DRIVER -StartType = 3 ; SERVICE_DEMAND_START -ErrorControl = 1 ; SERVICE_ERROR_NORMAL -ServiceBinary = %10%\System32\Drivers\usbser.sys -LoadOrderGroup = Base - -[Strings] -LINUX = "Linux" -GSERIAL = "Gadget Serial" -GSERIAL_DISPLAY_NAME = "USB Gadget Serial Driver" --------------------- CUT HERE -------------------- - -The "usbser.sys" file comes with various versions of Windows. -For example, it can be found on Windows XP typically in - - C:\WINDOWS\Driver Cache\i386\driver.cab - -Or it can be found on the Windows 98SE CD in the "win98" folder -in the "DRIVER11.CAB" through "DRIVER20.CAB" cab files. You will -need the DOS "expand" program, the Cygwin "cabextract" program, or -a similar program to unpack these cab files and extract "usbser.sys". - -For example, to extract "usbser.sys" into the current directory -on Windows XP, open a DOS window and run a command like - - expand C:\WINDOWS\Driver~1\i386\driver.cab -F:usbser.sys . - -(Thanks to Nishant Kamat for pointing out this DOS command.) +To use the Windows ACM driver you must have the "linux-cdc-acm.inf" +file (provided along this document) which supports all recent versions +of Windows. When the gadget serial driver is loaded and the USB device connected to the Windows host with a USB cable, Windows should recognize the gadget serial device and ask for a driver. Tell Windows to find the -driver in the folder that contains "gserial.inf" and "usbser.sys". +driver in the folder that contains the "linux-cdc-acm.inf" file. For example, on Windows XP, when the gadget serial device is first plugged in, the "Found New Hardware Wizard" starts up. Select -"Install from a list or specific location (Advanced)", then on -the next screen select "Include this location in the search" and -enter the path or browse to the folder containing "gserial.inf" and -"usbser.sys". Windows will complain that the Gadget Serial driver -has not passed Windows Logo testing, but select "Continue anyway" -and finish the driver installation. +"Install from a list or specific location (Advanced)", then on the +next screen select "Include this location in the search" and enter the +path or browse to the folder containing the "linux-cdc-acm.inf" file. +Windows will complain that the Gadget Serial driver has not passed +Windows Logo testing, but select "Continue anyway" and finish the +driver installation. On Windows XP, in the "Device Manager" (under "Control Panel", "System", "Hardware") expand the "Ports (COM & LPT)" entry and you @@ -345,5 +280,3 @@ you should be able to send data back and forth between the gadget side and host side systems. Anything you type on the terminal window on the gadget side should appear in the terminal window on the host side and vice versa. - - diff --git a/Documentation/usb/hotplug.txt b/Documentation/usb/hotplug.txt index f53170665f37..4c945716a660 100644 --- a/Documentation/usb/hotplug.txt +++ b/Documentation/usb/hotplug.txt @@ -10,7 +10,7 @@ immediately usable. That means the system must do many things, including: - Bind a driver to that device. Bus frameworks do that using a device driver's probe() routine. - + - Tell other subsystems to configure the new device. Print queues may need to be enabled, networks brought up, disk partitions mounted, and so on. In some cases these will @@ -84,7 +84,7 @@ USB MODUTILS SUPPORT Current versions of module-init-tools will create a "modules.usbmap" file which contains the entries from each driver's MODULE_DEVICE_TABLE. Such files can be used by various user mode policy agents to make sure all the -right driver modules get loaded, either at boot time or later. +right driver modules get loaded, either at boot time or later. See for full information about such table entries; or look at existing drivers. Each table entry describes one or more criteria to diff --git a/Documentation/usb/linux-cdc-acm.inf b/Documentation/usb/linux-cdc-acm.inf new file mode 100644 index 000000000000..612e7220fb29 --- /dev/null +++ b/Documentation/usb/linux-cdc-acm.inf @@ -0,0 +1,107 @@ +; Windows USB CDC ACM Setup File + +; Based on INF template which was: +; Copyright (c) 2000 Microsoft Corporation +; Copyright (c) 2007 Microchip Technology Inc. +; likely to be covered by the MLPL as found at: +; . +; For use only on Windows operating systems. + +[Version] +Signature="$Windows NT$" +Class=Ports +ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} +Provider=%Linux% +DriverVer=11/15/2007,5.1.2600.0 + +[Manufacturer] +%Linux%=DeviceList, NTamd64 + +[DestinationDirs] +DefaultDestDir=12 + + +;------------------------------------------------------------------------------ +; Windows 2000/XP/Vista-32bit Sections +;------------------------------------------------------------------------------ + +[DriverInstall.nt] +include=mdmcpq.inf +CopyFiles=DriverCopyFiles.nt +AddReg=DriverInstall.nt.AddReg + +[DriverCopyFiles.nt] +usbser.sys,,,0x20 + +[DriverInstall.nt.AddReg] +HKR,,DevLoader,,*ntkern +HKR,,NTMPDriver,,USBSER.sys +HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" + +[DriverInstall.nt.Services] +AddService=usbser, 0x00000002, DriverService.nt + +[DriverService.nt] +DisplayName=%SERVICE% +ServiceType=1 +StartType=3 +ErrorControl=1 +ServiceBinary=%12%\USBSER.sys + +;------------------------------------------------------------------------------ +; Vista-64bit Sections +;------------------------------------------------------------------------------ + +[DriverInstall.NTamd64] +include=mdmcpq.inf +CopyFiles=DriverCopyFiles.NTamd64 +AddReg=DriverInstall.NTamd64.AddReg + +[DriverCopyFiles.NTamd64] +USBSER.sys,,,0x20 + +[DriverInstall.NTamd64.AddReg] +HKR,,DevLoader,,*ntkern +HKR,,NTMPDriver,,USBSER.sys +HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" + +[DriverInstall.NTamd64.Services] +AddService=usbser, 0x00000002, DriverService.NTamd64 + +[DriverService.NTamd64] +DisplayName=%SERVICE% +ServiceType=1 +StartType=3 +ErrorControl=1 +ServiceBinary=%12%\USBSER.sys + + +;------------------------------------------------------------------------------ +; Vendor and Product ID Definitions +;------------------------------------------------------------------------------ +; When developing your USB device, the VID and PID used in the PC side +; application program and the firmware on the microcontroller must match. +; Modify the below line to use your VID and PID. Use the format as shown +; below. +; Note: One INF file can be used for multiple devices with different +; VID and PIDs. For each supported device, append +; ",USB\VID_xxxx&PID_yyyy" to the end of the line. +;------------------------------------------------------------------------------ +[SourceDisksFiles] +[SourceDisksNames] +[DeviceList] +%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_0525&PID_A4AB&MI_02 + +[DeviceList.NTamd64] +%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_0525&PID_A4AB&MI_02 + + +;------------------------------------------------------------------------------ +; String Definitions +;------------------------------------------------------------------------------ +;Modify these strings to customize your device +;------------------------------------------------------------------------------ +[Strings] +Linux = "Linux Developer Community" +DESCRIPTION = "Gadget Serial" +SERVICE = "USB RS-232 Emulation Driver" diff --git a/Documentation/usb/linux.inf b/Documentation/usb/linux.inf index 2f7217d124ff..4dee95851224 100644 --- a/Documentation/usb/linux.inf +++ b/Documentation/usb/linux.inf @@ -1,200 +1,66 @@ -; MS-Windows driver config matching some basic modes of the -; Linux-USB Ethernet/RNDIS gadget firmware: -; -; - RNDIS plus CDC Ethernet ... this may be familiar as a DOCSIS -; cable modem profile, and supports most non-Microsoft USB hosts -; -; - RNDIS plus CDC Subset ... used by hardware that incapable of -; full CDC Ethernet support. -; -; Microsoft only directly supports RNDIS drivers, and bundled them into XP. -; The Microsoft "Remote NDIS USB Driver Kit" is currently found at: -; http://www.microsoft.com/whdc/hwdev/resources/HWservices/rndis.mspx - +; Based on template INF file found at +; +; which was: +; Copyright (c) Microsoft Corporation +; and released under the MLPL as found at: +; . +; For use only on Windows operating systems. [Version] -Signature = "$CHICAGO$" +Signature = "$Windows NT$" Class = Net ClassGUID = {4d36e972-e325-11ce-bfc1-08002be10318} Provider = %Linux% -Compatible = 1 -MillenniumPreferred = .ME -DriverVer = 03/30/2004,0.0.0.0 -; catalog file would be used by WHQL -;CatalogFile = Linux.cat +DriverVer = 06/21/2006,6.0.6000.16384 [Manufacturer] -%Linux% = LinuxDevices,NT.5.1 +%Linux% = LinuxDevices,NTx86,NTamd64,NTia64 -[LinuxDevices] -; NetChip IDs, used by both firmware modes -%LinuxDevice% = RNDIS, USB\VID_0525&PID_a4a2 +; Decoration for x86 architecture +[LinuxDevices.NTx86] +%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_0525&PID_a4ab&MI_00 -[LinuxDevices.NT.5.1] -%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2 +; Decoration for x64 architecture +[LinuxDevices.NTamd64] +%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_0525&PID_a4ab&MI_00 +; Decoration for ia64 architecture +[LinuxDevices.NTia64] +%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_0525&PID_a4ab&MI_00 + +;@@@ This is the common setting for setup [ControlFlags] ExcludeFromSelect=* -; Windows 98, Windows 98 Second Edition specific sections -------- - -[RNDIS] -DeviceID = usb8023 -MaxInstance = 512 -DriverVer = 03/30/2004,0.0.0.0 -AddReg = RNDIS_AddReg_98, RNDIS_AddReg_Common - -[RNDIS_AddReg_98] -HKR, , DevLoader, 0, *ndis -HKR, , DeviceVxDs, 0, usb8023.sys -HKR, NDIS, LogDriverName, 0, "usb8023" -HKR, NDIS, MajorNdisVersion, 1, 5 -HKR, NDIS, MinorNdisVersion, 1, 0 -HKR, Ndi\Interfaces, DefUpper, 0, "ndis3,ndis4,ndis5" -HKR, Ndi\Interfaces, DefLower, 0, "ethernet" -HKR, Ndi\Interfaces, UpperRange, 0, "ndis3,ndis4,ndis5" -HKR, Ndi\Interfaces, LowerRange, 0, "ethernet" -HKR, Ndi\Install, ndis3, 0, "RNDIS_Install_98" -HKR, Ndi\Install, ndis4, 0, "RNDIS_Install_98" -HKR, Ndi\Install, ndis5, 0, "RNDIS_Install_98" -HKR, Ndi, DeviceId, 0, "USB\VID_0525&PID_a4a2" - -[RNDIS_Install_98] -CopyFiles=RNDIS_CopyFiles_98 - -[RNDIS_CopyFiles_98] -usb8023.sys, usb8023w.sys, , 0 -rndismp.sys, rndismpw.sys, , 0 - -; Windows Millennium Edition specific sections -------------------- - -[RNDIS.ME] -DeviceID = usb8023 -MaxInstance = 512 -DriverVer = 03/30/2004,0.0.0.0 -AddReg = RNDIS_AddReg_ME, RNDIS_AddReg_Common -Characteristics = 0x84 ; NCF_PHYSICAL + NCF_HAS_UI -BusType = 15 - -[RNDIS_AddReg_ME] -HKR, , DevLoader, 0, *ndis -HKR, , DeviceVxDs, 0, usb8023.sys -HKR, NDIS, LogDriverName, 0, "usb8023" -HKR, NDIS, MajorNdisVersion, 1, 5 -HKR, NDIS, MinorNdisVersion, 1, 0 -HKR, Ndi\Interfaces, DefUpper, 0, "ndis3,ndis4,ndis5" -HKR, Ndi\Interfaces, DefLower, 0, "ethernet" -HKR, Ndi\Interfaces, UpperRange, 0, "ndis3,ndis4,ndis5" -HKR, Ndi\Interfaces, LowerRange, 0, "ethernet" -HKR, Ndi\Install, ndis3, 0, "RNDIS_Install_ME" -HKR, Ndi\Install, ndis4, 0, "RNDIS_Install_ME" -HKR, Ndi\Install, ndis5, 0, "RNDIS_Install_ME" -HKR, Ndi, DeviceId, 0, "USB\VID_0525&PID_a4a2" - -[RNDIS_Install_ME] -CopyFiles=RNDIS_CopyFiles_ME - -[RNDIS_CopyFiles_ME] -usb8023.sys, usb8023m.sys, , 0 -rndismp.sys, rndismpm.sys, , 0 - -; Windows 2000 specific sections --------------------------------- - -[RNDIS.NT] -Characteristics = 0x84 ; NCF_PHYSICAL + NCF_HAS_UI -BusType = 15 -DriverVer = 03/30/2004,0.0.0.0 -AddReg = RNDIS_AddReg_NT, RNDIS_AddReg_Common -CopyFiles = RNDIS_CopyFiles_NT - -[RNDIS.NT.Services] -AddService = USB_RNDIS, 2, RNDIS_ServiceInst_NT, RNDIS_EventLog - -[RNDIS_CopyFiles_NT] -; no rename of files on Windows 2000, use the 'k' names as is -usb8023k.sys, , , 0 -rndismpk.sys, , , 0 - -[RNDIS_ServiceInst_NT] -DisplayName = %ServiceDisplayName% -ServiceType = 1 -StartType = 3 -ErrorControl = 1 -ServiceBinary = %12%\usb8023k.sys -LoadOrderGroup = NDIS -AddReg = RNDIS_WMI_AddReg_NT - -[RNDIS_WMI_AddReg_NT] -HKR, , MofImagePath, 0x00020000, "System32\drivers\rndismpk.sys" - -; Windows XP specific sections ----------------------------------- - +; DDInstall section +; References the in-build Netrndis.inf [RNDIS.NT.5.1] -Characteristics = 0x84 ; NCF_PHYSICAL + NCF_HAS_UI -BusType = 15 -DriverVer = 03/30/2004,0.0.0.0 -AddReg = RNDIS_AddReg_NT, RNDIS_AddReg_Common -; no copyfiles - the files are already in place +Characteristics = 0x84 ; NCF_PHYSICAL + NCF_HAS_UI +BusType = 15 +; NEVER REMOVE THE FOLLOWING REFERENCE FOR NETRNDIS.INF +include = netrndis.inf +needs = Usb_Rndis.ndi +AddReg = Rndis_AddReg_Vista +; DDInstal.Services section [RNDIS.NT.5.1.Services] -AddService = USB_RNDIS, 2, RNDIS_ServiceInst_51, RNDIS_EventLog +include = netrndis.inf +needs = Usb_Rndis.ndi.Services -[RNDIS_ServiceInst_51] -DisplayName = %ServiceDisplayName% -ServiceType = 1 -StartType = 3 -ErrorControl = 1 -ServiceBinary = %12%\usb8023.sys -LoadOrderGroup = NDIS -AddReg = RNDIS_WMI_AddReg_51 +; Optional registry settings. You can modify as needed. +[RNDIS_AddReg_Vista] +HKR, NDI\params\VistaProperty, ParamDesc, 0, %Vista_Property% +HKR, NDI\params\VistaProperty, type, 0, "edit" +HKR, NDI\params\VistaProperty, LimitText, 0, "12" +HKR, NDI\params\VistaProperty, UpperCase, 0, "1" +HKR, NDI\params\VistaProperty, default, 0, " " +HKR, NDI\params\VistaProperty, optional, 0, "1" -[RNDIS_WMI_AddReg_51] -HKR, , MofImagePath, 0x00020000, "System32\drivers\rndismp.sys" - -; Windows 2000 and Windows XP common sections -------------------- - -[RNDIS_AddReg_NT] -HKR, Ndi, Service, 0, "USB_RNDIS" -HKR, Ndi\Interfaces, UpperRange, 0, "ndis5" -HKR, Ndi\Interfaces, LowerRange, 0, "ethernet" - -[RNDIS_EventLog] -AddReg = RNDIS_EventLog_AddReg - -[RNDIS_EventLog_AddReg] -HKR, , EventMessageFile, 0x00020000, "%%SystemRoot%%\System32\netevent.dll" -HKR, , TypesSupported, 0x00010001, 7 - -; Common Sections ------------------------------------------------- - -[RNDIS_AddReg_Common] -HKR, NDI\params\NetworkAddress, ParamDesc, 0, %NetworkAddress% -HKR, NDI\params\NetworkAddress, type, 0, "edit" -HKR, NDI\params\NetworkAddress, LimitText, 0, "12" -HKR, NDI\params\NetworkAddress, UpperCase, 0, "1" -HKR, NDI\params\NetworkAddress, default, 0, " " -HKR, NDI\params\NetworkAddress, optional, 0, "1" - -[SourceDisksNames] -1=%SourceDisk%,,1 - -[SourceDisksFiles] -usb8023m.sys=1 -rndismpm.sys=1 -usb8023w.sys=1 -rndismpw.sys=1 -usb8023k.sys=1 -rndismpk.sys=1 - -[DestinationDirs] -RNDIS_CopyFiles_98 = 10, system32/drivers -RNDIS_CopyFiles_ME = 10, system32/drivers -RNDIS_CopyFiles_NT = 12 +; No sys copyfiles - the sys files are already in-build +; (part of the operating system). +; We do not support XP SP1-, 2003 SP1-, ME, 9x. [Strings] -ServiceDisplayName = "USB Remote NDIS Network Device Driver" -NetworkAddress = "Network Address" Linux = "Linux Developer Community" LinuxDevice = "Linux USB Ethernet/RNDIS Gadget" -SourceDisk = "Ethernet/RNDIS Gadget Driver Install Disk" - +Vista_Property = "Optional Vista Property" diff --git a/Documentation/usb/mtouchusb.txt b/Documentation/usb/mtouchusb.txt index e43cfffaa100..86302cd53ed3 100644 --- a/Documentation/usb/mtouchusb.txt +++ b/Documentation/usb/mtouchusb.txt @@ -54,10 +54,6 @@ generic functions like calibrations, resets, and vendor information can be requested from the userspace (And the drivers would handle the vendor specific tasks). -ADDITIONAL INFORMATION/UPDATES/X CONFIGURATION EXAMPLE: - -http://groomlakelabs.com/grandamp/code/microtouch/ - TODO: Implement a control urb again to handle requests to and from the device @@ -68,7 +64,7 @@ DISCLAIMER: I am not a MicroTouch/3M employee, nor have I ever been. 3M does not support this driver! If you want touch drivers only supported within X, please go to: -http://www.3m.com/3MTouchSystems/downloads/ +http://www.3m.com/3MTouchSystems/ THANKS: diff --git a/Documentation/usb/usb-serial.txt b/Documentation/usb/usb-serial.txt index f4d214510259..5bd7926185e8 100644 --- a/Documentation/usb/usb-serial.txt +++ b/Documentation/usb/usb-serial.txt @@ -83,7 +83,7 @@ HandSpring Visor, Palm USB, and Clié USB driver parameters. e.g. modprobe visor vendor=0x54c product=0x66 There is a webpage and mailing lists for this portion of the driver at: - http://usbvisor.sourceforge.net/ + http://sourceforge.net/projects/usbvisor/ For any questions or problems with this driver, please contact Greg Kroah-Hartman at greg@kroah.com @@ -184,7 +184,7 @@ Keyspan USA-series Serial Adapters functionality. More information is available at: - http://misc.nu/hugh/keyspan.html + http://www.carnationsoftware.com/carnation/Keyspan.html For any questions or problems with this driver, please contact Hugh Blemings at hugh@misc.nu diff --git a/Documentation/video4linux/API.html b/Documentation/video4linux/API.html index d749d41f647b..d72fd2aa9158 100644 --- a/Documentation/video4linux/API.html +++ b/Documentation/video4linux/API.html @@ -17,7 +17,7 @@ - V4L2 API + V4L2 API Should be used for new projects diff --git a/Documentation/video4linux/CARDLIST.cx23885 b/Documentation/video4linux/CARDLIST.cx23885 index 16ca030e1185..87c46347bd63 100644 --- a/Documentation/video4linux/CARDLIST.cx23885 +++ b/Documentation/video4linux/CARDLIST.cx23885 @@ -17,9 +17,9 @@ 16 -> DVBWorld DVB-S2 2005 [0001:2005] 17 -> NetUP Dual DVB-S2 CI [1b55:2a2c] 18 -> Hauppauge WinTV-HVR1270 [0070:2211] - 19 -> Hauppauge WinTV-HVR1275 [0070:2215] - 20 -> Hauppauge WinTV-HVR1255 [0070:2251] - 21 -> Hauppauge WinTV-HVR1210 [0070:2291,0070:2295] + 19 -> Hauppauge WinTV-HVR1275 [0070:2215,0070:221d,0070:22f2] + 20 -> Hauppauge WinTV-HVR1255 [0070:2251,0070:2259,0070:22f1] + 21 -> Hauppauge WinTV-HVR1210 [0070:2291,0070:2295,0070:2299,0070:229d,0070:22f0,0070:22f3,0070:22f4,0070:22f5] 22 -> Mygica X8506 DMB-TH [14f1:8651] 23 -> Magic-Pro ProHDTV Extreme 2 [14f1:8657] 24 -> Hauppauge WinTV-HVR1850 [0070:8541] diff --git a/Documentation/video4linux/CARDLIST.em28xx b/Documentation/video4linux/CARDLIST.em28xx index 3a623aaeae5f..5c568757c301 100644 --- a/Documentation/video4linux/CARDLIST.em28xx +++ b/Documentation/video4linux/CARDLIST.em28xx @@ -72,3 +72,4 @@ 73 -> Reddo DVB-C USB TV Box (em2870) 74 -> Actionmaster/LinXcel/Digitus VC211A (em2800) 75 -> Dikom DK300 (em2882) + 76 -> KWorld PlusTV 340U or UB435-Q (ATSC) (em2870) [1b80:a340] diff --git a/Documentation/video4linux/CARDLIST.saa7134 b/Documentation/video4linux/CARDLIST.saa7134 index 1387a69ae3aa..4000c29fcfb6 100644 --- a/Documentation/video4linux/CARDLIST.saa7134 +++ b/Documentation/video4linux/CARDLIST.saa7134 @@ -178,4 +178,5 @@ 177 -> Hawell HW-404M7 178 -> Beholder BeholdTV H7 [5ace:7190] 179 -> Beholder BeholdTV A7 [5ace:7090] -180 -> Avermedia M733A [1461:4155,1461:4255] +180 -> Avermedia PCI M733A [1461:4155,1461:4255] +181 -> TechoTrend TT-budget T-3000 [13c2:2804] diff --git a/Documentation/video4linux/CQcam.txt b/Documentation/video4linux/CQcam.txt index d230878e473e..8977e7ce4dab 100644 --- a/Documentation/video4linux/CQcam.txt +++ b/Documentation/video4linux/CQcam.txt @@ -203,11 +203,11 @@ The V4L2 API spec: http://v4l2spec.bytesex.org/ Some web pages about the quickcams: - http://www.dkfz-heidelberg.de/Macromol/wedemann/mini-HOWTO-cqcam.html + http://www.pingouin-land.com/howto/QuickCam-HOWTO.html http://www.crynwr.com/qcpc/ QuickCam Third-Party Drivers http://www.crynwr.com/qcpc/re.html Some Reverse Engineering - http://cse.unl.edu/~cluening/gqcam/ v4l client + http://www.wirelesscouch.net/software/gqcam/ v4l client http://phobos.illtel.denver.co.us/pub/qcread/ doesn't use v4l ftp://ftp.cs.unm.edu/pub/chris/quickcam/ Has lots of drivers http://www.cs.duke.edu/~reynolds/quickcam/ Has lots of information diff --git a/Documentation/video4linux/README.cpia b/Documentation/video4linux/README.cpia index 19cd3bf24981..8a747fee661f 100644 --- a/Documentation/video4linux/README.cpia +++ b/Documentation/video4linux/README.cpia @@ -185,7 +185,7 @@ THANKS (in no particular order): --------------------------------------------------------------------------- REFERENCES - 1. http://www.risc.uni-linz.ac.at/people/ppregler + 1. http://www.risc.uni-linz.ac.at/ mailto:Peter_Pregler@email.com 2. see the file COPYING in the top directory of the kernel tree 3. http://webcam.sourceforge.net/ diff --git a/Documentation/video4linux/README.ivtv b/Documentation/video4linux/README.ivtv index 73df22c40bfe..42b06686eb78 100644 --- a/Documentation/video4linux/README.ivtv +++ b/Documentation/video4linux/README.ivtv @@ -10,7 +10,7 @@ Hauppauge PVR-350. NOTE: this driver requires the latest encoder firmware (version 2.06.039, size 376836 bytes). Get the firmware from here: -http://dl.ivtvdriver.org/ivtv/firmware/firmware.tar.gz +http://dl.ivtvdriver.org/ivtv/firmware/ NOTE: 'normal' TV applications do not work with this driver, you need an application that can handle MPEG input such as mplayer, xine, MythTV, diff --git a/Documentation/video4linux/Zoran b/Documentation/video4linux/Zoran index 0e89e7676298..00e3f9267814 100644 --- a/Documentation/video4linux/Zoran +++ b/Documentation/video4linux/Zoran @@ -174,7 +174,7 @@ and is used in Argentinia, Uruguay, an a few others We do not talk about how the audio is broadcast ! A rather good sites about the TV standards are: -http://www.sony.jp/ServiceArea/Voltage_map/ +http://www.sony.jp/support/ http://info.electronicwerkstatt.de/bereiche/fernsehtechnik/frequenzen_und_normen/Fernsehnormen/ and http://www.cabl.com/restaurant/channel.html @@ -330,7 +330,7 @@ These extensions are known as the v4l/mjpeg extensions. See zoran.h for details (structs/ioctls). Information - video4linux: -http://roadrunner.swansea.linux.org.uk/v4lapi.shtml +http://linux.bytesex.org/v4l2/API.html Documentation/video4linux/API.html /usr/include/linux/videodev.h @@ -390,7 +390,7 @@ BUZIOC_G_STATUS Get the status of the input lines (video source connected/norm). For programming example, please, look at lavrec.c and lavplay.c code in -lavtools-1.2p2 package (URL: http://www.cicese.mx/~mirsev/DC10plus/) +lavtools-1.2p2 package (URL: http://www.cicese.mx/) and the 'examples' directory in the original Buz driver distribution. Additional notes for software developers: diff --git a/Documentation/video4linux/bttv/Cards b/Documentation/video4linux/bttv/Cards index d3389655ad96..12217fc49725 100644 --- a/Documentation/video4linux/bttv/Cards +++ b/Documentation/video4linux/bttv/Cards @@ -802,7 +802,7 @@ Kworld (www.kworld.com.tw) -JTT/ Justy Corp.http://www.justy.co.jp/ (www.jtt.com.jp website down) +JTT/ Justy Corp.(http://www.jtt.ne.jp/) --------------------------------------------------------------------- JTT-02 (JTT TV) "TV watchmate pro" (bt848) @@ -828,7 +828,7 @@ Eline www.eline-net.com/ Eline Vision TVMaster / TVMaster FM (ELV-TVM/ ELV-TVM-FM) = LR26 (bt878) Eline Vision TVMaster-2000 (ELV-TVM-2000, ELV-TVM-2000-FM)= LR138 (saa713x) -Spirit http://www.spiritmodems.com.au/ +Spirit ------ Spirit TV Tuner/Video Capture Card (bt848) @@ -959,6 +959,6 @@ Asus www.asuscom.com Hoontech -------- -http://www.hoontech.com/korean/download/down_driver_list03.html +http://www.hoontech.de/ HART Vision 848 (H-ART Vision 848) HART Vision 878 (H-Art Vision 878) diff --git a/Documentation/video4linux/bttv/MAKEDEV b/Documentation/video4linux/bttv/MAKEDEV index 6c29ba43b6c6..9d112f7fd5f7 100644 --- a/Documentation/video4linux/bttv/MAKEDEV +++ b/Documentation/video4linux/bttv/MAKEDEV @@ -14,7 +14,7 @@ function makedev () { ln -s /dev/${1}0 /dev/$1 } -# see http://roadrunner.swansea.uk.linux.org/v4lapi.shtml +# see http://linux.bytesex.org/v4l2/API.html echo "*** new device names ***" makedev video 0 diff --git a/Documentation/video4linux/bttv/Specs b/Documentation/video4linux/bttv/Specs index 79b9e576fe79..f32466cdae05 100644 --- a/Documentation/video4linux/bttv/Specs +++ b/Documentation/video4linux/bttv/Specs @@ -1,3 +1,3 @@ Philips http://www.Semiconductors.COM/pip/ -Conexant http://www.conexant.com/techinfo/default.asp -Micronas http://www.micronas.de/pages/product_documentation/index.html +Conexant http://www.conexant.com/ +Micronas http://www.micronas.com/en/home/index.html diff --git a/Documentation/video4linux/cx88/hauppauge-wintv-cx88-ir.txt b/Documentation/video4linux/cx88/hauppauge-wintv-cx88-ir.txt index faccee68f603..f4329a38878e 100644 --- a/Documentation/video4linux/cx88/hauppauge-wintv-cx88-ir.txt +++ b/Documentation/video4linux/cx88/hauppauge-wintv-cx88-ir.txt @@ -44,7 +44,7 @@ http://www.atmel.com/dyn/resources/prod_documents/doc2817.pdf This data sheet (google search) seems to have a lovely description of the RC5 basics -http://users.pandora.be/nenya/electronics/rc5/ and more data +http://www.nenya.be/beor/electronics/rc5.htm and more data http://www.ee.washington.edu/circuit_archive/text/ir_decode.txt and even a reference to how to decode a bi-phase data stream. diff --git a/Documentation/video4linux/gspca.txt b/Documentation/video4linux/gspca.txt index f13eb036c439..56ba7bba7168 100644 --- a/Documentation/video4linux/gspca.txt +++ b/Documentation/video4linux/gspca.txt @@ -29,8 +29,12 @@ zc3xx 041e:4029 Creative WebCam Vista Pro zc3xx 041e:4034 Creative Instant P0620 zc3xx 041e:4035 Creative Instant P0620D zc3xx 041e:4036 Creative Live ! +sq930x 041e:4038 Creative Joy-IT zc3xx 041e:403a Creative Nx Pro 2 spca561 041e:403b Creative Webcam Vista (VF0010) +sq930x 041e:403c Creative Live! Ultra +sq930x 041e:403d Creative Live! Ultra for Notebooks +sq930x 041e:4041 Creative Live! Motion zc3xx 041e:4051 Creative Live!Cam Notebook Pro (VF0250) ov519 041e:4052 Creative Live! VISTA IM zc3xx 041e:4053 Creative Live!Cam Video IM @@ -138,6 +142,7 @@ finepix 04cb:013d Fujifilm FinePix unknown model finepix 04cb:013f Fujifilm FinePix F420 sunplus 04f1:1001 JVC GC A50 spca561 04fc:0561 Flexcam 100 +spca1528 04fc:1528 Sunplus MD80 clone sunplus 04fc:500c Sunplus CA500C sunplus 04fc:504a Aiptek Mini PenCam 1.3 sunplus 04fc:504b Maxell MaxPocket LE 1.3 @@ -253,6 +258,7 @@ pac7302 093a:2620 Apollo AC-905 pac7302 093a:2621 PAC731x pac7302 093a:2622 Genius Eye 312 pac7302 093a:2624 PAC7302 +pac7302 093a:2625 Genius iSlim 310 pac7302 093a:2626 Labtec 2200 pac7302 093a:2628 Genius iLook 300 pac7302 093a:2629 Genious iSlim 300 @@ -362,6 +368,8 @@ sq905c 2770:9052 Disney pix micro 2 (VGA) sq905c 2770:905c All 11 known cameras with this ID sq905 2770:9120 All 24 known cameras with this ID sq905c 2770:913d All 4 known cameras with this ID +sq930x 2770:930b Sweex Motion Tracking / I-Tec iCam Tracer +sq930x 2770:930c Trust WB-3500T / NSG Robbie 2.0 spca500 2899:012c Toptro Industrial ov519 8020:ef04 ov519 spca508 8086:0110 Intel Easy PC Camera diff --git a/Documentation/video4linux/hauppauge-wintv-cx88-ir.txt b/Documentation/video4linux/hauppauge-wintv-cx88-ir.txt index faccee68f603..a2fd363c40c8 100644 --- a/Documentation/video4linux/hauppauge-wintv-cx88-ir.txt +++ b/Documentation/video4linux/hauppauge-wintv-cx88-ir.txt @@ -44,7 +44,7 @@ http://www.atmel.com/dyn/resources/prod_documents/doc2817.pdf This data sheet (google search) seems to have a lovely description of the RC5 basics -http://users.pandora.be/nenya/electronics/rc5/ and more data +http://www.nenya.be/beor/electronics/rc5.htm and more data http://www.ee.washington.edu/circuit_archive/text/ir_decode.txt and even a reference to how to decode a bi-phase data stream. diff --git a/Documentation/video4linux/ibmcam.txt b/Documentation/video4linux/ibmcam.txt index 397a94eb77b8..a51055211e62 100644 --- a/Documentation/video4linux/ibmcam.txt +++ b/Documentation/video4linux/ibmcam.txt @@ -27,9 +27,8 @@ SUPPORTED CAMERAS: Xirlink "C-It" camera, also known as "IBM PC Camera". The device uses proprietary ASIC (and compression method); -it is manufactured by Xirlink. See http://www.xirlink.com/ -(renamed to http://www.veo.com), http://www.ibmpccamera.com, -or http://www.c-itnow.com/ for details and pictures. +it is manufactured by Xirlink. See http://xirlinkwebcam.sourceforge.net, +http://www.ibmpccamera.com, or http://www.c-itnow.com/ for details and pictures. This very chipset ("X Chip", as marked at the factory) is used in several other cameras, and they are supported diff --git a/Documentation/video4linux/se401.txt b/Documentation/video4linux/se401.txt index 7b9d1c960a10..bd6526ec8dd7 100644 --- a/Documentation/video4linux/se401.txt +++ b/Documentation/video4linux/se401.txt @@ -49,6 +49,6 @@ order to increase the throughput (and thus framerate). HELP: The latest info on this driver can be found at: -http://www.chello.nl/~j.vreeken/se401/ +http://members.chello.nl/~j.vreeken/se401/ And questions to me can be send to: pe1rxq@amsat.org diff --git a/Documentation/video4linux/v4l2-controls.txt b/Documentation/video4linux/v4l2-controls.txt new file mode 100644 index 000000000000..8773778d23fc --- /dev/null +++ b/Documentation/video4linux/v4l2-controls.txt @@ -0,0 +1,648 @@ +Introduction +============ + +The V4L2 control API seems simple enough, but quickly becomes very hard to +implement correctly in drivers. But much of the code needed to handle controls +is actually not driver specific and can be moved to the V4L core framework. + +After all, the only part that a driver developer is interested in is: + +1) How do I add a control? +2) How do I set the control's value? (i.e. s_ctrl) + +And occasionally: + +3) How do I get the control's value? (i.e. g_volatile_ctrl) +4) How do I validate the user's proposed control value? (i.e. try_ctrl) + +All the rest is something that can be done centrally. + +The control framework was created in order to implement all the rules of the +V4L2 specification with respect to controls in a central place. And to make +life as easy as possible for the driver developer. + +Note that the control framework relies on the presence of a struct v4l2_device +for V4L2 drivers and struct v4l2_subdev for sub-device drivers. + + +Objects in the framework +======================== + +There are two main objects: + +The v4l2_ctrl object describes the control properties and keeps track of the +control's value (both the current value and the proposed new value). + +v4l2_ctrl_handler is the object that keeps track of controls. It maintains a +list of v4l2_ctrl objects that it owns and another list of references to +controls, possibly to controls owned by other handlers. + + +Basic usage for V4L2 and sub-device drivers +=========================================== + +1) Prepare the driver: + +1.1) Add the handler to your driver's top-level struct: + + struct foo_dev { + ... + struct v4l2_ctrl_handler ctrl_handler; + ... + }; + + struct foo_dev *foo; + +1.2) Initialize the handler: + + v4l2_ctrl_handler_init(&foo->ctrl_handler, nr_of_controls); + + The second argument is a hint telling the function how many controls this + handler is expected to handle. It will allocate a hashtable based on this + information. It is a hint only. + +1.3) Hook the control handler into the driver: + +1.3.1) For V4L2 drivers do this: + + struct foo_dev { + ... + struct v4l2_device v4l2_dev; + ... + struct v4l2_ctrl_handler ctrl_handler; + ... + }; + + foo->v4l2_dev.ctrl_handler = &foo->ctrl_handler; + + Where foo->v4l2_dev is of type struct v4l2_device. + + Finally, remove all control functions from your v4l2_ioctl_ops: + vidioc_queryctrl, vidioc_querymenu, vidioc_g_ctrl, vidioc_s_ctrl, + vidioc_g_ext_ctrls, vidioc_try_ext_ctrls and vidioc_s_ext_ctrls. + Those are now no longer needed. + +1.3.2) For sub-device drivers do this: + + struct foo_dev { + ... + struct v4l2_subdev sd; + ... + struct v4l2_ctrl_handler ctrl_handler; + ... + }; + + foo->sd.ctrl_handler = &foo->ctrl_handler; + + Where foo->sd is of type struct v4l2_subdev. + + And set all core control ops in your struct v4l2_subdev_core_ops to these + helpers: + + .queryctrl = v4l2_subdev_queryctrl, + .querymenu = v4l2_subdev_querymenu, + .g_ctrl = v4l2_subdev_g_ctrl, + .s_ctrl = v4l2_subdev_s_ctrl, + .g_ext_ctrls = v4l2_subdev_g_ext_ctrls, + .try_ext_ctrls = v4l2_subdev_try_ext_ctrls, + .s_ext_ctrls = v4l2_subdev_s_ext_ctrls, + + Note: this is a temporary solution only. Once all V4L2 drivers that depend + on subdev drivers are converted to the control framework these helpers will + no longer be needed. + +1.4) Clean up the handler at the end: + + v4l2_ctrl_handler_free(&foo->ctrl_handler); + + +2) Add controls: + +You add non-menu controls by calling v4l2_ctrl_new_std: + + struct v4l2_ctrl *v4l2_ctrl_new_std(struct v4l2_ctrl_handler *hdl, + const struct v4l2_ctrl_ops *ops, + u32 id, s32 min, s32 max, u32 step, s32 def); + +Menu controls are added by calling v4l2_ctrl_new_std_menu: + + struct v4l2_ctrl *v4l2_ctrl_new_std_menu(struct v4l2_ctrl_handler *hdl, + const struct v4l2_ctrl_ops *ops, + u32 id, s32 max, s32 skip_mask, s32 def); + +These functions are typically called right after the v4l2_ctrl_handler_init: + + v4l2_ctrl_handler_init(&foo->ctrl_handler, nr_of_controls); + v4l2_ctrl_new_std(&foo->ctrl_handler, &foo_ctrl_ops, + V4L2_CID_BRIGHTNESS, 0, 255, 1, 128); + v4l2_ctrl_new_std(&foo->ctrl_handler, &foo_ctrl_ops, + V4L2_CID_CONTRAST, 0, 255, 1, 128); + v4l2_ctrl_new_std_menu(&foo->ctrl_handler, &foo_ctrl_ops, + V4L2_CID_POWER_LINE_FREQUENCY, + V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, + V4L2_CID_POWER_LINE_FREQUENCY_DISABLED); + ... + if (foo->ctrl_handler.error) { + int err = foo->ctrl_handler.error; + + v4l2_ctrl_handler_free(&foo->ctrl_handler); + return err; + } + +The v4l2_ctrl_new_std function returns the v4l2_ctrl pointer to the new +control, but if you do not need to access the pointer outside the control ops, +then there is no need to store it. + +The v4l2_ctrl_new_std function will fill in most fields based on the control +ID except for the min, max, step and default values. These are passed in the +last four arguments. These values are driver specific while control attributes +like type, name, flags are all global. The control's current value will be set +to the default value. + +The v4l2_ctrl_new_std_menu function is very similar but it is used for menu +controls. There is no min argument since that is always 0 for menu controls, +and instead of a step there is a skip_mask argument: if bit X is 1, then menu +item X is skipped. + +Note that if something fails, the function will return NULL or an error and +set ctrl_handler->error to the error code. If ctrl_handler->error was already +set, then it will just return and do nothing. This is also true for +v4l2_ctrl_handler_init if it cannot allocate the internal data structure. + +This makes it easy to init the handler and just add all controls and only check +the error code at the end. Saves a lot of repetitive error checking. + +It is recommended to add controls in ascending control ID order: it will be +a bit faster that way. + +3) Optionally force initial control setup: + + v4l2_ctrl_handler_setup(&foo->ctrl_handler); + +This will call s_ctrl for all controls unconditionally. Effectively this +initializes the hardware to the default control values. It is recommended +that you do this as this ensures that both the internal data structures and +the hardware are in sync. + +4) Finally: implement the v4l2_ctrl_ops + + static const struct v4l2_ctrl_ops foo_ctrl_ops = { + .s_ctrl = foo_s_ctrl, + }; + +Usually all you need is s_ctrl: + + static int foo_s_ctrl(struct v4l2_ctrl *ctrl) + { + struct foo *state = container_of(ctrl->handler, struct foo, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_BRIGHTNESS: + write_reg(0x123, ctrl->val); + break; + case V4L2_CID_CONTRAST: + write_reg(0x456, ctrl->val); + break; + } + return 0; + } + +The control ops are called with the v4l2_ctrl pointer as argument. +The new control value has already been validated, so all you need to do is +to actually update the hardware registers. + +You're done! And this is sufficient for most of the drivers we have. No need +to do any validation of control values, or implement QUERYCTRL/QUERYMENU. And +G/S_CTRL as well as G/TRY/S_EXT_CTRLS are automatically supported. + + +============================================================================== + +The remainder of this document deals with more advanced topics and scenarios. +In practice the basic usage as described above is sufficient for most drivers. + +=============================================================================== + + +Inheriting Controls +=================== + +When a sub-device is registered with a V4L2 driver by calling +v4l2_device_register_subdev() and the ctrl_handler fields of both v4l2_subdev +and v4l2_device are set, then the controls of the subdev will become +automatically available in the V4L2 driver as well. If the subdev driver +contains controls that already exist in the V4L2 driver, then those will be +skipped (so a V4L2 driver can always override a subdev control). + +What happens here is that v4l2_device_register_subdev() calls +v4l2_ctrl_add_handler() adding the controls of the subdev to the controls +of v4l2_device. + + +Accessing Control Values +======================== + +The v4l2_ctrl struct contains these two unions: + + /* The current control value. */ + union { + s32 val; + s64 val64; + char *string; + } cur; + + /* The new control value. */ + union { + s32 val; + s64 val64; + char *string; + }; + +Within the control ops you can freely use these. The val and val64 speak for +themselves. The string pointers point to character buffers of length +ctrl->maximum + 1, and are always 0-terminated. + +In most cases 'cur' contains the current cached control value. When you create +a new control this value is made identical to the default value. After calling +v4l2_ctrl_handler_setup() this value is passed to the hardware. It is generally +a good idea to call this function. + +Whenever a new value is set that new value is automatically cached. This means +that most drivers do not need to implement the g_volatile_ctrl() op. The +exception is for controls that return a volatile register such as a signal +strength read-out that changes continuously. In that case you will need to +implement g_volatile_ctrl like this: + + static int foo_g_volatile_ctrl(struct v4l2_ctrl *ctrl) + { + switch (ctrl->id) { + case V4L2_CID_BRIGHTNESS: + ctrl->cur.val = read_reg(0x123); + break; + } + } + +The 'new value' union is not used in g_volatile_ctrl. In general controls +that need to implement g_volatile_ctrl are read-only controls. + +To mark a control as volatile you have to set the is_volatile flag: + + ctrl = v4l2_ctrl_new_std(&sd->ctrl_handler, ...); + if (ctrl) + ctrl->is_volatile = 1; + +For try/s_ctrl the new values (i.e. as passed by the user) are filled in and +you can modify them in try_ctrl or set them in s_ctrl. The 'cur' union +contains the current value, which you can use (but not change!) as well. + +If s_ctrl returns 0 (OK), then the control framework will copy the new final +values to the 'cur' union. + +While in g_volatile/s/try_ctrl you can access the value of all controls owned +by the same handler since the handler's lock is held. If you need to access +the value of controls owned by other handlers, then you have to be very careful +not to introduce deadlocks. + +Outside of the control ops you have to go through to helper functions to get +or set a single control value safely in your driver: + + s32 v4l2_ctrl_g_ctrl(struct v4l2_ctrl *ctrl); + int v4l2_ctrl_s_ctrl(struct v4l2_ctrl *ctrl, s32 val); + +These functions go through the control framework just as VIDIOC_G/S_CTRL ioctls +do. Don't use these inside the control ops g_volatile/s/try_ctrl, though, that +will result in a deadlock since these helpers lock the handler as well. + +You can also take the handler lock yourself: + + mutex_lock(&state->ctrl_handler.lock); + printk(KERN_INFO "String value is '%s'\n", ctrl1->cur.string); + printk(KERN_INFO "Integer value is '%s'\n", ctrl2->cur.val); + mutex_unlock(&state->ctrl_handler.lock); + + +Menu Controls +============= + +The v4l2_ctrl struct contains this union: + + union { + u32 step; + u32 menu_skip_mask; + }; + +For menu controls menu_skip_mask is used. What it does is that it allows you +to easily exclude certain menu items. This is used in the VIDIOC_QUERYMENU +implementation where you can return -EINVAL if a certain menu item is not +present. Note that VIDIOC_QUERYCTRL always returns a step value of 1 for +menu controls. + +A good example is the MPEG Audio Layer II Bitrate menu control where the +menu is a list of standardized possible bitrates. But in practice hardware +implementations will only support a subset of those. By setting the skip +mask you can tell the framework which menu items should be skipped. Setting +it to 0 means that all menu items are supported. + +You set this mask either through the v4l2_ctrl_config struct for a custom +control, or by calling v4l2_ctrl_new_std_menu(). + + +Custom Controls +=============== + +Driver specific controls can be created using v4l2_ctrl_new_custom(): + + static const struct v4l2_ctrl_config ctrl_filter = { + .ops = &ctrl_custom_ops, + .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER, + .name = "Spatial Filter", + .type = V4L2_CTRL_TYPE_INTEGER, + .flags = V4L2_CTRL_FLAG_SLIDER, + .max = 15, + .step = 1, + }; + + ctrl = v4l2_ctrl_new_custom(&foo->ctrl_handler, &ctrl_filter, NULL); + +The last argument is the priv pointer which can be set to driver-specific +private data. + +The v4l2_ctrl_config struct also has fields to set the is_private and is_volatile +flags. + +If the name field is not set, then the framework will assume this is a standard +control and will fill in the name, type and flags fields accordingly. + + +Active and Grabbed Controls +=========================== + +If you get more complex relationships between controls, then you may have to +activate and deactivate controls. For example, if the Chroma AGC control is +on, then the Chroma Gain control is inactive. That is, you may set it, but +the value will not be used by the hardware as long as the automatic gain +control is on. Typically user interfaces can disable such input fields. + +You can set the 'active' status using v4l2_ctrl_activate(). By default all +controls are active. Note that the framework does not check for this flag. +It is meant purely for GUIs. The function is typically called from within +s_ctrl. + +The other flag is the 'grabbed' flag. A grabbed control means that you cannot +change it because it is in use by some resource. Typical examples are MPEG +bitrate controls that cannot be changed while capturing is in progress. + +If a control is set to 'grabbed' using v4l2_ctrl_grab(), then the framework +will return -EBUSY if an attempt is made to set this control. The +v4l2_ctrl_grab() function is typically called from the driver when it +starts or stops streaming. + + +Control Clusters +================ + +By default all controls are independent from the others. But in more +complex scenarios you can get dependencies from one control to another. +In that case you need to 'cluster' them: + + struct foo { + struct v4l2_ctrl_handler ctrl_handler; +#define AUDIO_CL_VOLUME (0) +#define AUDIO_CL_MUTE (1) + struct v4l2_ctrl *audio_cluster[2]; + ... + }; + + state->audio_cluster[AUDIO_CL_VOLUME] = + v4l2_ctrl_new_std(&state->ctrl_handler, ...); + state->audio_cluster[AUDIO_CL_MUTE] = + v4l2_ctrl_new_std(&state->ctrl_handler, ...); + v4l2_ctrl_cluster(ARRAY_SIZE(state->audio_cluster), state->audio_cluster); + +From now on whenever one or more of the controls belonging to the same +cluster is set (or 'gotten', or 'tried'), only the control ops of the first +control ('volume' in this example) is called. You effectively create a new +composite control. Similar to how a 'struct' works in C. + +So when s_ctrl is called with V4L2_CID_AUDIO_VOLUME as argument, you should set +all two controls belonging to the audio_cluster: + + static int foo_s_ctrl(struct v4l2_ctrl *ctrl) + { + struct foo *state = container_of(ctrl->handler, struct foo, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_AUDIO_VOLUME: { + struct v4l2_ctrl *mute = ctrl->cluster[AUDIO_CL_MUTE]; + + write_reg(0x123, mute->val ? 0 : ctrl->val); + break; + } + case V4L2_CID_CONTRAST: + write_reg(0x456, ctrl->val); + break; + } + return 0; + } + +In the example above the following are equivalent for the VOLUME case: + + ctrl == ctrl->cluster[AUDIO_CL_VOLUME] == state->audio_cluster[AUDIO_CL_VOLUME] + ctrl->cluster[AUDIO_CL_MUTE] == state->audio_cluster[AUDIO_CL_MUTE] + +Note that controls in a cluster may be NULL. For example, if for some +reason mute was never added (because the hardware doesn't support that +particular feature), then mute will be NULL. So in that case we have a +cluster of 2 controls, of which only 1 is actually instantiated. The +only restriction is that the first control of the cluster must always be +present, since that is the 'master' control of the cluster. The master +control is the one that identifies the cluster and that provides the +pointer to the v4l2_ctrl_ops struct that is used for that cluster. + +Obviously, all controls in the cluster array must be initialized to either +a valid control or to NULL. + + +VIDIOC_LOG_STATUS Support +========================= + +This ioctl allow you to dump the current status of a driver to the kernel log. +The v4l2_ctrl_handler_log_status(ctrl_handler, prefix) can be used to dump the +value of the controls owned by the given handler to the log. You can supply a +prefix as well. If the prefix didn't end with a space, then ': ' will be added +for you. + + +Different Handlers for Different Video Nodes +============================================ + +Usually the V4L2 driver has just one control handler that is global for +all video nodes. But you can also specify different control handlers for +different video nodes. You can do that by manually setting the ctrl_handler +field of struct video_device. + +That is no problem if there are no subdevs involved but if there are, then +you need to block the automatic merging of subdev controls to the global +control handler. You do that by simply setting the ctrl_handler field in +struct v4l2_device to NULL. Now v4l2_device_register_subdev() will no longer +merge subdev controls. + +After each subdev was added, you will then have to call v4l2_ctrl_add_handler +manually to add the subdev's control handler (sd->ctrl_handler) to the desired +control handler. This control handler may be specific to the video_device or +for a subset of video_device's. For example: the radio device nodes only have +audio controls, while the video and vbi device nodes share the same control +handler for the audio and video controls. + +If you want to have one handler (e.g. for a radio device node) have a subset +of another handler (e.g. for a video device node), then you should first add +the controls to the first handler, add the other controls to the second +handler and finally add the first handler to the second. For example: + + v4l2_ctrl_new_std(&radio_ctrl_handler, &radio_ops, V4L2_CID_AUDIO_VOLUME, ...); + v4l2_ctrl_new_std(&radio_ctrl_handler, &radio_ops, V4L2_CID_AUDIO_MUTE, ...); + v4l2_ctrl_new_std(&video_ctrl_handler, &video_ops, V4L2_CID_BRIGHTNESS, ...); + v4l2_ctrl_new_std(&video_ctrl_handler, &video_ops, V4L2_CID_CONTRAST, ...); + v4l2_ctrl_add_handler(&video_ctrl_handler, &radio_ctrl_handler); + +Or you can add specific controls to a handler: + + volume = v4l2_ctrl_new_std(&video_ctrl_handler, &ops, V4L2_CID_AUDIO_VOLUME, ...); + v4l2_ctrl_new_std(&video_ctrl_handler, &ops, V4L2_CID_BRIGHTNESS, ...); + v4l2_ctrl_new_std(&video_ctrl_handler, &ops, V4L2_CID_CONTRAST, ...); + v4l2_ctrl_add_ctrl(&radio_ctrl_handler, volume); + +What you should not do is make two identical controls for two handlers. +For example: + + v4l2_ctrl_new_std(&radio_ctrl_handler, &radio_ops, V4L2_CID_AUDIO_MUTE, ...); + v4l2_ctrl_new_std(&video_ctrl_handler, &video_ops, V4L2_CID_AUDIO_MUTE, ...); + +This would be bad since muting the radio would not change the video mute +control. The rule is to have one control for each hardware 'knob' that you +can twiddle. + + +Finding Controls +================ + +Normally you have created the controls yourself and you can store the struct +v4l2_ctrl pointer into your own struct. + +But sometimes you need to find a control from another handler that you do +not own. For example, if you have to find a volume control from a subdev. + +You can do that by calling v4l2_ctrl_find: + + struct v4l2_ctrl *volume; + + volume = v4l2_ctrl_find(sd->ctrl_handler, V4L2_CID_AUDIO_VOLUME); + +Since v4l2_ctrl_find will lock the handler you have to be careful where you +use it. For example, this is not a good idea: + + struct v4l2_ctrl_handler ctrl_handler; + + v4l2_ctrl_new_std(&ctrl_handler, &video_ops, V4L2_CID_BRIGHTNESS, ...); + v4l2_ctrl_new_std(&ctrl_handler, &video_ops, V4L2_CID_CONTRAST, ...); + +...and in video_ops.s_ctrl: + + case V4L2_CID_BRIGHTNESS: + contrast = v4l2_find_ctrl(&ctrl_handler, V4L2_CID_CONTRAST); + ... + +When s_ctrl is called by the framework the ctrl_handler.lock is already taken, so +attempting to find another control from the same handler will deadlock. + +It is recommended not to use this function from inside the control ops. + + +Inheriting Controls +=================== + +When one control handler is added to another using v4l2_ctrl_add_handler, then +by default all controls from one are merged to the other. But a subdev might +have low-level controls that make sense for some advanced embedded system, but +not when it is used in consumer-level hardware. In that case you want to keep +those low-level controls local to the subdev. You can do this by simply +setting the 'is_private' flag of the control to 1: + + static const struct v4l2_ctrl_config ctrl_private = { + .ops = &ctrl_custom_ops, + .id = V4L2_CID_..., + .name = "Some Private Control", + .type = V4L2_CTRL_TYPE_INTEGER, + .max = 15, + .step = 1, + .is_private = 1, + }; + + ctrl = v4l2_ctrl_new_custom(&foo->ctrl_handler, &ctrl_private, NULL); + +These controls will now be skipped when v4l2_ctrl_add_handler is called. + + +V4L2_CTRL_TYPE_CTRL_CLASS Controls +================================== + +Controls of this type can be used by GUIs to get the name of the control class. +A fully featured GUI can make a dialog with multiple tabs with each tab +containing the controls belonging to a particular control class. The name of +each tab can be found by querying a special control with ID . + +Drivers do not have to care about this. The framework will automatically add +a control of this type whenever the first control belonging to a new control +class is added. + + +Differences from the Spec +========================= + +There are a few places where the framework acts slightly differently from the +V4L2 Specification. Those differences are described in this section. We will +have to see whether we need to adjust the spec or not. + +1) It is no longer required to have all controls contained in a +v4l2_ext_control array be from the same control class. The framework will be +able to handle any type of control in the array. You need to set ctrl_class +to 0 in order to enable this. If ctrl_class is non-zero, then it will still +check that all controls belong to that control class. + +If you set ctrl_class to 0 and count to 0, then it will only return an error +if there are no controls at all. + +2) Clarified the way error_idx works. For get and set it will be equal to +count if nothing was done yet. If it is less than count then only the controls +up to error_idx-1 were successfully applied. + +3) When attempting to read a button control the framework will return -EACCES +instead of -EINVAL as stated in the spec. It seems to make more sense since +button controls are write-only controls. + +4) Attempting to write to a read-only control will return -EACCES instead of +-EINVAL as the spec says. + +5) The spec does not mention what should happen when you try to set/get a +control class controls. ivtv currently returns -EINVAL (indicating that the +control ID does not exist) while the framework will return -EACCES, which +makes more sense. + + +Proposals for Extensions +======================== + +Some ideas for future extensions to the spec: + +1) Add a V4L2_CTRL_FLAG_HEX to have values shown as hexadecimal instead of +decimal. Useful for e.g. video_mute_yuv. + +2) It is possible to mark in the controls array which controls have been +successfully written and which failed by for example adding a bit to the +control ID. Not sure if it is worth the effort, though. + +3) Trying to set volatile inactive controls should result in -EACCESS. + +4) Add a new flag to mark volatile controls. Any application that wants +to store the state of the controls can then skip volatile inactive controls. +Currently it is not possible to detect such controls. diff --git a/Documentation/video4linux/w9966.txt b/Documentation/video4linux/w9966.txt index 78a651254b84..855024525fd2 100644 --- a/Documentation/video4linux/w9966.txt +++ b/Documentation/video4linux/w9966.txt @@ -24,7 +24,7 @@ where every two pixels take 4 bytes. In SDL (www.libsdl.org) this format is called VIDEO_PALETTE_YUV422 (16 bpp). A minimal test application (with source) is available from: - http://hem.fyristorg.com/mogul/w9966.html + http://www.slackwaresupport.com/howtos/Webcam-HOWTO The slow framerate is due to missing DMA ECP read support in the parport drivers. I might add working EPP support later. diff --git a/Documentation/vm/page-types.c b/Documentation/vm/page-types.c index 66e9358e2144..ccd951fa94ee 100644 --- a/Documentation/vm/page-types.c +++ b/Documentation/vm/page-types.c @@ -694,7 +694,7 @@ static void usage(void) #endif " -l|--list Show page details in ranges\n" " -L|--list-each Show page details one by one\n" -" -N|--no-summary Don't show summay info\n" +" -N|--no-summary Don't show summary info\n" " -X|--hwpoison hwpoison pages\n" " -x|--unpoison unpoison pages\n" " -h|--help Show this usage message\n" diff --git a/Documentation/w1/masters/ds2482 b/Documentation/w1/masters/ds2482 index 299b91c7609f..56f8edace6ac 100644 --- a/Documentation/w1/masters/ds2482 +++ b/Documentation/w1/masters/ds2482 @@ -6,8 +6,8 @@ Supported chips: Prefix: 'ds2482' Addresses scanned: None Datasheets: - http://pdfserv.maxim-ic.com/en/ds/DS2482-100-DS2482S-100.pdf - http://pdfserv.maxim-ic.com/en/ds/DS2482-800-DS2482S-800.pdf + http://datasheets.maxim-ic.com/en/ds/DS2482-100.pdf + http://datasheets.maxim-ic.com/en/ds/DS2482-800.pdf Author: Ben Gardner diff --git a/Documentation/w1/masters/mxc-w1 b/Documentation/w1/masters/mxc-w1 index 97f6199a7f39..38be1ad65532 100644 --- a/Documentation/w1/masters/mxc-w1 +++ b/Documentation/w1/masters/mxc-w1 @@ -5,7 +5,8 @@ Supported chips: * Freescale MX27, MX31 and probably other i.MX SoCs Datasheets: http://www.freescale.com/files/32bit/doc/data_sheet/MCIMX31.pdf?fpsp=1 - http://www.freescale.com/files/dsp/MCIMX27.pdf?fpsp=1 + http://cache.freescale.com/files/dsp/doc/archive/MCIMX27.pdf?fsrch=1&WT_TYPE= + Data%20Sheets&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation Author: Originally based on Freescale code, prepared for mainline by Sascha Hauer diff --git a/Documentation/w1/masters/omap-hdq b/Documentation/w1/masters/omap-hdq index ca722e09b6a1..884dc284b215 100644 --- a/Documentation/w1/masters/omap-hdq +++ b/Documentation/w1/masters/omap-hdq @@ -7,7 +7,7 @@ Supported chips: A useful link about HDQ basics: =============================== -http://focus.ti.com/lit/an/slua408/slua408.pdf +http://focus.ti.com/lit/an/slua408a/slua408a.pdf Description: ============ diff --git a/Documentation/x86/zero-page.txt b/Documentation/x86/zero-page.txt index feb37e177010..cf5437deda81 100644 --- a/Documentation/x86/zero-page.txt +++ b/Documentation/x86/zero-page.txt @@ -18,6 +18,7 @@ Offset Proto Name Meaning 080/010 ALL hd0_info hd0 disk parameter, OBSOLETE!! 090/010 ALL hd1_info hd1 disk parameter, OBSOLETE!! 0A0/010 ALL sys_desc_table System description table (struct sys_desc_table) +0B0/010 ALL olpc_ofw_header OLPC's OpenFirmware CIF and friends 140/080 ALL edid_info Video mode setup (struct edid_info) 1C0/020 ALL efi_info EFI 32 information (struct efi_info) 1E0/004 ALL alk_mem_k Alternative mem check, in KB diff --git a/Documentation/zh_CN/HOWTO b/Documentation/zh_CN/HOWTO index 3d80e8af36ec..69160779e432 100644 --- a/Documentation/zh_CN/HOWTO +++ b/Documentation/zh_CN/HOWTO @@ -112,7 +112,7 @@ Linux内核代ç ä¸­åŒ…å«æœ‰å¤§é‡çš„文档。这些文档对于学习如何与 其他关于如何正确地生æˆè¡¥ä¸çš„优秀文档包括： "The Perfect Patch" - http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt + http://userweb.kernel.org/~akpm/stuff/tpp.txt "Linux kernel patch submission format" http://linux.yyz.us/patch-format.html @@ -168,7 +168,7 @@ Linux内核代ç ä¸­åŒ…å«æœ‰å¤§é‡çš„文档。这些文档对于学习如何与 如果你想加入内核开å‘社区并å助完æˆä¸€äº›ä»»åŠ¡ï¼Œå´æ‰¾ä¸åˆ°ä»Žå“ªé‡Œå¼€å§‹ï¼Œå¯ä»¥è®¿é—® “Linux内核房管员â€è®¡åˆ’： - http://janitor.kernelnewbies.org/ + http://kernelnewbies.org/KernelJanitors 这是æžä½³çš„起点。它æ供一个相对简å•çš„任务列表，列出内核代ç ä¸­éœ€è¦è¢«é‡æ–° æ•´ç†æˆ–者改正的地方。通过和负责这个计划的开å‘者们一åŒå·¥ä½œï¼Œä½ ä¼šå­¦åˆ°å°†è¡¥ä¸ 集æˆè¿›å†…核的基本原ç†ã€‚如果还没有决定下一步è¦åšä»€ä¹ˆçš„è¯ï¼Œä½ è¿˜å¯èƒ½ä¼šå¾—到方 @@ -515,7 +515,7 @@ Linux内核社区并ä¸å–œæ¬¢ä¸€ä¸‹æŽ¥æ”¶å¤§æ®µçš„代ç ã€‚修改需è¦è¢«æ°å½“ 想了解它具体应该看起æ¥åƒä»€ä¹ˆï¼Œè¯·æŸ¥é˜…以下文档中的“ChangeLogâ€ç« èŠ‚： “The Perfect Patch†- http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt + http://userweb.kernel.org/~akpm/stuff/tpp.txt 这些事情有时候åšèµ·æ¥å¾ˆéš¾ã€‚è¦åœ¨ä»»ä½•æ–¹é¢éƒ½åšåˆ°å®Œç¾Žå¯èƒ½éœ€è¦å¥½å‡ å¹´æ—¶é—´ã€‚这是 @@ -525,7 +525,7 @@ Linux内核社区并ä¸å–œæ¬¢ä¸€ä¸‹æŽ¥æ”¶å¤§æ®µçš„代ç ã€‚修改需è¦è¢«æ°å½“ --------------- æ„Ÿè°¢Paolo Ciarrocchiå…许“开å‘æµç¨‹â€éƒ¨åˆ†åŸºäºŽä»–所写的文章 -(http://linux.tar.bz/articles/2.6-development_process)，感谢Randy +(http://www.kerneltravel.net/newbie/2.6-development_process)，感谢Randy Dunlapå’ŒGerrit Huizenga完善了应该说和ä¸è¯¥è¯´çš„列表。感谢Pat Mochel, Hanna Linder, Randy Dunlap, Kay Sievers, Vojtech Pavlik, Jan Kara, Josh Boyer, Kees Cook, Andrew Morton, Andi Kleen, Vadim Lobanov, Jesper Juhl, Adrian diff --git a/Documentation/zh_CN/SubmittingDrivers b/Documentation/zh_CN/SubmittingDrivers index 5f4815c63ec7..c27b0f6cdd39 100644 --- a/Documentation/zh_CN/SubmittingDrivers +++ b/Documentation/zh_CN/SubmittingDrivers @@ -165,4 +165,4 @@ Linux USB项目： http://www.fenrus.org/how-to-not-write-a-device-driver-paper.pdf 内核清æ´å·¥ (Kernel Janitor): - http://janitor.kernelnewbies.org/ + http://kernelnewbies.org/KernelJanitors diff --git a/Documentation/zh_CN/SubmittingPatches b/Documentation/zh_CN/SubmittingPatches index 985c92e20b73..9a1a6e1ed09e 100644 --- a/Documentation/zh_CN/SubmittingPatches +++ b/Documentation/zh_CN/SubmittingPatches @@ -83,7 +83,7 @@ Quilt: http://savannah.nongnu.org/projects/quilt Andrew Morton çš„è¡¥ä¸è„šæœ¬: -http://www.zip.com.au/~akpm/linux/patches/ +http://userweb.kernel.org/~akpm/stuff/patch-scripts.tar.gz 作为这些脚本的替代，quilt 是值得推èçš„è¡¥ä¸ç®¡ç†å·¥å…·(看上é¢çš„链接)。 2)æ述你的改动。 @@ -166,7 +166,7 @@ MAITAINERS 文件里的）å‘é€ä¸€ä¸ªæ‰‹å†Œé¡µï¼ˆman-pages）补ä¸ï¼Œæˆ–者至 人拷è´ï¼Œåªè¦å®ƒæ˜¯ç碎的） 任何文件的作者/维护者对该文件的改动（例如 patch monkey 在é‡ä¼ æ¨¡å¼ä¸‹ï¼‰ -URL: +EMAIL: trivial@kernel.org (译注，关于“ç碎补ä¸â€çš„一些说明：因为原文的这一部分写得比较简å•ï¼Œæ‰€ä»¥ä¸å¾—ä¸ è¿ä¾‹å†™ä¸€ä¸‹è¯‘注。"trivial"这个英文å•è¯çš„本æ„是“ç碎的，ä¸é‡è¦çš„。â€ä½†æ˜¯åœ¨è¿™é‡Œ @@ -394,7 +394,7 @@ Static inline 函数相比å®æ¥è¯´ï¼Œæ˜¯å¥½å¾—多的选择。Static inline 函 ---------------- Andrew Morton, "The perfect patch" (tpp). - + Jeff Garzik, "Linux kernel patch submission format". diff --git a/Documentation/zh_CN/sparse.txt b/Documentation/zh_CN/sparse.txt index 75992a603ae3..cc144e581515 100644 --- a/Documentation/zh_CN/sparse.txt +++ b/Documentation/zh_CN/sparse.txt @@ -22,7 +22,7 @@ Documentation/sparse.txt 的中文翻译 --------------------------------------------------------------------- Copyright 2004 Linus Torvalds -Copyright 2004 Pavel Machek +Copyright 2004 Pavel Machek Copyright 2006 Bob Copeland 使用 sparse 工具åšç±»åž‹æ£€æŸ¥ diff --git a/MAINTAINERS b/MAINTAINERS index 02f75fccac20..b5b8baa1d70e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -313,11 +313,9 @@ S: Maintained F: drivers/hwmon/adm1029.c ADM8211 WIRELESS DRIVER -M: Michael Wu L: linux-wireless@vger.kernel.org W: http://linuxwireless.org/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/mwu/mac80211-drivers.git -S: Maintained +S: Orphan F: drivers/net/wireless/adm8211.* ADT746X FAN DRIVER @@ -576,7 +574,6 @@ L: linux-mtd@lists.infradead.org S: Maintained F: drivers/mtd/nand/bcm_umi_nand.c F: drivers/mtd/nand/bcm_umi_bch.c -F: drivers/mtd/nand/bcm_umi_hamming.c F: drivers/mtd/nand/nand_bcm_umi.h ARM/CAVIUM NETWORKS CNS3XXX MACHINE SUPPORT @@ -619,10 +616,10 @@ M: Richard Purdie S: Maintained ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE -M: Paulius Zaleckas +M: Hans Ulli Kroll L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -T: git git://gitorious.org/linux-gemini/mainline.git -S: Odd Fixes +T: git git://git.berlios.de/gemini-board +S: Maintained F: arch/arm/mach-gemini/ ARM/EBSA110 MACHINE SUPPORT @@ -644,9 +641,10 @@ T: topgit git://git.openezx.org/openezx.git F: arch/arm/mach-pxa/ezx.c ARM/FARADAY FA526 PORT -M: Paulius Zaleckas +M: Hans Ulli Kroll L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Odd Fixes +S: Maintained +T: git://git.berlios.de/gemini-board F: arch/arm/mm/*-fa* ARM/FOOTBRIDGE ARCHITECTURE @@ -695,6 +693,13 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/kristoffer/linux-hpc.git F: arch/arm/mach-sa1100/jornada720.c F: arch/arm/mach-sa1100/include/mach/jornada720.h +ARM/INCOME PXA270 SUPPORT +M: Marek Vasut +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: arch/arm/mach-pxa/income.c +F: arch/arm/mach-pxa/include/mach-pxa/income.h + ARM/INTEL IOP32X ARM ARCHITECTURE M: Lennert Buytenhek M: Dan Williams @@ -950,8 +955,9 @@ ARM/SHMOBILE ARM ARCHITECTURE M: Paul Mundt M: Magnus Damm L: linux-sh@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/genesis-2.6.git W: http://oss.renesas.com +Q: http://patchwork.kernel.org/project/linux-sh/list/ +T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/genesis-2.6.git S: Supported F: arch/arm/mach-shmobile/ F: drivers/sh/ @@ -977,12 +983,11 @@ F: drivers/input/keyboard/w90p910_keypad.c F: drivers/input/touchscreen/w90p910_ts.c F: drivers/watchdog/nuc900_wdt.c F: drivers/net/arm/w90p910_ether.c -F: drivers/mtd/nand/w90p910_nand.c +F: drivers/mtd/nand/nuc900_nand.c F: drivers/rtc/rtc-nuc900.c F: drivers/spi/spi_nuc900.c F: drivers/usb/host/ehci-w90x900.c F: drivers/video/nuc900fb.c -F: drivers/sound/soc/nuc900/ ARM/U300 MACHINE SUPPORT M: Linus Walleij @@ -1012,14 +1017,14 @@ M: Marek Vasut L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm/mach-pxa/vpac270.c -F: arch/arm/mach-pxa/include/mach-pxa/vpac270.h +F: arch/arm/mach-pxa/include/mach/vpac270.h ARM/ZIPIT Z2 SUPPORT M: Marek Vasut L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm/mach-pxa/z2.c -F: arch/arm/mach-pxa/include/mach-pxa/z2.h +F: arch/arm/mach-pxa/include/mach/z2.h ASC7621 HARDWARE MONITOR DRIVER M: George Joseph @@ -1089,7 +1094,6 @@ F: drivers/net/wireless/ath/ath5k/ ATHEROS ATH9K WIRELESS DRIVER M: "Luis R. Rodriguez" M: Jouni Malinen -M: Sujith Manoharan M: Vasanthakumar Thiagarajan M: Senthil Balasubramanian L: linux-wireless@vger.kernel.org @@ -1255,8 +1259,7 @@ S: Maintained F: drivers/net/hamradio/baycom* BEFS FILE SYSTEM -M: "Sergey S. Kostyliov" -S: Maintained +S: Orphan F: Documentation/filesystems/befs.txt F: fs/befs/ @@ -1369,7 +1372,7 @@ BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER M: Eilon Greenstein L: netdev@vger.kernel.org S: Supported -F: drivers/net/bnx2x* +F: drivers/net/bnx2x/ BROADCOM TG3 GIGABIT ETHERNET DRIVER M: Matt Carlson @@ -1571,6 +1574,16 @@ L: platform-driver-x86@vger.kernel.org S: Supported F: drivers/platform/x86/classmate-laptop.c +COCCINELLE/Semantic Patches (SmPL) +M: Julia Lawall +M: Gilles Muller +M: Nicolas Palix +L: cocci@diku.dk (moderated for non-subscribers) +W: http://coccinelle.lip6.fr/ +S: Supported +F: scripts/coccinelle/ +F: scripts/coccicheck + CODA FILE SYSTEM M: Jan Harkes M: coda@cs.cmu.edu @@ -1726,6 +1739,8 @@ CRYPTOGRAPHIC RANDOM NUMBER GENERATOR M: Neil Horman L: linux-crypto@vger.kernel.org S: Maintained +F: crypto/ansi_cprng.c +F: crypto/rng.c CS5535 Audio ALSA driver M: Jaya Kumar @@ -1771,6 +1786,13 @@ W: http://www.openfabrics.org S: Supported F: drivers/infiniband/hw/cxgb4/ +CXGB4VF ETHERNET DRIVER (CXGB4VF) +M: Casey Leedom +L: netdev@vger.kernel.org +W: http://www.chelsio.com +S: Supported +F: drivers/net/cxgb4vf/ + CYBERPRO FB DRIVER M: Russell King L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) @@ -1877,6 +1899,7 @@ F: drivers/firmware/dcdbas.* DELL WMI EXTRAS DRIVER M: Matthew Garrett S: Maintained +F: drivers/platform/x86/dell-wmi.c DEVICE NUMBER REGISTRY M: Torben Mathiasen @@ -2006,6 +2029,7 @@ L: dri-devel@lists.freedesktop.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6.git S: Maintained F: drivers/gpu/drm/ +F: include/drm/ DSCC4 DRIVER M: Francois Romieu @@ -2188,6 +2212,12 @@ F: drivers/misc/cb710/ F: drivers/mmc/host/cb710-mmc.* F: include/linux/cb710.h +ENE KB2426 (ENE0100/ENE020XX) INFRARED RECEIVER +M: Maxim Levitsky +S: Maintained +F: drivers/media/IR/ene_ir.c +F: drivers/media/IR/ene_ir.h + EPSON 1355 FRAMEBUFFER DRIVER M: Christopher Hoover M: Christopher Hoover @@ -2222,6 +2252,7 @@ S: Maintained F: drivers/net/eth16i.c EXT2 FILE SYSTEM +M: Jan Kara L: linux-ext4@vger.kernel.org S: Maintained F: Documentation/filesystems/ext2.txt @@ -2229,8 +2260,9 @@ F: fs/ext2/ F: include/linux/ext2* EXT3 FILE SYSTEM +M: Jan Kara M: Andrew Morton -M: Andreas Dilger +M: Andreas Dilger L: linux-ext4@vger.kernel.org S: Maintained F: Documentation/filesystems/ext3.txt @@ -2239,7 +2271,7 @@ F: include/linux/ext3* EXT4 FILE SYSTEM M: "Theodore Ts'o" -M: Andreas Dilger +M: Andreas Dilger L: linux-ext4@vger.kernel.org W: http://ext4.wiki.kernel.org Q: http://patchwork.ozlabs.org/project/linux-ext4/list/ @@ -2307,6 +2339,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git S: Maintained F: drivers/firewire/ F: include/linux/firewire*.h +F: tools/firewire/ FIRMWARE LOADER (request_firmware) S: Orphan @@ -2620,6 +2653,14 @@ S: Maintained F: Documentation/blockdev/cpqarray.txt F: drivers/block/cpqarray.* +HEWLETT-PACKARD SMART ARRAY RAID DRIVER (hpsa) +M: Stephen M. Cameron +L: iss_storagedev@hp.com +S: Supported +F: Documentation/scsi/hpsa.txt +F: drivers/scsi/hpsa*.[ch] +F: include/linux/cciss*.h + HEWLETT-PACKARD SMART CISS RAID DRIVER (cciss) M: Mike Miller L: iss_storagedev@hp.com @@ -3184,6 +3225,13 @@ F: Documentation/video4linux/*.ivtv F: drivers/media/video/ivtv/ F: include/linux/ivtv* +JC42.4 TEMPERATURE SENSOR DRIVER +M: Guenter Roeck +L: lm-sensors@lm-sensors.org +S: Maintained +F: drivers/hwmon/jc42.c +F: Documentation/hwmon/jc42 + JFS FILESYSTEM M: Dave Kleikamp L: jfs-discussion@lists.sourceforge.net @@ -3253,8 +3301,8 @@ F: fs/autofs4/ KERNEL BUILD + files below scripts/ (unless maintained elsewhere) M: Michal Marek -T: git git://repo.or.cz/linux-kbuild.git for-next -T: git git://repo.or.cz/linux-kbuild.git for-linus +T: git git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6.git for-next +T: git git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6.git rc-fixes L: linux-kbuild@vger.kernel.org S: Maintained F: Documentation/kbuild/ @@ -3380,13 +3428,6 @@ F: include/linux/kmemleak.h F: mm/kmemleak.c F: mm/kmemleak-test.c -KMEMTRACE -M: Eduard - Gabriel Munteanu -S: Maintained -F: Documentation/trace/kmemtrace.txt -F: include/linux/kmemtrace.h -F: kernel/trace/kmemtrace.c - KPROBES M: Ananth N Mavinakayanahalli M: Anil S Keshavamurthy @@ -3502,6 +3543,7 @@ M: Marcelo Tosatti W: http://www.penguinppc.org/ L: linuxppc-dev@ozlabs.org S: Maintained +F: arch/powerpc/platforms/8xx/ LINUX FOR POWERPC EMBEDDED PPC83XX AND PPC85XX M: Kumar Gala @@ -3604,7 +3646,7 @@ M: Mike Frysinger M: Subrata Modak L: ltp-list@lists.sourceforge.net (subscribers-only) W: http://ltp.sourceforge.net/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/ltp.git +T: git git://ltp.git.sourceforge.net/gitroot/ltp/ltp-dev S: Maintained M32R ARCHITECTURE @@ -3686,7 +3728,7 @@ F: include/linux/mv643xx.h MARVELL MWL8K WIRELESS DRIVER M: Lennert Buytenhek L: linux-wireless@vger.kernel.org -S: Maintained +S: Odd Fixes F: drivers/net/wireless/mwl8k.c MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER @@ -3915,17 +3957,19 @@ L: netem@lists.linux-foundation.org S: Maintained F: net/sched/sch_netem.c -NETERION (S2IO) 10GbE DRIVER (xframe/vxge) -M: Ramkrishna Vepa -M: Rastapur Santosh -M: Sivakumar Subramani -M: Sreenivasa Honnur +NETERION 10GbE DRIVERS (s2io/vxge) +M: Ramkrishna Vepa +M: Sivakumar Subramani +M: Sreenivasa Honnur +M: Jon Mason L: netdev@vger.kernel.org W: http://trac.neterion.com/cgi-bin/trac.cgi/wiki/Linux?Anonymous W: http://trac.neterion.com/cgi-bin/trac.cgi/wiki/X3100Linux?Anonymous S: Supported F: Documentation/networking/s2io.txt F: drivers/net/s2io* +F: Documentation/networking/vxge.txt +F: drivers/net/vxge/ NETFILTER/IPTABLES/IPCHAINS P: Rusty Russell @@ -4024,7 +4068,7 @@ F: net/rfkill/ F: net/wireless/ F: include/net/ieee80211* F: include/linux/wireless.h -F: include/linux/iw_handler.h +F: include/net/iw_handler.h F: drivers/net/wireless/ NETWORKING DRIVERS @@ -4172,6 +4216,8 @@ M: David Brownell L: linux-usb@vger.kernel.org L: linux-omap@vger.kernel.org S: Maintained +F: drivers/usb/*/*omap* +F: arch/arm/*omap*/usb* OMFS FILESYSTEM M: Bob Copeland @@ -4272,10 +4318,9 @@ F: include/scsi/osd_* F: fs/exofs/ P54 WIRELESS DRIVER -M: Michael Wu +M: Christian Lamparter L: linux-wireless@vger.kernel.org -W: http://prism54.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/mwu/mac80211-drivers.git +W: http://wireless.kernel.org/en/users/Drivers/p54 S: Maintained F: drivers/net/wireless/p54/ @@ -4357,6 +4402,13 @@ M: Jim Cromie S: Maintained F: drivers/char/pc8736x_gpio.c +PC87427 HARDWARE MONITORING DRIVER +M: Jean Delvare +L: lm-sensors@lm-sensors.org +S: Maintained +F: Documentation/hwmon/pc87427 +F: drivers/hwmon/pc87427.c + PCA9532 LED DRIVER M: Riku Voipio S: Maintained @@ -4513,7 +4565,7 @@ F: drivers/net/pppox.c PPP OVER L2TP M: James Chapman S: Maintained -F: drivers/net/pppol2tp.c +F: net/l2tp/l2tp_ppp.c F: include/linux/if_pppol2tp.h PPS SUPPORT @@ -4537,14 +4589,9 @@ PRISM54 WIRELESS DRIVER M: "Luis R. Rodriguez" L: linux-wireless@vger.kernel.org W: http://prism54.org -S: Maintained +S: Obsolete F: drivers/net/wireless/prism54/ -PROMISE DC4030 CACHING DISK CONTROLLER DRIVER -M: Peter Denison -W: http://www.pnd-pc.demon.co.uk/promise/ -S: Maintained - PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER M: Mikael Pettersson L: linux-ide@vger.kernel.org @@ -4577,6 +4624,7 @@ PS3VRAM DRIVER M: Jim Paris L: cbe-oss-dev@ozlabs.org S: Maintained +F: drivers/block/ps3vram.c PTRACE SUPPORT M: Roland McGrath @@ -4717,7 +4765,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/ivd/rt2x00.git F: drivers/net/wireless/rt2x00/ RAMDISK RAM BLOCK DEVICE DRIVER -M: Nick Piggin +M: Nick Piggin S: Maintained F: Documentation/blockdev/ramdisk.txt F: drivers/block/brd.c @@ -4733,9 +4781,8 @@ S: Maintained F: drivers/rapidio/ RAYLINK/WEBGEAR 802.11 WIRELESS LAN DRIVER -M: Corey Thomas L: linux-wireless@vger.kernel.org -S: Maintained +S: Orphan F: drivers/net/wireless/ray* RCUTORTURE MODULE @@ -4804,8 +4851,8 @@ F: net/rfkill/ RICOH SMARTMEDIA/XD DRIVER M: Maxim Levitsky S: Maintained -F: drivers/mtd/nand/r822.c -F: drivers/mtd/nand/r822.h +F: drivers/mtd/nand/r852.c +F: drivers/mtd/nand/r852.h RISCOM8 DRIVER S: Orphan @@ -5061,6 +5108,14 @@ S: Supported F: include/linux/selinux* F: security/selinux/ +APPARMOR SECURITY MODULE +M: John Johansen +L: apparmor@lists.ubuntu.com (subscribers-only, general discussion) +W: apparmor.wiki.kernel.org +T: git git://git.kernel.org/pub/scm/linux/kernel/git/jj/apparmor-dev.git +S: Supported +F: security/apparmor/ + SENSABLE PHANTOM M: Jiri Slaby S: Maintained @@ -5224,6 +5279,20 @@ M: Nicolas Pitre S: Odd Fixes F: drivers/net/smc91x.* +SMM665 HARDWARE MONITOR DRIVER +M: Guenter Roeck +L: lm-sensors@lm-sensors.org +S: Maintained +F: Documentation/hwmon/smm665 +F: drivers/hwmon/smm665.c + +SMSC EMC2103 HARDWARE MONITOR DRIVER +M: Steve Glendinning +L: lm-sensors@lm-sensors.org +S: Supported +F: Documentation/hwmon/emc2103 +F: drivers/hwmon/emc2103.c + SMSC47B397 HARDWARE MONITOR DRIVER M: "Mark M. Hoffman" L: lm-sensors@lm-sensors.org @@ -5244,11 +5313,6 @@ L: netdev@vger.kernel.org S: Supported F: drivers/net/smsc9420.* -SMX UIO Interface -M: Ben Nizette -S: Maintained -F: drivers/uio/uio_smx.c - SN-IA64 (Itanium) SUB-PLATFORM M: Jes Sorensen L: linux-altix@sgi.com @@ -5336,7 +5400,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6.git S: Maintained F: arch/sparc/ -F: drivers/sbus +F: drivers/sbus/ SPARC SERIAL DRIVERS M: "David S. Miller" @@ -5378,7 +5442,8 @@ S: Maintained F: arch/arm/mach-spear*/clock.c F: arch/arm/mach-spear*/include/mach/clkdev.h F: arch/arm/plat-spear/clock.c -F: arch/arm/plat-spear/include/plat/clock.h and clkdev.h +F: arch/arm/plat-spear/include/plat/clkdev.h +F: arch/arm/plat-spear/include/plat/clock.h SPEAR PAD MULTIPLEXING SUPPORT M: Viresh Kumar @@ -5458,11 +5523,6 @@ M: Ion Badulescu S: Odd Fixes F: drivers/net/starfire* -STARMODE RADIO IP (STRIP) PROTOCOL DRIVER -S: Orphan -F: drivers/staging/strip/strip.c -F: include/linux/if_strip.h - STRADIS MPEG-2 DECODER DRIVER M: Nathan Laredo W: http://www.stradis.com/ @@ -5538,6 +5598,15 @@ W: http://tcp-lp-mod.sourceforge.net/ S: Maintained F: net/ipv4/tcp_lp.c +TEGRA SUPPORT +M: Colin Cross +M: Erik Gilling +M: Olof Johansson +L: linux-tegra@vger.kernel.org +T: git git://android.git.kernel.org/kernel/tegra.git +S: Supported +F: arch/arm/mach-tegra + TEHUTI ETHERNET DRIVER M: Alexander Indenbaum M: Andy Gospodarek @@ -5590,6 +5659,12 @@ F: include/linux/tipc*.h F: include/net/tipc/ F: net/tipc/ +TILE ARCHITECTURE +M: Chris Metcalf +W: http://www.tilera.com/scm/ +S: Supported +F: arch/tile/ + TLAN NETWORK DRIVER M: Samuel Chessman L: tlan-devel@lists.sourceforge.net (subscribers-only) @@ -5605,7 +5680,7 @@ L: tomoyo-users-en@lists.sourceforge.jp (subscribers-only, for developers and us L: tomoyo-dev@lists.sourceforge.jp (subscribers-only, for developers in Japanese) L: tomoyo-users@lists.sourceforge.jp (subscribers-only, for users in Japanese) W: http://tomoyo.sourceforge.jp/ -T: quilt http://svn.sourceforge.jp/svnroot/tomoyo/trunk/2.2.x/tomoyo-lsm/patches/ +T: quilt http://svn.sourceforge.jp/svnroot/tomoyo/trunk/2.3.x/tomoyo-lsm/patches/ S: Maintained F: security/tomoyo/ @@ -5654,7 +5729,7 @@ TRACING M: Steven Rostedt M: Frederic Weisbecker M: Ingo Molnar -T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git tracing/core +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git perf/core S: Maintained F: Documentation/trace/ftrace.txt F: arch/*/*/*/ftrace.h @@ -5727,6 +5802,9 @@ UCLINUX FOR RENESAS H8/300 (H8300) M: Yoshinori Sato W: http://uclinux-h8.sourceforge.jp/ S: Supported +F: arch/h8300/ +F: drivers/ide/ide-h8300.c +F: drivers/net/ne-h8300.c UDF FILESYSTEM M: Jan Kara @@ -6018,7 +6096,7 @@ F: drivers/net/usb/usbnet.c F: include/linux/usb/usbnet.h USB VIDEO CLASS -M: Laurent Pinchart +M: Laurent Pinchart L: linux-uvc-devel@lists.berlios.de (subscribers-only) L: linux-media@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git @@ -6060,10 +6138,9 @@ F: Documentation/video4linux/zc0301.txt F: drivers/media/video/zc0301/ USB ZD1201 DRIVER -M: Jeroen Vreeken -L: linux-usb@vger.kernel.org +L: linux-wireless@vger.kernel.org W: http://linux-lc100020.sourceforge.net -S: Maintained +S: Orphan F: drivers/net/wireless/zd1201.* USB ZR364XX DRIVER @@ -6152,9 +6229,12 @@ F: drivers/mmc/host/via-sdmmc.c VIA UNICHROME(PRO)/CHROME9 FRAMEBUFFER DRIVER M: Joseph Chan -M: Scott Fang +M: Florian Tobias Schandinat L: linux-fbdev@vger.kernel.org S: Maintained +F: include/linux/via-core.h +F: include/linux/via-gpio.h +F: include/linux/via_i2c.h F: drivers/video/via/ VIA VELOCITY NETWORK DRIVER @@ -6251,14 +6331,6 @@ F: Documentation/watchdog/ F: drivers/watchdog/ F: include/linux/watchdog.h -WAVELAN NETWORK DRIVER & WIRELESS EXTENSIONS -M: Jean Tourrilhes -L: linux-wireless@vger.kernel.org -W: http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/ -S: Maintained -F: Documentation/networking/wavelan.txt -F: drivers/staging/wavelan/ - WD7000 SCSI DRIVER M: Miroslav Zagorac L: linux-scsi@vger.kernel.org @@ -6276,6 +6348,11 @@ M: linux-wimax@intel.com L: wimax@linuxwimax.org S: Supported W: http://linuxwimax.org +F: Documentation/wimax/README.wimax +F: include/linux/wimax.h +F: include/linux/wimax/debug.h +F: include/net/wimax.h +F: net/wimax/ WIMEDIA LLC PROTOCOL (WLP) SUBSYSTEM M: David Vrabel @@ -6325,8 +6402,9 @@ S: Supported F: drivers/input/touchscreen/*wm97* F: include/linux/wm97xx.h -WOLFSON MICROELECTRONICS PMIC DRIVERS +WOLFSON MICROELECTRONICS DRIVERS M: Mark Brown +M: Ian Lartey T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus W: http://opensource.wolfsonmicro.com/node/8 S: Supported @@ -6341,8 +6419,8 @@ F: drivers/watchdog/wm83*_wdt.c F: include/linux/mfd/wm831x/ F: include/linux/mfd/wm8350/ F: include/linux/mfd/wm8400* -F: sound/soc/codecs/wm8350.* -F: sound/soc/codecs/wm8400.* +F: include/sound/wm????.h +F: sound/soc/codecs/wm* X.25 NETWORK LAYER M: Andrew Hendry diff --git a/Makefile b/Makefile index 141da26fda4b..f3bdff8c8d78 100644 --- a/Makefile +++ b/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 -SUBLEVEL = 35 -EXTRAVERSION = +SUBLEVEL = 36 +EXTRAVERSION = -rc1 NAME = Sheep on Meth # *DOCUMENTATION* @@ -189,7 +189,6 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \ # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile export KBUILD_BUILDHOST := $(SUBARCH) ARCH ?= $(SUBARCH) -CROSS_COMPILE ?= CROSS_COMPILE ?= $(CONFIG_CROSS_COMPILE:"%"=%) # Architecture as present in compile.h @@ -332,10 +331,9 @@ CHECK = sparse CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \ -Wbitwise -Wno-return-void $(CF) -MODFLAGS = -DMODULE -CFLAGS_MODULE = $(MODFLAGS) -AFLAGS_MODULE = $(MODFLAGS) -LDFLAGS_MODULE = -T $(srctree)/scripts/module-common.lds +CFLAGS_MODULE = +AFLAGS_MODULE = +LDFLAGS_MODULE = CFLAGS_KERNEL = AFLAGS_KERNEL = CFLAGS_GCOV = -fprofile-arcs -ftest-coverage @@ -354,7 +352,12 @@ KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ -Werror-implicit-function-declaration \ -Wno-format-security \ -fno-delete-null-pointer-checks +KBUILD_AFLAGS_KERNEL := +KBUILD_CFLAGS_KERNEL := KBUILD_AFLAGS := -D__ASSEMBLY__ +KBUILD_AFLAGS_MODULE := -DMODULE +KBUILD_CFLAGS_MODULE := -DMODULE +KBUILD_LDFLAGS_MODULE := -T $(srctree)/scripts/module-common.lds # Read KERNELRELEASE from include/config/kernel.release (if it exists) KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null) @@ -369,6 +372,8 @@ export HOSTCXX HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS LDFLAGS export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE CFLAGS_GCOV export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE +export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE +export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL # When compiling out-of-tree modules, put MODVERDIR in the module # tree rather than in the kernel tree. The kernel tree might @@ -412,9 +417,9 @@ endif # of make so .config is not included in this case either (for *config). no-dot-config-targets := clean mrproper distclean \ - cscope TAGS tags help %docs check% \ + cscope TAGS tags help %docs check% coccicheck \ include/linux/version.h headers_% \ - kernelrelease kernelversion + kernelversion %src-pkg config-targets := 0 mixed-targets := 0 @@ -526,7 +531,7 @@ endif # $(dot-config) # The all: target is the default when no target is given on the # command line. # This allow a user to issue only 'make' to build a kernel including modules -# Defaults vmlinux but it is usually overridden in the arch makefile +# Defaults to vmlinux, but the arch makefile usually adds further targets all: vmlinux ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE @@ -557,6 +562,10 @@ KBUILD_CFLAGS += -g KBUILD_AFLAGS += -gdwarf-2 endif +ifdef CONFIG_DEBUG_INFO_REDUCED +KBUILD_CFLAGS += $(call cc-option, -femit-struct-debug-baseonly) +endif + ifdef CONFIG_FUNCTION_TRACER KBUILD_CFLAGS += -pg endif @@ -603,7 +612,7 @@ endif # Use --build-id when available. LDFLAGS_BUILD_ID = $(patsubst -Wl$(comma)%,%,\ $(call cc-ldoption, -Wl$(comma)--build-id,)) -LDFLAGS_MODULE += $(LDFLAGS_BUILD_ID) +KBUILD_LDFLAGS_MODULE += $(LDFLAGS_BUILD_ID) LDFLAGS_vmlinux += $(LDFLAGS_BUILD_ID) ifeq ($(CONFIG_STRIP_ASM_SYMS),y) @@ -1158,6 +1167,8 @@ distclean: mrproper # rpm target kept for backward compatibility package-dir := $(srctree)/scripts/package +%src-pkg: FORCE + $(Q)$(MAKE) $(build)=$(package-dir) $@ %pkg: include/config/kernel.release FORCE $(Q)$(MAKE) $(build)=$(package-dir) $@ rpm: include/config/kernel.release FORCE @@ -1209,8 +1220,9 @@ help: @echo ' includecheck - Check for duplicate included header files' @echo ' export_report - List the usages of all exported symbols' @echo ' headers_check - Sanity check on exported headers' - @echo ' headerdep - Detect inclusion cycles in headers'; \ - echo '' + @echo ' headerdep - Detect inclusion cycles in headers' + @$(MAKE) -f $(srctree)/scripts/Makefile.help checker-help + @echo '' @echo 'Kernel packaging:' @$(MAKE) $(build)=$(package-dir) help @echo '' @@ -1369,6 +1381,9 @@ versioncheck: -name '*.[hcS]' -type f -print | sort \ | xargs $(PERL) -w $(srctree)/scripts/checkversion.pl +coccicheck: + $(Q)$(CONFIG_SHELL) $(srctree)/scripts/$@ + namespacecheck: $(PERL) $(srctree)/scripts/namespace.pl @@ -1393,9 +1408,9 @@ checkstack: $(OBJDUMP) -d vmlinux $$(find . -name '*.ko') | \ $(PERL) $(src)/scripts/checkstack.pl $(CHECKSTACK_ARCH) -kernelrelease: - $(if $(wildcard include/config/kernel.release), $(Q)echo $(KERNELRELEASE), \ - $(error kernelrelease not valid - run 'make prepare' to update it)) +kernelrelease: include/config/kernel.release + @echo $(KERNELRELEASE) + kernelversion: @echo $(KERNELVERSION) @@ -1472,6 +1487,7 @@ cmd_crmodverdir = $(Q)mkdir -p $(MODVERDIR) \ $(if $(KBUILD_MODULES),; rm -f $(MODVERDIR)/*) a_flags = -Wp,-MD,$(depfile) $(KBUILD_AFLAGS) $(AFLAGS_KERNEL) \ + $(KBUILD_AFLAGS_KERNEL) \ $(NOSTDINC_FLAGS) $(LINUXINCLUDE) $(KBUILD_CPPFLAGS) \ $(modkern_aflags) $(EXTRA_AFLAGS) $(AFLAGS_$(basetarget).o) diff --git a/arch/Kconfig b/arch/Kconfig index acda512da2e2..4877a8c8ee16 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -151,4 +151,11 @@ config HAVE_MIXED_BREAKPOINTS_REGS config HAVE_USER_RETURN_NOTIFIER bool +config HAVE_PERF_EVENTS_NMI + bool + help + System hardware can generate an NMI using the perf event + subsystem. Also has support for calculating CPU cycle events + to determine how many clock cycles in a given period. + source "kernel/gcov/Kconfig" diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index 3e2e540a0f2a..b9647bb66d13 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig @@ -47,10 +47,6 @@ config GENERIC_CALIBRATE_DELAY bool default y -config GENERIC_TIME - bool - default y - config GENERIC_CMOS_UPDATE def_bool y diff --git a/arch/alpha/defconfig b/arch/alpha/defconfig index e43f68fd66b0..539e8b5a6cbd 100644 --- a/arch/alpha/defconfig +++ b/arch/alpha/defconfig @@ -1,926 +1,76 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.9-rc2 -# Sat Sep 25 15:38:35 2004 -# -CONFIG_ALPHA=y -CONFIG_64BIT=y -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_ISA_DMA=y -# CONFIG_GENERIC_IOMAP is not set - -# -# Code maturity level options -# CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -# CONFIG_EMBEDDED is not set -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SHMEM=y -# CONFIG_TINY_SHMEM is not set - -# -# Loadable module support -# +CONFIG_KALLSYMS_ALL=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# System setup -# -CONFIG_ALPHA_GENERIC=y -# CONFIG_ALPHA_ALCOR is not set -# CONFIG_ALPHA_XL is not set -# CONFIG_ALPHA_BOOK1 is not set -# CONFIG_ALPHA_AVANTI_CH is not set -# CONFIG_ALPHA_CABRIOLET is not set -# CONFIG_ALPHA_DP264 is not set -# CONFIG_ALPHA_EB164 is not set -# CONFIG_ALPHA_EB64P_CH is not set -# CONFIG_ALPHA_EB66 is not set -# CONFIG_ALPHA_EB66P is not set -# CONFIG_ALPHA_EIGER is not set -# CONFIG_ALPHA_JENSEN is not set -# CONFIG_ALPHA_LX164 is not set -# CONFIG_ALPHA_LYNX is not set -# CONFIG_ALPHA_MARVEL is not set -# CONFIG_ALPHA_MIATA is not set -# CONFIG_ALPHA_MIKASA is not set -# CONFIG_ALPHA_NAUTILUS is not set -# CONFIG_ALPHA_NONAME_CH is not set -# CONFIG_ALPHA_NORITAKE is not set -# CONFIG_ALPHA_PC164 is not set -# CONFIG_ALPHA_P2K is not set -# CONFIG_ALPHA_RAWHIDE is not set -# CONFIG_ALPHA_RUFFIAN is not set -# CONFIG_ALPHA_RX164 is not set -# CONFIG_ALPHA_SX164 is not set -# CONFIG_ALPHA_SABLE is not set -# CONFIG_ALPHA_SHARK is not set -# CONFIG_ALPHA_TAKARA is not set -# CONFIG_ALPHA_TITAN is not set -# CONFIG_ALPHA_WILDFIRE is not set -CONFIG_ISA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_ALPHA_CORE_AGP=y -CONFIG_ALPHA_BROKEN_IRQ_MASK=y -CONFIG_EISA=y -# CONFIG_SMP is not set -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_VERBOSE_MCHECK=y -CONFIG_VERBOSE_MCHECK_ON=1 -CONFIG_PCI_LEGACY_PROC=y -CONFIG_PCI_NAMES=y -CONFIG_EISA_PCI_EISA=y -CONFIG_EISA_VIRTUAL_ROOT=y -CONFIG_EISA_NAMES=y CONFIG_SRM_ENV=m -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_EM86 is not set -# CONFIG_BINFMT_MISC is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_DEBUG_DRIVER is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -CONFIG_PNP=y -# CONFIG_PNP_DEBUG is not set - -# -# Protocols -# -CONFIG_ISAPNP=y - -# -# Block devices -# -CONFIG_BLK_DEV_FD=y -# CONFIG_BLK_DEV_XD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_RAM is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_IDE_MAX_HWIFS=4 -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=y -CONFIG_IDEDISK_MULTI_MODE=y -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set -# CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDE_TASKFILE_IO is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -# CONFIG_BLK_DEV_IDEPNP is not set -CONFIG_BLK_DEV_IDEPCI=y -# CONFIG_IDEPCI_SHARE_IRQ is not set -# CONFIG_BLK_DEV_OFFBOARD is not set -CONFIG_BLK_DEV_GENERIC=y -# CONFIG_BLK_DEV_OPTI621 is not set -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_IDEDMA_FORCED is not set -CONFIG_IDEDMA_PCI_AUTO=y -# CONFIG_IDEDMA_ONLYDISK is not set -# CONFIG_BLK_DEV_AEC62XX is not set -CONFIG_BLK_DEV_ALI15X3=y -# CONFIG_WDC_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -CONFIG_BLK_DEV_CMD64X=y -# CONFIG_BLK_DEV_TRIFLEX is not set -CONFIG_BLK_DEV_CY82C693=y -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_SC1200 is not set -# CONFIG_BLK_DEV_PIIX is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_IDE_ARM is not set -# CONFIG_IDE_CHIPSETS is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_IVB is not set -CONFIG_IDEDMA_AUTO=y -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI Transport Attributes -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AACRAID is not set -CONFIG_SCSI_AIC7XXX=m -CONFIG_AIC7XXX_CMDS_PER_DEVICE=253 -CONFIG_AIC7XXX_RESET_DELAY_MS=5000 -# CONFIG_AIC7XXX_PROBE_EISA_VL is not set -# CONFIG_AIC7XXX_DEBUG_ENABLE is not set -CONFIG_AIC7XXX_DEBUG_MASK=0 -CONFIG_AIC7XXX_REG_PRETTY_PRINT=y -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -CONFIG_SCSI_QLA2XXX=y -# CONFIG_SCSI_QLA21XX is not set -# CONFIG_SCSI_QLA22XX is not set -# CONFIG_SCSI_QLA2300 is not set -# CONFIG_SCSI_QLA2322 is not set -# CONFIG_SCSI_QLA6312 is not set -# CONFIG_SCSI_QLA6322 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Old CD-ROM drivers (not SCSI, not IDE) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Networking support -# CONFIG_NET=y - -# -# Networking options -# CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_NETLINK_DEV=y CONFIG_UNIX=y +CONFIG_XFRM_USER=m CONFIG_NET_KEY=m CONFIG_INET=y CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set CONFIG_INET_AH=m CONFIG_INET_ESP=m -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set # CONFIG_IPV6 is not set CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set - -# -# IP: Netfilter Configuration -# -CONFIG_IP_NF_CONNTRACK=m -# CONFIG_IP_NF_CT_ACCT is not set -# CONFIG_IP_NF_CT_PROTO_SCTP is not set -CONFIG_IP_NF_FTP=m -CONFIG_IP_NF_IRC=m -# CONFIG_IP_NF_TFTP is not set -# CONFIG_IP_NF_AMANDA is not set CONFIG_IP_NF_QUEUE=m CONFIG_IP_NF_IPTABLES=m -# CONFIG_IP_NF_MATCH_LIMIT is not set -# CONFIG_IP_NF_MATCH_IPRANGE is not set -# CONFIG_IP_NF_MATCH_MAC is not set -# CONFIG_IP_NF_MATCH_PKTTYPE is not set -# CONFIG_IP_NF_MATCH_MARK is not set -# CONFIG_IP_NF_MATCH_MULTIPORT is not set -# CONFIG_IP_NF_MATCH_TOS is not set -# CONFIG_IP_NF_MATCH_RECENT is not set -# CONFIG_IP_NF_MATCH_ECN is not set -# CONFIG_IP_NF_MATCH_DSCP is not set -# CONFIG_IP_NF_MATCH_AH_ESP is not set -# CONFIG_IP_NF_MATCH_LENGTH is not set -# CONFIG_IP_NF_MATCH_TTL is not set -# CONFIG_IP_NF_MATCH_TCPMSS is not set -# CONFIG_IP_NF_MATCH_HELPER is not set -# CONFIG_IP_NF_MATCH_STATE is not set -# CONFIG_IP_NF_MATCH_CONNTRACK is not set -# CONFIG_IP_NF_MATCH_OWNER is not set -# CONFIG_IP_NF_MATCH_ADDRTYPE is not set -# CONFIG_IP_NF_MATCH_REALM is not set -# CONFIG_IP_NF_MATCH_SCTP is not set -# CONFIG_IP_NF_MATCH_COMMENT is not set CONFIG_IP_NF_FILTER=m -# CONFIG_IP_NF_TARGET_REJECT is not set -# CONFIG_IP_NF_TARGET_LOG is not set -# CONFIG_IP_NF_TARGET_ULOG is not set -# CONFIG_IP_NF_TARGET_TCPMSS is not set -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -# CONFIG_IP_NF_TARGET_REDIRECT is not set -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_SAME is not set -# CONFIG_IP_NF_NAT_SNMP_BASIC is not set -CONFIG_IP_NF_NAT_IRC=m -CONFIG_IP_NF_NAT_FTP=m -# CONFIG_IP_NF_MANGLE is not set -# CONFIG_IP_NF_RAW is not set -# CONFIG_IP_NF_ARPTABLES is not set -CONFIG_IP_NF_COMPAT_IPCHAINS=y -CONFIG_XFRM=y -CONFIG_XFRM_USER=m - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set CONFIG_VLAN_8021Q=m -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set +CONFIG_PNP=y +CONFIG_ISAPNP=y +CONFIG_BLK_DEV_FD=y +CONFIG_BLK_DEV_LOOP=m +CONFIG_IDE=y +CONFIG_BLK_DEV_IDECD=y +CONFIG_IDE_GENERIC=y +CONFIG_BLK_DEV_GENERIC=y +CONFIG_BLK_DEV_ALI15X3=y +CONFIG_BLK_DEV_CMD64X=y +CONFIG_BLK_DEV_CY82C693=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_SCSI_AIC7XXX=m +CONFIG_AIC7XXX_CMDS_PER_DEVICE=253 +# CONFIG_AIC7XXX_DEBUG_ENABLE is not set CONFIG_NETDEVICES=y CONFIG_DUMMY=m -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set -# CONFIG_NET_SB1000 is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set CONFIG_NET_VENDOR_3COM=y -# CONFIG_EL1 is not set -# CONFIG_EL2 is not set -# CONFIG_ELPLUS is not set -# CONFIG_EL16 is not set -# CONFIG_EL3 is not set -# CONFIG_3C515 is not set CONFIG_VORTEX=y -# CONFIG_TYPHOON is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set - -# -# Tulip family network device support -# CONFIG_NET_TULIP=y CONFIG_DE2104X=m CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set CONFIG_TULIP_MMIO=y -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_AT1700 is not set -# CONFIG_DEPCA is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_AC3200 is not set -# CONFIG_APRICOT is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_CS89x0 is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -# CONFIG_E100 is not set -# CONFIG_LNE390 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_NE3210 is not set -# CONFIG_ES3210 is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set CONFIG_YELLOWFIN=y -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_RAW is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_INPORT is not set -# CONFIG_MOUSE_LOGIBM is not set -# CONFIG_MOUSE_PC110PAD is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set CONFIG_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Console display driver support -# -CONFIG_VGA_CONSOLE=y -# CONFIG_MDA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set -# CONFIG_REISERFS_FS_XATTR is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set CONFIG_AUTOFS_FS=m -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# CONFIG_NFS_FS=m CONFIG_NFS_V3=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set CONFIG_NFSD=m CONFIG_NFSD_V3=y -# CONFIG_NFSD_V4 is not set -CONFIG_NFSD_TCP=y -CONFIG_LOCKD=m -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_SUNRPC=m -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_OSF_PARTITION=y -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y CONFIG_MAGIC_SYSRQ=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_INFO=y -CONFIG_EARLY_PRINTK=y -# CONFIG_DEBUG_SEMAPHORE is not set CONFIG_ALPHA_LEGACY_START_ADDRESS=y CONFIG_MATHEMU=y - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=m -CONFIG_CRYPTO_SHA1=m -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WHIRLPOOL is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set diff --git a/arch/alpha/include/asm/Kbuild b/arch/alpha/include/asm/Kbuild index b7c8f188b313..e423defed91e 100644 --- a/arch/alpha/include/asm/Kbuild +++ b/arch/alpha/include/asm/Kbuild @@ -1,11 +1,10 @@ include include/asm-generic/Kbuild.asm +header-y += compiler.h +header-y += console.h +header-y += fpu.h header-y += gentrap.h -header-y += regdef.h header-y += pal.h header-y += reg.h - -unifdef-y += console.h -unifdef-y += fpu.h -unifdef-y += sysinfo.h -unifdef-y += compiler.h +header-y += regdef.h +header-y += sysinfo.h diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h index 1bce8169733c..4567aca6fdd6 100644 --- a/arch/alpha/include/asm/dma-mapping.h +++ b/arch/alpha/include/asm/dma-mapping.h @@ -41,9 +41,7 @@ static inline int dma_set_mask(struct device *dev, u64 mask) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d, h) (1) #define dma_cache_sync(dev, va, size, dir) ((void)0) -#define dma_get_cache_alignment() L1_CACHE_BYTES #endif /* _ALPHA_DMA_MAPPING_H */ diff --git a/arch/alpha/include/asm/hw_irq.h b/arch/alpha/include/asm/hw_irq.h index a37db0f95092..5050ac81cd90 100644 --- a/arch/alpha/include/asm/hw_irq.h +++ b/arch/alpha/include/asm/hw_irq.h @@ -3,6 +3,7 @@ extern volatile unsigned long irq_err_count; +DECLARE_PER_CPU(unsigned long, irq_pmi_count); #ifdef CONFIG_ALPHA_GENERIC #define ACTUAL_NR_IRQS alpha_mv.nr_irqs diff --git a/arch/alpha/include/asm/ioctls.h b/arch/alpha/include/asm/ioctls.h index 67bb9f6fdbe4..59617c3c2be6 100644 --- a/arch/alpha/include/asm/ioctls.h +++ b/arch/alpha/include/asm/ioctls.h @@ -80,6 +80,7 @@ # define TIOCPKT_START 8 # define TIOCPKT_NOSTOP 16 # define TIOCPKT_DOSTOP 32 +# define TIOCPKT_IOCTL 64 #define TIOCNOTTY 0x5422 @@ -91,6 +92,7 @@ #define TIOCGSID 0x5429 /* Return the session ID of FD */ #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ +#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ #define TIOCSERCONFIG 0x5453 #define TIOCSERGWILD 0x5454 @@ -106,7 +108,5 @@ #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ -#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */ -#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ #endif /* _ASM_ALPHA_IOCTLS_H */ diff --git a/arch/alpha/include/asm/local64.h b/arch/alpha/include/asm/local64.h new file mode 100644 index 000000000000..36c93b5cc239 --- /dev/null +++ b/arch/alpha/include/asm/local64.h @@ -0,0 +1 @@ +#include diff --git a/arch/alpha/include/asm/md.h b/arch/alpha/include/asm/md.h deleted file mode 100644 index 6c9b8222a4f2..000000000000 --- a/arch/alpha/include/asm/md.h +++ /dev/null @@ -1,13 +0,0 @@ -/* $Id: md.h,v 1.1 1997/12/15 15:11:48 jj Exp $ - * md.h: High speed xor_block operation for RAID4/5 - * - */ - -#ifndef __ASM_MD_H -#define __ASM_MD_H - -/* #define HAVE_ARCH_XORBLOCK */ - -#define MD_XORBLOCK_ALIGNMENT sizeof(long) - -#endif /* __ASM_MD_H */ diff --git a/arch/alpha/include/asm/perf_event.h b/arch/alpha/include/asm/perf_event.h index 3bef8522017c..4157cd3c44a9 100644 --- a/arch/alpha/include/asm/perf_event.h +++ b/arch/alpha/include/asm/perf_event.h @@ -2,8 +2,14 @@ #define __ASM_ALPHA_PERF_EVENT_H /* Alpha only supports software events through this interface. */ -static inline void set_perf_event_pending(void) { } +extern void set_perf_event_pending(void); #define PERF_EVENT_INDEX_OFFSET 0 +#ifdef CONFIG_PERF_EVENTS +extern void init_hw_perf_events(void); +#else +static inline void init_hw_perf_events(void) { } +#endif + #endif /* __ASM_ALPHA_PERF_EVENT_H */ diff --git a/arch/alpha/include/asm/scatterlist.h b/arch/alpha/include/asm/scatterlist.h index 5728c52a7412..017d7471c3c4 100644 --- a/arch/alpha/include/asm/scatterlist.h +++ b/arch/alpha/include/asm/scatterlist.h @@ -3,6 +3,4 @@ #include -#define ISA_DMA_THRESHOLD (~0UL) - #endif /* !(_ALPHA_SCATTERLIST_H) */ diff --git a/arch/alpha/include/asm/termbits.h b/arch/alpha/include/asm/termbits.h index ad854a4a3af6..879dd3589921 100644 --- a/arch/alpha/include/asm/termbits.h +++ b/arch/alpha/include/asm/termbits.h @@ -180,6 +180,7 @@ struct ktermios { #define FLUSHO 0x00800000 #define PENDIN 0x20000000 #define IEXTEN 0x00000400 +#define EXTPROC 0x10000000 /* Values for the ACTION argument to `tcflow'. */ #define TCOOFF 0 diff --git a/arch/alpha/include/asm/wrperfmon.h b/arch/alpha/include/asm/wrperfmon.h new file mode 100644 index 000000000000..319bf6788d87 --- /dev/null +++ b/arch/alpha/include/asm/wrperfmon.h @@ -0,0 +1,93 @@ +/* + * Definitions for use with the Alpha wrperfmon PAL call. + */ + +#ifndef __ALPHA_WRPERFMON_H +#define __ALPHA_WRPERFMON_H + +/* Following commands are implemented on all CPUs */ +#define PERFMON_CMD_DISABLE 0 +#define PERFMON_CMD_ENABLE 1 +#define PERFMON_CMD_DESIRED_EVENTS 2 +#define PERFMON_CMD_LOGGING_OPTIONS 3 +/* Following commands on EV5/EV56/PCA56 only */ +#define PERFMON_CMD_INT_FREQ 4 +#define PERFMON_CMD_ENABLE_CLEAR 7 +/* Following commands are on EV5 and better CPUs */ +#define PERFMON_CMD_READ 5 +#define PERFMON_CMD_WRITE 6 +/* Following command are on EV6 and better CPUs */ +#define PERFMON_CMD_ENABLE_WRITE 7 +/* Following command are on EV67 and better CPUs */ +#define PERFMON_CMD_I_STAT 8 +#define PERFMON_CMD_PMPC 9 + + +/* EV5/EV56/PCA56 Counters */ +#define EV5_PCTR_0 (1UL<<0) +#define EV5_PCTR_1 (1UL<<1) +#define EV5_PCTR_2 (1UL<<2) + +#define EV5_PCTR_0_COUNT_SHIFT 48 +#define EV5_PCTR_1_COUNT_SHIFT 32 +#define EV5_PCTR_2_COUNT_SHIFT 16 + +#define EV5_PCTR_0_COUNT_MASK 0xffffUL +#define EV5_PCTR_1_COUNT_MASK 0xffffUL +#define EV5_PCTR_2_COUNT_MASK 0x3fffUL + +/* EV6 Counters */ +#define EV6_PCTR_0 (1UL<<0) +#define EV6_PCTR_1 (1UL<<1) + +#define EV6_PCTR_0_COUNT_SHIFT 28 +#define EV6_PCTR_1_COUNT_SHIFT 6 + +#define EV6_PCTR_0_COUNT_MASK 0xfffffUL +#define EV6_PCTR_1_COUNT_MASK 0xfffffUL + +/* EV67 (and subsequent) counters */ +#define EV67_PCTR_0 (1UL<<0) +#define EV67_PCTR_1 (1UL<<1) + +#define EV67_PCTR_0_COUNT_SHIFT 28 +#define EV67_PCTR_1_COUNT_SHIFT 6 + +#define EV67_PCTR_0_COUNT_MASK 0xfffffUL +#define EV67_PCTR_1_COUNT_MASK 0xfffffUL + + +/* + * The Alpha Architecure Handbook, vers. 4 (1998) appears to have a misprint + * in Table E-23 regarding the bits that set the event PCTR 1 counts. + * Hopefully what we have here is correct. + */ +#define EV6_PCTR_0_EVENT_MASK 0x10UL +#define EV6_PCTR_1_EVENT_MASK 0x0fUL + +/* EV6 Events */ +#define EV6_PCTR_0_CYCLES (0UL << 4) +#define EV6_PCTR_0_INSTRUCTIONS (1UL << 4) + +#define EV6_PCTR_1_CYCLES 0 +#define EV6_PCTR_1_BRANCHES 1 +#define EV6_PCTR_1_BRANCH_MISPREDICTS 2 +#define EV6_PCTR_1_DTB_SINGLE_MISSES 3 +#define EV6_PCTR_1_DTB_DOUBLE_MISSES 4 +#define EV6_PCTR_1_ITB_MISSES 5 +#define EV6_PCTR_1_UNALIGNED_TRAPS 6 +#define EV6_PCTR_1_REPLY_TRAPS 7 + +/* From the Alpha Architecture Reference Manual, 4th edn., 2002 */ +#define EV67_PCTR_MODE_MASK 0x10UL +#define EV67_PCTR_EVENT_MASK 0x0CUL + +#define EV67_PCTR_MODE_PROFILEME (1UL<<4) +#define EV67_PCTR_MODE_AGGREGATE (0UL<<4) + +#define EV67_PCTR_INSTR_CYCLES (0UL<<2) +#define EV67_PCTR_CYCLES_UNDEF (1UL<<2) +#define EV67_PCTR_INSTR_BCACHEMISS (2UL<<2) +#define EV67_PCTR_CYCLES_MBOX (3UL<<2) + +#endif diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile index 5a62fb46ef20..1ee9b5b629b8 100644 --- a/arch/alpha/kernel/Makefile +++ b/arch/alpha/kernel/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_PCI) += pci.o pci_iommu.o pci-sysfs.o obj-$(CONFIG_SRM_ENV) += srm_env.o obj-$(CONFIG_MODULES) += module.o +obj-$(CONFIG_PERF_EVENTS) += perf_event.o ifdef CONFIG_ALPHA_GENERIC diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index 7f912ba3d9ad..fe912984d9b1 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c @@ -31,6 +31,7 @@ #include volatile unsigned long irq_err_count; +DEFINE_PER_CPU(unsigned long, irq_pmi_count); void ack_bad_irq(unsigned int irq) { @@ -63,9 +64,7 @@ int irq_select_affinity(unsigned int irq) int show_interrupts(struct seq_file *p, void *v) { -#ifdef CONFIG_SMP int j; -#endif int irq = *(loff_t *) v; struct irqaction * action; unsigned long flags; @@ -112,6 +111,10 @@ unlock: seq_printf(p, "%10lu ", cpu_data[j].ipi_count); seq_putc(p, '\n'); #endif + seq_puts(p, "PMI: "); + for_each_online_cpu(j) + seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j)); + seq_puts(p, " Performance Monitoring\n"); seq_printf(p, "ERR: %10lu\n", irq_err_count); } return 0; diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c index cfde865b78e0..5f77afb88e89 100644 --- a/arch/alpha/kernel/irq_alpha.c +++ b/arch/alpha/kernel/irq_alpha.c @@ -10,6 +10,7 @@ #include #include +#include #include "proto.h" #include "irq_impl.h" @@ -111,6 +112,8 @@ init_IRQ(void) wrent(entInt, 0); alpha_mv.init_irq(); + + init_hw_perf_events(); } /* diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c index de9d39717808..fb58150a7e8f 100644 --- a/arch/alpha/kernel/osf_sys.c +++ b/arch/alpha/kernel/osf_sys.c @@ -234,17 +234,17 @@ linux_to_osf_statfs(struct kstatfs *linux_stat, struct osf_statfs __user *osf_st } static int -do_osf_statfs(struct dentry * dentry, struct osf_statfs __user *buffer, +do_osf_statfs(struct path *path, struct osf_statfs __user *buffer, unsigned long bufsiz) { struct kstatfs linux_stat; - int error = vfs_statfs(dentry, &linux_stat); + int error = vfs_statfs(path, &linux_stat); if (!error) error = linux_to_osf_statfs(&linux_stat, buffer, bufsiz); return error; } -SYSCALL_DEFINE3(osf_statfs, char __user *, pathname, +SYSCALL_DEFINE3(osf_statfs, const char __user *, pathname, struct osf_statfs __user *, buffer, unsigned long, bufsiz) { struct path path; @@ -252,7 +252,7 @@ SYSCALL_DEFINE3(osf_statfs, char __user *, pathname, retval = user_path(pathname, &path); if (!retval) { - retval = do_osf_statfs(path.dentry, buffer, bufsiz); + retval = do_osf_statfs(&path buffer, bufsiz); path_put(&path); } return retval; @@ -267,7 +267,7 @@ SYSCALL_DEFINE3(osf_fstatfs, unsigned long, fd, retval = -EBADF; file = fget(fd); if (file) { - retval = do_osf_statfs(file->f_path.dentry, buffer, bufsiz); + retval = do_osf_statfs(&file->f_path, buffer, bufsiz); fput(file); } return retval; @@ -358,7 +358,7 @@ osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags) return do_mount("", dirname, "proc", flags, NULL); } -SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, char __user *, path, +SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, const char __user *, path, int, flag, void __user *, data) { int retval; @@ -932,7 +932,7 @@ SYSCALL_DEFINE3(osf_setitimer, int, which, struct itimerval32 __user *, in, } -SYSCALL_DEFINE2(osf_utimes, char __user *, filename, +SYSCALL_DEFINE2(osf_utimes, const char __user *, filename, struct timeval32 __user *, tvs) { struct timespec tv[2]; diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c new file mode 100644 index 000000000000..51c39fa41693 --- /dev/null +++ b/arch/alpha/kernel/perf_event.c @@ -0,0 +1,842 @@ +/* + * Hardware performance events for the Alpha. + * + * We implement HW counts on the EV67 and subsequent CPUs only. + * + * (C) 2010 Michael J. Cree + * + * Somewhat based on the Sparc code, and to a lesser extent the PowerPC and + * ARM code, which are copyright by their respective authors. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + + +/* The maximum number of PMCs on any Alpha CPU whatsoever. */ +#define MAX_HWEVENTS 3 +#define PMC_NO_INDEX -1 + +/* For tracking PMCs and the hw events they monitor on each CPU. */ +struct cpu_hw_events { + int enabled; + /* Number of events scheduled; also number entries valid in arrays below. */ + int n_events; + /* Number events added since last hw_perf_disable(). */ + int n_added; + /* Events currently scheduled. */ + struct perf_event *event[MAX_HWEVENTS]; + /* Event type of each scheduled event. */ + unsigned long evtype[MAX_HWEVENTS]; + /* Current index of each scheduled event; if not yet determined + * contains PMC_NO_INDEX. + */ + int current_idx[MAX_HWEVENTS]; + /* The active PMCs' config for easy use with wrperfmon(). */ + unsigned long config; + /* The active counters' indices for easy use with wrperfmon(). */ + unsigned long idx_mask; +}; +DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); + + + +/* + * A structure to hold the description of the PMCs available on a particular + * type of Alpha CPU. + */ +struct alpha_pmu_t { + /* Mapping of the perf system hw event types to indigenous event types */ + const int *event_map; + /* The number of entries in the event_map */ + int max_events; + /* The number of PMCs on this Alpha */ + int num_pmcs; + /* + * All PMC counters reside in the IBOX register PCTR. This is the + * LSB of the counter. + */ + int pmc_count_shift[MAX_HWEVENTS]; + /* + * The mask that isolates the PMC bits when the LSB of the counter + * is shifted to bit 0. + */ + unsigned long pmc_count_mask[MAX_HWEVENTS]; + /* The maximum period the PMC can count. */ + unsigned long pmc_max_period[MAX_HWEVENTS]; + /* + * The maximum value that may be written to the counter due to + * hardware restrictions is pmc_max_period - pmc_left. + */ + long pmc_left[3]; + /* Subroutine for allocation of PMCs. Enforces constraints. */ + int (*check_constraints)(struct perf_event **, unsigned long *, int); +}; + +/* + * The Alpha CPU PMU description currently in operation. This is set during + * the boot process to the specific CPU of the machine. + */ +static const struct alpha_pmu_t *alpha_pmu; + + +#define HW_OP_UNSUPPORTED -1 + +/* + * The hardware description of the EV67, EV68, EV69, EV7 and EV79 PMUs + * follow. Since they are identical we refer to them collectively as the + * EV67 henceforth. + */ + +/* + * EV67 PMC event types + * + * There is no one-to-one mapping of the possible hw event types to the + * actual codes that are used to program the PMCs hence we introduce our + * own hw event type identifiers. + */ +enum ev67_pmc_event_type { + EV67_CYCLES = 1, + EV67_INSTRUCTIONS, + EV67_BCACHEMISS, + EV67_MBOXREPLAY, + EV67_LAST_ET +}; +#define EV67_NUM_EVENT_TYPES (EV67_LAST_ET-EV67_CYCLES) + + +/* Mapping of the hw event types to the perf tool interface */ +static const int ev67_perfmon_event_map[] = { + [PERF_COUNT_HW_CPU_CYCLES] = EV67_CYCLES, + [PERF_COUNT_HW_INSTRUCTIONS] = EV67_INSTRUCTIONS, + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_CACHE_MISSES] = EV67_BCACHEMISS, +}; + +struct ev67_mapping_t { + int config; + int idx; +}; + +/* + * The mapping used for one event only - these must be in same order as enum + * ev67_pmc_event_type definition. + */ +static const struct ev67_mapping_t ev67_mapping[] = { + {EV67_PCTR_INSTR_CYCLES, 1}, /* EV67_CYCLES, */ + {EV67_PCTR_INSTR_CYCLES, 0}, /* EV67_INSTRUCTIONS */ + {EV67_PCTR_INSTR_BCACHEMISS, 1}, /* EV67_BCACHEMISS */ + {EV67_PCTR_CYCLES_MBOX, 1} /* EV67_MBOXREPLAY */ +}; + + +/* + * Check that a group of events can be simultaneously scheduled on to the + * EV67 PMU. Also allocate counter indices and config. + */ +static int ev67_check_constraints(struct perf_event **event, + unsigned long *evtype, int n_ev) +{ + int idx0; + unsigned long config; + + idx0 = ev67_mapping[evtype[0]-1].idx; + config = ev67_mapping[evtype[0]-1].config; + if (n_ev == 1) + goto success; + + BUG_ON(n_ev != 2); + + if (evtype[0] == EV67_MBOXREPLAY || evtype[1] == EV67_MBOXREPLAY) { + /* MBOX replay traps must be on PMC 1 */ + idx0 = (evtype[0] == EV67_MBOXREPLAY) ? 1 : 0; + /* Only cycles can accompany MBOX replay traps */ + if (evtype[idx0] == EV67_CYCLES) { + config = EV67_PCTR_CYCLES_MBOX; + goto success; + } + } + + if (evtype[0] == EV67_BCACHEMISS || evtype[1] == EV67_BCACHEMISS) { + /* Bcache misses must be on PMC 1 */ + idx0 = (evtype[0] == EV67_BCACHEMISS) ? 1 : 0; + /* Only instructions can accompany Bcache misses */ + if (evtype[idx0] == EV67_INSTRUCTIONS) { + config = EV67_PCTR_INSTR_BCACHEMISS; + goto success; + } + } + + if (evtype[0] == EV67_INSTRUCTIONS || evtype[1] == EV67_INSTRUCTIONS) { + /* Instructions must be on PMC 0 */ + idx0 = (evtype[0] == EV67_INSTRUCTIONS) ? 0 : 1; + /* By this point only cycles can accompany instructions */ + if (evtype[idx0^1] == EV67_CYCLES) { + config = EV67_PCTR_INSTR_CYCLES; + goto success; + } + } + + /* Otherwise, darn it, there is a conflict. */ + return -1; + +success: + event[0]->hw.idx = idx0; + event[0]->hw.config_base = config; + if (n_ev == 2) { + event[1]->hw.idx = idx0 ^ 1; + event[1]->hw.config_base = config; + } + return 0; +} + + +static const struct alpha_pmu_t ev67_pmu = { + .event_map = ev67_perfmon_event_map, + .max_events = ARRAY_SIZE(ev67_perfmon_event_map), + .num_pmcs = 2, + .pmc_count_shift = {EV67_PCTR_0_COUNT_SHIFT, EV67_PCTR_1_COUNT_SHIFT, 0}, + .pmc_count_mask = {EV67_PCTR_0_COUNT_MASK, EV67_PCTR_1_COUNT_MASK, 0}, + .pmc_max_period = {(1UL<<20) - 1, (1UL<<20) - 1, 0}, + .pmc_left = {16, 4, 0}, + .check_constraints = ev67_check_constraints +}; + + + +/* + * Helper routines to ensure that we read/write only the correct PMC bits + * when calling the wrperfmon PALcall. + */ +static inline void alpha_write_pmc(int idx, unsigned long val) +{ + val &= alpha_pmu->pmc_count_mask[idx]; + val <<= alpha_pmu->pmc_count_shift[idx]; + val |= (1<>= alpha_pmu->pmc_count_shift[idx]; + val &= alpha_pmu->pmc_count_mask[idx]; + return val; +} + +/* Set a new period to sample over */ +static int alpha_perf_event_set_period(struct perf_event *event, + struct hw_perf_event *hwc, int idx) +{ + long left = atomic64_read(&hwc->period_left); + long period = hwc->sample_period; + int ret = 0; + + if (unlikely(left <= -period)) { + left = period; + atomic64_set(&hwc->period_left, left); + hwc->last_period = period; + ret = 1; + } + + if (unlikely(left <= 0)) { + left += period; + atomic64_set(&hwc->period_left, left); + hwc->last_period = period; + ret = 1; + } + + /* + * Hardware restrictions require that the counters must not be + * written with values that are too close to the maximum period. + */ + if (unlikely(left < alpha_pmu->pmc_left[idx])) + left = alpha_pmu->pmc_left[idx]; + + if (left > (long)alpha_pmu->pmc_max_period[idx]) + left = alpha_pmu->pmc_max_period[idx]; + + atomic64_set(&hwc->prev_count, (unsigned long)(-left)); + + alpha_write_pmc(idx, (unsigned long)(-left)); + + perf_event_update_userpage(event); + + return ret; +} + + +/* + * Calculates the count (the 'delta') since the last time the PMC was read. + * + * As the PMCs' full period can easily be exceeded within the perf system + * sampling period we cannot use any high order bits as a guard bit in the + * PMCs to detect overflow as is done by other architectures. The code here + * calculates the delta on the basis that there is no overflow when ovf is + * zero. The value passed via ovf by the interrupt handler corrects for + * overflow. + * + * This can be racey on rare occasions -- a call to this routine can occur + * with an overflowed counter just before the PMI service routine is called. + * The check for delta negative hopefully always rectifies this situation. + */ +static unsigned long alpha_perf_event_update(struct perf_event *event, + struct hw_perf_event *hwc, int idx, long ovf) +{ + long prev_raw_count, new_raw_count; + long delta; + +again: + prev_raw_count = atomic64_read(&hwc->prev_count); + new_raw_count = alpha_read_pmc(idx); + + if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, + new_raw_count) != prev_raw_count) + goto again; + + delta = (new_raw_count - (prev_raw_count & alpha_pmu->pmc_count_mask[idx])) + ovf; + + /* It is possible on very rare occasions that the PMC has overflowed + * but the interrupt is yet to come. Detect and fix this situation. + */ + if (unlikely(delta < 0)) { + delta += alpha_pmu->pmc_max_period[idx] + 1; + } + + atomic64_add(delta, &event->count); + atomic64_sub(delta, &hwc->period_left); + + return new_raw_count; +} + + +/* + * Collect all HW events into the array event[]. + */ +static int collect_events(struct perf_event *group, int max_count, + struct perf_event *event[], unsigned long *evtype, + int *current_idx) +{ + struct perf_event *pe; + int n = 0; + + if (!is_software_event(group)) { + if (n >= max_count) + return -1; + event[n] = group; + evtype[n] = group->hw.event_base; + current_idx[n++] = PMC_NO_INDEX; + } + list_for_each_entry(pe, &group->sibling_list, group_entry) { + if (!is_software_event(pe) && pe->state != PERF_EVENT_STATE_OFF) { + if (n >= max_count) + return -1; + event[n] = pe; + evtype[n] = pe->hw.event_base; + current_idx[n++] = PMC_NO_INDEX; + } + } + return n; +} + + + +/* + * Check that a group of events can be simultaneously scheduled on to the PMU. + */ +static int alpha_check_constraints(struct perf_event **events, + unsigned long *evtypes, int n_ev) +{ + + /* No HW events is possible from hw_perf_group_sched_in(). */ + if (n_ev == 0) + return 0; + + if (n_ev > alpha_pmu->num_pmcs) + return -1; + + return alpha_pmu->check_constraints(events, evtypes, n_ev); +} + + +/* + * If new events have been scheduled then update cpuc with the new + * configuration. This may involve shifting cycle counts from one PMC to + * another. + */ +static void maybe_change_configuration(struct cpu_hw_events *cpuc) +{ + int j; + + if (cpuc->n_added == 0) + return; + + /* Find counters that are moving to another PMC and update */ + for (j = 0; j < cpuc->n_events; j++) { + struct perf_event *pe = cpuc->event[j]; + + if (cpuc->current_idx[j] != PMC_NO_INDEX && + cpuc->current_idx[j] != pe->hw.idx) { + alpha_perf_event_update(pe, &pe->hw, cpuc->current_idx[j], 0); + cpuc->current_idx[j] = PMC_NO_INDEX; + } + } + + /* Assign to counters all unassigned events. */ + cpuc->idx_mask = 0; + for (j = 0; j < cpuc->n_events; j++) { + struct perf_event *pe = cpuc->event[j]; + struct hw_perf_event *hwc = &pe->hw; + int idx = hwc->idx; + + if (cpuc->current_idx[j] != PMC_NO_INDEX) { + cpuc->idx_mask |= (1<current_idx[j]); + continue; + } + + alpha_perf_event_set_period(pe, hwc, idx); + cpuc->current_idx[j] = idx; + cpuc->idx_mask |= (1<current_idx[j]); + } + cpuc->config = cpuc->event[0]->hw.config_base; +} + + + +/* Schedule perf HW event on to PMU. + * - this function is called from outside this module via the pmu struct + * returned from perf event initialisation. + */ +static int alpha_pmu_enable(struct perf_event *event) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + int n0; + int ret; + unsigned long flags; + + /* + * The Sparc code has the IRQ disable first followed by the perf + * disable, however this can lead to an overflowed counter with the + * PMI disabled on rare occasions. The alpha_perf_event_update() + * routine should detect this situation by noting a negative delta, + * nevertheless we disable the PMCs first to enable a potential + * final PMI to occur before we disable interrupts. + */ + perf_disable(); + local_irq_save(flags); + + /* Default to error to be returned */ + ret = -EAGAIN; + + /* Insert event on to PMU and if successful modify ret to valid return */ + n0 = cpuc->n_events; + if (n0 < alpha_pmu->num_pmcs) { + cpuc->event[n0] = event; + cpuc->evtype[n0] = event->hw.event_base; + cpuc->current_idx[n0] = PMC_NO_INDEX; + + if (!alpha_check_constraints(cpuc->event, cpuc->evtype, n0+1)) { + cpuc->n_events++; + cpuc->n_added++; + ret = 0; + } + } + + local_irq_restore(flags); + perf_enable(); + + return ret; +} + + + +/* Disable performance monitoring unit + * - this function is called from outside this module via the pmu struct + * returned from perf event initialisation. + */ +static void alpha_pmu_disable(struct perf_event *event) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct hw_perf_event *hwc = &event->hw; + unsigned long flags; + int j; + + perf_disable(); + local_irq_save(flags); + + for (j = 0; j < cpuc->n_events; j++) { + if (event == cpuc->event[j]) { + int idx = cpuc->current_idx[j]; + + /* Shift remaining entries down into the existing + * slot. + */ + while (++j < cpuc->n_events) { + cpuc->event[j - 1] = cpuc->event[j]; + cpuc->evtype[j - 1] = cpuc->evtype[j]; + cpuc->current_idx[j - 1] = + cpuc->current_idx[j]; + } + + /* Absorb the final count and turn off the event. */ + alpha_perf_event_update(event, hwc, idx, 0); + perf_event_update_userpage(event); + + cpuc->idx_mask &= ~(1UL<n_events--; + break; + } + } + + local_irq_restore(flags); + perf_enable(); +} + + +static void alpha_pmu_read(struct perf_event *event) +{ + struct hw_perf_event *hwc = &event->hw; + + alpha_perf_event_update(event, hwc, hwc->idx, 0); +} + + +static void alpha_pmu_unthrottle(struct perf_event *event) +{ + struct hw_perf_event *hwc = &event->hw; + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + cpuc->idx_mask |= 1UL<idx; + wrperfmon(PERFMON_CMD_ENABLE, (1UL<idx)); +} + + +/* + * Check that CPU performance counters are supported. + * - currently support EV67 and later CPUs. + * - actually some later revisions of the EV6 have the same PMC model as the + * EV67 but we don't do suffiently deep CPU detection to detect them. + * Bad luck to the very few people who might have one, I guess. + */ +static int supported_cpu(void) +{ + struct percpu_struct *cpu; + unsigned long cputype; + + /* Get cpu type from HW */ + cpu = (struct percpu_struct *)((char *)hwrpb + hwrpb->processor_offset); + cputype = cpu->type & 0xffffffff; + /* Include all of EV67, EV68, EV7, EV79 and EV69 as supported. */ + return (cputype >= EV67_CPU) && (cputype <= EV69_CPU); +} + + + +static void hw_perf_event_destroy(struct perf_event *event) +{ + /* Nothing to be done! */ + return; +} + + + +static int __hw_perf_event_init(struct perf_event *event) +{ + struct perf_event_attr *attr = &event->attr; + struct hw_perf_event *hwc = &event->hw; + struct perf_event *evts[MAX_HWEVENTS]; + unsigned long evtypes[MAX_HWEVENTS]; + int idx_rubbish_bin[MAX_HWEVENTS]; + int ev; + int n; + + /* We only support a limited range of HARDWARE event types with one + * only programmable via a RAW event type. + */ + if (attr->type == PERF_TYPE_HARDWARE) { + if (attr->config >= alpha_pmu->max_events) + return -EINVAL; + ev = alpha_pmu->event_map[attr->config]; + } else if (attr->type == PERF_TYPE_HW_CACHE) { + return -EOPNOTSUPP; + } else if (attr->type == PERF_TYPE_RAW) { + ev = attr->config & 0xff; + } else { + return -EOPNOTSUPP; + } + + if (ev < 0) { + return ev; + } + + /* The EV67 does not support mode exclusion */ + if (attr->exclude_kernel || attr->exclude_user + || attr->exclude_hv || attr->exclude_idle) { + return -EPERM; + } + + /* + * We place the event type in event_base here and leave calculation + * of the codes to programme the PMU for alpha_pmu_enable() because + * it is only then we will know what HW events are actually + * scheduled on to the PMU. At that point the code to programme the + * PMU is put into config_base and the PMC to use is placed into + * idx. We initialise idx (below) to PMC_NO_INDEX to indicate that + * it is yet to be determined. + */ + hwc->event_base = ev; + + /* Collect events in a group together suitable for calling + * alpha_check_constraints() to verify that the group as a whole can + * be scheduled on to the PMU. + */ + n = 0; + if (event->group_leader != event) { + n = collect_events(event->group_leader, + alpha_pmu->num_pmcs - 1, + evts, evtypes, idx_rubbish_bin); + if (n < 0) + return -EINVAL; + } + evtypes[n] = hwc->event_base; + evts[n] = event; + + if (alpha_check_constraints(evts, evtypes, n + 1)) + return -EINVAL; + + /* Indicate that PMU config and idx are yet to be determined. */ + hwc->config_base = 0; + hwc->idx = PMC_NO_INDEX; + + event->destroy = hw_perf_event_destroy; + + /* + * Most architectures reserve the PMU for their use at this point. + * As there is no existing mechanism to arbitrate usage and there + * appears to be no other user of the Alpha PMU we just assume + * that we can just use it, hence a NO-OP here. + * + * Maybe an alpha_reserve_pmu() routine should be implemented but is + * anything else ever going to use it? + */ + + if (!hwc->sample_period) { + hwc->sample_period = alpha_pmu->pmc_max_period[0]; + hwc->last_period = hwc->sample_period; + atomic64_set(&hwc->period_left, hwc->sample_period); + } + + return 0; +} + +static const struct pmu pmu = { + .enable = alpha_pmu_enable, + .disable = alpha_pmu_disable, + .read = alpha_pmu_read, + .unthrottle = alpha_pmu_unthrottle, +}; + + +/* + * Main entry point to initialise a HW performance event. + */ +const struct pmu *hw_perf_event_init(struct perf_event *event) +{ + int err; + + if (!alpha_pmu) + return ERR_PTR(-ENODEV); + + /* Do the real initialisation work. */ + err = __hw_perf_event_init(event); + + if (err) + return ERR_PTR(err); + + return &pmu; +} + + + +/* + * Main entry point - enable HW performance counters. + */ +void hw_perf_enable(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + if (cpuc->enabled) + return; + + cpuc->enabled = 1; + barrier(); + + if (cpuc->n_events > 0) { + /* Update cpuc with information from any new scheduled events. */ + maybe_change_configuration(cpuc); + + /* Start counting the desired events. */ + wrperfmon(PERFMON_CMD_LOGGING_OPTIONS, EV67_PCTR_MODE_AGGREGATE); + wrperfmon(PERFMON_CMD_DESIRED_EVENTS, cpuc->config); + wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask); + } +} + + +/* + * Main entry point - disable HW performance counters. + */ + +void hw_perf_disable(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + if (!cpuc->enabled) + return; + + cpuc->enabled = 0; + cpuc->n_added = 0; + + wrperfmon(PERFMON_CMD_DISABLE, cpuc->idx_mask); +} + + +/* + * Main entry point - don't know when this is called but it + * obviously dumps debug info. + */ +void perf_event_print_debug(void) +{ + unsigned long flags; + unsigned long pcr; + int pcr0, pcr1; + int cpu; + + if (!supported_cpu()) + return; + + local_irq_save(flags); + + cpu = smp_processor_id(); + + pcr = wrperfmon(PERFMON_CMD_READ, 0); + pcr0 = (pcr >> alpha_pmu->pmc_count_shift[0]) & alpha_pmu->pmc_count_mask[0]; + pcr1 = (pcr >> alpha_pmu->pmc_count_shift[1]) & alpha_pmu->pmc_count_mask[1]; + + pr_info("CPU#%d: PCTR0[%06x] PCTR1[%06x]\n", cpu, pcr0, pcr1); + + local_irq_restore(flags); +} + + +/* + * Performance Monitoring Interrupt Service Routine called when a PMC + * overflows. The PMC that overflowed is passed in la_ptr. + */ +static void alpha_perf_event_irq_handler(unsigned long la_ptr, + struct pt_regs *regs) +{ + struct cpu_hw_events *cpuc; + struct perf_sample_data data; + struct perf_event *event; + struct hw_perf_event *hwc; + int idx, j; + + __get_cpu_var(irq_pmi_count)++; + cpuc = &__get_cpu_var(cpu_hw_events); + + /* Completely counting through the PMC's period to trigger a new PMC + * overflow interrupt while in this interrupt routine is utterly + * disastrous! The EV6 and EV67 counters are sufficiently large to + * prevent this but to be really sure disable the PMCs. + */ + wrperfmon(PERFMON_CMD_DISABLE, cpuc->idx_mask); + + /* la_ptr is the counter that overflowed. */ + if (unlikely(la_ptr >= perf_max_events)) { + /* This should never occur! */ + irq_err_count++; + pr_warning("PMI: silly index %ld\n", la_ptr); + wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask); + return; + } + + idx = la_ptr; + + perf_sample_data_init(&data, 0); + for (j = 0; j < cpuc->n_events; j++) { + if (cpuc->current_idx[j] == idx) + break; + } + + if (unlikely(j == cpuc->n_events)) { + /* This can occur if the event is disabled right on a PMC overflow. */ + wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask); + return; + } + + event = cpuc->event[j]; + + if (unlikely(!event)) { + /* This should never occur! */ + irq_err_count++; + pr_warning("PMI: No event at index %d!\n", idx); + wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask); + return; + } + + hwc = &event->hw; + alpha_perf_event_update(event, hwc, idx, alpha_pmu->pmc_max_period[idx]+1); + data.period = event->hw.last_period; + + if (alpha_perf_event_set_period(event, hwc, idx)) { + if (perf_event_overflow(event, 1, &data, regs)) { + /* Interrupts coming too quickly; "throttle" the + * counter, i.e., disable it for a little while. + */ + cpuc->idx_mask &= ~(1UL<idx_mask); + + return; +} + + + +/* + * Init call to initialise performance events at kernel startup. + */ +void __init init_hw_perf_events(void) +{ + pr_info("Performance events: "); + + if (!supported_cpu()) { + pr_cont("No support for your CPU.\n"); + return; + } + + pr_cont("Supported CPU type!\n"); + + /* Override performance counter IRQ vector */ + + perf_irq = alpha_perf_event_irq_handler; + + /* And set up PMU specification */ + alpha_pmu = &ev67_pmu; + perf_max_events = alpha_pmu->num_pmcs; +} + diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c index 395a464353b8..88e608aebc8c 100644 --- a/arch/alpha/kernel/process.c +++ b/arch/alpha/kernel/process.c @@ -387,7 +387,7 @@ EXPORT_SYMBOL(dump_elf_task_fp); * sys_execve() executes a new program. */ asmlinkage int -do_sys_execve(char __user *ufilename, char __user * __user *argv, +do_sys_execve(const char __user *ufilename, char __user * __user *argv, char __user * __user *envp, struct pt_regs *regs) { int error; diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c index 1efbed82c0fd..eacceb26d9c8 100644 --- a/arch/alpha/kernel/time.c +++ b/arch/alpha/kernel/time.c @@ -41,6 +41,7 @@ #include #include #include +#include #include #include @@ -82,6 +83,26 @@ static struct { unsigned long est_cycle_freq; +#ifdef CONFIG_PERF_EVENTS + +DEFINE_PER_CPU(u8, perf_event_pending); + +#define set_perf_event_pending_flag() __get_cpu_var(perf_event_pending) = 1 +#define test_perf_event_pending() __get_cpu_var(perf_event_pending) +#define clear_perf_event_pending() __get_cpu_var(perf_event_pending) = 0 + +void set_perf_event_pending(void) +{ + set_perf_event_pending_flag(); +} + +#else /* CONFIG_PERF_EVENTS */ + +#define test_perf_event_pending() 0 +#define clear_perf_event_pending() + +#endif /* CONFIG_PERF_EVENTS */ + static inline __u32 rpcc(void) { @@ -175,6 +196,11 @@ irqreturn_t timer_interrupt(int irq, void *dev) update_process_times(user_mode(get_irq_regs())); #endif + if (test_perf_event_pending()) { + clear_perf_event_pending(); + perf_event_do_pending(); + } + return IRQ_HANDLED; } diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e39caa8b0c93..92951103255a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -43,10 +43,6 @@ config SYS_SUPPORTS_APM_EMULATION config GENERIC_GPIO bool -config GENERIC_TIME - bool - default y - config ARCH_USES_GETTIMEOFFSET bool default n @@ -562,6 +558,18 @@ config ARCH_NUC93X Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a low-power and high performance MPEG-4/JPEG multimedia controller chip. +config ARCH_TEGRA + bool "NVIDIA Tegra" + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + select GENERIC_GPIO + select HAVE_CLK + select COMMON_CLKDEV + select ARCH_HAS_BARRIERS if CACHE_L2X0 + help + This enables support for NVIDIA Tegra based systems (Tegra APX, + Tegra 6xx and Tegra 2 series). + config ARCH_PNX4008 bool "Philips Nexperia PNX4008 Mobile" select CPU_ARM926T @@ -636,6 +644,7 @@ config ARCH_S3C2410 select ARCH_HAS_CPUFREQ select HAVE_CLK select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_I2C help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (), the IPAQ 1940 or @@ -665,6 +674,8 @@ config ARCH_S3C64XX select S3C_DEV_NAND select USB_ARCH_HAS_OHCI select SAMSUNG_GPIOLIB_4BIT + select HAVE_S3C2410_I2C + select HAVE_S3C2410_WATCHDOG help Samsung S3C64XX series based systems @@ -673,7 +684,10 @@ config ARCH_S5P6440 select CPU_V6 select GENERIC_GPIO select HAVE_CLK + select HAVE_S3C2410_WATCHDOG select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_I2C + select HAVE_S3C_RTC help Samsung S5P6440 CPU based systems @@ -683,6 +697,7 @@ config ARCH_S5P6442 select GENERIC_GPIO select HAVE_CLK select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_WATCHDOG help Samsung S5P6442 CPU based systems @@ -693,6 +708,9 @@ config ARCH_S5PC100 select CPU_V7 select ARM_L1_CACHE_SHIFT_6 select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_I2C + select HAVE_S3C_RTC + select HAVE_S3C2410_WATCHDOG help Samsung S5PC100 series based systems @@ -703,9 +721,21 @@ config ARCH_S5PV210 select HAVE_CLK select ARM_L1_CACHE_SHIFT_6 select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_I2C + select HAVE_S3C_RTC + select HAVE_S3C2410_WATCHDOG help Samsung S5PV210/S5PC110 series based systems +config ARCH_S5PV310 + bool "Samsung S5PV310/S5PC210" + select CPU_V7 + select GENERIC_GPIO + select HAVE_CLK + select GENERIC_CLOCKEVENTS + help + Samsung S5PV310 series based systems + config ARCH_SHARK bool "Shark" select CPU_SA110 @@ -907,10 +937,14 @@ source "arch/arm/mach-s5pc100/Kconfig" source "arch/arm/mach-s5pv210/Kconfig" +source "arch/arm/mach-s5pv310/Kconfig" + source "arch/arm/mach-shmobile/Kconfig" source "arch/arm/plat-stmp3xxx/Kconfig" +source "arch/arm/mach-tegra/Kconfig" + source "arch/arm/mach-u300/Kconfig" source "arch/arm/mach-ux500/Kconfig" @@ -1030,6 +1064,18 @@ config PL310_ERRATA_588369 is not correctly implemented in PL310 as clean lines are not invalidated as a result of these operations. Note that this errata uses Texas Instrument's secure monitor api. + +config ARM_ERRATA_720789 + bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" + depends on CPU_V7 && SMP + help + This option enables the workaround for the 720789 Cortex-A9 (prior to + r2p0) erratum. A faulty ASID can be sent to the other CPUs for the + broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. + As a consequence of this erratum, some TLB entries which should be + invalidated are not, resulting in an incoherency in the system page + tables. The workaround changes the TLB flushing routines to invalidate + entries regardless of the ASID. endmenu source "arch/arm/common/Kconfig" @@ -1098,10 +1144,11 @@ config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\ - ARCH_U8500 || ARCH_VEXPRESS_CA9X4) + ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) depends on GENERIC_CLOCKEVENTS select USE_GENERIC_SMP_HELPERS - select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) + select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\ + ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If @@ -1171,9 +1218,10 @@ config LOCAL_TIMERS bool "Use local timer interrupts" depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ - ARCH_U8500 || ARCH_VEXPRESS_CA9X4) + ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) default y - select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_OMAP4 || ARCH_U8500) + select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \ + ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS help Enable support for local timers on SMP platforms, rather then the legacy IPI broadcast method. Local timers allows the system @@ -1184,7 +1232,8 @@ source kernel/Kconfig.preempt config HZ int - default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210 + default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \ + ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER default AT91_TIMER_HZ if ARCH_AT91 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 63d998e8c672..99b8200138d2 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -174,11 +174,13 @@ machine-$(CONFIG_ARCH_S5P6440) := s5p6440 machine-$(CONFIG_ARCH_S5P6442) := s5p6442 machine-$(CONFIG_ARCH_S5PC100) := s5pc100 machine-$(CONFIG_ARCH_S5PV210) := s5pv210 +machine-$(CONFIG_ARCH_S5PV310) := s5pv310 machine-$(CONFIG_ARCH_SA1100) := sa1100 machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHMOBILE) := shmobile machine-$(CONFIG_ARCH_STMP378X) := stmp378x machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx +machine-$(CONFIG_ARCH_TEGRA) := tegra machine-$(CONFIG_ARCH_U300) := u300 machine-$(CONFIG_ARCH_U8500) := ux500 machine-$(CONFIG_ARCH_VERSATILE) := versatile diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 7636c9b3f9a7..68775e33476c 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -33,7 +33,7 @@ ifeq ($(CONFIG_CPU_XSCALE),y) OBJS += head-xscale.o endif -ifeq ($(CONFIG_PXA_SHARPSL),y) +ifeq ($(CONFIG_PXA_SHARPSL_DETECT_MACH_ID),y) OBJS += head-sharpsl.o endif diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index abf4d65acf62..6af9907c3b5c 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -170,9 +170,8 @@ not_angel: .text adr r0, LC0 - ARM( ldmia r0, {r1, r2, r3, r5, r6, r11, ip, sp}) - THUMB( ldmia r0, {r1, r2, r3, r5, r6, r11, ip} ) - THUMB( ldr sp, [r0, #32] ) + ldmia r0, {r1, r2, r3, r5, r6, r11, ip} + ldr sp, [r0, #28] #ifdef CONFIG_AUTO_ZRELADDR @ determine final kernel image address and r4, pc, #0xf8000000 diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 7974baacafce..6c0913562455 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c @@ -263,14 +263,6 @@ static int it8152_pci_platform_notify_remove(struct device *dev) return 0; } -int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) -{ - dev_dbg(dev, "%s: dma_addr %08x, size %08x\n", - __func__, dma_addr, size); - return (dev->bus == &pci_bus_type) && - ((dma_addr + size - PHYS_OFFSET) >= SZ_64M); -} - int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) { it8152_io.start = IT8152_IO_BASE + 0x12000; diff --git a/arch/arm/configs/am3517_evm_defconfig b/arch/arm/configs/am3517_evm_defconfig deleted file mode 100644 index ad2bc503f2b8..000000000000 --- a/arch/arm/configs/am3517_evm_defconfig +++ /dev/null @@ -1,127 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MCBSP is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP3517EVM=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_CAN=y -CONFIG_CAN_RAW=y -CONFIG_CAN_BCM=y -CONFIG_CAN_VCAN=y -CONFIG_CAN_DEV=y -CONFIG_CAN_CALC_BITTIMING=y -CONFIG_CAN_TI_HECC=y -CONFIG_CAN_DEBUG_DEVICES=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -# CONFIG_HWMON is not set -CONFIG_FB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=4 -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 -CONFIG_FB_OMAP2=y -CONFIG_PANEL_GENERIC=y -CONFIG_PANEL_SHARP_LQ043T1DG01=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/cm_t35_defconfig b/arch/arm/configs/cm_t35_defconfig deleted file mode 100644 index 8bb06334ce9c..000000000000 --- a/arch/arm/configs/cm_t35_defconfig +++ /dev/null @@ -1,157 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_CM_T35=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_LIB80211=m -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_FW_LOADER=m -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_OMAP2=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMSC911X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_TWL4030=m -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=m -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_TWL4030=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_STORAGE=y -CONFIG_USB_TEST=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_TWL4030=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_NTFS_FS=m -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=m -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/devkit8000_defconfig b/arch/arm/configs/devkit8000_defconfig deleted file mode 100644 index 786cbe49528e..000000000000 --- a/arch/arm/configs/devkit8000_defconfig +++ /dev/null @@ -1,184 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_DEVKIT8000=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyS2,115200n8 root=/dev/nfs nfsroot=192.168.1.1:home/nfsroot/current,home/nfsroot/current ip=dhcp rw noinitrd root delay=3" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_IRDA=y -CONFIG_BT=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_RAM=y -CONFIG_MTD_ROM=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_UBI=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=40960 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_DM9000=y -CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_MATRIX=y -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -CONFIG_SERIO_RAW=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_RAW_DRIVER=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_TWL4030=y -# CONFIG_HWMON is not set -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_POWER=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_FB=y -CONFIG_FB_FOREIGN_ENDIAN=y -CONFIG_FB_OMAP_BOOTLOADER_INIT=y -CONFIG_OMAP2_DSS=y -CONFIG_FB_OMAP2=y -CONFIG_PANEL_GENERIC=y -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_DEBUG=y -CONFIG_USB_STORAGE=m -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DEBUG=y -CONFIG_USB_ETH=m -# CONFIG_USB_ETH_RNDIS is not set -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=m -CONFIG_MMC_OMAP_HS=y -CONFIG_MMC_SPI=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_TWL4030=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_UBIFS_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_T10DIF=m -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/igep0020_defconfig b/arch/arm/configs/igep0020_defconfig deleted file mode 100644 index fcda057d5844..000000000000 --- a/arch/arm/configs/igep0020_defconfig +++ /dev/null @@ -1,179 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_IGEP0020=y -CONFIG_ARM_THUMBEE=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIVHCI=m -CONFIG_BT_MRVL=m -CONFIG_BT_MRVL_SDIO=m -CONFIG_CFG80211=y -CONFIG_MAC80211=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_STANDALONE is not set -CONFIG_CONNECTOR=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_OMAP2=y -CONFIG_MTD_ONENAND_2X_PROGRAM=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMSC911X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_LIBERTAS=y -CONFIG_LIBERTAS_SDIO=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_TWL4030=y -CONFIG_POWER_SUPPLY=y -# CONFIG_HWMON is not set -CONFIG_SSB=m -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_FB=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -# CONFIG_OMAP2_DSS_VENC is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -CONFIG_FB_OMAP2=y -# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set -CONFIG_PANEL_GENERIC=y -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_SOUND=y -CONFIG_SND=y -# CONFIG_SND_SUPPORT_OLD_API is not set -# CONFIG_SND_VERBOSE_PROCFS is not set -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_IGEP0020=y -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_OHCI_HCD=y -CONFIG_MMC=y -CONFIG_MMC_DEBUG=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_OMAP_HS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_MICHAEL_MIC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=m -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig deleted file mode 100644 index aa24172a3e2c..000000000000 --- a/arch/arm/configs/omap3_beagle_defconfig +++ /dev/null @@ -1,134 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -# CONFIG_OMAP_MUX is not set -# CONFIG_OMAP_MCBSP is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP3_BEAGLE=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_NAND=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_GPIO_TWL4030=y -# CONFIG_HWMON is not set -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_FB=y -CONFIG_FB_OMAP=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_RTC_CLASS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_FTRACE is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap3_evm_defconfig b/arch/arm/configs/omap3_evm_defconfig deleted file mode 100644 index 3b072e8e71fb..000000000000 --- a/arch/arm/configs/omap3_evm_defconfig +++ /dev/null @@ -1,160 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MCBSP is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP3EVM=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_NAND=y -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -CONFIG_MTD_ONENAND_OMAP2=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMSC911X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_TWL4030=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_FB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=4 -# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 -CONFIG_FB_OMAP2=y -# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set -CONFIG_PANEL_GENERIC=y -CONFIG_PANEL_SHARP_LS037V7DW01=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_STORAGE=y -CONFIG_USB_TEST=y -CONFIG_USB_GADGET=y -CONFIG_USB_ZERO=m -CONFIG_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap3_pandora_defconfig b/arch/arm/configs/omap3_pandora_defconfig deleted file mode 100644 index d5a622689370..000000000000 --- a/arch/arm/configs/omap3_pandora_defconfig +++ /dev/null @@ -1,158 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP3_PANDORA=y -CONFIG_ARM_THUMBEE=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT_VOLUNTARY=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_OMAP2=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=800 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 -CONFIG_INPUT_JOYDEV=y -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_MOUSE_PS2 is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_TWL4030_PWRBUTTON=y -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_TWL4030=y -# CONFIG_HWMON is not set -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_POWER=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_DEBUG=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_FB=y -CONFIG_OMAP2_DSS=y -CONFIG_FB_OMAP2=y -CONFIG_PANEL_TPO_TD043MTEA1=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_VERBOSE_PRINTK=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_PERIPHERAL=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_TWL4030=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CIFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -CONFIG_CRC_CCITT=y diff --git a/arch/arm/configs/omap3_stalker_lks_defconfig b/arch/arm/configs/omap3_stalker_lks_defconfig deleted file mode 100644 index 1d1ab0b0b71c..000000000000 --- a/arch/arm/configs/omap3_stalker_lks_defconfig +++ /dev/null @@ -1,150 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MCBSP is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_SBC3530=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_NAND=y -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -CONFIG_MTD_ONENAND_OMAP2=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMSC911X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_TWL4030=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -# CONFIG_VGA_CONSOLE is not set -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_STORAGE=y -CONFIG_USB_TEST=y -CONFIG_USB_GADGET=y -CONFIG_USB_ZERO=m -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap3_touchbook_defconfig b/arch/arm/configs/omap3_touchbook_defconfig deleted file mode 100644 index e988eccc93a8..000000000000 --- a/arch/arm/configs/omap3_touchbook_defconfig +++ /dev/null @@ -1,621 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=15 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -# CONFIG_ELF_CORE is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP3_TOUCHBOOK=y -CONFIG_ARM_THUMBEE=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_LEDS=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -CONFIG_KEXEC=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m -CONFIG_IP_VS_FTP=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -CONFIG_IP_DCCP=m -CONFIG_IP_SCTP=m -CONFIG_TIPC=m -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -CONFIG_BRIDGE=m -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -CONFIG_WAN_ROUTER=m -CONFIG_NET_SCHED=y -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -CONFIG_NET_CLS_IND=y -CONFIG_BT=y -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=y -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=y -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=y -CONFIG_BT_HCIBTUSB=y -CONFIG_BT_HCIBTSDIO=y -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=y -CONFIG_BT_HCIBPA10X=y -CONFIG_BT_HCIBFUSB=y -CONFIG_AF_RXRPC=m -CONFIG_CFG80211=m -CONFIG_LIB80211=y -CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_WIMAX=m -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_PLATFORM=y -CONFIG_MTD_UBI=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_CDROM_PKTCDVD=m -CONFIG_EEPROM_93CX6=y -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -CONFIG_ISCSI_TCP=m -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_DELAY=m -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_ATM_DRIVERS is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL_TRAP=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_UINPUT=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_SPI_SPIDEV=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_TWL4030=y -CONFIG_POWER_SUPPLY=y -CONFIG_BATTERY_BQ27x00=y -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_FB=y -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_SEQUENCER=m -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -# CONFIG_SND_ARM is not set -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_OXU210HP_HCD=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m -CONFIG_USB_STORAGE=y -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_DEBUG=m -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_TEST=m -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_ZERO=m -CONFIG_USB_ZERO_HNPTEST=y -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_MIDI_GADGET=m -CONFIG_USB_G_PRINTER=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_USB_GPIO_VBUS=y -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_UNSAFE_RESUME=y -CONFIG_SDIO_UART=y -CONFIG_MMC_OMAP_HS=y -CONFIG_MMC_SPI=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_TWL4030=y -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=m -CONFIG_REISERFS_FS=m -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -CONFIG_JFS_FS=m -CONFIG_XFS_FS=m -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=y -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_NTFS_FS=m -CONFIG_NTFS_RW=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RUBIN=y -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_SQUASHFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_UNIXWARE_DISKLABEL=y -CONFIG_EFI_PARTITION=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap_2430sdp_defconfig b/arch/arm/configs/omap_2430sdp_defconfig deleted file mode 100644 index 0cf4147a9366..000000000000 --- a/arch/arm/configs/omap_2430sdp_defconfig +++ /dev/null @@ -1,136 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP2=y -# CONFIG_OMAP_MUX_WARNINGS is not set -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP2430=y -CONFIG_MACH_OMAP_2430SDP=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/ram0 rw console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192" -CONFIG_FPE_NWFPE=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IPV6 is not set -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -CONFIG_MTD_ONENAND_OMAP2=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SCSI=m -CONFIG_BLK_DEV_SD=m -CONFIG_CHR_DEV_SG=m -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_TWL4030_CORE=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_OMAP=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_USB=m -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_MON=m -CONFIG_USB_MUSB_HDRC=m -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_STORAGE=m -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_ZERO=m -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_TIMER_STATS=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_DES=y -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap_3430sdp_defconfig b/arch/arm/configs/omap_3430sdp_defconfig deleted file mode 100644 index 5dbe595999be..000000000000 --- a/arch/arm/configs/omap_3430sdp_defconfig +++ /dev/null @@ -1,178 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP_3430SDP=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyS2,115200 root=/dev/mmcblk0p3 rootwait debug" -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_NAND=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_NETDEVICES=y -CONFIG_PHYLIB=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_SERIO is not set -# CONFIG_CONSOLE_TRANSLATIONS is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_TWL4030=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_TWL4030_WATCHDOG=y -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_FB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=4 -CONFIG_FB_OMAP2=y -CONFIG_PANEL_GENERIC=y -CONFIG_PANEL_SHARP_LS037V7DW01=y -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=m -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_STORAGE=y -CONFIG_USB_TEST=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_MMC=y -CONFIG_MMC_UNSAFE_RESUME=y -CONFIG_SDIO_UART=y -CONFIG_MMC_OMAP_HS=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_TWL4030=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_FTRACE is not set -# CONFIG_ARM_UNWIND is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap_3630sdp_defconfig b/arch/arm/configs/omap_3630sdp_defconfig deleted file mode 100644 index 8e8f4e94609c..000000000000 --- a/arch/arm/configs/omap_3630sdp_defconfig +++ /dev/null @@ -1,154 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP_3630SDP=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_PM_VERBOSE=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_CONNECTOR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_PHYLIB=y -CONFIG_SMSC_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_TWL4030=y -CONFIG_W1=y -CONFIG_POWER_SUPPLY=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -# CONFIG_VGA_CONSOLE is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_DEBUG=y -CONFIG_USB_STORAGE=y -CONFIG_USB_TEST=m -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_DEBUG=y -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_ZERO=m -CONFIG_USB_AUDIO=m -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_RTC_CLASS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap_apollon_2420_defconfig b/arch/arm/configs/omap_apollon_2420_defconfig deleted file mode 100644 index 0b24858f5d46..000000000000 --- a/arch/arm/configs/omap_apollon_2420_defconfig +++ /dev/null @@ -1,92 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP2=y -# CONFIG_OMAP_MCBSP is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_ARCH_OMAP2420=y -CONFIG_MACH_OMAP_APOLLON=y -# CONFIG_ARM_THUMB is not set -CONFIG_PREEMPT=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192" -CONFIG_VFP=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_GENERIC=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_OMAP=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -# CONFIG_HID is not set -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_MMC=y -CONFIG_MMC_OMAP=y -CONFIG_EXT2_FS=y -CONFIG_AUTOFS4_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap_h4_2420_defconfig b/arch/arm/configs/omap_h4_2420_defconfig deleted file mode 100644 index 858f93aac2b2..000000000000 --- a/arch/arm/configs/omap_h4_2420_defconfig +++ /dev/null @@ -1,107 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP2=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_ARCH_OMAP2420=y -CONFIG_MACH_OMAP_H4=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/ram0 rw console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192" -CONFIG_FPE_NWFPE=y -CONFIG_BINFMT_MISC=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IPV6 is not set -CONFIG_IRDA=y -CONFIG_IRLAN=y -CONFIG_IRCOMM=y -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_OMAP=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_I2C=y -CONFIG_I2C_OMAP=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_MENELAUS=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_OMAP=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_MMC=y -CONFIG_MMC_OMAP=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig deleted file mode 100644 index c7bb558316d5..000000000000 --- a/arch/arm/configs/omap_ldp_defconfig +++ /dev/null @@ -1,135 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP_LDP=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_BINFMT_MISC=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_CONNECTOR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_SMSC_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_SMSC911X=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_TWL4030=y -CONFIG_W1=y -CONFIG_POWER_SUPPLY=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_TWL4030_CORE=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_TILEBLITTING=y -CONFIG_FB_OMAP=y -CONFIG_FB_OMAP_LCD_VGA=y -CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=4 -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_PLATFORM=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_BACKLIGHT_GENERIC is not set -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_SND=y -# CONFIG_USB_SUPPORT is not set -CONFIG_MMC=y -CONFIG_RTC_CLASS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_FTRACE is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig deleted file mode 100644 index 0a7ed449cded..000000000000 --- a/arch/arm/configs/omap_zoom2_defconfig +++ /dev/null @@ -1,143 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP_ZOOM2=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_PM_VERBOSE=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_CONNECTOR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_SMSC_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_SMSC911X=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_TWL4030=y -CONFIG_W1=y -CONFIG_POWER_SUPPLY=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -# CONFIG_VGA_CONSOLE is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_DEBUG=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DEBUG=y -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_ZERO=m -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_RTC_CLASS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/omap_zoom3_defconfig b/arch/arm/configs/omap_zoom3_defconfig deleted file mode 100644 index f8085b0b9ecb..000000000000 --- a/arch/arm/configs/omap_zoom3_defconfig +++ /dev/null @@ -1,155 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OMAP_ZOOM3=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -CONFIG_FPE_NWFPE=y -CONFIG_VFP=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_PM_VERBOSE=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_CONNECTOR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_SMSC_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_SMSC911X=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_TWL4030=y -CONFIG_W1=y -CONFIG_POWER_SUPPLY=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_VIDEO_OUTPUT_CONTROL=m -# CONFIG_VGA_CONSOLE is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_DEBUG=y -CONFIG_USB_STORAGE=y -CONFIG_USB_TEST=m -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_DEBUG=y -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_ZERO=m -CONFIG_USB_AUDIO=m -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_TWL4030_USB=y -CONFIG_MMC=y -CONFIG_MMC_UNSAFE_RESUME=y -CONFIG_MMC_OMAP_HS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_TWL4030=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/overo_defconfig b/arch/arm/configs/overo_defconfig deleted file mode 100644 index 6fa1b14a7a9c..000000000000 --- a/arch/arm/configs/overo_defconfig +++ /dev/null @@ -1,275 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -# CONFIG_ELF_CORE is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_OVERO=y -CONFIG_ARM_THUMBEE=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_LEDS=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -CONFIG_KEXEC=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -CONFIG_BT=y -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=y -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=y -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=y -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIBCM203X=y -CONFIG_BT_HCIBPA10X=y -CONFIG_CFG80211=y -CONFIG_MAC80211=y -CONFIG_MAC80211_RC_PID=y -CONFIG_MAC80211_RC_DEFAULT_PID=y -CONFIG_MAC80211_LEDS=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_NAND=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_CDROM_PKTCDVD=m -CONFIG_EEPROM_LEGACY=y -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=m -CONFIG_SCSI_MULTI_LUN=y -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_DELAY=m -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_TUN=m -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_USB_ZD1201=m -CONFIG_RTL8187=m -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -CONFIG_LIBERTAS=y -CONFIG_LIBERTAS_USB=y -CONFIG_LIBERTAS_SDIO=y -CONFIG_LIBERTAS_DEBUG=y -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=y -CONFIG_USB_NET_DM9601=m -CONFIG_USB_NET_GL620A=m -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET=m -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=m -CONFIG_PPP=m -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_DEBUG_GPIO=y -CONFIG_GPIO_SYSFS=y -CONFIG_POWER_SUPPLY=m -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_SEQUENCER=m -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_VERBOSE_PRINTK=y -CONFIG_SND_DEBUG=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_MUSB_PIO_ONLY=y -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SERIAL=m -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_LED=m -CONFIG_MMC=y -CONFIG_MMC_UNSAFE_RESUME=y -CONFIG_SDIO_UART=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_XFS_FS=m -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_FUSE_FS=m -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RUBIN=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_FTRACE is not set -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig deleted file mode 100644 index ffaef43ec0bb..000000000000 --- a/arch/arm/configs/rx51_defconfig +++ /dev/null @@ -1,222 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_SLAB=y -CONFIG_KPROBES=y -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP3430=y -CONFIG_MACH_NOKIA_RX51=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="init=/sbin/preinit ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs rootflags=bulk_read,no_chk_data_crc rw console=ttyMTD,log console=tty0 console=ttyS2,115200n8" -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_NETFILTER=y -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_FILTER=m -CONFIG_PHONET=y -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_CFG80211=y -CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_OOPS=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_OMAP2=y -CONFIG_MTD_UBI=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_SCSI=m -CONFIG_BLK_DEV_SD=m -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_NETDEVICES=y -CONFIG_TUN=m -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=m -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=m -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_UINPUT=m -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_SPI=y -CONFIG_SPI_OMAP24XX=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_TWL4030=y -CONFIG_WATCHDOG=y -CONFIG_OMAP_WATCHDOG=m -CONFIG_TWL4030_WATCHDOG=m -CONFIG_TWL4030_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_FB=y -CONFIG_OMAP2_DSS=y -# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -# CONFIG_OMAP2_DSS_DPI is not set -# CONFIG_OMAP2_DSS_VENC is not set -CONFIG_OMAP2_DSS_SDI=y -CONFIG_FB_OMAP2=y -CONFIG_PANEL_ACX565AKM=y -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_SND=y -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_HID=m -CONFIG_USB_HID=m -CONFIG_HID_A4TECH=m -CONFIG_HID_APPLE=m -CONFIG_HID_BELKIN=m -CONFIG_HID_CHERRY=m -CONFIG_HID_CHICONY=m -CONFIG_HID_CYPRESS=m -CONFIG_HID_EZKEY=m -CONFIG_HID_GYRATION=m -CONFIG_HID_LOGITECH=m -CONFIG_HID_MICROSOFT=m -CONFIG_HID_MONTEREY=m -CONFIG_HID_PANTHERLORD=m -CONFIG_HID_PETALYNX=m -CONFIG_HID_SAMSUNG=m -CONFIG_HID_SONY=m -CONFIG_HID_SUNPLUS=m -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG_BLACKLIST_HUB=y -CONFIG_USB_MON=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_STORAGE=m -CONFIG_USB_LIBUSUAL=y -CONFIG_USB_TEST=m -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_DEBUG=y -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_ZERO=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_NOKIA=m -CONFIG_TWL4030_USB=y -CONFIG_MMC=m -# CONFIG_MMC_BLOCK_BOUNCE is not set -CONFIG_MMC_OMAP_HS=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m -CONFIG_RTC_CLASS=m -CONFIG_RTC_DRV_TWL4030=m -CONFIG_EXT2_FS=m -CONFIG_EXT3_FS=m -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_QFMT_V2=y -CONFIG_FUSE_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_TMPFS=y -CONFIG_UBIFS_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_TIMER_STATS=y -CONFIG_PROVE_LOCKING=y -CONFIG_LOCK_STAT=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_SECURITY=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_CRC7=m -CONFIG_LIBCRC32C=y diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig deleted file mode 100644 index 22c2d147f793..000000000000 --- a/arch/arm/configs/s5pc110_defconfig +++ /dev/null @@ -1,66 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_S5PV210=y -CONFIG_S3C_LOWLEVEL_UART_PORT=1 -CONFIG_MACH_SMDKC110=y -CONFIG_VMSPLIT_2G=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_SAMSUNG=y -CONFIG_SERIAL_SAMSUNG_CONSOLE=y -CONFIG_HW_RANDOM=y -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -CONFIG_EXT2_FS=y -CONFIG_INOTIFY=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_CRAMFS=y -CONFIG_ROMFS_FS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_BSD_DISKLABEL=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_PREEMPT is not set -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -CONFIG_DEBUG_LL=y -CONFIG_EARLY_PRINTK=y -CONFIG_DEBUG_S3C_UART=1 -CONFIG_CRC_CCITT=y diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig index 1753836d0055..0488a1eb4d7d 100644 --- a/arch/arm/configs/s5pv210_defconfig +++ b/arch/arm/configs/s5pv210_defconfig @@ -7,6 +7,11 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_S5PV210=y CONFIG_S3C_LOWLEVEL_UART_PORT=1 +CONFIG_S3C_DEV_FB=y +CONFIG_S5PV210_SETUP_FB_24BPP=y +CONFIG_MACH_AQUILA=y +CONFIG_MACH_GONI=y +CONFIG_MACH_SMDKC110=y CONFIG_MACH_SMDKV210=y CONFIG_VMSPLIT_2G=y CONFIG_PREEMPT=y diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild index 73237bd130a2..6550db3aa5c7 100644 --- a/arch/arm/include/asm/Kbuild +++ b/arch/arm/include/asm/Kbuild @@ -1,3 +1,3 @@ include include/asm-generic/Kbuild.asm -unifdef-y += hwcap.h +header-y += hwcap.h diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 66c160b8547f..9d6122096fbe 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -14,7 +14,7 @@ * cache before the transfer is done, causing old data to be seen by * the CPU. */ -#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES +#define ARCH_DMA_MINALIGN L1_CACHE_BYTES /* * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 69ce0727edb5..c226fe10553e 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -144,16 +144,6 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask) return 0; } -static inline int dma_get_cache_alignment(void) -{ - return 32; -} - -static inline int dma_is_consistent(struct device *dev, dma_addr_t handle) -{ - return !!arch_is_coherent(); -} - /* * DMA errors are defined by all-bits-set in the DMA address. */ @@ -298,7 +288,15 @@ extern void dmabounce_unregister_dev(struct device *); * DMA access and 1 if the buffer needs to be bounced. * */ +#ifdef CONFIG_SA1111 extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); +#else +static inline int dma_needs_bounce(struct device *dev, dma_addr_t addr, + size_t size) +{ + return 0; +} +#endif /* * The DMA API, implemented by dmabounce.c. See below for descriptions. diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index 6750b8e45a49..5747a8baa413 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h @@ -59,6 +59,8 @@ typedef struct user_fp elf_fpregset_t; #define R_ARM_THM_CALL 10 #define R_ARM_THM_JUMP24 30 +#define R_ARM_THM_MOVW_ABS_NC 47 +#define R_ARM_THM_MOVT_ABS 48 /* * These are used to set parameters in the core dumps. diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h index f82b25d4f73e..212e47828c79 100644 --- a/arch/arm/include/asm/hardware/coresight.h +++ b/arch/arm/include/asm/hardware/coresight.h @@ -48,8 +48,6 @@ struct tracectx { /* CoreSight Component Registers */ #define CSCR_CLASS 0xff4 -#define CSCR_PRSR 0x314 - #define UNLOCK_MAGIC 0xc5acce55 /* ETM control register, "ETM Architecture", 3.3.1 */ @@ -132,6 +130,12 @@ struct tracectx { ETMCTRL_BRANCH_OUTPUT | \ ETMCTRL_DO_CONTEXTID) +/* ETM management registers, "ETM Architecture", 3.5.24 */ +#define ETMMR_OSLAR 0x300 +#define ETMMR_OSLSR 0x304 +#define ETMMR_OSSRR 0x308 +#define ETMMR_PDSR 0x314 + /* ETB registers, "CoreSight Components TRM", 9.3 */ #define ETBR_DEPTH 0x04 #define ETBR_STATUS 0x0c diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h index 6a6c66be7f65..f35b86e68dd5 100644 --- a/arch/arm/include/asm/hardware/pl080.h +++ b/arch/arm/include/asm/hardware/pl080.h @@ -43,7 +43,7 @@ /* Per channel configuration registers */ -#define PL008_Cx_STRIDE (0x20) +#define PL080_Cx_STRIDE (0x20) #define PL080_Cx_BASE(x) ((0x100 + (x * 0x20))) #define PL080_Cx_SRC_ADDR(x) ((0x100 + (x * 0x20))) #define PL080_Cx_DST_ADDR(x) ((0x104 + (x * 0x20))) @@ -68,6 +68,8 @@ #define PL080_CONTROL_TC_IRQ_EN (1 << 31) #define PL080_CONTROL_PROT_MASK (0x7 << 28) #define PL080_CONTROL_PROT_SHIFT (28) +#define PL080_CONTROL_PROT_CACHE (1 << 30) +#define PL080_CONTROL_PROT_BUFF (1 << 29) #define PL080_CONTROL_PROT_SYS (1 << 28) #define PL080_CONTROL_DST_INCR (1 << 27) #define PL080_CONTROL_SRC_INCR (1 << 26) diff --git a/arch/arm/include/asm/hardware/scoop.h b/arch/arm/include/asm/hardware/scoop.h index 46492a63a7c4..ebb3ceaa8fac 100644 --- a/arch/arm/include/asm/hardware/scoop.h +++ b/arch/arm/include/asm/hardware/scoop.h @@ -22,18 +22,23 @@ #define SCOOP_GPWR 0x24 #define SCOOP_GPRR 0x28 -#define SCOOP_GPCR_PA22 ( 1 << 12 ) -#define SCOOP_GPCR_PA21 ( 1 << 11 ) -#define SCOOP_GPCR_PA20 ( 1 << 10 ) -#define SCOOP_GPCR_PA19 ( 1 << 9 ) -#define SCOOP_GPCR_PA18 ( 1 << 8 ) -#define SCOOP_GPCR_PA17 ( 1 << 7 ) -#define SCOOP_GPCR_PA16 ( 1 << 6 ) -#define SCOOP_GPCR_PA15 ( 1 << 5 ) -#define SCOOP_GPCR_PA14 ( 1 << 4 ) -#define SCOOP_GPCR_PA13 ( 1 << 3 ) -#define SCOOP_GPCR_PA12 ( 1 << 2 ) -#define SCOOP_GPCR_PA11 ( 1 << 1 ) +#define SCOOP_CPR_OUT (1 << 7) +#define SCOOP_CPR_SD_3V (1 << 2) +#define SCOOP_CPR_CF_XV (1 << 1) +#define SCOOP_CPR_CF_3V (1 << 0) + +#define SCOOP_GPCR_PA22 (1 << 12) +#define SCOOP_GPCR_PA21 (1 << 11) +#define SCOOP_GPCR_PA20 (1 << 10) +#define SCOOP_GPCR_PA19 (1 << 9) +#define SCOOP_GPCR_PA18 (1 << 8) +#define SCOOP_GPCR_PA17 (1 << 7) +#define SCOOP_GPCR_PA16 (1 << 6) +#define SCOOP_GPCR_PA15 (1 << 5) +#define SCOOP_GPCR_PA14 (1 << 4) +#define SCOOP_GPCR_PA13 (1 << 3) +#define SCOOP_GPCR_PA12 (1 << 2) +#define SCOOP_GPCR_PA11 (1 << 1) struct scoop_config { unsigned short io_out; diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h index feb988a7ec37..5aff58126602 100644 --- a/arch/arm/include/asm/highmem.h +++ b/arch/arm/include/asm/highmem.h @@ -36,7 +36,7 @@ extern void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte); extern void *kmap(struct page *page); extern void kunmap(struct page *page); extern void *kmap_atomic(struct page *page, enum km_type type); -extern void kunmap_atomic(void *kvaddr, enum km_type type); +extern void kunmap_atomic_notypecheck(void *kvaddr, enum km_type type); extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type); extern struct page *kmap_atomic_to_page(const void *ptr); #endif diff --git a/arch/arm/include/asm/ioctls.h b/arch/arm/include/asm/ioctls.h index 7f0b6d13296a..0b30894b5482 100644 --- a/arch/arm/include/asm/ioctls.h +++ b/arch/arm/include/asm/ioctls.h @@ -52,6 +52,7 @@ #define TCSETSF2 _IOW('T',0x2D, struct termios2) #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ +#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ #define TIOCGRS485 0x542E #define TIOCSRS485 0x542F @@ -81,6 +82,7 @@ #define TIOCPKT_START 8 #define TIOCPKT_NOSTOP 16 #define TIOCPKT_DOSTOP 32 +#define TIOCPKT_IOCTL 64 #define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ diff --git a/arch/arm/include/asm/kgdb.h b/arch/arm/include/asm/kgdb.h index 67af4b841984..08265993227f 100644 --- a/arch/arm/include/asm/kgdb.h +++ b/arch/arm/include/asm/kgdb.h @@ -70,11 +70,11 @@ extern int kgdb_fault_expected; #define _GP_REGS 16 #define _FP_REGS 8 #define _EXTRA_REGS 2 -#define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) +#define DBG_MAX_REG_NUM (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) #define KGDB_MAX_NO_CPUS 1 #define BUFMAX 400 -#define NUMREGBYTES (GDB_MAX_REGS << 2) +#define NUMREGBYTES (DBG_MAX_REG_NUM << 2) #define NUMCRITREGBYTES (32 << 2) #define _R0 0 @@ -93,7 +93,7 @@ extern int kgdb_fault_expected; #define _SPT 13 #define _LR 14 #define _PC 15 -#define _CPSR (GDB_MAX_REGS - 1) +#define _CPSR (DBG_MAX_REG_NUM - 1) /* * So that we can denote the end of a frame for tracing, diff --git a/arch/arm/include/asm/local64.h b/arch/arm/include/asm/local64.h new file mode 100644 index 000000000000..36c93b5cc239 --- /dev/null +++ b/arch/arm/include/asm/local64.h @@ -0,0 +1 @@ +#include diff --git a/arch/arm/include/asm/termbits.h b/arch/arm/include/asm/termbits.h index f784d11f40b5..704135d28d1d 100644 --- a/arch/arm/include/asm/termbits.h +++ b/arch/arm/include/asm/termbits.h @@ -177,6 +177,7 @@ struct ktermios { #define FLUSHO 0010000 #define PENDIN 0040000 #define IEXTEN 0100000 +#define EXTPROC 0200000 /* tcflow() and TCXONC use these */ #define TCOOFF 0 diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index bd863d8608cd..33b546ae72d4 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h @@ -378,7 +378,11 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm) if (tlb_flag(TLB_V6_I_ASID)) asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc"); if (tlb_flag(TLB_V7_UIS_ASID)) +#ifdef CONFIG_ARM_ERRATA_720789 + asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc"); +#else asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc"); +#endif if (tlb_flag(TLB_BTB)) { /* flush the branch target cache */ @@ -424,7 +428,11 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) if (tlb_flag(TLB_V6_I_PAGE)) asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc"); if (tlb_flag(TLB_V7_UIS_PAGE)) +#ifdef CONFIG_ARM_ERRATA_720789 + asm("mcr p15, 0, %0, c8, c3, 3" : : "r" (uaddr & PAGE_MASK) : "cc"); +#else asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc"); +#endif if (tlb_flag(TLB_BTB)) { /* flush the branch target cache */ diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 2c1db77d7848..f05a35a59694 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -92,75 +92,111 @@ ENDPROC(ret_from_fork) #define CALL(x) .long x #ifdef CONFIG_FUNCTION_TRACER +/* + * When compiling with -pg, gcc inserts a call to the mcount routine at the + * start of every function. In mcount, apart from the function's address (in + * lr), we need to get hold of the function's caller's address. + * + * Older GCCs (pre-4.4) inserted a call to a routine called mcount like this: + * + * bl mcount + * + * These versions have the limitation that in order for the mcount routine to + * be able to determine the function's caller's address, an APCS-style frame + * pointer (which is set up with something like the code below) is required. + * + * mov ip, sp + * push {fp, ip, lr, pc} + * sub fp, ip, #4 + * + * With EABI, these frame pointers are not available unless -mapcs-frame is + * specified, and if building as Thumb-2, not even then. + * + * Newer GCCs (4.4+) solve this problem by introducing a new version of mcount, + * with call sites like: + * + * push {lr} + * bl __gnu_mcount_nc + * + * With these compilers, frame pointers are not necessary. + * + * mcount can be thought of as a function called in the middle of a subroutine + * call. As such, it needs to be transparent for both the caller and the + * callee: the original lr needs to be restored when leaving mcount, and no + * registers should be clobbered. (In the __gnu_mcount_nc implementation, we + * clobber the ip register. This is OK because the ARM calling convention + * allows it to be clobbered in subroutines and doesn't use it to hold + * parameters.) + */ #ifdef CONFIG_DYNAMIC_FTRACE ENTRY(mcount) - stmdb sp!, {r0-r3, lr} - mov r0, lr - sub r0, r0, #MCOUNT_INSN_SIZE + stmdb sp!, {r0-r3, lr} + mov r0, lr + sub r0, r0, #MCOUNT_INSN_SIZE .globl mcount_call mcount_call: - bl ftrace_stub - ldr lr, [fp, #-4] @ restore lr - ldmia sp!, {r0-r3, pc} + bl ftrace_stub + ldr lr, [fp, #-4] @ restore lr + ldmia sp!, {r0-r3, pc} ENTRY(ftrace_caller) - stmdb sp!, {r0-r3, lr} - ldr r1, [fp, #-4] - mov r0, lr - sub r0, r0, #MCOUNT_INSN_SIZE + stmdb sp!, {r0-r3, lr} + ldr r1, [fp, #-4] + mov r0, lr + sub r0, r0, #MCOUNT_INSN_SIZE .globl ftrace_call ftrace_call: - bl ftrace_stub - ldr lr, [fp, #-4] @ restore lr - ldmia sp!, {r0-r3, pc} + bl ftrace_stub + ldr lr, [fp, #-4] @ restore lr + ldmia sp!, {r0-r3, pc} #else ENTRY(__gnu_mcount_nc) - stmdb sp!, {r0-r3, lr} - ldr r0, =ftrace_trace_function - ldr r2, [r0] - adr r0, ftrace_stub - cmp r0, r2 - bne gnu_trace - ldmia sp!, {r0-r3, ip, lr} - mov pc, ip + stmdb sp!, {r0-r3, lr} + ldr r0, =ftrace_trace_function + ldr r2, [r0] + adr r0, ftrace_stub + cmp r0, r2 + bne gnu_trace + ldmia sp!, {r0-r3, ip, lr} + mov pc, ip gnu_trace: - ldr r1, [sp, #20] @ lr of instrumented routine - mov r0, lr - sub r0, r0, #MCOUNT_INSN_SIZE - mov lr, pc - mov pc, r2 - ldmia sp!, {r0-r3, ip, lr} - mov pc, ip + ldr r1, [sp, #20] @ lr of instrumented routine + mov r0, lr + sub r0, r0, #MCOUNT_INSN_SIZE + mov lr, pc + mov pc, r2 + ldmia sp!, {r0-r3, ip, lr} + mov pc, ip ENTRY(mcount) - stmdb sp!, {r0-r3, lr} - ldr r0, =ftrace_trace_function - ldr r2, [r0] - adr r0, ftrace_stub - cmp r0, r2 - bne trace - ldr lr, [fp, #-4] @ restore lr - ldmia sp!, {r0-r3, pc} + stmdb sp!, {r0-r3, lr} + ldr r0, =ftrace_trace_function + ldr r2, [r0] + adr r0, ftrace_stub + cmp r0, r2 + bne trace + ldr lr, [fp, #-4] @ restore lr + ldmia sp!, {r0-r3, pc} trace: - ldr r1, [fp, #-4] @ lr of instrumented routine - mov r0, lr - sub r0, r0, #MCOUNT_INSN_SIZE - mov lr, pc - mov pc, r2 - ldr lr, [fp, #-4] @ restore lr - ldmia sp!, {r0-r3, pc} + ldr r1, [fp, #-4] @ lr of instrumented routine + mov r0, lr + sub r0, r0, #MCOUNT_INSN_SIZE + mov lr, pc + mov pc, r2 + ldr lr, [fp, #-4] @ restore lr + ldmia sp!, {r0-r3, pc} #endif /* CONFIG_DYNAMIC_FTRACE */ .globl ftrace_stub ftrace_stub: - mov pc, lr + mov pc, lr #endif /* CONFIG_FUNCTION_TRACER */ diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c index 827753966301..56418f98cd01 100644 --- a/arch/arm/kernel/etm.c +++ b/arch/arm/kernel/etm.c @@ -543,7 +543,9 @@ static int __init etm_probe(struct amba_device *dev, struct amba_id *id) t->etm_portsz = 1; etm_unlock(t); - ret = etm_readl(t, CSCR_PRSR); + (void)etm_readl(t, ETMMR_PDSR); + /* dummy first read */ + (void)etm_readl(&tracer, ETMMR_OSSRR); t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf; etm_writel(t, 0x440, ETMR_CTRL); diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c index c868a8864117..778c2f7024ff 100644 --- a/arch/arm/kernel/kgdb.c +++ b/arch/arm/kernel/kgdb.c @@ -10,57 +10,62 @@ * Deepak Saxena */ #include +#include #include #include -/* Make a local copy of the registers passed into the handler (bletch) */ -void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *kernel_regs) +struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = { - int regno; + { "r0", 4, offsetof(struct pt_regs, ARM_r0)}, + { "r1", 4, offsetof(struct pt_regs, ARM_r1)}, + { "r2", 4, offsetof(struct pt_regs, ARM_r2)}, + { "r3", 4, offsetof(struct pt_regs, ARM_r3)}, + { "r4", 4, offsetof(struct pt_regs, ARM_r4)}, + { "r5", 4, offsetof(struct pt_regs, ARM_r5)}, + { "r6", 4, offsetof(struct pt_regs, ARM_r6)}, + { "r7", 4, offsetof(struct pt_regs, ARM_r7)}, + { "r8", 4, offsetof(struct pt_regs, ARM_r8)}, + { "r9", 4, offsetof(struct pt_regs, ARM_r9)}, + { "r10", 4, offsetof(struct pt_regs, ARM_r10)}, + { "fp", 4, offsetof(struct pt_regs, ARM_fp)}, + { "ip", 4, offsetof(struct pt_regs, ARM_ip)}, + { "sp", 4, offsetof(struct pt_regs, ARM_sp)}, + { "lr", 4, offsetof(struct pt_regs, ARM_lr)}, + { "pc", 4, offsetof(struct pt_regs, ARM_pc)}, + { "f0", 12, -1 }, + { "f1", 12, -1 }, + { "f2", 12, -1 }, + { "f3", 12, -1 }, + { "f4", 12, -1 }, + { "f5", 12, -1 }, + { "f6", 12, -1 }, + { "f7", 12, -1 }, + { "fps", 4, -1 }, + { "cpsr", 4, offsetof(struct pt_regs, ARM_cpsr)}, +}; - /* Initialize all to zero. */ - for (regno = 0; regno < GDB_MAX_REGS; regno++) - gdb_regs[regno] = 0; +char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs) +{ + if (regno >= DBG_MAX_REG_NUM || regno < 0) + return NULL; - gdb_regs[_R0] = kernel_regs->ARM_r0; - gdb_regs[_R1] = kernel_regs->ARM_r1; - gdb_regs[_R2] = kernel_regs->ARM_r2; - gdb_regs[_R3] = kernel_regs->ARM_r3; - gdb_regs[_R4] = kernel_regs->ARM_r4; - gdb_regs[_R5] = kernel_regs->ARM_r5; - gdb_regs[_R6] = kernel_regs->ARM_r6; - gdb_regs[_R7] = kernel_regs->ARM_r7; - gdb_regs[_R8] = kernel_regs->ARM_r8; - gdb_regs[_R9] = kernel_regs->ARM_r9; - gdb_regs[_R10] = kernel_regs->ARM_r10; - gdb_regs[_FP] = kernel_regs->ARM_fp; - gdb_regs[_IP] = kernel_regs->ARM_ip; - gdb_regs[_SPT] = kernel_regs->ARM_sp; - gdb_regs[_LR] = kernel_regs->ARM_lr; - gdb_regs[_PC] = kernel_regs->ARM_pc; - gdb_regs[_CPSR] = kernel_regs->ARM_cpsr; + if (dbg_reg_def[regno].offset != -1) + memcpy(mem, (void *)regs + dbg_reg_def[regno].offset, + dbg_reg_def[regno].size); + else + memset(mem, 0, dbg_reg_def[regno].size); + return dbg_reg_def[regno].name; } -/* Copy local gdb registers back to kgdb regs, for later copy to kernel */ -void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *kernel_regs) +int dbg_set_reg(int regno, void *mem, struct pt_regs *regs) { - kernel_regs->ARM_r0 = gdb_regs[_R0]; - kernel_regs->ARM_r1 = gdb_regs[_R1]; - kernel_regs->ARM_r2 = gdb_regs[_R2]; - kernel_regs->ARM_r3 = gdb_regs[_R3]; - kernel_regs->ARM_r4 = gdb_regs[_R4]; - kernel_regs->ARM_r5 = gdb_regs[_R5]; - kernel_regs->ARM_r6 = gdb_regs[_R6]; - kernel_regs->ARM_r7 = gdb_regs[_R7]; - kernel_regs->ARM_r8 = gdb_regs[_R8]; - kernel_regs->ARM_r9 = gdb_regs[_R9]; - kernel_regs->ARM_r10 = gdb_regs[_R10]; - kernel_regs->ARM_fp = gdb_regs[_FP]; - kernel_regs->ARM_ip = gdb_regs[_IP]; - kernel_regs->ARM_sp = gdb_regs[_SPT]; - kernel_regs->ARM_lr = gdb_regs[_LR]; - kernel_regs->ARM_pc = gdb_regs[_PC]; - kernel_regs->ARM_cpsr = gdb_regs[_CPSR]; + if (regno >= DBG_MAX_REG_NUM || regno < 0) + return -EINVAL; + + if (dbg_reg_def[regno].offset != -1) + memcpy((void *)regs + dbg_reg_def[regno].offset, mem, + dbg_reg_def[regno].size); + return 0; } void @@ -176,6 +181,33 @@ void kgdb_roundup_cpus(unsigned long flags) local_irq_disable(); } +static int __kgdb_notify(struct die_args *args, unsigned long cmd) +{ + struct pt_regs *regs = args->regs; + + if (kgdb_handle_exception(1, args->signr, cmd, regs)) + return NOTIFY_DONE; + return NOTIFY_STOP; +} +static int +kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr) +{ + unsigned long flags; + int ret; + + local_irq_save(flags); + ret = __kgdb_notify(ptr, cmd); + local_irq_restore(flags); + + return ret; +} + +static struct notifier_block kgdb_notifier = { + .notifier_call = kgdb_notify, + .priority = -INT_MAX, +}; + + /** * kgdb_arch_init - Perform any architecture specific initalization. * @@ -184,6 +216,11 @@ void kgdb_roundup_cpus(unsigned long flags) */ int kgdb_arch_init(void) { + int ret = register_die_notifier(&kgdb_notifier); + + if (ret != 0) + return ret; + register_undef_hook(&kgdb_brkpt_hook); register_undef_hook(&kgdb_compiled_brkpt_hook); @@ -200,6 +237,7 @@ void kgdb_arch_exit(void) { unregister_undef_hook(&kgdb_brkpt_hook); unregister_undef_hook(&kgdb_compiled_brkpt_hook); + unregister_die_notifier(&kgdb_notifier); } /* diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index c628bdf6c430..6b4605893f1e 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -102,7 +102,9 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, unsigned long loc; Elf32_Sym *sym; s32 offset; +#ifdef CONFIG_THUMB2_KERNEL u32 upper, lower, sign, j1, j2; +#endif offset = ELF32_R_SYM(rel->r_info); if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { @@ -185,6 +187,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, (offset & 0x0fff); break; +#ifdef CONFIG_THUMB2_KERNEL case R_ARM_THM_CALL: case R_ARM_THM_JUMP24: upper = *(u16 *)loc; @@ -233,9 +236,40 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, *(u16 *)(loc + 2) = (u16)((lower & 0xd000) | (j1 << 13) | (j2 << 11) | ((offset >> 1) & 0x07ff)); + break; + + case R_ARM_THM_MOVW_ABS_NC: + case R_ARM_THM_MOVT_ABS: upper = *(u16 *)loc; lower = *(u16 *)(loc + 2); + + /* + * MOVT/MOVW instructions encoding in Thumb-2: + * + * i = upper[10] + * imm4 = upper[3:0] + * imm3 = lower[14:12] + * imm8 = lower[7:0] + * + * imm16 = imm4:i:imm3:imm8 + */ + offset = ((upper & 0x000f) << 12) | + ((upper & 0x0400) << 1) | + ((lower & 0x7000) >> 4) | (lower & 0x00ff); + offset = (offset ^ 0x8000) - 0x8000; + offset += sym->st_value; + + if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS) + offset >>= 16; + + *(u16 *)loc = (u16)((upper & 0xfbf0) | + ((offset & 0xf000) >> 12) | + ((offset & 0x0800) >> 1)); + *(u16 *)(loc + 2) = (u16)((lower & 0x8f00) | + ((offset & 0x0700) << 4) | + (offset & 0x00ff)); break; +#endif default: printk(KERN_ERR "%s: unknown relocation: %u\n", diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index de12536d687f..417c392ddf1c 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -164,20 +164,20 @@ armpmu_event_set_period(struct perf_event *event, struct hw_perf_event *hwc, int idx) { - s64 left = atomic64_read(&hwc->period_left); + s64 left = local64_read(&hwc->period_left); s64 period = hwc->sample_period; int ret = 0; if (unlikely(left <= -period)) { left = period; - atomic64_set(&hwc->period_left, left); + local64_set(&hwc->period_left, left); hwc->last_period = period; ret = 1; } if (unlikely(left <= 0)) { left += period; - atomic64_set(&hwc->period_left, left); + local64_set(&hwc->period_left, left); hwc->last_period = period; ret = 1; } @@ -185,7 +185,7 @@ armpmu_event_set_period(struct perf_event *event, if (left > (s64)armpmu->max_period) left = armpmu->max_period; - atomic64_set(&hwc->prev_count, (u64)-left); + local64_set(&hwc->prev_count, (u64)-left); armpmu->write_counter(idx, (u64)(-left) & 0xffffffff); @@ -204,18 +204,18 @@ armpmu_event_update(struct perf_event *event, u64 delta; again: - prev_raw_count = atomic64_read(&hwc->prev_count); + prev_raw_count = local64_read(&hwc->prev_count); new_raw_count = armpmu->read_counter(idx); - if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, + if (local64_cmpxchg(&hwc->prev_count, prev_raw_count, new_raw_count) != prev_raw_count) goto again; delta = (new_raw_count << shift) - (prev_raw_count << shift); delta >>= shift; - atomic64_add(delta, &event->count); - atomic64_sub(delta, &hwc->period_left); + local64_add(delta, &event->count); + local64_sub(delta, &hwc->period_left); return new_raw_count; } @@ -478,7 +478,7 @@ __hw_perf_event_init(struct perf_event *event) if (!hwc->sample_period) { hwc->sample_period = armpmu->max_period; hwc->last_period = hwc->sample_period; - atomic64_set(&hwc->period_left, hwc->sample_period); + local64_set(&hwc->period_left, hwc->sample_period); } err = 0; diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c index c23501842b98..5b7c541a4c63 100644 --- a/arch/arm/kernel/sys_arm.c +++ b/arch/arm/kernel/sys_arm.c @@ -62,7 +62,7 @@ asmlinkage int sys_vfork(struct pt_regs *regs) /* sys_execve() executes a new program. * This is called indirectly via a small wrapper */ -asmlinkage int sys_execve(char __user *filenamei, char __user * __user *argv, +asmlinkage int sys_execve(const char __user *filenamei, char __user * __user *argv, char __user * __user *envp, struct pt_regs *regs) { int error; @@ -84,7 +84,7 @@ int kernel_execve(const char *filename, char *const argv[], char *const envp[]) int ret; memset(®s, 0, sizeof(struct pt_regs)); - ret = do_execve((char *)filename, (char __user * __user *)argv, + ret = do_execve(filename, (char __user * __user *)argv, (char __user * __user *)envp, ®s); if (ret < 0) goto out; diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c index 33ff678e32f2..4ad8da15ef2b 100644 --- a/arch/arm/kernel/sys_oabi-compat.c +++ b/arch/arm/kernel/sys_oabi-compat.c @@ -141,7 +141,7 @@ static long cp_oldabi_stat64(struct kstat *stat, return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0; } -asmlinkage long sys_oabi_stat64(char __user * filename, +asmlinkage long sys_oabi_stat64(const char __user * filename, struct oldabi_stat64 __user * statbuf) { struct kstat stat; @@ -151,7 +151,7 @@ asmlinkage long sys_oabi_stat64(char __user * filename, return error; } -asmlinkage long sys_oabi_lstat64(char __user * filename, +asmlinkage long sys_oabi_lstat64(const char __user * filename, struct oldabi_stat64 __user * statbuf) { struct kstat stat; @@ -172,7 +172,7 @@ asmlinkage long sys_oabi_fstat64(unsigned long fd, } asmlinkage long sys_oabi_fstatat64(int dfd, - char __user *filename, + const char __user *filename, struct oldabi_stat64 __user *statbuf, int flag) { diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index 02138af631e7..44eb9f764938 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c @@ -75,7 +75,7 @@ static struct at91_usbh_data __initdata cam60_usbh_data = { * SPI devices. */ #if defined(CONFIG_MTD_DATAFLASH) -static struct mtd_partition __initdata cam60_spi_partitions[] = { +static struct mtd_partition cam60_spi_partitions[] = { { .name = "BOOT1", .offset = 0, @@ -98,14 +98,14 @@ static struct mtd_partition __initdata cam60_spi_partitions[] = { }, }; -static struct flash_platform_data __initdata cam60_spi_flash_platform_data = { +static struct flash_platform_data cam60_spi_flash_platform_data = { .name = "spi_flash", .parts = cam60_spi_partitions, .nr_parts = ARRAY_SIZE(cam60_spi_partitions) }; #endif -static struct spi_board_info cam60_spi_devices[] = { +static struct spi_board_info cam60_spi_devices[] __initdata = { #if defined(CONFIG_MTD_DATAFLASH) { /* DataFlash chip */ .modalias = "mtd_dataflash", diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index b3ebe9e4871f..d0b7d870be9c 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h @@ -69,13 +69,6 @@ #define SYSPLD_VIRT_BASE 0xfe000000 #define SYSPLD_BASE SYSPLD_VIRT_BASE -#ifndef __ASSEMBLER__ - -#define PCIO_BASE IO_BASE - -#endif - - #if defined (CONFIG_ARCH_AUTCPU12) #define CS89712_VIRT_BASE CLPS7111_VIRT_BASE diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 0316e201ada0..71f90f864748 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -50,6 +50,11 @@ config ARCH_DAVINCI_DM365 select AINTC select ARCH_DAVINCI_DMx +config ARCH_DAVINCI_TNETV107X + select CPU_V6 + select CP_INTC + bool "TNETV107X based system" + comment "DaVinci Board Type" config MACH_DAVINCI_EVM @@ -173,6 +178,13 @@ config DA850_UI_RMII endchoice +config MACH_TNETV107X + bool "TI TNETV107X Reference Platform" + default ARCH_DAVINCI_TNETV107X + depends on ARCH_DAVINCI_TNETV107X + help + Say Y here to select the TI TNETV107X Evaluation Module. + config DAVINCI_MUX bool "DAVINCI multiplexing support" depends on ARCH_DAVINCI diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 6aac880eb794..eab4c0fd667a 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -16,6 +16,8 @@ obj-$(CONFIG_ARCH_DAVINCI_DM646x) += dm646x.o devices.o obj-$(CONFIG_ARCH_DAVINCI_DM365) += dm365.o devices.o obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o +obj-$(CONFIG_ARCH_DAVINCI_TNETV107X) += tnetv107x.o devices-tnetv107x.o +obj-$(CONFIG_ARCH_DAVINCI_TNETV107X) += gpio-tnetv107x.o obj-$(CONFIG_AINTC) += irq.o obj-$(CONFIG_CP_INTC) += cp_intc.o @@ -30,6 +32,7 @@ obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o cdce949.o obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o +obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o # Power Management obj-$(CONFIG_CPU_FREQ) += cpufreq.o diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 212d97084bd7..c3994f341e49 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -208,7 +208,7 @@ static struct snd_platform_data da830_evm_snd_data = { .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), .tdm_slots = 2, .serial_dir = da830_iis_serializer_direction, - .eventq_no = EVENTQ_0, + .asp_chan_q = EVENTQ_0, .version = MCASP_VERSION_2, .txnumevt = 1, .rxnumevt = 1, @@ -494,12 +494,42 @@ static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = { .bus_delay = 0, /* usec */ }; +/* + * The following EDMA channels/slots are not being used by drivers (for + * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence + * they are being reserved for codecs on the DSP side. + */ +static const s16 da830_dma_rsv_chans[][2] = { + /* (offset, number) */ + { 8, 2}, + {12, 2}, + {24, 4}, + {30, 2}, + {-1, -1} +}; + +static const s16 da830_dma_rsv_slots[][2] = { + /* (offset, number) */ + { 8, 2}, + {12, 2}, + {24, 4}, + {30, 26}, + {-1, -1} +}; + +static struct edma_rsv_info da830_edma_rsv[] = { + { + .rsv_chans = da830_dma_rsv_chans, + .rsv_slots = da830_dma_rsv_slots, + }, +}; + static __init void da830_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; int ret; - ret = da8xx_register_edma(); + ret = da830_register_edma(da830_edma_rsv); if (ret) pr_warning("da830_evm_init: edma registration failed: %d\n", ret); diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index b280efb1fa12..fdc2cc500fc6 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -343,7 +343,7 @@ static struct snd_platform_data da850_evm_snd_data = { .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), .tdm_slots = 2, .serial_dir = da850_iis_serializer_direction, - .eventq_no = EVENTQ_1, + .asp_chan_q = EVENTQ_1, .version = MCASP_VERSION_2, .txnumevt = 1, .rxnumevt = 1, @@ -637,6 +637,56 @@ static int __init da850_evm_config_emac(void) } device_initcall(da850_evm_config_emac); +/* + * The following EDMA channels/slots are not being used by drivers (for + * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence + * they are being reserved for codecs on the DSP side. + */ +static const s16 da850_dma0_rsv_chans[][2] = { + /* (offset, number) */ + { 8, 6}, + {24, 4}, + {30, 2}, + {-1, -1} +}; + +static const s16 da850_dma0_rsv_slots[][2] = { + /* (offset, number) */ + { 8, 6}, + {24, 4}, + {30, 50}, + {-1, -1} +}; + +static const s16 da850_dma1_rsv_chans[][2] = { + /* (offset, number) */ + { 0, 28}, + {30, 2}, + {-1, -1} +}; + +static const s16 da850_dma1_rsv_slots[][2] = { + /* (offset, number) */ + { 0, 28}, + {30, 90}, + {-1, -1} +}; + +static struct edma_rsv_info da850_edma_cc0_rsv = { + .rsv_chans = da850_dma0_rsv_chans, + .rsv_slots = da850_dma0_rsv_slots, +}; + +static struct edma_rsv_info da850_edma_cc1_rsv = { + .rsv_chans = da850_dma1_rsv_chans, + .rsv_slots = da850_dma1_rsv_slots, +}; + +static struct edma_rsv_info *da850_edma_rsv[2] = { + &da850_edma_cc0_rsv, + &da850_edma_cc1_rsv, +}; + static __init void da850_evm_init(void) { int ret; @@ -646,7 +696,7 @@ static __init void da850_evm_init(void) pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n", ret); - ret = da8xx_register_edma(); + ret = da850_register_edma(da850_edma_rsv); if (ret) pr_warning("da850_evm_init: edma registration failed: %d\n", ret); diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 6d8889342c9f..4502f346b2b0 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -323,7 +323,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = { .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction), .tdm_slots = 2, .serial_dir = dm646x_iis_serializer_direction, - .eventq_no = EVENTQ_0, + .asp_chan_q = EVENTQ_0, }, { .tx_dma_offset = 0x400, @@ -332,7 +332,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = { .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction), .tdm_slots = 32, .serial_dir = dm646x_dit_serializer_direction, - .eventq_no = EVENTQ_0, + .asp_chan_q = EVENTQ_0, }, }; @@ -721,6 +721,39 @@ static struct davinci_uart_config uart_config __initdata = { #define DM646X_EVM_PHY_MASK (0x2) #define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ +/* + * The following EDMA channels/slots are not being used by drivers (for + * example: Timer, GPIO, UART events etc) on dm646x, hence they are being + * reserved for codecs on the DSP side. + */ +static const s16 dm646x_dma_rsv_chans[][2] = { + /* (offset, number) */ + { 0, 4}, + {13, 3}, + {24, 4}, + {30, 2}, + {54, 3}, + {-1, -1} +}; + +static const s16 dm646x_dma_rsv_slots[][2] = { + /* (offset, number) */ + { 0, 4}, + {13, 3}, + {24, 4}, + {30, 2}, + {54, 3}, + {128, 384}, + {-1, -1} +}; + +static struct edma_rsv_info dm646x_edma_rsv[] = { + { + .rsv_chans = dm646x_dma_rsv_chans, + .rsv_slots = dm646x_dma_rsv_slots, + }, +}; + static __init void evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; @@ -732,6 +765,8 @@ static __init void evm_init(void) platform_device_register(&davinci_nand_device); + dm646x_init_edma(dm646x_edma_rsv); + if (HAS_ATA) davinci_init_ide(); diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c new file mode 100644 index 000000000000..fe2a9d9c8bb7 --- /dev/null +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c @@ -0,0 +1,174 @@ +/* + * Texas Instruments TNETV107X EVM Board Support + * + * Copyright (C) 2010 Texas Instruments + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#define EVM_MMC_WP_GPIO 21 +#define EVM_MMC_CD_GPIO 24 + +static int initialize_gpio(int gpio, char *desc) +{ + int ret; + + ret = gpio_request(gpio, desc); + if (ret < 0) { + pr_err_ratelimited("cannot open %s gpio\n", desc); + return -ENOSYS; + } + gpio_direction_input(gpio); + return gpio; +} + +static int mmc_get_cd(int index) +{ + static int gpio; + + if (!gpio) + gpio = initialize_gpio(EVM_MMC_CD_GPIO, "mmc card detect"); + + if (gpio < 0) + return gpio; + + return gpio_get_value(gpio) ? 0 : 1; +} + +static int mmc_get_ro(int index) +{ + static int gpio; + + if (!gpio) + gpio = initialize_gpio(EVM_MMC_WP_GPIO, "mmc write protect"); + + if (gpio < 0) + return gpio; + + return gpio_get_value(gpio) ? 1 : 0; +} + +static struct davinci_mmc_config mmc_config = { + .get_cd = mmc_get_cd, + .get_ro = mmc_get_ro, + .wires = 4, + .max_freq = 50000000, + .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, + .version = MMC_CTLR_VERSION_1, +}; + +static const short sdio1_pins[] __initdata = { + TNETV107X_SDIO1_CLK_1, TNETV107X_SDIO1_CMD_1, + TNETV107X_SDIO1_DATA0_1, TNETV107X_SDIO1_DATA1_1, + TNETV107X_SDIO1_DATA2_1, TNETV107X_SDIO1_DATA3_1, + TNETV107X_GPIO21, TNETV107X_GPIO24, + -1 +}; + +static const short uart1_pins[] __initdata = { + TNETV107X_UART1_RD, TNETV107X_UART1_TD, + -1 +}; + +static struct mtd_partition nand_partitions[] = { + /* bootloader (U-Boot, etc) in first 12 sectors */ + { + .name = "bootloader", + .offset = 0, + .size = (12*SZ_128K), + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + /* bootloader params in the next sector */ + { + .name = "params", + .offset = MTDPART_OFS_NXTBLK, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + /* kernel */ + { + .name = "kernel", + .offset = MTDPART_OFS_NXTBLK, + .size = SZ_4M, + .mask_flags = 0, + }, + /* file system */ + { + .name = "filesystem", + .offset = MTDPART_OFS_NXTBLK, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + } +}; + +static struct davinci_nand_pdata nand_config = { + .mask_cle = 0x4000, + .mask_ale = 0x2000, + .parts = nand_partitions, + .nr_parts = ARRAY_SIZE(nand_partitions), + .ecc_mode = NAND_ECC_HW, + .options = NAND_USE_FLASH_BBT, + .ecc_bits = 1, +}; + +static struct davinci_uart_config serial_config __initconst = { + .enabled_uarts = BIT(1), +}; + +static struct tnetv107x_device_info evm_device_info __initconst = { + .serial_config = &serial_config, + .mmc_config[1] = &mmc_config, /* controller 1 */ + .nand_config[0] = &nand_config, /* chip select 0 */ +}; + +static __init void tnetv107x_evm_board_init(void) +{ + davinci_cfg_reg_list(sdio1_pins); + davinci_cfg_reg_list(uart1_pins); + + tnetv107x_devices_init(&evm_device_info); +} + +#ifdef CONFIG_SERIAL_8250_CONSOLE +static int __init tnetv107x_evm_console_init(void) +{ + return add_preferred_console("ttyS", 0, "115200"); +} +console_initcall(tnetv107x_evm_console_init); +#endif + +MACHINE_START(TNETV107X, "TNETV107X EVM") + .phys_io = TNETV107X_IO_BASE, + .io_pg_offst = (TNETV107X_IO_VIRT >> 18) & 0xfffc, + .boot_params = (TNETV107X_DDR_BASE + 0x100), + .map_io = tnetv107x_init, + .init_irq = cp_intc_init, + .timer = &davinci_timer, + .init_machine = tnetv107x_evm_board_init, +MACHINE_END diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 23e9eda5a377..ec23ab473620 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1024,7 +1024,6 @@ static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = { [IRQ_DA8XX_EVTOUT4] = 7, [IRQ_DA8XX_EVTOUT5] = 7, [IRQ_DA8XX_EVTOUT6] = 7, - [IRQ_DA8XX_EVTOUT6] = 7, [IRQ_DA8XX_EVTOUT7] = 7, [IRQ_DA8XX_CCINT0] = 7, [IRQ_DA8XX_CCERRINT] = 7, @@ -1042,11 +1041,7 @@ static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = { [IRQ_DA8XX_TINT34_1] = 7, [IRQ_DA8XX_UARTINT0] = 7, [IRQ_DA8XX_KEYMGRINT] = 7, - [IRQ_DA8XX_SECINT] = 7, - [IRQ_DA8XX_SECKEYERR] = 7, [IRQ_DA830_MPUERR] = 7, - [IRQ_DA830_IOPUERR] = 7, - [IRQ_DA830_BOOTCFGERR] = 7, [IRQ_DA8XX_CHIPINT0] = 7, [IRQ_DA8XX_CHIPINT1] = 7, [IRQ_DA8XX_CHIPINT2] = 7, diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 6b8331bf8cf3..68ed58a48252 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -643,7 +643,6 @@ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_EVTOUT4] = 7, [IRQ_DA8XX_EVTOUT5] = 7, [IRQ_DA8XX_EVTOUT6] = 7, - [IRQ_DA8XX_EVTOUT6] = 7, [IRQ_DA8XX_EVTOUT7] = 7, [IRQ_DA8XX_CCINT0] = 7, [IRQ_DA8XX_CCERRINT] = 7, @@ -661,27 +660,7 @@ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_TINT34_1] = 7, [IRQ_DA8XX_UARTINT0] = 7, [IRQ_DA8XX_KEYMGRINT] = 7, - [IRQ_DA8XX_SECINT] = 7, - [IRQ_DA8XX_SECKEYERR] = 7, [IRQ_DA850_MPUADDRERR0] = 7, - [IRQ_DA850_MPUPROTERR0] = 7, - [IRQ_DA850_IOPUADDRERR0] = 7, - [IRQ_DA850_IOPUPROTERR0] = 7, - [IRQ_DA850_IOPUADDRERR1] = 7, - [IRQ_DA850_IOPUPROTERR1] = 7, - [IRQ_DA850_IOPUADDRERR2] = 7, - [IRQ_DA850_IOPUPROTERR2] = 7, - [IRQ_DA850_BOOTCFG_ADDR_ERR] = 7, - [IRQ_DA850_BOOTCFG_PROT_ERR] = 7, - [IRQ_DA850_MPUADDRERR1] = 7, - [IRQ_DA850_MPUPROTERR1] = 7, - [IRQ_DA850_IOPUADDRERR3] = 7, - [IRQ_DA850_IOPUPROTERR3] = 7, - [IRQ_DA850_IOPUADDRERR4] = 7, - [IRQ_DA850_IOPUPROTERR4] = 7, - [IRQ_DA850_IOPUADDRERR5] = 7, - [IRQ_DA850_IOPUPROTERR5] = 7, - [IRQ_DA850_MIOPU_BOOTCFG_ERR] = 7, [IRQ_DA8XX_CHIPINT0] = 7, [IRQ_DA8XX_CHIPINT1] = 7, [IRQ_DA8XX_CHIPINT2] = 7, @@ -722,8 +701,6 @@ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_EHRPWM1] = 7, [IRQ_DA8XX_EHRPWM1TZ] = 7, [IRQ_DA850_SATAINT] = 7, - [IRQ_DA850_TINT12_2] = 7, - [IRQ_DA850_TINT34_2] = 7, [IRQ_DA850_TINTALL_2] = 7, [IRQ_DA8XX_ECAP0] = 7, [IRQ_DA8XX_ECAP1] = 7, @@ -751,8 +728,6 @@ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA850_CCINT1] = 7, [IRQ_DA850_CCERRINT1] = 7, [IRQ_DA850_TCERRINT2] = 7, - [IRQ_DA850_TINT12_3] = 7, - [IRQ_DA850_TINT34_3] = 7, [IRQ_DA850_TINTALL_3] = 7, [IRQ_DA850_MCBSP0RINT] = 7, [IRQ_DA850_MCBSP0XINT] = 7, diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 8cda729be273..52bc7b1c6ca3 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -111,19 +111,21 @@ static const s8 da850_queue_priority_mapping[][2] = { {-1, -1} }; -static struct edma_soc_info da830_edma_info[] = { - { - .n_channel = 32, - .n_region = 4, - .n_slot = 128, - .n_tc = 2, - .n_cc = 1, - .queue_tc_mapping = da8xx_queue_tc_mapping, - .queue_priority_mapping = da8xx_queue_priority_mapping, - }, +static struct edma_soc_info da830_edma_cc0_info = { + .n_channel = 32, + .n_region = 4, + .n_slot = 128, + .n_tc = 2, + .n_cc = 1, + .queue_tc_mapping = da8xx_queue_tc_mapping, + .queue_priority_mapping = da8xx_queue_priority_mapping, }; -static struct edma_soc_info da850_edma_info[] = { +static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = { + &da830_edma_cc0_info, +}; + +static struct edma_soc_info da850_edma_cc_info[] = { { .n_channel = 32, .n_region = 4, @@ -144,6 +146,11 @@ static struct edma_soc_info da850_edma_info[] = { }, }; +static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = { + &da850_edma_cc_info[0], + &da850_edma_cc_info[1], +}; + static struct resource da830_edma_resources[] = { { .name = "edma_cc0", @@ -248,18 +255,21 @@ static struct platform_device da850_edma_device = { .resource = da850_edma_resources, }; -int __init da8xx_register_edma(void) +int __init da830_register_edma(struct edma_rsv_info *rsv) { - struct platform_device *pdev; + da830_edma_cc0_info.rsv = rsv; - if (cpu_is_davinci_da830()) - pdev = &da830_edma_device; - else if (cpu_is_davinci_da850()) - pdev = &da850_edma_device; - else - return -ENODEV; + return platform_device_register(&da830_edma_device); +} - return platform_device_register(pdev); +int __init da850_register_edma(struct edma_rsv_info *rsv[2]) +{ + if (rsv) { + da850_edma_cc_info[0].rsv = rsv[0]; + da850_edma_cc_info[1].rsv = rsv[1]; + } + + return platform_device_register(&da850_edma_device); } static struct resource da8xx_i2c_resources0[] = { diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c new file mode 100644 index 000000000000..2718a3a90dff --- /dev/null +++ b/arch/arm/mach-davinci/devices-tnetv107x.c @@ -0,0 +1,320 @@ +/* + * Texas Instruments TNETV107X SoC devices + * + * Copyright (C) 2010 Texas Instruments + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "clock.h" + +/* Base addresses for on-chip devices */ +#define TNETV107X_TPCC_BASE 0x01c00000 +#define TNETV107X_TPTC0_BASE 0x01c10000 +#define TNETV107X_TPTC1_BASE 0x01c10400 +#define TNETV107X_WDOG_BASE 0x08086700 +#define TNETV107X_SDIO0_BASE 0x08088700 +#define TNETV107X_SDIO1_BASE 0x08088800 +#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000 +#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000 +#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000 +#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE 0x44000000 +#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE 0x48000000 + +/* TNETV107X specific EDMA3 information */ +#define EDMA_TNETV107X_NUM_DMACH 64 +#define EDMA_TNETV107X_NUM_TCC 64 +#define EDMA_TNETV107X_NUM_PARAMENTRY 128 +#define EDMA_TNETV107X_NUM_EVQUE 2 +#define EDMA_TNETV107X_NUM_TC 2 +#define EDMA_TNETV107X_CHMAP_EXIST 0 +#define EDMA_TNETV107X_NUM_REGIONS 4 +#define TNETV107X_DMACH2EVENT_MAP0 0x3C0CE000u +#define TNETV107X_DMACH2EVENT_MAP1 0x000FFFFFu + +#define TNETV107X_DMACH_SDIO0_RX 26 +#define TNETV107X_DMACH_SDIO0_TX 27 +#define TNETV107X_DMACH_SDIO1_RX 28 +#define TNETV107X_DMACH_SDIO1_TX 29 + +static const s8 edma_tc_mapping[][2] = { + /* event queue no TC no */ + { 0, 0 }, + { 1, 1 }, + { -1, -1 } +}; + +static const s8 edma_priority_mapping[][2] = { + /* event queue no Prio */ + { 0, 3 }, + { 1, 7 }, + { -1, -1 } +}; + +static struct edma_soc_info edma_cc0_info = { + .n_channel = EDMA_TNETV107X_NUM_DMACH, + .n_region = EDMA_TNETV107X_NUM_REGIONS, + .n_slot = EDMA_TNETV107X_NUM_PARAMENTRY, + .n_tc = EDMA_TNETV107X_NUM_TC, + .n_cc = 1, + .queue_tc_mapping = edma_tc_mapping, + .queue_priority_mapping = edma_priority_mapping, +}; + +static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = { + &edma_cc0_info, +}; + +static struct resource edma_resources[] = { + { + .name = "edma_cc0", + .start = TNETV107X_TPCC_BASE, + .end = TNETV107X_TPCC_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, + { + .name = "edma_tc0", + .start = TNETV107X_TPTC0_BASE, + .end = TNETV107X_TPTC0_BASE + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + { + .name = "edma_tc1", + .start = TNETV107X_TPTC1_BASE, + .end = TNETV107X_TPTC1_BASE + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + { + .name = "edma0", + .start = IRQ_TNETV107X_TPCC, + .flags = IORESOURCE_IRQ, + }, + { + .name = "edma0_err", + .start = IRQ_TNETV107X_TPCC_ERR, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device edma_device = { + .name = "edma", + .id = -1, + .num_resources = ARRAY_SIZE(edma_resources), + .resource = edma_resources, + .dev.platform_data = tnetv107x_edma_info, +}; + +static struct plat_serial8250_port serial_data[] = { + { + .mapbase = TNETV107X_UART0_BASE, + .irq = IRQ_TNETV107X_UART0, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | + UPF_FIXED_TYPE | UPF_IOREMAP, + .type = PORT_AR7, + .iotype = UPIO_MEM32, + .regshift = 2, + }, + { + .mapbase = TNETV107X_UART1_BASE, + .irq = IRQ_TNETV107X_UART1, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | + UPF_FIXED_TYPE | UPF_IOREMAP, + .type = PORT_AR7, + .iotype = UPIO_MEM32, + .regshift = 2, + }, + { + .mapbase = TNETV107X_UART2_BASE, + .irq = IRQ_TNETV107X_UART2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | + UPF_FIXED_TYPE | UPF_IOREMAP, + .type = PORT_AR7, + .iotype = UPIO_MEM32, + .regshift = 2, + }, + { + .flags = 0, + }, +}; + +struct platform_device tnetv107x_serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev.platform_data = serial_data, +}; + +static struct resource mmc0_resources[] = { + { /* Memory mapped registers */ + .start = TNETV107X_SDIO0_BASE, + .end = TNETV107X_SDIO0_BASE + 0x0ff, + .flags = IORESOURCE_MEM + }, + { /* MMC interrupt */ + .start = IRQ_TNETV107X_MMC0, + .flags = IORESOURCE_IRQ + }, + { /* SDIO interrupt */ + .start = IRQ_TNETV107X_SDIO0, + .flags = IORESOURCE_IRQ + }, + { /* DMA RX */ + .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX), + .flags = IORESOURCE_DMA + }, + { /* DMA TX */ + .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX), + .flags = IORESOURCE_DMA + }, +}; + +static struct resource mmc1_resources[] = { + { /* Memory mapped registers */ + .start = TNETV107X_SDIO1_BASE, + .end = TNETV107X_SDIO1_BASE + 0x0ff, + .flags = IORESOURCE_MEM + }, + { /* MMC interrupt */ + .start = IRQ_TNETV107X_MMC1, + .flags = IORESOURCE_IRQ + }, + { /* SDIO interrupt */ + .start = IRQ_TNETV107X_SDIO1, + .flags = IORESOURCE_IRQ + }, + { /* DMA RX */ + .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX), + .flags = IORESOURCE_DMA + }, + { /* DMA TX */ + .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX), + .flags = IORESOURCE_DMA + }, +}; + +static u64 mmc0_dma_mask = DMA_BIT_MASK(32); +static u64 mmc1_dma_mask = DMA_BIT_MASK(32); + +static struct platform_device mmc_devices[2] = { + { + .name = "davinci_mmc", + .id = 0, + .dev = { + .dma_mask = &mmc0_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(mmc0_resources), + .resource = mmc0_resources + }, + { + .name = "davinci_mmc", + .id = 1, + .dev = { + .dma_mask = &mmc1_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(mmc1_resources), + .resource = mmc1_resources + }, +}; + +static const u32 emif_windows[] = { + TNETV107X_ASYNC_EMIF_DATA_CE0_BASE, TNETV107X_ASYNC_EMIF_DATA_CE1_BASE, + TNETV107X_ASYNC_EMIF_DATA_CE2_BASE, TNETV107X_ASYNC_EMIF_DATA_CE3_BASE, +}; + +static const u32 emif_window_sizes[] = { SZ_256M, SZ_64M, SZ_64M, SZ_64M }; + +static struct resource wdt_resources[] = { + { + .start = TNETV107X_WDOG_BASE, + .end = TNETV107X_WDOG_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device tnetv107x_wdt_device = { + .name = "tnetv107x_wdt", + .id = 0, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, +}; + +static int __init nand_init(int chipsel, struct davinci_nand_pdata *data) +{ + struct resource res[2]; + struct platform_device *pdev; + u32 range; + int ret; + + /* Figure out the resource range from the ale/cle masks */ + range = max(data->mask_cle, data->mask_ale); + range = PAGE_ALIGN(range + 4) - 1; + + if (range >= emif_window_sizes[chipsel]) + return -EINVAL; + + pdev = kzalloc(sizeof(*pdev), GFP_KERNEL); + if (!pdev) + return -ENOMEM; + + pdev->name = "davinci_nand"; + pdev->id = chipsel; + pdev->dev.platform_data = data; + + memset(res, 0, sizeof(res)); + + res[0].start = emif_windows[chipsel]; + res[0].end = res[0].start + range; + res[0].flags = IORESOURCE_MEM; + + res[1].start = TNETV107X_ASYNC_EMIF_CNTRL_BASE; + res[1].end = res[1].start + SZ_4K - 1; + res[1].flags = IORESOURCE_MEM; + + ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); + if (ret < 0) { + kfree(pdev); + return ret; + } + + return platform_device_register(pdev); +} + +void __init tnetv107x_devices_init(struct tnetv107x_device_info *info) +{ + int i; + + platform_device_register(&edma_device); + platform_device_register(&tnetv107x_wdt_device); + + if (info->serial_config) + davinci_serial_init(info->serial_config); + + for (i = 0; i < 2; i++) + if (info->mmc_config[i]) { + mmc_devices[i].dev.platform_data = info->mmc_config[i]; + platform_device_register(&mmc_devices[i]); + } + + for (i = 0; i < 4; i++) + if (info->nand_config[i]) + nand_init(i, info->nand_config[i]); +} diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 383478116ef5..3d996b659ff4 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -591,16 +591,18 @@ queue_priority_mapping[][2] = { {-1, -1}, }; -static struct edma_soc_info dm355_edma_info[] = { - { - .n_channel = 64, - .n_region = 4, - .n_slot = 128, - .n_tc = 2, - .n_cc = 1, - .queue_tc_mapping = queue_tc_mapping, - .queue_priority_mapping = queue_priority_mapping, - }, +static struct edma_soc_info edma_cc0_info = { + .n_channel = 64, + .n_region = 4, + .n_slot = 128, + .n_tc = 2, + .n_cc = 1, + .queue_tc_mapping = queue_tc_mapping, + .queue_priority_mapping = queue_priority_mapping, +}; + +static struct edma_soc_info *dm355_edma_info[EDMA_MAX_CC] = { + &edma_cc0_info, }; static struct resource edma_resources[] = { diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index a146849d78f0..6b6f4c643709 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -822,17 +822,19 @@ dm365_queue_priority_mapping[][2] = { {-1, -1}, }; -static struct edma_soc_info dm365_edma_info[] = { - { - .n_channel = 64, - .n_region = 4, - .n_slot = 256, - .n_tc = 4, - .n_cc = 1, - .queue_tc_mapping = dm365_queue_tc_mapping, - .queue_priority_mapping = dm365_queue_priority_mapping, - .default_queue = EVENTQ_3, - }, +static struct edma_soc_info edma_cc0_info = { + .n_channel = 64, + .n_region = 4, + .n_slot = 256, + .n_tc = 4, + .n_cc = 1, + .queue_tc_mapping = dm365_queue_tc_mapping, + .queue_priority_mapping = dm365_queue_priority_mapping, + .default_queue = EVENTQ_3, +}; + +static struct edma_soc_info *dm365_edma_info[EDMA_MAX_CC] = { + &edma_cc0_info, }; static struct resource edma_resources[] = { @@ -1020,6 +1022,8 @@ static struct davinci_timer_info dm365_timer_info = { .clocksource_id = T0_TOP, }; +#define DM365_UART1_BASE (IO_PHYS + 0x106000) + static struct plat_serial8250_port dm365_serial_platform_data[] = { { .mapbase = DAVINCI_UART0_BASE, @@ -1030,7 +1034,7 @@ static struct plat_serial8250_port dm365_serial_platform_data[] = { .regshift = 2, }, { - .mapbase = DAVINCI_UART1_BASE, + .mapbase = DM365_UART1_BASE, .irq = IRQ_UARTINT1, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 7ad15208b841..40fec315c99a 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -492,16 +492,18 @@ queue_priority_mapping[][2] = { {-1, -1}, }; -static struct edma_soc_info dm644x_edma_info[] = { - { - .n_channel = 64, - .n_region = 4, - .n_slot = 128, - .n_tc = 2, - .n_cc = 1, - .queue_tc_mapping = queue_tc_mapping, - .queue_priority_mapping = queue_priority_mapping, - }, +static struct edma_soc_info edma_cc0_info = { + .n_channel = 64, + .n_region = 4, + .n_slot = 128, + .n_tc = 2, + .n_cc = 1, + .queue_tc_mapping = queue_tc_mapping, + .queue_priority_mapping = queue_priority_mapping, +}; + +static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = { + &edma_cc0_info, }; static struct resource edma_resources[] = { diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 94045656cff6..e4a3df1872ac 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -529,16 +529,18 @@ dm646x_queue_priority_mapping[][2] = { {-1, -1}, }; -static struct edma_soc_info dm646x_edma_info[] = { - { - .n_channel = 64, - .n_region = 6, /* 0-1, 4-7 */ - .n_slot = 512, - .n_tc = 4, - .n_cc = 1, - .queue_tc_mapping = dm646x_queue_tc_mapping, - .queue_priority_mapping = dm646x_queue_priority_mapping, - }, +static struct edma_soc_info edma_cc0_info = { + .n_channel = 64, + .n_region = 6, /* 0-1, 4-7 */ + .n_slot = 512, + .n_tc = 4, + .n_cc = 1, + .queue_tc_mapping = dm646x_queue_tc_mapping, + .queue_priority_mapping = dm646x_queue_priority_mapping, +}; + +static struct edma_soc_info *dm646x_edma_info[EDMA_MAX_CC] = { + &edma_cc0_info, }; static struct resource edma_resources[] = { @@ -877,6 +879,13 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config, platform_device_register(&vpif_capture_dev); } +int __init dm646x_init_edma(struct edma_rsv_info *rsv) +{ + edma_cc0_info.rsv = rsv; + + return platform_device_register(&dm646x_edma_device); +} + void __init dm646x_init(void) { dm646x_board_setup_refclk(&ref_clk); @@ -888,7 +897,6 @@ static int __init dm646x_init_devices(void) if (!cpu_is_davinci_dm646x()) return 0; - platform_device_register(&dm646x_edma_device); platform_device_register(&dm646x_emac_device); return 0; } diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c index d33827aadda7..2ede598b77dd 100644 --- a/arch/arm/mach-davinci/dma.c +++ b/arch/arm/mach-davinci/dma.c @@ -99,8 +99,6 @@ #define EDMA_MAX_DMACH 64 #define EDMA_MAX_PARAMENTRY 512 -#define EDMA_MAX_CC 2 - /*****************************************************************************/ @@ -207,6 +205,18 @@ static inline void edma_parm_or(unsigned ctlr, int offset, int param_no, edma_or(ctlr, EDMA_PARM + offset + (param_no << 5), or); } +static inline void set_bits(int offset, int len, unsigned long *p) +{ + for (; len > 0; len--) + set_bit(offset + (len - 1), p); +} + +static inline void clear_bits(int offset, int len, unsigned long *p) +{ + for (; len > 0; len--) + clear_bit(offset + (len - 1), p); +} + /*****************************************************************************/ /* actual number of DMA channels and slots on this silicon */ @@ -1376,11 +1386,13 @@ EXPORT_SYMBOL(edma_clear_event); static int __init edma_probe(struct platform_device *pdev) { - struct edma_soc_info *info = pdev->dev.platform_data; + struct edma_soc_info **info = pdev->dev.platform_data; const s8 (*queue_priority_mapping)[2]; const s8 (*queue_tc_mapping)[2]; - int i, j, found = 0; + int i, j, off, ln, found = 0; int status = -1; + const s16 (*rsv_chans)[2]; + const s16 (*rsv_slots)[2]; int irq[EDMA_MAX_CC] = {0, 0}; int err_irq[EDMA_MAX_CC] = {0, 0}; struct resource *r[EDMA_MAX_CC] = {NULL}; @@ -1395,7 +1407,7 @@ static int __init edma_probe(struct platform_device *pdev) sprintf(res_name, "edma_cc%d", j); r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); - if (!r[j]) { + if (!r[j] || !info[j]) { if (found) break; else @@ -1426,13 +1438,14 @@ static int __init edma_probe(struct platform_device *pdev) } memset(edma_cc[j], 0, sizeof(struct edma)); - edma_cc[j]->num_channels = min_t(unsigned, info[j].n_channel, + edma_cc[j]->num_channels = min_t(unsigned, info[j]->n_channel, EDMA_MAX_DMACH); - edma_cc[j]->num_slots = min_t(unsigned, info[j].n_slot, + edma_cc[j]->num_slots = min_t(unsigned, info[j]->n_slot, EDMA_MAX_PARAMENTRY); - edma_cc[j]->num_cc = min_t(unsigned, info[j].n_cc, EDMA_MAX_CC); + edma_cc[j]->num_cc = min_t(unsigned, info[j]->n_cc, + EDMA_MAX_CC); - edma_cc[j]->default_queue = info[j].default_queue; + edma_cc[j]->default_queue = info[j]->default_queue; if (!edma_cc[j]->default_queue) edma_cc[j]->default_queue = EVENTQ_1; @@ -1447,6 +1460,31 @@ static int __init edma_probe(struct platform_device *pdev) memset(edma_cc[j]->edma_unused, 0xff, sizeof(edma_cc[j]->edma_unused)); + if (info[j]->rsv) { + + /* Clear the reserved channels in unused list */ + rsv_chans = info[j]->rsv->rsv_chans; + if (rsv_chans) { + for (i = 0; rsv_chans[i][0] != -1; i++) { + off = rsv_chans[i][0]; + ln = rsv_chans[i][1]; + clear_bits(off, ln, + edma_cc[j]->edma_unused); + } + } + + /* Set the reserved slots in inuse list */ + rsv_slots = info[j]->rsv->rsv_slots; + if (rsv_slots) { + for (i = 0; rsv_slots[i][0] != -1; i++) { + off = rsv_slots[i][0]; + ln = rsv_slots[i][1]; + set_bits(off, ln, + edma_cc[j]->edma_inuse); + } + } + } + sprintf(irq_name, "edma%d", j); irq[j] = platform_get_irq_byname(pdev, irq_name); edma_cc[j]->irq_res_start = irq[j]; @@ -1476,8 +1514,8 @@ static int __init edma_probe(struct platform_device *pdev) for (i = 0; i < edma_cc[j]->num_channels; i++) map_dmach_queue(j, i, EVENTQ_1); - queue_tc_mapping = info[j].queue_tc_mapping; - queue_priority_mapping = info[j].queue_priority_mapping; + queue_tc_mapping = info[j]->queue_tc_mapping; + queue_priority_mapping = info[j]->queue_priority_mapping; /* Event queue to TC mapping */ for (i = 0; queue_tc_mapping[i][0] != -1; i++) @@ -1496,7 +1534,7 @@ static int __init edma_probe(struct platform_device *pdev) if (edma_read(j, EDMA_CCCFG) & CHMAP_EXIST) map_dmach_param(j); - for (i = 0; i < info[j].n_region; i++) { + for (i = 0; i < info[j]->n_region; i++) { edma_write_array2(j, EDMA_DRAE, i, 0, 0x0); edma_write_array2(j, EDMA_DRAE, i, 1, 0x0); edma_write_array(j, EDMA_QRAE, i, 0x0); diff --git a/arch/arm/mach-davinci/gpio-tnetv107x.c b/arch/arm/mach-davinci/gpio-tnetv107x.c new file mode 100644 index 000000000000..d10298620e2c --- /dev/null +++ b/arch/arm/mach-davinci/gpio-tnetv107x.c @@ -0,0 +1,205 @@ +/* + * Texas Instruments TNETV107X GPIO Controller + * + * Copyright (C) 2010 Texas Instruments + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include + +#include +#include + +struct tnetv107x_gpio_regs { + u32 idver; + u32 data_in[3]; + u32 data_out[3]; + u32 direction[3]; + u32 enable[3]; +}; + +#define gpio_reg_index(gpio) ((gpio) >> 5) +#define gpio_reg_bit(gpio) BIT((gpio) & 0x1f) + +#define gpio_reg_rmw(reg, mask, val) \ + __raw_writel((__raw_readl(reg) & ~(mask)) | (val), (reg)) + +#define gpio_reg_set_bit(reg, gpio) \ + gpio_reg_rmw((reg) + gpio_reg_index(gpio), 0, gpio_reg_bit(gpio)) + +#define gpio_reg_clear_bit(reg, gpio) \ + gpio_reg_rmw((reg) + gpio_reg_index(gpio), gpio_reg_bit(gpio), 0) + +#define gpio_reg_get_bit(reg, gpio) \ + (__raw_readl((reg) + gpio_reg_index(gpio)) & gpio_reg_bit(gpio)) + +#define chip2controller(chip) \ + container_of(chip, struct davinci_gpio_controller, chip) + +#define TNETV107X_GPIO_CTLRS DIV_ROUND_UP(TNETV107X_N_GPIO, 32) + +static struct davinci_gpio_controller chips[TNETV107X_GPIO_CTLRS]; + +static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset) +{ + struct davinci_gpio_controller *ctlr = chip2controller(chip); + struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs; + unsigned gpio = chip->base + offset; + unsigned long flags; + + spin_lock_irqsave(&ctlr->lock, flags); + + gpio_reg_set_bit(®s->enable, gpio); + + spin_unlock_irqrestore(&ctlr->lock, flags); + + return 0; +} + +static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset) +{ + struct davinci_gpio_controller *ctlr = chip2controller(chip); + struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs; + unsigned gpio = chip->base + offset; + unsigned long flags; + + spin_lock_irqsave(&ctlr->lock, flags); + + gpio_reg_clear_bit(®s->enable, gpio); + + spin_unlock_irqrestore(&ctlr->lock, flags); +} + +static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset) +{ + struct davinci_gpio_controller *ctlr = chip2controller(chip); + struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs; + unsigned gpio = chip->base + offset; + unsigned long flags; + + spin_lock_irqsave(&ctlr->lock, flags); + + gpio_reg_set_bit(®s->direction, gpio); + + spin_unlock_irqrestore(&ctlr->lock, flags); + + return 0; +} + +static int tnetv107x_gpio_dir_out(struct gpio_chip *chip, + unsigned offset, int value) +{ + struct davinci_gpio_controller *ctlr = chip2controller(chip); + struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs; + unsigned gpio = chip->base + offset; + unsigned long flags; + + spin_lock_irqsave(&ctlr->lock, flags); + + if (value) + gpio_reg_set_bit(®s->data_out, gpio); + else + gpio_reg_clear_bit(®s->data_out, gpio); + + gpio_reg_clear_bit(®s->direction, gpio); + + spin_unlock_irqrestore(&ctlr->lock, flags); + + return 0; +} + +static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct davinci_gpio_controller *ctlr = chip2controller(chip); + struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs; + unsigned gpio = chip->base + offset; + int ret; + + ret = gpio_reg_get_bit(®s->data_in, gpio); + + return ret ? 1 : 0; +} + +static void tnetv107x_gpio_set(struct gpio_chip *chip, + unsigned offset, int value) +{ + struct davinci_gpio_controller *ctlr = chip2controller(chip); + struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs; + unsigned gpio = chip->base + offset; + unsigned long flags; + + spin_lock_irqsave(&ctlr->lock, flags); + + if (value) + gpio_reg_set_bit(®s->data_out, gpio); + else + gpio_reg_clear_bit(®s->data_out, gpio); + + spin_unlock_irqrestore(&ctlr->lock, flags); +} + +static int __init tnetv107x_gpio_setup(void) +{ + int i, base; + unsigned ngpio; + struct davinci_soc_info *soc_info = &davinci_soc_info; + struct tnetv107x_gpio_regs *regs; + struct davinci_gpio_controller *ctlr; + + if (soc_info->gpio_type != GPIO_TYPE_TNETV107X) + return 0; + + ngpio = soc_info->gpio_num; + if (ngpio == 0) { + pr_err("GPIO setup: how many GPIOs?\n"); + return -EINVAL; + } + + if (WARN_ON(TNETV107X_N_GPIO < ngpio)) + ngpio = TNETV107X_N_GPIO; + + regs = ioremap(soc_info->gpio_base, SZ_4K); + if (WARN_ON(!regs)) + return -EINVAL; + + for (i = 0, base = 0; base < ngpio; i++, base += 32) { + ctlr = &chips[i]; + + ctlr->chip.label = "tnetv107x"; + ctlr->chip.can_sleep = 0; + ctlr->chip.base = base; + ctlr->chip.ngpio = ngpio - base; + if (ctlr->chip.ngpio > 32) + ctlr->chip.ngpio = 32; + + ctlr->chip.request = tnetv107x_gpio_request; + ctlr->chip.free = tnetv107x_gpio_free; + ctlr->chip.direction_input = tnetv107x_gpio_dir_in; + ctlr->chip.get = tnetv107x_gpio_get; + ctlr->chip.direction_output = tnetv107x_gpio_dir_out; + ctlr->chip.set = tnetv107x_gpio_set; + + spin_lock_init(&ctlr->lock); + + ctlr->regs = regs; + ctlr->set_data = ®s->data_out[i]; + ctlr->clr_data = ®s->data_out[i]; + ctlr->in_data = ®s->data_in[i]; + + gpiochip_add(&ctlr->chip); + } + + soc_info->gpio_ctlrs = chips; + soc_info->gpio_ctlrs_num = DIV_ROUND_UP(ngpio, 32); + return 0; +} +pure_initcall(tnetv107x_gpio_setup); diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h index 834725f1e81d..9aa240909a2c 100644 --- a/arch/arm/mach-davinci/include/mach/asp.h +++ b/arch/arm/mach-davinci/include/mach/asp.h @@ -52,7 +52,8 @@ struct snd_platform_data { u32 tx_dma_offset; u32 rx_dma_offset; - enum dma_event_q eventq_no; /* event queue number */ + enum dma_event_q asp_chan_q; /* event queue number for ASP channel */ + enum dma_event_q ram_chan_q; /* event queue number for RAM channel */ unsigned int codec_fmt; /* * Allowing this is more efficient and eliminates left and right swaps @@ -63,6 +64,49 @@ struct snd_platform_data { unsigned sram_size_playback; unsigned sram_size_capture; + /* + * If McBSP peripheral gets the clock from an external pin, + * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR + * and MCBSP_CLKS. + * Depending on different hardware connections it is possible + * to use this setting to change the behaviour of McBSP + * driver. The dm365_clk_input_pin enum is available for dm365 + */ + int clk_input_pin; + + /* + * This flag works when both clock and FS are outputs for the cpu + * and makes clock more accurate (FS is not symmetrical and the + * clock is very fast. + * The clock becoming faster is named + * i2s continuous serial clock (I2S_SCK) and it is an externally + * visible bit clock. + * + * first line : WordSelect + * second line : ContinuousSerialClock + * third line: SerialData + * + * SYMMETRICAL APPROACH: + * _______________________ LEFT + * _| RIGHT |______________________| + * _ _ _ _ _ _ _ _ + * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_ + * _ _ _ _ _ _ _ _ + * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_ + * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ + * + * ACCURATE CLOCK APPROACH: + * ______________ LEFT + * _| RIGHT |_______________________________| + * _ _ _ _ _ _ _ _ _ + * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| | + * _ _ _ _ dummy cycles + * _/ \_ ... _/ \_/ \_ ... _/ \__________________ + * \_/ \_/ \_/ \_/ + * + */ + bool i2s_accurate_sck; + /* McASP specific fields */ int tdm_slots; u8 op_mode; @@ -78,6 +122,11 @@ enum { MCASP_VERSION_2, /* DA8xx/OMAPL1x */ }; +enum dm365_clk_input_pin { + MCBSP_CLKR = 0, /* DM365 */ + MCBSP_CLKS, +}; + #define INACTIVE_MODE 0 #define TX_MODE 1 #define RX_MODE 2 diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 1b31a9aa8fba..3c07059f526e 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -67,7 +67,8 @@ extern void __iomem *da8xx_syscfg1_base; void __init da830_init(void); void __init da850_init(void); -int da8xx_register_edma(void); +int da830_register_edma(struct edma_rsv_info *rsv); +int da850_register_edma(struct edma_rsv_info *rsv[2]); int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); int da8xx_register_watchdog(void); int da8xx_register_usb20(unsigned mA, unsigned potpgt); diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S index 3cd93a801d9b..f761dfdb8689 100644 --- a/arch/arm/mach-davinci/include/mach/debug-macro.S +++ b/arch/arm/mach-davinci/include/mach/debug-macro.S @@ -17,22 +17,50 @@ */ #include + +#include + +#include + #define UART_SHIFT 2 + .pushsection .data +davinci_uart_phys: .word 0 +davinci_uart_virt: .word 0 + .popsection + .macro addruart, rx, tmp + + /* Use davinci_uart_phys/virt if already configured */ +10: mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + ldreq \rx, =__virt_to_phys(davinci_uart_phys) + ldrne \rx, =davinci_uart_virt + ldr \rx, [\rx] + cmp \rx, #0 @ is port configured? + bne 99f @ already configured + mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? - moveq \rx, #0x01000000 @ physical base address - movne \rx, #0xfe000000 @ virtual base -#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx) -#error Cannot enable DaVinci and DA8XX platforms concurrently -#elif defined(CONFIG_MACH_DAVINCI_DA830_EVM) || \ - defined(CONFIG_MACH_DAVINCI_DA850_EVM) - orr \rx, \rx, #0x00d00000 @ physical base address - orr \rx, \rx, #0x0000d000 @ of UART 2 -#else - orr \rx, \rx, #0x00c20000 @ UART 0 -#endif + + /* Copy uart phys address from decompressor uart info */ + ldreq \tmp, =__virt_to_phys(davinci_uart_phys) + ldrne \tmp, =davinci_uart_phys + ldreq \rx, =DAVINCI_UART_INFO + ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO) + ldr \rx, [\rx, #0] + str \rx, [\tmp] + + /* Copy uart virt address from decompressor uart info */ + ldreq \tmp, =__virt_to_phys(davinci_uart_virt) + ldrne \tmp, =davinci_uart_virt + ldreq \rx, =DAVINCI_UART_INFO + ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO) + ldr \rx, [\rx, #4] + str \rx, [\tmp] + + b 10b +99: .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index add6f794a362..0a27ee9a70e1 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h @@ -32,6 +32,7 @@ void __init dm646x_init(void); void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); void __init dm646x_board_setup_refclk(struct clk *clk); +int __init dm646x_init_edma(struct edma_rsv_info *rsv); void dm646x_video_init(void); diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h index ced3092af5ba..dc10ef6cf572 100644 --- a/arch/arm/mach-davinci/include/mach/edma.h +++ b/arch/arm/mach-davinci/include/mach/edma.h @@ -230,6 +230,8 @@ enum sync_dimension { #define EDMA_CONT_PARAMS_FIXED_EXACT 1002 #define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003 +#define EDMA_MAX_CC 2 + /* alloc/free DMA channels and their dedicated parameter RAM slots */ int edma_alloc_channel(int channel, void (*callback)(unsigned channel, u16 ch_status, void *data), @@ -269,6 +271,12 @@ void edma_clear_event(unsigned channel); void edma_pause(unsigned channel); void edma_resume(unsigned channel); +struct edma_rsv_info { + + const s16 (*rsv_chans)[2]; + const s16 (*rsv_slots)[2]; +}; + /* platform_data for EDMA driver */ struct edma_soc_info { @@ -280,6 +288,9 @@ struct edma_soc_info { unsigned n_cc; enum dma_event_q default_queue; + /* Resource reservation for other cores */ + struct edma_rsv_info *rsv; + const s8 (*queue_tc_mapping)[2]; const s8 (*queue_priority_mapping)[2]; }; diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index 504cc180a60b..fbece126c2bf 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h @@ -25,6 +25,7 @@ enum davinci_gpio_type { GPIO_TYPE_DAVINCI = 0, + GPIO_TYPE_TNETV107X, }; /* @@ -87,9 +88,13 @@ static inline u32 __gpio_mask(unsigned gpio) return 1 << (gpio % 32); } -/* The get/set/clear functions will inline when called with constant +/* + * The get/set/clear functions will inline when called with constant * parameters referencing built-in GPIOs, for low-overhead bitbanging. * + * gpio_set_value() will inline only on traditional Davinci style controllers + * with distinct set/clear registers. + * * Otherwise, calls with variable parameters or referencing external * GPIOs (e.g. on GPIO expander chips) use outlined functions. */ @@ -100,12 +105,15 @@ static inline void gpio_set_value(unsigned gpio, int value) u32 mask; ctlr = __gpio_to_controller(gpio); - mask = __gpio_mask(gpio); - if (value) - __raw_writel(mask, ctlr->set_data); - else - __raw_writel(mask, ctlr->clr_data); - return; + + if (ctlr->set_data != ctlr->clr_data) { + mask = __gpio_mask(gpio); + if (value) + __raw_writel(mask, ctlr->set_data); + else + __raw_writel(mask, ctlr->clr_data); + return; + } } __gpio_set_value(gpio, value); diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index f6c4f34909a2..8051110b8ac3 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h @@ -11,8 +11,19 @@ #ifndef __ASM_ARCH_SERIAL_H #define __ASM_ARCH_SERIAL_H +#include + #include +/* + * Stolen area that contains debug uart physical and virtual addresses. These + * addresses are filled in by the uncompress.h code, and are used by the debug + * macros in debug-macro.S. + * + * This area sits just below the page tables (see arch/arm/kernel/head.S). + */ +#define DAVINCI_UART_INFO (PHYS_OFFSET + 0x3ff8) + #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) @@ -21,16 +32,26 @@ #define DA8XX_UART1_BASE (IO_PHYS + 0x10c000) #define DA8XX_UART2_BASE (IO_PHYS + 0x10d000) +#define TNETV107X_UART0_BASE 0x08108100 +#define TNETV107X_UART1_BASE 0x08088400 +#define TNETV107X_UART2_BASE 0x08108300 + +#define TNETV107X_UART0_VIRT IOMEM(0xfee08100) +#define TNETV107X_UART1_VIRT IOMEM(0xfed88400) +#define TNETV107X_UART2_VIRT IOMEM(0xfee08300) + /* DaVinci UART register offsets */ #define UART_DAVINCI_PWREMU 0x0c #define UART_DM646X_SCR 0x10 #define UART_DM646X_SCR_TX_WATERMARK 0x08 +#ifndef __ASSEMBLY__ struct davinci_uart_config { /* Bit field of UARTs present; bit 0 --> UART1 */ unsigned int enabled_uarts; }; extern int davinci_serial_init(struct davinci_uart_config *); +#endif #endif /* __ASM_ARCH_SERIAL_H */ diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h new file mode 100644 index 000000000000..c72064733123 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h @@ -0,0 +1,55 @@ +/* + * Texas Instruments TNETV107X SoC Specific Defines + * + * Copyright (C) 2010 Texas Instruments + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __ASM_ARCH_DAVINCI_TNETV107X_H +#define __ASM_ARCH_DAVINCI_TNETV107X_H + +#include + +#define TNETV107X_DDR_BASE 0x80000000 + +/* + * Fixed mapping for early init starts here. If low-level debug is enabled, + * this area also gets mapped via io_pg_offset and io_phys by the boot code. + * To fit in with the io_pg_offset calculation, the io base address selected + * here _must_ be a multiple of 2^20. + */ +#define TNETV107X_IO_BASE 0x08000000 +#define TNETV107X_IO_VIRT (IO_VIRT + SZ_1M) + +#define TNETV107X_N_GPIO 65 + +#ifndef __ASSEMBLY__ + +#include +#include +#include +#include + +struct tnetv107x_device_info { + struct davinci_uart_config *serial_config; + struct davinci_mmc_config *mmc_config[2]; /* 2 controllers */ + struct davinci_nand_pdata *nand_config[4]; /* 4 chipsels */ +}; + +extern struct platform_device tnetv107x_wdt_device; +extern struct platform_device tnetv107x_serial_device; + +extern void __init tnetv107x_init(void); +extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *); +extern void __init tnetv107x_irq_init(void); + +#endif + +#endif /* __ASM_ARCH_DAVINCI_TNETV107X_H */ diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h index 33796b4db17f..15a6192ad6eb 100644 --- a/arch/arm/mach-davinci/include/mach/uncompress.h +++ b/arch/arm/mach-davinci/include/mach/uncompress.h @@ -1,8 +1,17 @@ /* * Serial port stubs for kernel decompress status messages * - * Author: Anant Gole - * (C) Copyright (C) 2006, Texas Instruments, Inc + * Initially based on: + * arch/arm/plat-omap/include/mach/uncompress.h + * + * Original copyrights follow. + * + * Copyright (C) 2000 RidgeRun, Inc. + * Author: Greg Lonnon + * + * Rewritten by: + * Author: + * 2004 (c) MontaVista Software, Inc. * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any @@ -11,30 +20,17 @@ #include #include -#include #include -extern unsigned int __machine_arch_type; +#include static u32 *uart; - -static u32 *get_uart_base(void) -{ - if (__machine_arch_type == MACH_TYPE_DAVINCI_DA830_EVM || - __machine_arch_type == MACH_TYPE_DAVINCI_DA850_EVM) - return (u32 *)DA8XX_UART2_BASE; - else - return (u32 *)DAVINCI_UART0_BASE; -} +static u32 *uart_info = (u32 *)(DAVINCI_UART_INFO); /* PORT_16C550A, in polled non-fifo mode */ - static void putc(char c) { - if (!uart) - uart = get_uart_base(); - while (!(uart[UART_LSR] & UART_LSR_THRE)) barrier(); uart[UART_TX] = c; @@ -42,12 +38,61 @@ static void putc(char c) static inline void flush(void) { - if (!uart) - uart = get_uart_base(); - while (!(uart[UART_LSR] & UART_LSR_THRE)) barrier(); } -#define arch_decomp_setup() +static inline void set_uart_info(u32 phys, void * __iomem virt) +{ + uart = (u32 *)phys; + uart_info[0] = phys; + uart_info[1] = (u32)virt; +} + +#define _DEBUG_LL_ENTRY(machine, phys, virt) \ + if (machine_is_##machine()) { \ + set_uart_info(phys, virt); \ + break; \ + } + +#define DEBUG_LL_DAVINCI(machine, port) \ + _DEBUG_LL_ENTRY(machine, DAVINCI_UART##port##_BASE, \ + IO_ADDRESS(DAVINCI_UART##port##_BASE)) + +#define DEBUG_LL_DA8XX(machine, port) \ + _DEBUG_LL_ENTRY(machine, DA8XX_UART##port##_BASE, \ + IO_ADDRESS(DA8XX_UART##port##_BASE)) + +#define DEBUG_LL_TNETV107X(machine, port) \ + _DEBUG_LL_ENTRY(machine, TNETV107X_UART##port##_BASE, \ + TNETV107X_UART##port##_VIRT) + +static inline void __arch_decomp_setup(unsigned long arch_id) +{ + /* + * Initialize the port based on the machine ID from the bootloader. + * Note that we're using macros here instead of switch statement + * as machine_is functions are optimized out for the boards that + * are not selected. + */ + do { + /* Davinci boards */ + DEBUG_LL_DAVINCI(davinci_evm, 0); + DEBUG_LL_DAVINCI(sffsdr, 0); + DEBUG_LL_DAVINCI(neuros_osd2, 0); + DEBUG_LL_DAVINCI(davinci_dm355_evm, 0); + DEBUG_LL_DAVINCI(dm355_leopard, 0); + DEBUG_LL_DAVINCI(davinci_dm6467_evm, 0); + DEBUG_LL_DAVINCI(davinci_dm365_evm, 0); + + /* DA8xx boards */ + DEBUG_LL_DA8XX(davinci_da830_evm, 2); + DEBUG_LL_DA8XX(davinci_da850_evm, 2); + + /* TNETV107x boards */ + DEBUG_LL_TNETV107X(tnetv107x, 1); + } while (0); +} + +#define arch_decomp_setup() __arch_decomp_setup(arch_id) #define arch_decomp_wdog() diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c new file mode 100644 index 000000000000..864e60482c53 --- /dev/null +++ b/arch/arm/mach-davinci/tnetv107x.c @@ -0,0 +1,753 @@ +/* + * Texas Instruments TNETV107X SoC Support + * + * Copyright (C) 2010 Texas Instruments + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clock.h" +#include "mux.h" + +/* Base addresses for on-chip devices */ +#define TNETV107X_INTC_BASE 0x03000000 +#define TNETV107X_TIMER0_BASE 0x08086500 +#define TNETV107X_TIMER1_BASE 0x08086600 +#define TNETV107X_CHIP_CFG_BASE 0x08087000 +#define TNETV107X_GPIO_BASE 0x08088000 +#define TNETV107X_CLOCK_CONTROL_BASE 0x0808a000 +#define TNETV107X_PSC_BASE 0x0808b000 + +/* Reference clock frequencies */ +#define OSC_FREQ_ONCHIP (24000 * 1000) +#define OSC_FREQ_OFFCHIP_SYS (25000 * 1000) +#define OSC_FREQ_OFFCHIP_ETH (25000 * 1000) +#define OSC_FREQ_OFFCHIP_TDM (19200 * 1000) + +#define N_PLLS 3 + +/* Clock Control Registers */ +struct clk_ctrl_regs { + u32 pll_bypass; + u32 _reserved0; + u32 gem_lrst; + u32 _reserved1; + u32 pll_unlock_stat; + u32 sys_unlock; + u32 eth_unlock; + u32 tdm_unlock; +}; + +/* SSPLL Registers */ +struct sspll_regs { + u32 modes; + u32 post_div; + u32 pre_div; + u32 mult_factor; + u32 divider_range; + u32 bw_divider; + u32 spr_amount; + u32 spr_rate_div; + u32 diag; +}; + +/* Watchdog Timer Registers */ +struct wdt_regs { + u32 kick_lock; + u32 kick; + u32 change_lock; + u32 change ; + u32 disable_lock; + u32 disable; + u32 prescale_lock; + u32 prescale; +}; + +static struct clk_ctrl_regs __iomem *clk_ctrl_regs; + +static struct sspll_regs __iomem *sspll_regs[N_PLLS]; +static int sspll_regs_base[N_PLLS] = { 0x40, 0x80, 0xc0 }; + +/* PLL bypass bit shifts in clk_ctrl_regs->pll_bypass register */ +static u32 bypass_mask[N_PLLS] = { BIT(0), BIT(2), BIT(1) }; + +/* offchip (external) reference clock frequencies */ +static u32 pll_ext_freq[] = { + OSC_FREQ_OFFCHIP_SYS, + OSC_FREQ_OFFCHIP_TDM, + OSC_FREQ_OFFCHIP_ETH +}; + +/* PSC control registers */ +static u32 psc_regs[] __initconst = { TNETV107X_PSC_BASE }; + +/* Host map for interrupt controller */ +static u32 intc_host_map[] = { 0x01010000, 0x01010101, -1 }; + +static unsigned long clk_sspll_recalc(struct clk *clk); + +/* Level 1 - the PLLs */ +#define define_pll_clk(cname, pll, divmask, base) \ + static struct pll_data pll_##cname##_data = { \ + .num = pll, \ + .div_ratio_mask = divmask, \ + .phys_base = base + \ + TNETV107X_CLOCK_CONTROL_BASE, \ + }; \ + static struct clk pll_##cname##_clk = { \ + .name = "pll_" #cname "_clk", \ + .pll_data = &pll_##cname##_data, \ + .flags = CLK_PLL, \ + .recalc = clk_sspll_recalc, \ + } + +define_pll_clk(sys, 0, 0x1ff, 0x600); +define_pll_clk(tdm, 1, 0x0ff, 0x200); +define_pll_clk(eth, 2, 0x0ff, 0x400); + +/* Level 2 - divided outputs from the PLLs */ +#define define_pll_div_clk(pll, cname, div) \ + static struct clk pll##_##cname##_clk = { \ + .name = #pll "_" #cname "_clk",\ + .parent = &pll_##pll##_clk, \ + .flags = CLK_PLL, \ + .div_reg = PLLDIV##div, \ + } + +define_pll_div_clk(sys, arm1176, 1); +define_pll_div_clk(sys, dsp, 2); +define_pll_div_clk(sys, ddr, 3); +define_pll_div_clk(sys, full, 4); +define_pll_div_clk(sys, lcd, 5); +define_pll_div_clk(sys, vlynq_ref, 6); +define_pll_div_clk(sys, tsc, 7); +define_pll_div_clk(sys, half, 8); + +define_pll_div_clk(eth, 5mhz, 1); +define_pll_div_clk(eth, 50mhz, 2); +define_pll_div_clk(eth, 125mhz, 3); +define_pll_div_clk(eth, 250mhz, 4); +define_pll_div_clk(eth, 25mhz, 5); + +define_pll_div_clk(tdm, 0, 1); +define_pll_div_clk(tdm, extra, 2); +define_pll_div_clk(tdm, 1, 3); + + +/* Level 3 - LPSC gated clocks */ +#define __lpsc_clk(cname, _parent, mod, flg) \ + static struct clk clk_##cname = { \ + .name = #cname, \ + .parent = &_parent, \ + .lpsc = TNETV107X_LPSC_##mod,\ + .flags = flg, \ + } + +#define lpsc_clk_enabled(cname, parent, mod) \ + __lpsc_clk(cname, parent, mod, ALWAYS_ENABLED) + +#define lpsc_clk(cname, parent, mod) \ + __lpsc_clk(cname, parent, mod, 0) + +lpsc_clk_enabled(arm, sys_arm1176_clk, ARM); +lpsc_clk_enabled(gem, sys_dsp_clk, GEM); +lpsc_clk_enabled(ddr2_phy, sys_ddr_clk, DDR2_PHY); +lpsc_clk_enabled(tpcc, sys_full_clk, TPCC); +lpsc_clk_enabled(tptc0, sys_full_clk, TPTC0); +lpsc_clk_enabled(tptc1, sys_full_clk, TPTC1); +lpsc_clk_enabled(ram, sys_full_clk, RAM); +lpsc_clk_enabled(aemif, sys_full_clk, AEMIF); +lpsc_clk_enabled(chipcfg, sys_half_clk, CHIP_CFG); +lpsc_clk_enabled(rom, sys_half_clk, ROM); +lpsc_clk_enabled(secctl, sys_half_clk, SECCTL); +lpsc_clk_enabled(keymgr, sys_half_clk, KEYMGR); +lpsc_clk_enabled(gpio, sys_half_clk, GPIO); +lpsc_clk_enabled(debugss, sys_half_clk, DEBUGSS); +lpsc_clk_enabled(system, sys_half_clk, SYSTEM); +lpsc_clk_enabled(ddr2_vrst, sys_ddr_clk, DDR2_EMIF1_VRST); +lpsc_clk_enabled(ddr2_vctl_rst, sys_ddr_clk, DDR2_EMIF2_VCTL_RST); +lpsc_clk_enabled(wdt_arm, sys_half_clk, WDT_ARM); + +lpsc_clk(mbx_lite, sys_arm1176_clk, MBX_LITE); +lpsc_clk(ethss, eth_125mhz_clk, ETHSS); +lpsc_clk(tsc, sys_tsc_clk, TSC); +lpsc_clk(uart0, sys_half_clk, UART0); +lpsc_clk(uart1, sys_half_clk, UART1); +lpsc_clk(uart2, sys_half_clk, UART2); +lpsc_clk(pktsec, sys_half_clk, PKTSEC); +lpsc_clk(keypad, sys_half_clk, KEYPAD); +lpsc_clk(mdio, sys_half_clk, MDIO); +lpsc_clk(sdio0, sys_half_clk, SDIO0); +lpsc_clk(sdio1, sys_half_clk, SDIO1); +lpsc_clk(timer0, sys_half_clk, TIMER0); +lpsc_clk(timer1, sys_half_clk, TIMER1); +lpsc_clk(wdt_dsp, sys_half_clk, WDT_DSP); +lpsc_clk(ssp, sys_half_clk, SSP); +lpsc_clk(tdm0, tdm_0_clk, TDM0); +lpsc_clk(tdm1, tdm_1_clk, TDM1); +lpsc_clk(vlynq, sys_vlynq_ref_clk, VLYNQ); +lpsc_clk(mcdma, sys_half_clk, MCDMA); +lpsc_clk(usb0, sys_half_clk, USB0); +lpsc_clk(usb1, sys_half_clk, USB1); +lpsc_clk(usbss, sys_half_clk, USBSS); +lpsc_clk(ethss_rgmii, eth_250mhz_clk, ETHSS_RGMII); +lpsc_clk(imcop, sys_dsp_clk, IMCOP); +lpsc_clk(spare, sys_half_clk, SPARE); + +/* LCD needs a full power down to clear controller state */ +__lpsc_clk(lcd, sys_lcd_clk, LCD, PSC_SWRSTDISABLE); + + +/* Level 4 - leaf clocks for LPSC modules shared across drivers */ +static struct clk clk_rng = { .name = "rng", .parent = &clk_pktsec }; +static struct clk clk_pka = { .name = "pka", .parent = &clk_pktsec }; + +static struct clk_lookup clks[] = { + CLK(NULL, "pll_sys_clk", &pll_sys_clk), + CLK(NULL, "pll_eth_clk", &pll_eth_clk), + CLK(NULL, "pll_tdm_clk", &pll_tdm_clk), + CLK(NULL, "sys_arm1176_clk", &sys_arm1176_clk), + CLK(NULL, "sys_dsp_clk", &sys_dsp_clk), + CLK(NULL, "sys_ddr_clk", &sys_ddr_clk), + CLK(NULL, "sys_full_clk", &sys_full_clk), + CLK(NULL, "sys_lcd_clk", &sys_lcd_clk), + CLK(NULL, "sys_vlynq_ref_clk", &sys_vlynq_ref_clk), + CLK(NULL, "sys_tsc_clk", &sys_tsc_clk), + CLK(NULL, "sys_half_clk", &sys_half_clk), + CLK(NULL, "eth_5mhz_clk", ð_5mhz_clk), + CLK(NULL, "eth_50mhz_clk", ð_50mhz_clk), + CLK(NULL, "eth_125mhz_clk", ð_125mhz_clk), + CLK(NULL, "eth_250mhz_clk", ð_250mhz_clk), + CLK(NULL, "eth_25mhz_clk", ð_25mhz_clk), + CLK(NULL, "tdm_0_clk", &tdm_0_clk), + CLK(NULL, "tdm_extra_clk", &tdm_extra_clk), + CLK(NULL, "tdm_1_clk", &tdm_1_clk), + CLK(NULL, "clk_arm", &clk_arm), + CLK(NULL, "clk_gem", &clk_gem), + CLK(NULL, "clk_ddr2_phy", &clk_ddr2_phy), + CLK(NULL, "clk_tpcc", &clk_tpcc), + CLK(NULL, "clk_tptc0", &clk_tptc0), + CLK(NULL, "clk_tptc1", &clk_tptc1), + CLK(NULL, "clk_ram", &clk_ram), + CLK(NULL, "clk_mbx_lite", &clk_mbx_lite), + CLK("tnetv107x-fb.0", NULL, &clk_lcd), + CLK(NULL, "clk_ethss", &clk_ethss), + CLK(NULL, "aemif", &clk_aemif), + CLK(NULL, "clk_chipcfg", &clk_chipcfg), + CLK("tnetv107x-ts.0", NULL, &clk_tsc), + CLK(NULL, "clk_rom", &clk_rom), + CLK(NULL, "uart2", &clk_uart2), + CLK(NULL, "clk_pktsec", &clk_pktsec), + CLK("tnetv107x-rng.0", NULL, &clk_rng), + CLK("tnetv107x-pka.0", NULL, &clk_pka), + CLK(NULL, "clk_secctl", &clk_secctl), + CLK(NULL, "clk_keymgr", &clk_keymgr), + CLK("tnetv107x-keypad.0", NULL, &clk_keypad), + CLK(NULL, "clk_gpio", &clk_gpio), + CLK(NULL, "clk_mdio", &clk_mdio), + CLK("davinci_mmc.0", NULL, &clk_sdio0), + CLK(NULL, "uart0", &clk_uart0), + CLK(NULL, "uart1", &clk_uart1), + CLK(NULL, "timer0", &clk_timer0), + CLK(NULL, "timer1", &clk_timer1), + CLK("tnetv107x_wdt.0", NULL, &clk_wdt_arm), + CLK(NULL, "clk_wdt_dsp", &clk_wdt_dsp), + CLK("ti-ssp.0", NULL, &clk_ssp), + CLK(NULL, "clk_tdm0", &clk_tdm0), + CLK(NULL, "clk_vlynq", &clk_vlynq), + CLK(NULL, "clk_mcdma", &clk_mcdma), + CLK(NULL, "clk_usb0", &clk_usb0), + CLK(NULL, "clk_tdm1", &clk_tdm1), + CLK(NULL, "clk_debugss", &clk_debugss), + CLK(NULL, "clk_ethss_rgmii", &clk_ethss_rgmii), + CLK(NULL, "clk_system", &clk_system), + CLK(NULL, "clk_imcop", &clk_imcop), + CLK(NULL, "clk_spare", &clk_spare), + CLK("davinci_mmc.1", NULL, &clk_sdio1), + CLK(NULL, "clk_usb1", &clk_usb1), + CLK(NULL, "clk_usbss", &clk_usbss), + CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst), + CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst), + CLK(NULL, NULL, NULL), +}; + +static const struct mux_config pins[] = { +#ifdef CONFIG_DAVINCI_MUX + MUX_CFG(TNETV107X, ASR_A00, 0, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO32, 0, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A01, 0, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO33, 0, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A02, 0, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO34, 0, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A03, 0, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO35, 0, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A04, 0, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO36, 0, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A05, 0, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO37, 0, 25, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A06, 1, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO38, 1, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A07, 1, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO39, 1, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A08, 1, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO40, 1, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A09, 1, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO41, 1, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A10, 1, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO42, 1, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A11, 1, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, BOOT_STRP_0, 1, 25, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A12, 2, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, BOOT_STRP_1, 2, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A13, 2, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO43, 2, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A14, 2, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO44, 2, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A15, 2, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO45, 2, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A16, 2, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO46, 2, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A17, 2, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO47, 2, 25, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_A18, 3, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO48, 3, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO1_DATA3_0, 3, 0, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_A19, 3, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO49, 3, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO1_DATA2_0, 3, 5, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_A20, 3, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO50, 3, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO1_DATA1_0, 3, 10, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_A21, 3, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO51, 3, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO1_DATA0_0, 3, 15, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_A22, 3, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO52, 3, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO1_CMD_0, 3, 20, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_A23, 3, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO53, 3, 25, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO1_CLK_0, 3, 25, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_BA_1, 4, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO54, 4, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SYS_PLL_CLK, 4, 0, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_CS0, 4, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, ASR_CS1, 4, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, ASR_CS2, 4, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM_PLL_CLK, 4, 15, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_CS3, 4, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, ETH_PHY_CLK, 4, 20, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, ASR_D00, 4, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO55, 4, 25, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D01, 5, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO56, 5, 0, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D02, 5, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO57, 5, 5, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D03, 5, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO58, 5, 10, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D04, 5, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO59_0, 5, 15, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D05, 5, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO60_0, 5, 20, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D06, 5, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO61_0, 5, 25, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D07, 6, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO62_0, 6, 0, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D08, 6, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO63_0, 6, 5, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D09, 6, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO64_0, 6, 10, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D10, 6, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SDIO1_DATA3_1, 6, 15, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D11, 6, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SDIO1_DATA2_1, 6, 20, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D12, 6, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SDIO1_DATA1_1, 6, 25, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D13, 7, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SDIO1_DATA0_1, 7, 0, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D14, 7, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SDIO1_CMD_1, 7, 5, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_D15, 7, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SDIO1_CLK_1, 7, 10, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_OE, 7, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, BOOT_STRP_2, 7, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_RNW, 7, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO29_0, 7, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_WAIT, 7, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO30_0, 7, 25, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_WE, 8, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, BOOT_STRP_3, 8, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, ASR_WE_DQM0, 8, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO31, 8, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD17_0, 8, 5, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, ASR_WE_DQM1, 8, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, ASR_BA0_0, 8, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, VLYNQ_CLK, 9, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO14, 9, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD19_0, 9, 0, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, VLYNQ_RXD0, 9, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO15, 9, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD20_0, 9, 5, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, VLYNQ_RXD1, 9, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO16, 9, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD21_0, 9, 10, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, VLYNQ_TXD0, 9, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO17, 9, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD22_0, 9, 15, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, VLYNQ_TXD1, 9, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO18, 9, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD23_0, 9, 20, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, SDIO0_CLK, 10, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO19, 10, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO0_CMD, 10, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO20, 10, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO0_DATA0, 10, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO21, 10, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO0_DATA1, 10, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO22, 10, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO0_DATA2, 10, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO23, 10, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SDIO0_DATA3, 10, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO24, 10, 25, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, EMU0, 11, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, EMU1, 11, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, RTCK, 12, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TRST_N, 12, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TCK, 12, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDI, 12, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDO, 12, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TMS, 12, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM1_CLK, 13, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM1_RX, 13, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM1_TX, 13, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM1_FS, 13, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_R0, 14, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_R1, 14, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_R2, 14, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_R3, 14, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_R4, 14, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_R5, 14, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_R6, 15, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO12, 15, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, KEYPAD_R7, 15, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO10, 15, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, KEYPAD_C0, 15, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_C1, 15, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_C2, 15, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_C3, 15, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_C4, 16, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_C5, 16, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, KEYPAD_C6, 16, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO13, 16, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, TEST_CLK_IN, 16, 10, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, KEYPAD_C7, 16, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO11, 16, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, SSP0_0, 17, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SCC_DCLK, 17, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD20_1, 17, 0, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, SSP0_1, 17, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SCC_CS_N, 17, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD21_1, 17, 5, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, SSP0_2, 17, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SCC_D, 17, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD22_1, 17, 10, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, SSP0_3, 17, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, SCC_RESETN, 17, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, LCD_PD23_1, 17, 15, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, SSP1_0, 18, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO25, 18, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, UART2_CTS, 18, 0, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, SSP1_1, 18, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO26, 18, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, UART2_RD, 18, 5, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, SSP1_2, 18, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO27, 18, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, UART2_RTS, 18, 10, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, SSP1_3, 18, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO28, 18, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, UART2_TD, 18, 15, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, UART0_CTS, 19, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, UART0_RD, 19, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, UART0_RTS, 19, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, UART0_TD, 19, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, UART1_RD, 19, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, UART1_TD, 19, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_AC_NCS, 20, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_HSYNC_RNW, 20, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_VSYNC_A0, 20, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_MCLK, 20, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD16_0, 20, 15, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, LCD_PCLK_E, 20, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD00, 20, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD01, 21, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD02, 21, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD03, 21, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD04, 21, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD05, 21, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD06, 21, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD07, 22, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD08, 22, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO59_1, 22, 5, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, LCD_PD09, 22, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO60_1, 22, 10, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, LCD_PD10, 22, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, ASR_BA0_1, 22, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, GPIO61_1, 22, 15, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, LCD_PD11, 22, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO62_1, 22, 20, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, LCD_PD12, 22, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO63_1, 22, 25, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, LCD_PD13, 23, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO64_1, 23, 0, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, LCD_PD14, 23, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO29_1, 23, 5, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, LCD_PD15, 23, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO30_1, 23, 10, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, EINT0, 24, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO08, 24, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, EINT1, 24, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, GPIO09, 24, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, GPIO00, 24, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD20_2, 24, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, TDM_CLK_IN_2, 24, 10, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, GPIO01, 24, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD21_2, 24, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, 24M_CLK_OUT_1, 24, 15, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, GPIO02, 24, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD22_2, 24, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, GPIO03, 24, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD23_2, 24, 25, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, GPIO04, 25, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD16_1, 25, 0, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, USB0_RXERR, 25, 0, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, GPIO05, 25, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD17_1, 25, 5, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, TDM_CLK_IN_1, 25, 5, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, GPIO06, 25, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD18, 25, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, 24M_CLK_OUT_2, 25, 10, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, GPIO07, 25, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, LCD_PD19_1, 25, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, USB1_RXERR, 25, 15, 0x1f, 0x0c, false) + MUX_CFG(TNETV107X, ETH_PLL_CLK, 25, 15, 0x1f, 0x1c, false) + MUX_CFG(TNETV107X, MDIO, 26, 0, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, MDC, 26, 5, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, AIC_MUTE_STAT_N, 26, 10, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM0_CLK, 26, 10, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, AIC_HNS_EN_N, 26, 15, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM0_FS, 26, 15, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, AIC_HDS_EN_STAT_N, 26, 20, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM0_TX, 26, 20, 0x1f, 0x04, false) + MUX_CFG(TNETV107X, AIC_HNF_EN_STAT_N, 26, 25, 0x1f, 0x00, false) + MUX_CFG(TNETV107X, TDM0_RX, 26, 25, 0x1f, 0x04, false) +#endif +}; + +/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ +static u8 irq_prios[TNETV107X_N_CP_INTC_IRQ] = { + /* fill in default priority 7 */ + [0 ... (TNETV107X_N_CP_INTC_IRQ - 1)] = 7, + /* now override as needed, e.g. [xxx] = 5 */ +}; + +/* Contents of JTAG ID register used to identify exact cpu type */ +static struct davinci_id ids[] = { + { + .variant = 0x0, + .part_no = 0xb8a1, + .manufacturer = 0x017, + .cpu_id = DAVINCI_CPU_ID_TNETV107X, + .name = "tnetv107x rev1.0", + }, +}; + +static struct davinci_timer_instance timer_instance[2] = { + { + .base = TNETV107X_TIMER0_BASE, + .bottom_irq = IRQ_TNETV107X_TIMER_0_TINT12, + .top_irq = IRQ_TNETV107X_TIMER_0_TINT34, + }, + { + .base = TNETV107X_TIMER1_BASE, + .bottom_irq = IRQ_TNETV107X_TIMER_1_TINT12, + .top_irq = IRQ_TNETV107X_TIMER_1_TINT34, + }, +}; + +static struct davinci_timer_info timer_info = { + .timers = timer_instance, + .clockevent_id = T0_BOT, + .clocksource_id = T0_TOP, +}; + +/* + * TNETV107X platforms do not use the static mappings from Davinci + * IO_PHYS/IO_VIRT. This SOC's interesting MMRs are at different addresses, + * and changing IO_PHYS would break away from existing Davinci SOCs. + * + * The primary impact of the current model is that IO_ADDRESS() is not to be + * used to map registers on TNETV107X. + * + * 1. The first chunk is for INTC: This needs to be mapped in via iotable + * because ioremap() does not seem to be operational at the time when + * irqs are initialized. Without this, consistent dma init bombs. + * + * 2. The second chunk maps in register areas that need to be populated into + * davinci_soc_info. Note that alignment restrictions come into play if + * low-level debug is enabled (see note in ). + */ +static struct map_desc io_desc[] = { + { /* INTC */ + .virtual = IO_VIRT, + .pfn = __phys_to_pfn(TNETV107X_INTC_BASE), + .length = SZ_16K, + .type = MT_DEVICE + }, + { /* Most of the rest */ + .virtual = TNETV107X_IO_VIRT, + .pfn = __phys_to_pfn(TNETV107X_IO_BASE), + .length = IO_SIZE - SZ_1M, + .type = MT_DEVICE + }, +}; + +static unsigned long clk_sspll_recalc(struct clk *clk) +{ + int pll; + unsigned long mult = 0, prediv = 1, postdiv = 1; + unsigned long ref = OSC_FREQ_ONCHIP, ret; + u32 tmp; + + if (WARN_ON(!clk->pll_data)) + return clk->rate; + + if (!clk_ctrl_regs) { + void __iomem *tmp; + + tmp = ioremap(TNETV107X_CLOCK_CONTROL_BASE, SZ_4K); + + if (WARN(!tmp, "failed ioremap for clock control regs\n")) + return clk->parent ? clk->parent->rate : 0; + + for (pll = 0; pll < N_PLLS; pll++) + sspll_regs[pll] = tmp + sspll_regs_base[pll]; + + clk_ctrl_regs = tmp; + } + + pll = clk->pll_data->num; + + tmp = __raw_readl(&clk_ctrl_regs->pll_bypass); + if (!(tmp & bypass_mask[pll])) { + mult = __raw_readl(&sspll_regs[pll]->mult_factor); + prediv = __raw_readl(&sspll_regs[pll]->pre_div) + 1; + postdiv = __raw_readl(&sspll_regs[pll]->post_div) + 1; + } + + tmp = __raw_readl(clk->pll_data->base + PLLCTL); + if (tmp & PLLCTL_CLKMODE) + ref = pll_ext_freq[pll]; + + clk->pll_data->input_rate = ref; + + tmp = __raw_readl(clk->pll_data->base + PLLCTL); + if (!(tmp & PLLCTL_PLLEN)) + return ref; + + ret = ref; + if (mult) + ret += ((unsigned long long)ref * mult) / 256; + + ret /= (prediv * postdiv); + + return ret; +} + +static void tnetv107x_watchdog_reset(struct platform_device *pdev) +{ + struct wdt_regs __iomem *regs; + + regs = ioremap(pdev->resource[0].start, SZ_4K); + + /* disable watchdog */ + __raw_writel(0x7777, ®s->disable_lock); + __raw_writel(0xcccc, ®s->disable_lock); + __raw_writel(0xdddd, ®s->disable_lock); + __raw_writel(0, ®s->disable); + + /* program prescale */ + __raw_writel(0x5a5a, ®s->prescale_lock); + __raw_writel(0xa5a5, ®s->prescale_lock); + __raw_writel(0, ®s->prescale); + + /* program countdown */ + __raw_writel(0x6666, ®s->change_lock); + __raw_writel(0xbbbb, ®s->change_lock); + __raw_writel(1, ®s->change); + + /* enable watchdog */ + __raw_writel(0x7777, ®s->disable_lock); + __raw_writel(0xcccc, ®s->disable_lock); + __raw_writel(0xdddd, ®s->disable_lock); + __raw_writel(1, ®s->disable); + + /* kick */ + __raw_writel(0x5555, ®s->kick_lock); + __raw_writel(0xaaaa, ®s->kick_lock); + __raw_writel(1, ®s->kick); +} + +static struct davinci_soc_info tnetv107x_soc_info = { + .io_desc = io_desc, + .io_desc_num = ARRAY_SIZE(io_desc), + .ids = ids, + .ids_num = ARRAY_SIZE(ids), + .jtag_id_reg = TNETV107X_CHIP_CFG_BASE + 0x018, + .cpu_clks = clks, + .psc_bases = psc_regs, + .psc_bases_num = ARRAY_SIZE(psc_regs), + .pinmux_base = TNETV107X_CHIP_CFG_BASE + 0x150, + .pinmux_pins = pins, + .pinmux_pins_num = ARRAY_SIZE(pins), + .intc_type = DAVINCI_INTC_TYPE_CP_INTC, + .intc_base = TNETV107X_INTC_BASE, + .intc_irq_prios = irq_prios, + .intc_irq_num = TNETV107X_N_CP_INTC_IRQ, + .intc_host_map = intc_host_map, + .gpio_base = TNETV107X_GPIO_BASE, + .gpio_type = GPIO_TYPE_TNETV107X, + .gpio_num = TNETV107X_N_GPIO, + .timer_info = &timer_info, + .serial_dev = &tnetv107x_serial_device, + .reset = tnetv107x_watchdog_reset, + .reset_device = &tnetv107x_wdt_device, +}; + +void __init tnetv107x_init(void) +{ + davinci_common_init(&tnetv107x_soc_info); +} diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index 7f3039761d91..8bf3cec98cfa 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c @@ -43,7 +43,8 @@ static unsigned long get_uart_rate(struct clk *clk); static int set_keytchclk_rate(struct clk *clk, unsigned long rate); static int set_div_rate(struct clk *clk, unsigned long rate); - +static int set_i2s_sclk_rate(struct clk *clk, unsigned long rate); +static int set_i2s_lrclk_rate(struct clk *clk, unsigned long rate); static struct clk clk_xtali = { .rate = EP93XX_EXT_CLK_RATE, @@ -112,6 +113,29 @@ static struct clk clk_video = { .set_rate = set_div_rate, }; +static struct clk clk_i2s_mclk = { + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_I2SCLKDIV, + .enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE, + .set_rate = set_div_rate, +}; + +static struct clk clk_i2s_sclk = { + .sw_locked = 1, + .parent = &clk_i2s_mclk, + .enable_reg = EP93XX_SYSCON_I2SCLKDIV, + .enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA, + .set_rate = set_i2s_sclk_rate, +}; + +static struct clk clk_i2s_lrclk = { + .sw_locked = 1, + .parent = &clk_i2s_sclk, + .enable_reg = EP93XX_SYSCON_I2SCLKDIV, + .enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA, + .set_rate = set_i2s_lrclk_rate, +}; + /* DMA Clocks */ static struct clk clk_m2p0 = { .parent = &clk_h, @@ -191,6 +215,9 @@ static struct clk_lookup clocks[] = { INIT_CK("ep93xx-keypad", NULL, &clk_keypad), INIT_CK("ep93xx-fb", NULL, &clk_video), INIT_CK("ep93xx-spi.0", NULL, &clk_spi), + INIT_CK("ep93xx-i2s", "mclk", &clk_i2s_mclk), + INIT_CK("ep93xx-i2s", "sclk", &clk_i2s_sclk), + INIT_CK("ep93xx-i2s", "lrclk", &clk_i2s_lrclk), INIT_CK(NULL, "pwm_clk", &clk_pwm), INIT_CK(NULL, "m2p0", &clk_m2p0), INIT_CK(NULL, "m2p1", &clk_m2p1), @@ -401,6 +428,44 @@ static int set_div_rate(struct clk *clk, unsigned long rate) return 0; } +static int set_i2s_sclk_rate(struct clk *clk, unsigned long rate) +{ + unsigned val = __raw_readl(clk->enable_reg); + + if (rate == clk_i2s_mclk.rate / 2) + ep93xx_syscon_swlocked_write(val & ~EP93XX_I2SCLKDIV_SDIV, + clk->enable_reg); + else if (rate == clk_i2s_mclk.rate / 4) + ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_SDIV, + clk->enable_reg); + else + return -EINVAL; + + clk_i2s_sclk.rate = rate; + return 0; +} + +static int set_i2s_lrclk_rate(struct clk *clk, unsigned long rate) +{ + unsigned val = __raw_readl(clk->enable_reg) & + ~EP93XX_I2SCLKDIV_LRDIV_MASK; + + if (rate == clk_i2s_sclk.rate / 32) + ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV32, + clk->enable_reg); + else if (rate == clk_i2s_sclk.rate / 64) + ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV64, + clk->enable_reg); + else if (rate == clk_i2s_sclk.rate / 128) + ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV128, + clk->enable_reg); + else + return -EINVAL; + + clk_i2s_lrclk.rate = rate; + return 0; +} + int clk_set_rate(struct clk *clk, unsigned long rate) { if (clk->set_rate) diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 8e37a045188c..4cb55d3902ff 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -758,6 +758,73 @@ void ep93xx_keypad_release_gpio(struct platform_device *pdev) } EXPORT_SYMBOL(ep93xx_keypad_release_gpio); +/************************************************************************* + * EP93xx I2S audio peripheral handling + *************************************************************************/ +static struct resource ep93xx_i2s_resource[] = { + { + .start = EP93XX_I2S_PHYS_BASE, + .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device ep93xx_i2s_device = { + .name = "ep93xx-i2s", + .id = -1, + .num_resources = ARRAY_SIZE(ep93xx_i2s_resource), + .resource = ep93xx_i2s_resource, +}; + +void __init ep93xx_register_i2s(void) +{ + platform_device_register(&ep93xx_i2s_device); +} + +#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \ + EP93XX_SYSCON_DEVCFG_I2SONAC97) + +#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ + EP93XX_SYSCON_I2SCLKDIV_SPOL) + +int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config) +{ + unsigned val; + + /* Sanity check */ + if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK) + return -EINVAL; + if (i2s_config & ~EP93XX_I2SCLKDIV_MASK) + return -EINVAL; + + /* Must have only one of I2SONSSP/I2SONAC97 set */ + if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) == + (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97)) + return -EINVAL; + + ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); + ep93xx_devcfg_set_bits(i2s_pins); + + /* + * This is potentially racy with the clock api for i2s_mclk, sclk and + * lrclk. Since the i2s driver is the only user of those clocks we + * rely on it to prevent parallel use of this function and the + * clock api for the i2s clocks. + */ + val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); + val &= ~EP93XX_I2SCLKDIV_MASK; + val |= i2s_config; + ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); + + return 0; +} +EXPORT_SYMBOL(ep93xx_i2s_acquire); + +void ep93xx_i2s_release(void) +{ + ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); +} +EXPORT_SYMBOL(ep93xx_i2s_release); extern void ep93xx_gpio_init(void); diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index b1e096f0c2d2..c54b3e56ba63 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h @@ -93,6 +93,7 @@ /* APB peripherals */ #define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000) +#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000) #define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000) #define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000) @@ -194,6 +195,15 @@ #define EP93XX_SYSCON_CLKDIV_ESEL (1<<14) #define EP93XX_SYSCON_CLKDIV_PSEL (1<<13) #define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8 +#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c) +#define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31) +#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29) +#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19) +#define EP93XX_I2SCLKDIV_SDIV (1 << 16) +#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17) +#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17) +#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17) +#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17) #define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) #define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31) #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index a6c09176334c..3330b36d79e6 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h @@ -58,6 +58,9 @@ void ep93xx_pwm_release_gpio(struct platform_device *pdev); void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data); int ep93xx_keypad_acquire_gpio(struct platform_device *pdev); void ep93xx_keypad_release_gpio(struct platform_device *pdev); +void ep93xx_register_i2s(void); +int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config); +void ep93xx_i2s_release(void); void ep93xx_init_devices(void); extern struct sys_timer ep93xx_timer; diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c index 38deaee40397..a12c89301297 100644 --- a/arch/arm/mach-ep93xx/snappercl15.c +++ b/arch/arm/mach-ep93xx/snappercl15.c @@ -157,6 +157,7 @@ static void __init snappercl15_init_machine(void) ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data, ARRAY_SIZE(snappercl15_i2c_data)); ep93xx_register_fb(&snappercl15_fb_info); + ep93xx_register_i2s(); platform_device_register(&snappercl15_nand_device); } diff --git a/arch/arm/mach-gemini/Kconfig b/arch/arm/mach-gemini/Kconfig index 515b75cf2e8b..6f066ee4bf24 100644 --- a/arch/arm/mach-gemini/Kconfig +++ b/arch/arm/mach-gemini/Kconfig @@ -2,6 +2,13 @@ if ARCH_GEMINI menu "Cortina Systems Gemini Implementations" +config MACH_NAS4220B + bool "Raidsonic NAS-4220-B" + select GEMINI_MEM_SWAP + help + Say Y here if you intend to run this kernel on a + Raidsonic NAS-4220-B. + config MACH_RUT100 bool "Teltonika RUT100" select GEMINI_MEM_SWAP @@ -9,6 +16,20 @@ config MACH_RUT100 Say Y here if you intend to run this kernel on a Teltonika 3G Router RUT100. +config MACH_WBD111 + bool "Wiliboard WBD-111" + select GEMINI_MEM_SWAP + help + Say Y here if you intend to run this kernel on a + Wiliboard WBD-111. + +config MACH_WBD222 + bool "Wiliboard WBD-222" + select GEMINI_MEM_SWAP + help + Say Y here if you intend to run this kernel on a + Wiliboard WBD-222. + endmenu config GEMINI_MEM_SWAP diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile index 719505b81821..c5b24b95a76e 100644 --- a/arch/arm/mach-gemini/Makefile +++ b/arch/arm/mach-gemini/Makefile @@ -7,4 +7,7 @@ obj-y := irq.o mm.o time.o devices.o gpio.o # Board-specific support +obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o obj-$(CONFIG_MACH_RUT100) += board-rut1xx.o +obj-$(CONFIG_MACH_WBD111) += board-wbd111.o +obj-$(CONFIG_MACH_WBD222) += board-wbd222.o diff --git a/arch/arm/mach-gemini/board-nas4220b.c b/arch/arm/mach-gemini/board-nas4220b.c new file mode 100644 index 000000000000..01f1d6daab44 --- /dev/null +++ b/arch/arm/mach-gemini/board-nas4220b.c @@ -0,0 +1,111 @@ +/* + * Support for Raidsonic NAS-4220-B + * + * Copyright (C) 2009 Janos Laube + * + * based on rut1xx.c + * Copyright (C) 2008 Paulius Zaleckas + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include "common.h" + +static struct sys_timer ib4220b_timer = { + .init = gemini_timer_init, +}; + +static struct gpio_led ib4220b_leds[] = { + { + .name = "nas4220b:orange:hdd", + .default_trigger = "none", + .gpio = 60, + }, + { + .name = "nas4220b:green:os", + .default_trigger = "heartbeat", + .gpio = 62, + }, +}; + +static struct gpio_led_platform_data ib4220b_leds_data = { + .num_leds = ARRAY_SIZE(ib4220b_leds), + .leds = ib4220b_leds, +}; + +static struct platform_device ib4220b_led_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &ib4220b_leds_data, + }, +}; + +static struct gpio_keys_button ib4220b_keys[] = { + { + .code = KEY_SETUP, + .gpio = 61, + .active_low = 1, + .desc = "Backup Button", + .type = EV_KEY, + }, + { + .code = KEY_RESTART, + .gpio = 63, + .active_low = 1, + .desc = "Softreset Button", + .type = EV_KEY, + }, +}; + +static struct gpio_keys_platform_data ib4220b_keys_data = { + .buttons = ib4220b_keys, + .nbuttons = ARRAY_SIZE(ib4220b_keys), +}; + +static struct platform_device ib4220b_key_device = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &ib4220b_keys_data, + }, +}; + +static void __init ib4220b_init(void) +{ + gemini_gpio_init(); + platform_register_uart(); + platform_register_pflash(SZ_16M, NULL, 0); + platform_device_register(&ib4220b_led_device); + platform_device_register(&ib4220b_key_device); +} + +MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B") + .phys_io = 0x7fffc000, + .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, + .boot_params = 0x100, + .map_io = gemini_map_io, + .init_irq = gemini_init_irq, + .timer = &ib4220b_timer, + .init_machine = ib4220b_init, +MACHINE_END diff --git a/arch/arm/mach-gemini/board-wbd111.c b/arch/arm/mach-gemini/board-wbd111.c new file mode 100644 index 000000000000..36538c15b3c4 --- /dev/null +++ b/arch/arm/mach-gemini/board-wbd111.c @@ -0,0 +1,143 @@ +/* + * Support for Wiliboard WBD-111 + * + * Copyright (C) 2009 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#include "common.h" + +static struct gpio_keys_button wbd111_keys[] = { + { + .code = KEY_SETUP, + .gpio = 5, + .active_low = 1, + .desc = "reset", + .type = EV_KEY, + }, +}; + +static struct gpio_keys_platform_data wbd111_keys_data = { + .buttons = wbd111_keys, + .nbuttons = ARRAY_SIZE(wbd111_keys), +}; + +static struct platform_device wbd111_keys_device = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &wbd111_keys_data, + }, +}; + +static struct gpio_led wbd111_leds[] = { + { + .name = "L3red", + .gpio = 1, + }, + { + .name = "L4green", + .gpio = 2, + }, + { + .name = "L4red", + .gpio = 3, + }, + { + .name = "L3green", + .gpio = 5, + }, +}; + +static struct gpio_led_platform_data wbd111_leds_data = { + .num_leds = ARRAY_SIZE(wbd111_leds), + .leds = wbd111_leds, +}; + +static struct platform_device wbd111_leds_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &wbd111_leds_data, + }, +}; + +static struct sys_timer wbd111_timer = { + .init = gemini_timer_init, +}; + +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition wbd111_partitions[] = { + { + .name = "RedBoot", + .offset = 0, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + } , { + .name = "kernel", + .offset = 0x020000, + .size = 0x100000, + } , { + .name = "rootfs", + .offset = 0x120000, + .size = 0x6a0000, + } , { + .name = "VCTL", + .offset = 0x7c0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } , { + .name = "cfg", + .offset = 0x7d0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } , { + .name = "FIS", + .offset = 0x7e0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } +}; +#define wbd111_num_partitions ARRAY_SIZE(wbd111_partitions) +#else +#define wbd111_partitions NULL +#define wbd111_num_partitions 0 +#endif /* CONFIG_MTD_PARTITIONS */ + +static void __init wbd111_init(void) +{ + gemini_gpio_init(); + platform_register_uart(); + platform_register_pflash(SZ_8M, wbd111_partitions, + wbd111_num_partitions); + platform_device_register(&wbd111_leds_device); + platform_device_register(&wbd111_keys_device); +} + +MACHINE_START(WBD111, "Wiliboard WBD-111") + .phys_io = 0x7fffc000, + .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, + .boot_params = 0x100, + .map_io = gemini_map_io, + .init_irq = gemini_init_irq, + .timer = &wbd111_timer, + .init_machine = wbd111_init, +MACHINE_END diff --git a/arch/arm/mach-gemini/board-wbd222.c b/arch/arm/mach-gemini/board-wbd222.c new file mode 100644 index 000000000000..ece8b4c65110 --- /dev/null +++ b/arch/arm/mach-gemini/board-wbd222.c @@ -0,0 +1,143 @@ +/* + * Support for Wiliboard WBD-222 + * + * Copyright (C) 2009 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#include "common.h" + +static struct gpio_keys_button wbd222_keys[] = { + { + .code = KEY_SETUP, + .gpio = 5, + .active_low = 1, + .desc = "reset", + .type = EV_KEY, + }, +}; + +static struct gpio_keys_platform_data wbd222_keys_data = { + .buttons = wbd222_keys, + .nbuttons = ARRAY_SIZE(wbd222_keys), +}; + +static struct platform_device wbd222_keys_device = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &wbd222_keys_data, + }, +}; + +static struct gpio_led wbd222_leds[] = { + { + .name = "L3red", + .gpio = 1, + }, + { + .name = "L4green", + .gpio = 2, + }, + { + .name = "L4red", + .gpio = 3, + }, + { + .name = "L3green", + .gpio = 5, + }, +}; + +static struct gpio_led_platform_data wbd222_leds_data = { + .num_leds = ARRAY_SIZE(wbd222_leds), + .leds = wbd222_leds, +}; + +static struct platform_device wbd222_leds_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &wbd222_leds_data, + }, +}; + +static struct sys_timer wbd222_timer = { + .init = gemini_timer_init, +}; + +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition wbd222_partitions[] = { + { + .name = "RedBoot", + .offset = 0, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + } , { + .name = "kernel", + .offset = 0x020000, + .size = 0x100000, + } , { + .name = "rootfs", + .offset = 0x120000, + .size = 0x6a0000, + } , { + .name = "VCTL", + .offset = 0x7c0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } , { + .name = "cfg", + .offset = 0x7d0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } , { + .name = "FIS", + .offset = 0x7e0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } +}; +#define wbd222_num_partitions ARRAY_SIZE(wbd222_partitions) +#else +#define wbd222_partitions NULL +#define wbd222_num_partitions 0 +#endif /* CONFIG_MTD_PARTITIONS */ + +static void __init wbd222_init(void) +{ + gemini_gpio_init(); + platform_register_uart(); + platform_register_pflash(SZ_8M, wbd222_partitions, + wbd222_num_partitions); + platform_device_register(&wbd222_leds_device); + platform_device_register(&wbd222_keys_device); +} + +MACHINE_START(WBD222, "Wiliboard WBD-222") + .phys_io = 0x7fffc000, + .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, + .boot_params = 0x100, + .map_io = gemini_map_io, + .init_irq = gemini_init_irq, + .timer = &wbd222_timer, + .init_machine = wbd222_init, +MACHINE_END diff --git a/arch/arm/mach-h720x/include/mach/hardware.h b/arch/arm/mach-h720x/include/mach/hardware.h index 6c19156e2a42..c55a52c6541d 100644 --- a/arch/arm/mach-h720x/include/mach/hardware.h +++ b/arch/arm/mach-h720x/include/mach/hardware.h @@ -182,8 +182,6 @@ #define SERIAL_ENABLE_EN (1<<0) /* General defines to pacify gcc */ -#define PCIO_BASE (0) /* for inb, outb and friends */ -#define PCIO_VIRT PCIO_BASE #define __ASM_ARCH_HARDWARE_INCMACH_H #include "boards.h" diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c index fd1d9197d06e..3e8c47c63bac 100644 --- a/arch/arm/mach-imx/dma-v1.c +++ b/arch/arm/mach-imx/dma-v1.c @@ -310,7 +310,7 @@ imx_dma_setup_sg(int channel, imxdma->resbytes = dma_length; if (!sg || !sgcount) { - printk(KERN_ERR "imxdma%d: imx_dma_setup_sg epty sg list\n", + printk(KERN_ERR "imxdma%d: imx_dma_setup_sg empty sg list\n", channel); return -EINVAL; } @@ -760,7 +760,6 @@ EXPORT_SYMBOL(imx_dma_free); * @name: the driver/caller own non-%NULL identification * * This function tries to find a free channel in the specified priority group - * This function tries to find a free channel in the specified priority group * if the priority cannot be achieved it tries to look for free channel * in the higher and then even lower priority groups. * diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 6c92deaf468f..a389d1148f18 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -408,7 +408,7 @@ static void __init pca100_init(void) mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN); spi_register_board_info(pca100_spi_board_info, ARRAY_SIZE(pca100_spi_board_info)); - imx27_add_spi_imx0(&pca100_spi_0_data); + imx27_add_spi_imx0(&pca100_spi0_data); #endif gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs"); diff --git a/arch/arm/mach-integrator/include/mach/hardware.h b/arch/arm/mach-integrator/include/mach/hardware.h index 8e26360ce9a3..57f51ba11251 100644 --- a/arch/arm/mach-integrator/include/mach/hardware.h +++ b/arch/arm/mach-integrator/include/mach/hardware.h @@ -32,7 +32,6 @@ #define IO_SIZE 0x0B000000 // How much? #define IO_START INTEGRATOR_HDR_BASE // PA of IO -#define PCIO_BASE PCI_IO_VADDR #define PCIMEM_BASE PCI_MEMORY_VADDR #define pcibios_assign_all_busses() 1 diff --git a/arch/arm/mach-ixp23xx/include/mach/hardware.h b/arch/arm/mach-ixp23xx/include/mach/hardware.h index c3192009a886..57b508bfe280 100644 --- a/arch/arm/mach-ixp23xx/include/mach/hardware.h +++ b/arch/arm/mach-ixp23xx/include/mach/hardware.h @@ -15,7 +15,6 @@ #define __ASM_ARCH_HARDWARE_H /* PCI IO info */ -#define PCIO_BASE IXP23XX_PCI_IO_VIRT #define PCIBIOS_MIN_IO 0x00000000 #define PCIBIOS_MIN_MEM 0xe0000000 diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index 9e5070da17ae..6f991c5ae863 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig @@ -140,6 +140,14 @@ config MACH_FSG FSG-3 device. For more information on this platform, see http://www.nslu2-linux.org/wiki/FSG3/HomePage +config MACH_ARCOM_VULCAN + bool + prompt "Arcom/Eurotech Vulcan" + select PCI + help + Say 'Y' here if you want your kernel to support Arcom's + Vulcan board. + # # Certain registers and IRQs are only enabled if supporting IXP465 CPUs # diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile index 47d1f60d23fa..d807fc367dd3 100644 --- a/arch/arm/mach-ixp4xx/Makefile +++ b/arch/arm/mach-ixp4xx/Makefile @@ -16,6 +16,7 @@ obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o +obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o obj-y += common.o @@ -31,6 +32,7 @@ obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o obj-$(CONFIG_MACH_FSG) += fsg-setup.o obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o +obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S index 893873eb2a0d..3fc66d6d00a0 100644 --- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S @@ -16,8 +16,10 @@ moveq \rx, #0xc8000000 movne \rx, #0xff000000 orrne \rx, \rx, #0x00b00000 +#ifdef __ARMEB__ add \rx,\rx,#3 @ Uart regs are at off set of 3 if @ byte writes used - Big Endian. +#endif .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h index 6ea7e2fb2701..de274a1f19d7 100644 --- a/arch/arm/mach-ixp4xx/include/mach/io.h +++ b/arch/arm/mach-ixp4xx/include/mach/io.h @@ -353,7 +353,7 @@ static inline unsigned int ioread8(const void __iomem *addr) return (unsigned int)inb(port & PIO_MASK); else #ifndef CONFIG_IXP4XX_INDIRECT_PCI - return (unsigned int)__raw_readb(port); + return (unsigned int)__raw_readb(addr); #else return (unsigned int)__indirect_readb(addr); #endif @@ -381,7 +381,7 @@ static inline unsigned int ioread16(const void __iomem *addr) return (unsigned int)inw(port & PIO_MASK); else #ifndef CONFIG_IXP4XX_INDIRECT_PCI - return le16_to_cpu(__raw_readw((u32)port)); + return le16_to_cpu((__force __le16)__raw_readw(addr)); #else return (unsigned int)__indirect_readw(addr); #endif @@ -440,7 +440,7 @@ static inline void iowrite8(u8 value, void __iomem *addr) outb(value, port & PIO_MASK); else #ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_writeb(value, port); + __raw_writeb(value, addr); #else __indirect_writeb(value, addr); #endif diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 827cbc4402f4..ea9ee4ed0a3e 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -100,6 +100,7 @@ ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) static struct platform_nand_data ixdp425_flash_nand_data = { .chip = { + .nr_chips = 1, .chip_delay = 30, .options = NAND_NO_AUTOINCR, #ifdef CONFIG_MTD_PARTITIONS diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c new file mode 100644 index 000000000000..f3111c6840ef --- /dev/null +++ b/arch/arm/mach-ixp4xx/vulcan-pci.c @@ -0,0 +1,73 @@ +/* + * arch/arch/mach-ixp4xx/vulcan-pci.c + * + * Vulcan board-level PCI initialization + * + * Copyright (C) 2010 Marc Zyngier + * + * based on ixdp425-pci.c: + * Copyright (C) 2002 Intel Corporation. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include + +/* PCI controller GPIO to IRQ pin mappings */ +#define INTA 2 +#define INTB 3 + +void __init vulcan_pci_preinit(void) +{ +#ifndef CONFIG_IXP4XX_INDIRECT_PCI + /* + * Cardbus bridge wants way more than the SoC can actually offer, + * and leaves the whole PCI bus in a mess. Artificially limit it + * to 8MB per region. Of course indirect mode doesn't have this + * limitation... + */ + pci_cardbus_mem_size = SZ_8M; + pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n", + (int)(pci_cardbus_mem_size >> 20)); +#endif + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + ixp4xx_pci_preinit(); +} + +static int __init vulcan_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + if (slot == 1) + return IXP4XX_GPIO_IRQ(INTA); + + if (slot == 2) + return IXP4XX_GPIO_IRQ(INTB); + + return -1; +} + +struct hw_pci vulcan_pci __initdata = { + .nr_controllers = 1, + .preinit = vulcan_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = ixp4xx_setup, + .scan = ixp4xx_scan_bus, + .map_irq = vulcan_map_irq, +}; + +int __init vulcan_pci_init(void) +{ + if (machine_is_arcom_vulcan()) + pci_common_init(&vulcan_pci); + return 0; +} + +subsys_initcall(vulcan_pci_init); diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c new file mode 100644 index 000000000000..465cc5cce687 --- /dev/null +++ b/arch/arm/mach-ixp4xx/vulcan-setup.c @@ -0,0 +1,246 @@ +/* + * arch/arm/mach-ixp4xx/vulcan-setup.c + * + * Arcom/Eurotech Vulcan board-setup + * + * Copyright (C) 2010 Marc Zyngier + * + * based on fsg-setup.c: + * Copyright (C) 2008 Rod Whitby + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct flash_platform_data vulcan_flash_data = { + .map_name = "cfi_probe", + .width = 2, +}; + +static struct resource vulcan_flash_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device vulcan_flash = { + .name = "IXP4XX-Flash", + .id = 0, + .dev = { + .platform_data = &vulcan_flash_data, + }, + .resource = &vulcan_flash_resource, + .num_resources = 1, +}; + +static struct platdata_mtd_ram vulcan_sram_data = { + .mapname = "Vulcan SRAM", + .bankwidth = 1, +}; + +static struct resource vulcan_sram_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device vulcan_sram = { + .name = "mtd-ram", + .id = 0, + .dev = { + .platform_data = &vulcan_sram_data, + }, + .resource = &vulcan_sram_resource, + .num_resources = 1, +}; + +static struct resource vulcan_uart_resources[] = { + [0] = { + .start = IXP4XX_UART1_BASE_PHYS, + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IXP4XX_UART2_BASE_PHYS, + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM, + }, + [2] = { + .flags = IORESOURCE_MEM, + }, +}; + +static struct plat_serial8250_port vulcan_uart_data[] = { + [0] = { + .mapbase = IXP4XX_UART1_BASE_PHYS, + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, + .irq = IRQ_IXP4XX_UART1, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP4XX_UART_XTAL, + }, + [1] = { + .mapbase = IXP4XX_UART2_BASE_PHYS, + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, + .irq = IRQ_IXP4XX_UART2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP4XX_UART_XTAL, + }, + [2] = { + .irq = IXP4XX_GPIO_IRQ(4), + .irqflags = IRQF_TRIGGER_LOW, + .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .uartclk = 1843200, + }, + [3] = { + .irq = IXP4XX_GPIO_IRQ(4), + .irqflags = IRQF_TRIGGER_LOW, + .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .uartclk = 1843200, + }, + { } +}; + +static struct platform_device vulcan_uart = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = vulcan_uart_data, + }, + .resource = vulcan_uart_resources, + .num_resources = ARRAY_SIZE(vulcan_uart_resources), +}; + +static struct eth_plat_info vulcan_plat_eth[] = { + [0] = { + .phy = 0, + .rxq = 3, + .txreadyq = 20, + }, + [1] = { + .phy = 1, + .rxq = 4, + .txreadyq = 21, + }, +}; + +static struct platform_device vulcan_eth[] = { + [0] = { + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEB, + .dev = { + .platform_data = &vulcan_plat_eth[0], + }, + }, + [1] = { + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEC, + .dev = { + .platform_data = &vulcan_plat_eth[1], + }, + }, +}; + +static struct resource vulcan_max6369_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device vulcan_max6369 = { + .name = "max6369_wdt", + .id = -1, + .resource = &vulcan_max6369_resource, + .num_resources = 1, +}; + +static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = { + .pin = 14, +}; + +static struct platform_device vulcan_w1_gpio = { + .name = "w1-gpio", + .id = 0, + .dev = { + .platform_data = &vulcan_w1_gpio_pdata, + }, +}; + +static struct platform_device *vulcan_devices[] __initdata = { + &vulcan_uart, + &vulcan_flash, + &vulcan_sram, + &vulcan_max6369, + &vulcan_eth[0], + &vulcan_eth[1], + &vulcan_w1_gpio, +}; + +static void __init vulcan_init(void) +{ + ixp4xx_sys_init(); + + /* Flash is spread over both CS0 and CS1 */ + vulcan_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); + vulcan_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; + *IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN | + IXP4XX_EXP_BUS_STROBE_T(3) | + IXP4XX_EXP_BUS_SIZE(0xF) | + IXP4XX_EXP_BUS_BYTE_RD16 | + IXP4XX_EXP_BUS_WR_EN; + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; + + /* SRAM on CS2, (256kB, 8bit, writable) */ + vulcan_sram_resource.start = IXP4XX_EXP_BUS_BASE(2); + vulcan_sram_resource.end = IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1; + *IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN | + IXP4XX_EXP_BUS_STROBE_T(1) | + IXP4XX_EXP_BUS_HOLD_T(2) | + IXP4XX_EXP_BUS_SIZE(9) | + IXP4XX_EXP_BUS_SPLT_EN | + IXP4XX_EXP_BUS_WR_EN | + IXP4XX_EXP_BUS_BYTE_EN; + + /* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */ + vulcan_uart_resources[2].start = IXP4XX_EXP_BUS_BASE(3); + vulcan_uart_resources[2].end = IXP4XX_EXP_BUS_BASE(3) + 16 - 1; + vulcan_uart_data[2].mapbase = vulcan_uart_resources[2].start; + vulcan_uart_data[3].mapbase = vulcan_uart_data[2].mapbase + 8; + *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN | + IXP4XX_EXP_BUS_STROBE_T(3) | + IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)| + IXP4XX_EXP_BUS_WR_EN | + IXP4XX_EXP_BUS_BYTE_EN; + + /* GPIOS on CS4 (512 bytes, 8bits, writable) */ + *IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN | + IXP4XX_EXP_BUS_WR_EN | + IXP4XX_EXP_BUS_BYTE_EN; + + /* max6369 on CS5 (512 bytes, 8bits, writable) */ + vulcan_max6369_resource.start = IXP4XX_EXP_BUS_BASE(5); + vulcan_max6369_resource.end = IXP4XX_EXP_BUS_BASE(5); + *IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN | + IXP4XX_EXP_BUS_WR_EN | + IXP4XX_EXP_BUS_BYTE_EN; + + platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices)); +} + +MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") + /* Maintainer: Marc Zyngier */ + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, + .map_io = ixp4xx_map_io, + .init_irq = ixp4xx_init_irq, + .timer = &ixp4xx_timer, + .boot_params = 0x0100, + .init_machine = vulcan_init, +MACHINE_END diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 9dd67c7b4459..1c82d4290dad 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -871,6 +872,42 @@ struct sys_timer kirkwood_timer = { .init = kirkwood_timer_init, }; +/***************************************************************************** + * Audio + ****************************************************************************/ +static struct resource kirkwood_i2s_resources[] = { + [0] = { + .start = AUDIO_PHYS_BASE, + .end = AUDIO_PHYS_BASE + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_KIRKWOOD_I2S, + .end = IRQ_KIRKWOOD_I2S, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct kirkwood_asoc_platform_data kirkwood_i2s_data = { + .dram = &kirkwood_mbus_dram_info, + .burst = 128, +}; + +static struct platform_device kirkwood_i2s_device = { + .name = "kirkwood-i2s", + .id = -1, + .num_resources = ARRAY_SIZE(kirkwood_i2s_resources), + .resource = kirkwood_i2s_resources, + .dev = { + .platform_data = &kirkwood_i2s_data, + }, +}; + +void __init kirkwood_audio_init(void) +{ + kirkwood_clk_ctrl |= CGC_AUDIO; + platform_device_register(&kirkwood_i2s_device); +} /***************************************************************************** * General @@ -939,6 +976,7 @@ void __init kirkwood_init(void) kirkwood_spi_plat_data.tclk = kirkwood_tclk; kirkwood_uart0_data[0].uartclk = kirkwood_tclk; kirkwood_uart1_data[0].uartclk = kirkwood_tclk; + kirkwood_i2s_data.tclk = kirkwood_tclk; /* * Disable propagation of mbus errors to the CPU local bus, diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index 5b2c1c18d641..95bb0a73adfb 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h @@ -17,6 +17,7 @@ struct mv_sata_platform_data; struct mvsdio_platform_data; struct mtd_partition; struct mtd_info; +struct kirkwood_asoc_platform_data; #define KW_PCIE0 (1 << 0) #define KW_PCIE1 (1 << 1) @@ -46,6 +47,7 @@ void kirkwood_uart0_init(void); void kirkwood_uart1_init(void); void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); +void kirkwood_audio_init(void); extern int kirkwood_tclk; extern struct sys_timer kirkwood_timer; diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h index d141af4c2744..93fc2ec95e76 100644 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -111,6 +111,9 @@ #define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) +#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0xA0000) +#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0xA0000) + /* * Supported devices and revisions. */ diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c index fd64cd2b4e0a..fd06be618815 100644 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ b/arch/arm/mach-kirkwood/openrd-setup.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -60,6 +61,12 @@ static unsigned int openrd_mpp_config[] __initdata = { 0 }; +static struct i2c_board_info i2c_board_info[] __initdata = { + { + I2C_BOARD_INFO("cs42l51", 0x4a), + }, +}; + static void __init openrd_init(void) { /* @@ -86,6 +93,12 @@ static void __init openrd_init(void) kirkwood_sdio_init(&openrd_mvsdio_data); kirkwood_i2c_init(); + + if (machine_is_openrd_client()) { + i2c_register_board_info(0, i2c_board_info, + ARRAY_SIZE(i2c_board_info)); + kirkwood_audio_init(); + } } static int __init openrd_pci_init(void) diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index 244655d323ea..0629394a5fb9 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c @@ -150,9 +150,8 @@ static void __init common_init(void) MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") .phys_io = APB_PHYS_BASE, - .boot_params = 0x00000100, .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, - .map_io = pxa_map_io, + .map_io = mmp_map_io, .init_irq = pxa168_init_irq, .timer = &pxa168_timer, .init_machine = common_init, @@ -160,9 +159,8 @@ MACHINE_END MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") .phys_io = APB_PHYS_BASE, - .boot_params = 0x00000100, .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, - .map_io = pxa_map_io, + .map_io = mmp_map_io, .init_irq = pxa168_init_irq, .timer = &pxa168_timer, .init_machine = common_init, diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c index 8c3fa5d14f4b..69bcba11f53f 100644 --- a/arch/arm/mach-mmp/avengers_lite.c +++ b/arch/arm/mach-mmp/avengers_lite.c @@ -42,9 +42,8 @@ static void __init avengers_lite_init(void) MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") .phys_io = APB_PHYS_BASE, - .boot_params = 0x00000100, .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, - .map_io = pxa_map_io, + .map_io = mmp_map_io, .init_irq = pxa168_init_irq, .timer = &pxa168_timer, .init_machine = avengers_lite_init, diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c index e1e66c18b446..3b29fa7e9b08 100644 --- a/arch/arm/mach-mmp/common.c +++ b/arch/arm/mach-mmp/common.c @@ -31,7 +31,7 @@ static struct map_desc standard_io_desc[] __initdata = { }, }; -void __init pxa_map_io(void) +void __init mmp_map_io(void) { iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); } diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h index b4a0ba05a0f4..ec8d65ded25c 100644 --- a/arch/arm/mach-mmp/common.h +++ b/arch/arm/mach-mmp/common.h @@ -3,15 +3,6 @@ struct sys_timer; extern void timer_init(int irq); -extern void mmp2_clear_pmic_int(void); - -extern struct sys_timer pxa168_timer; -extern struct sys_timer pxa910_timer; -extern struct sys_timer mmp2_timer; -extern void __init pxa168_init_irq(void); -extern void __init pxa910_init_irq(void); -extern void __init mmp2_init_icu(void); -extern void __init mmp2_init_irq(void); extern void __init icu_init_irq(void); -extern void __init pxa_map_io(void); +extern void __init mmp_map_io(void); diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c index 4ec7709a3462..e4312d238eae 100644 --- a/arch/arm/mach-mmp/flint.c +++ b/arch/arm/mach-mmp/flint.c @@ -114,9 +114,8 @@ static void __init flint_init(void) MACHINE_START(FLINT, "Flint Development Platform") .phys_io = APB_PHYS_BASE, - .boot_params = 0x00000100, .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, - .map_io = pxa_map_io, + .map_io = mmp_map_io, .init_irq = mmp2_init_irq, .timer = &mmp2_timer, .init_machine = flint_init, diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h index 1fa0a492454a..d0ec7dae88e4 100644 --- a/arch/arm/mach-mmp/include/mach/devices.h +++ b/arch/arm/mach-mmp/include/mach/devices.h @@ -1,3 +1,6 @@ +#ifndef __MACH_DEVICE_H +#define __MACH_DEVICE_H + #include #define MAX_RESOURCE_DMA 2 @@ -47,3 +50,4 @@ struct pxa_device_desc mmp2_device_##_name __initdata = { \ } extern int pxa_register_device(struct pxa_device_desc *, void *, size_t); +#endif /* __MACH_DEVICE_H */ diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h index fec220bd5046..dbba6e8a60c4 100644 --- a/arch/arm/mach-mmp/include/mach/mmp2.h +++ b/arch/arm/mach-mmp/include/mach/mmp2.h @@ -1,6 +1,13 @@ #ifndef __ASM_MACH_MMP2_H #define __ASM_MACH_MMP2_H +struct sys_timer; + +extern struct sys_timer mmp2_timer; +extern void __init mmp2_init_icu(void); +extern void __init mmp2_init_irq(void); +extern void mmp2_clear_pmic_int(void); + #include #include #include diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 3b2bd5d5eb05..27e1bc758623 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -1,6 +1,11 @@ #ifndef __ASM_MACH_PXA168_H #define __ASM_MACH_PXA168_H +struct sys_timer; + +extern struct sys_timer pxa168_timer; +extern void __init pxa168_init_irq(void); + #include #include #include diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h index 4f0b4ec6f5d0..f13c49d6f8dc 100644 --- a/arch/arm/mach-mmp/include/mach/pxa910.h +++ b/arch/arm/mach-mmp/include/mach/pxa910.h @@ -1,6 +1,11 @@ #ifndef __ASM_MACH_PXA910_H #define __ASM_MACH_PXA910_H +struct sys_timer; + +extern struct sys_timer pxa910_timer; +extern void __init pxa910_init_irq(void); + #include #include #include diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c index cb18221c0af3..01342be91c3c 100644 --- a/arch/arm/mach-mmp/irq-mmp2.c +++ b/arch/arm/mach-mmp/irq-mmp2.c @@ -16,6 +16,7 @@ #include #include +#include #include "common.h" diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c index d77dd41d60e1..80c3e7ab1e17 100644 --- a/arch/arm/mach-mmp/jasper.c +++ b/arch/arm/mach-mmp/jasper.c @@ -135,9 +135,8 @@ static void __init jasper_init(void) MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") .phys_io = APB_PHYS_BASE, - .boot_params = 0x00000100, .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, - .map_io = pxa_map_io, + .map_io = mmp_map_io, .init_irq = mmp2_init_irq, .timer = &mmp2_timer, .init_machine = jasper_init, diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index 7f5eb059bb01..daf3993349f8 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c @@ -17,6 +17,7 @@ #include +#include #include #include #include @@ -26,6 +27,7 @@ #include #include #include +#include #include "common.h" #include "clock.h" @@ -158,6 +160,26 @@ static int __init mmp2_init(void) } postcore_initcall(mmp2_init); +static void __init mmp2_timer_init(void) +{ + unsigned long clk_rst; + + __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); + + /* + * enable bus/functional clock, enable 6.5MHz (divider 4), + * release reset + */ + clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); + __raw_writel(clk_rst, APBC_MMP2_TIMERS); + + timer_init(IRQ_MMP2_TIMER1); +} + +struct sys_timer mmp2_timer = { + .init = mmp2_timer_init, +}; + /* on-chip devices */ MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c index 0e0c9220eaba..e81db7428215 100644 --- a/arch/arm/mach-mmp/tavorevb.c +++ b/arch/arm/mach-mmp/tavorevb.c @@ -100,9 +100,8 @@ static void __init tavorevb_init(void) MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)") .phys_io = APB_PHYS_BASE, - .boot_params = 0x00000100, .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, - .map_io = pxa_map_io, + .map_io = mmp_map_io, .init_irq = pxa910_init_irq, .timer = &pxa910_timer, .init_machine = tavorevb_init, diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index cf75694e9687..66528193f939 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -200,24 +200,3 @@ void __init timer_init(int irq) clocksource_register(&cksrc); clockevents_register_device(&ckevt); } - -static void __init mmp2_timer_init(void) -{ - unsigned long clk_rst; - - __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); - - /* - * enable bus/functional clock, enable 6.5MHz (divider 4), - * release reset - */ - clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); - __raw_writel(clk_rst, APBC_MMP2_TIMERS); - - timer_init(IRQ_MMP2_TIMER1); -} - -struct sys_timer mmp2_timer = { - .init = mmp2_timer_init, -}; - diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index b22dec4abf78..ee65e05f0cf1 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c @@ -123,9 +123,8 @@ static void __init ttc_dkb_init(void) MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") .phys_io = APB_PHYS_BASE, - .boot_params = 0x00000100, .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, - .map_io = pxa_map_io, + .map_io = mmp_map_io, .init_irq = pxa910_init_irq, .timer = &pxa910_timer, .init_machine = ttc_dkb_init, diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index 7ff8020d4d24..704610648a25 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile @@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_QSD8X50) += sirc.o obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o obj-$(CONFIG_MSM_SMD) += last_radio_log.o -obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o devices-msm7x00.o +obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o diff --git a/arch/arm/mach-msm/acpuclock-arm11.c b/arch/arm/mach-msm/acpuclock-arm11.c index af5e85b91d02..7ffbd987eb5d 100644 --- a/arch/arm/mach-msm/acpuclock-arm11.c +++ b/arch/arm/mach-msm/acpuclock-arm11.c @@ -17,7 +17,6 @@ * */ -#include #include #include #include @@ -98,7 +97,7 @@ struct clkctl_acpu_speed { /* * ACPU speed table. Complete table is shown but certain speeds are commented - * out to optimized speed switching. Initalize loops_per_jiffy to 0. + * out to optimized speed switching. Initialize loops_per_jiffy to 0. * * Table stepping up/down is optimized for 256mhz jumps while staying on the * same PLL. @@ -494,7 +493,7 @@ uint32_t acpuclk_get_switch_time(void) * Clock driver initialization *---------------------------------------------------------------------------*/ -/* Initalize the lpj field in the acpu_freq_tbl. */ +/* Initialize the lpj field in the acpu_freq_tbl. */ static void __init lpj_init(void) { int i; diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c index 523d213bf79e..c50f3afc3134 100644 --- a/arch/arm/mach-msm/board-trout-gpio.c +++ b/arch/arm/mach-msm/board-trout-gpio.c @@ -15,10 +15,20 @@ #include #include #include +#include #include #include "board-trout.h" +static uint8_t trout_int_mask[2] = { + [0] = 0xff, /* mask all interrupts */ + [1] = 0xff, +}; +static uint8_t trout_sleep_int_mask[] = { + [0] = 0xff, + [1] = 0xff, +}; + struct msm_gpio_chip { struct gpio_chip chip; void __iomem *reg; /* Base of register bank */ @@ -95,16 +105,121 @@ static struct msm_gpio_chip msm_gpio_banks[] = { TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0), }; +static void trout_gpio_irq_ack(unsigned int irq) +{ + int bank = TROUT_INT_TO_BANK(irq); + uint8_t mask = TROUT_INT_TO_MASK(irq); + int reg = TROUT_BANK_TO_STAT_REG(bank); + /*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", irq);*/ + writeb(mask, TROUT_CPLD_BASE + reg); +} + +static void trout_gpio_irq_mask(unsigned int irq) +{ + unsigned long flags; + uint8_t reg_val; + int bank = TROUT_INT_TO_BANK(irq); + uint8_t mask = TROUT_INT_TO_MASK(irq); + int reg = TROUT_BANK_TO_MASK_REG(bank); + + local_irq_save(flags); + reg_val = trout_int_mask[bank] |= mask; + /*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n", + irq, bank, reg_val);*/ + writeb(reg_val, TROUT_CPLD_BASE + reg); + local_irq_restore(flags); +} + +static void trout_gpio_irq_unmask(unsigned int irq) +{ + unsigned long flags; + uint8_t reg_val; + int bank = TROUT_INT_TO_BANK(irq); + uint8_t mask = TROUT_INT_TO_MASK(irq); + int reg = TROUT_BANK_TO_MASK_REG(bank); + + local_irq_save(flags); + reg_val = trout_int_mask[bank] &= ~mask; + /*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n", + irq, bank, reg_val);*/ + writeb(reg_val, TROUT_CPLD_BASE + reg); + local_irq_restore(flags); +} + +int trout_gpio_irq_set_wake(unsigned int irq, unsigned int on) +{ + unsigned long flags; + int bank = TROUT_INT_TO_BANK(irq); + uint8_t mask = TROUT_INT_TO_MASK(irq); + + local_irq_save(flags); + if(on) + trout_sleep_int_mask[bank] &= ~mask; + else + trout_sleep_int_mask[bank] |= mask; + local_irq_restore(flags); + return 0; +} + +static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + int j, m; + unsigned v; + int bank; + int stat_reg; + int int_base = TROUT_INT_START; + uint8_t int_mask; + + for (bank = 0; bank < 2; bank++) { + stat_reg = TROUT_BANK_TO_STAT_REG(bank); + v = readb(TROUT_CPLD_BASE + stat_reg); + int_mask = trout_int_mask[bank]; + if (v & int_mask) { + writeb(v & int_mask, TROUT_CPLD_BASE + stat_reg); + printk(KERN_ERR "trout_gpio_irq_handler: got masked " + "interrupt: %d:%02x\n", bank, v & int_mask); + } + v &= ~int_mask; + while (v) { + m = v & -v; + j = fls(m) - 1; + /*printk(KERN_INFO "msm_gpio_irq_handler %d:%02x %02x b" + "it %d irq %d\n", bank, v, m, j, int_base + j);*/ + v &= ~m; + generic_handle_irq(int_base + j); + } + int_base += TROUT_INT_BANK0_COUNT; + } + desc->chip->ack(irq); +} + +static struct irq_chip trout_gpio_irq_chip = { + .name = "troutgpio", + .ack = trout_gpio_irq_ack, + .mask = trout_gpio_irq_mask, + .unmask = trout_gpio_irq_unmask, + .set_wake = trout_gpio_irq_set_wake, +}; + /* * Called from the processor-specific init to enable GPIO pin support. */ int __init trout_init_gpio(void) { int i; + for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) { + set_irq_chip(i, &trout_gpio_irq_chip); + set_irq_handler(i, handle_edge_irq); + set_irq_flags(i, IRQF_VALID); + } for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++) gpiochip_add(&msm_gpio_banks[i].chip); + set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH); + set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler); + set_irq_wake(MSM_GPIO_TO_INT(17), 1); + return 0; } diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c new file mode 100644 index 000000000000..44be8464657b --- /dev/null +++ b/arch/arm/mach-msm/board-trout-mmc.c @@ -0,0 +1,186 @@ +/* linux/arch/arm/mach-msm/board-trout-mmc.c +** Author: Brian Swetland +*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include + +#include "devices.h" + +#include "board-trout.h" + +#include "proc_comm.h" + +#define DEBUG_SDSLOT_VDD 1 + +/* ---- COMMON ---- */ +static void config_gpio_table(uint32_t *table, int len) +{ + int n; + unsigned id; + for(n = 0; n < len; n++) { + id = table[n]; + msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0); + } +} + +/* ---- SDCARD ---- */ + +static uint32_t sdcard_on_gpio_table[] = { + PCOM_GPIO_CFG(62, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), /* CLK */ + PCOM_GPIO_CFG(63, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* CMD */ + PCOM_GPIO_CFG(64, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT3 */ + PCOM_GPIO_CFG(65, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT2 */ + PCOM_GPIO_CFG(66, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT1 */ + PCOM_GPIO_CFG(67, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT0 */ +}; + +static uint32_t sdcard_off_gpio_table[] = { + PCOM_GPIO_CFG(62, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CLK */ + PCOM_GPIO_CFG(63, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CMD */ + PCOM_GPIO_CFG(64, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT3 */ + PCOM_GPIO_CFG(65, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT2 */ + PCOM_GPIO_CFG(66, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT1 */ + PCOM_GPIO_CFG(67, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT0 */ +}; + +static uint opt_disable_sdcard; + +static int __init trout_disablesdcard_setup(char *str) +{ + int cal = simple_strtol(str, NULL, 0); + + opt_disable_sdcard = cal; + return 1; +} + +__setup("board_trout.disable_sdcard=", trout_disablesdcard_setup); + +static struct vreg *vreg_sdslot; /* SD slot power */ + +struct mmc_vdd_xlat { + int mask; + int level; +}; + +static struct mmc_vdd_xlat mmc_vdd_table[] = { + { MMC_VDD_165_195, 1800 }, + { MMC_VDD_20_21, 2050 }, + { MMC_VDD_21_22, 2150 }, + { MMC_VDD_22_23, 2250 }, + { MMC_VDD_23_24, 2350 }, + { MMC_VDD_24_25, 2450 }, + { MMC_VDD_25_26, 2550 }, + { MMC_VDD_26_27, 2650 }, + { MMC_VDD_27_28, 2750 }, + { MMC_VDD_28_29, 2850 }, + { MMC_VDD_29_30, 2950 }, +}; + +static unsigned int sdslot_vdd = 0xffffffff; +static unsigned int sdslot_vreg_enabled; + +static uint32_t trout_sdslot_switchvdd(struct device *dev, unsigned int vdd) +{ + int i, rc; + + BUG_ON(!vreg_sdslot); + + if (vdd == sdslot_vdd) + return 0; + + sdslot_vdd = vdd; + + if (vdd == 0) { +#if DEBUG_SDSLOT_VDD + printk("%s: Disabling SD slot power\n", __func__); +#endif + config_gpio_table(sdcard_off_gpio_table, + ARRAY_SIZE(sdcard_off_gpio_table)); + vreg_disable(vreg_sdslot); + sdslot_vreg_enabled = 0; + return 0; + } + + if (!sdslot_vreg_enabled) { + rc = vreg_enable(vreg_sdslot); + if (rc) { + printk(KERN_ERR "%s: Error enabling vreg (%d)\n", + __func__, rc); + } + config_gpio_table(sdcard_on_gpio_table, + ARRAY_SIZE(sdcard_on_gpio_table)); + sdslot_vreg_enabled = 1; + } + + for (i = 0; i < ARRAY_SIZE(mmc_vdd_table); i++) { + if (mmc_vdd_table[i].mask == (1 << vdd)) { +#if DEBUG_SDSLOT_VDD + printk("%s: Setting level to %u\n", + __func__, mmc_vdd_table[i].level); +#endif + rc = vreg_set_level(vreg_sdslot, + mmc_vdd_table[i].level); + if (rc) { + printk(KERN_ERR + "%s: Error setting vreg level (%d)\n", + __func__, rc); + } + return 0; + } + } + + printk(KERN_ERR "%s: Invalid VDD %d specified\n", __func__, vdd); + return 0; +} + +static unsigned int trout_sdslot_status(struct device *dev) +{ + unsigned int status; + + status = (unsigned int) gpio_get_value(TROUT_GPIO_SDMC_CD_N); + return (!status); +} + +#define TROUT_MMC_VDD MMC_VDD_165_195 | MMC_VDD_20_21 | MMC_VDD_21_22 \ + | MMC_VDD_22_23 | MMC_VDD_23_24 | MMC_VDD_24_25 \ + | MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 \ + | MMC_VDD_28_29 | MMC_VDD_29_30 + +static struct msm_mmc_platform_data trout_sdslot_data = { + .ocr_mask = TROUT_MMC_VDD, + .status = trout_sdslot_status, + .translate_vdd = trout_sdslot_switchvdd, +}; + +int __init trout_init_mmc(unsigned int sys_rev) +{ + sdslot_vreg_enabled = 0; + + vreg_sdslot = vreg_get(0, "gp6"); + if (IS_ERR(vreg_sdslot)) + return PTR_ERR(vreg_sdslot); + + set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); + + if (!opt_disable_sdcard) + msm_add_sdcc(2, &trout_sdslot_data, + TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 0); + else + printk(KERN_INFO "trout: SD-Card interface disabled\n"); + return 0; +} + diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c index e69a1502e4e8..469e0be3499d 100644 --- a/arch/arm/mach-msm/board-trout.c +++ b/arch/arm/mach-msm/board-trout.c @@ -30,6 +30,8 @@ #include "devices.h" #include "board-trout.h" +extern int trout_init_mmc(unsigned int); + static struct platform_device *devices[] __initdata = { &msm_device_uart3, &msm_device_smd, @@ -55,7 +57,16 @@ static void __init trout_fixup(struct machine_desc *desc, struct tag *tags, static void __init trout_init(void) { + int rc; + platform_add_devices(devices, ARRAY_SIZE(devices)); + +#ifdef CONFIG_MMC + rc = trout_init_mmc(system_rev); + if (rc) + printk(KERN_CRIT "%s: MMC init failure (%d)\n", __func__, rc); +#endif + } static struct map_desc trout_io_desc[] __initdata = { diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c index 9cb1276ab749..c57210f4f06a 100644 --- a/arch/arm/mach-msm/clock.c +++ b/arch/arm/mach-msm/clock.c @@ -14,7 +14,6 @@ * */ -#include #include #include #include diff --git a/arch/arm/mach-msm/devices-msm7x00.c b/arch/arm/mach-msm/devices-msm7x00.c index fde9d8f69f10..4e8c0bcdc92d 100644 --- a/arch/arm/mach-msm/devices-msm7x00.c +++ b/arch/arm/mach-msm/devices-msm7x00.c @@ -322,7 +322,8 @@ static struct platform_device *msm_sdcc_devices[] __initdata = { &msm_device_sdc4, }; -int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat, +int __init msm_add_sdcc(unsigned int controller, + struct msm_mmc_platform_data *plat, unsigned int stat_irq, unsigned long stat_irq_flags) { struct platform_device *pdev; diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h index e302fbdc439b..5a79bcf50413 100644 --- a/arch/arm/mach-msm/include/mach/board.h +++ b/arch/arm/mach-msm/include/mach/board.h @@ -18,6 +18,7 @@ #define __ASM_ARCH_MSM_BOARD_H #include +#include /* platform device data structures */ @@ -40,5 +41,8 @@ void __init msm_init_irq(void); void __init msm_init_gpio(void); void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks); void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *); +int __init msm_add_sdcc(unsigned int controller, + struct msm_mmc_platform_data *plat, + unsigned int stat_irq, unsigned long stat_irq_flags); #endif diff --git a/arch/arm/mach-msm/include/mach/mmc.h b/arch/arm/mach-msm/include/mach/mmc.h index 0ecf25426284..d54b6b086cff 100644 --- a/arch/arm/mach-msm/include/mach/mmc.h +++ b/arch/arm/mach-msm/include/mach/mmc.h @@ -15,7 +15,7 @@ struct embedded_sdio_data { int num_funcs; }; -struct mmc_platform_data { +struct msm_mmc_platform_data { unsigned int ocr_mask; /* available voltages */ u32 (*translate_vdd)(struct device *, unsigned int); unsigned int (*status)(struct device *); diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c index cf11d414b425..f07dc7c738f0 100644 --- a/arch/arm/mach-msm/smd.c +++ b/arch/arm/mach-msm/smd.c @@ -997,7 +997,7 @@ int smd_core_init(void) return 0; } -static int __init msm_smd_probe(struct platform_device *pdev) +static int __devinit msm_smd_probe(struct platform_device *pdev) { pr_info("smd_init()\n"); diff --git a/arch/arm/mach-mx3/mach-armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c index 96aadcadb4ff..68879c996a55 100644 --- a/arch/arm/mach-mx3/mach-armadillo5x0.c +++ b/arch/arm/mach-mx3/mach-armadillo5x0.c @@ -551,9 +551,9 @@ static void __init armadillo5x0_init(void) /* USB */ #if defined(CONFIG_USB_ULPI) usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_otg_host, &usbotg_pdata); mxc_register_device(&mxc_usbh2, &usbh2_pdata); diff --git a/arch/arm/mach-mx3/mach-mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c index 8f66f65e80e2..7c37daabb757 100644 --- a/arch/arm/mach-mx3/mach-mx31lilly.c +++ b/arch/arm/mach-mx3/mach-mx31lilly.c @@ -245,9 +245,9 @@ static struct mxc_usbh_platform_data usbh2_pdata = { static void lilly1131_usb_init(void) { usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_usbh1, &usbh1_pdata); mxc_register_device(&mxc_usbh2, &usbh2_pdata); diff --git a/arch/arm/mach-mx3/mach-mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c index da236c497d2a..f66a9576d8c2 100644 --- a/arch/arm/mach-mx3/mach-mx31lite.c +++ b/arch/arm/mach-mx3/mach-mx31lite.c @@ -256,7 +256,7 @@ static void __init mxc_board_init(void) #if defined(CONFIG_USB_ULPI) /* USB */ usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_usbh2, &usbh2_pdata); #endif diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c index 67776bc61c33..7a075e8bf2d4 100644 --- a/arch/arm/mach-mx3/mach-mx31moboard.c +++ b/arch/arm/mach-mx3/mach-mx31moboard.c @@ -412,7 +412,7 @@ static struct mxc_usbh_platform_data usbh2_pdata = { static int __init moboard_usbh2_init(void) { usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); return mxc_register_device(&mxc_usbh2, &usbh2_pdata); } diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c index 8a292dd1a714..214de11b20b9 100644 --- a/arch/arm/mach-mx3/mach-pcm037.c +++ b/arch/arm/mach-mx3/mach-pcm037.c @@ -654,13 +654,13 @@ static void __init mxc_board_init(void) #if defined(CONFIG_USB_ULPI) if (otg_mode_host) { otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_otg_host, &otg_pdata); } usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_usbh2, &usbh2_pdata); #endif diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c index 47f5311b301a..28886f0e62f9 100644 --- a/arch/arm/mach-mx3/mach-pcm043.c +++ b/arch/arm/mach-mx3/mach-pcm043.c @@ -378,7 +378,7 @@ static void __init mxc_board_init(void) #if defined(CONFIG_USB_ULPI) if (otg_mode_host) { otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_otg_host, &otg_pdata); } diff --git a/arch/arm/mach-mx3/mach-qong.c b/arch/arm/mach-mx3/mach-qong.c index d44ac70222a5..c8c380eef74c 100644 --- a/arch/arm/mach-mx3/mach-qong.c +++ b/arch/arm/mach-mx3/mach-qong.c @@ -165,6 +165,7 @@ static void qong_nand_select_chip(struct mtd_info *mtd, int chip) static struct platform_nand_data qong_nand_data = { .chip = { + .nr_chips = 1, .chip_delay = 20, .options = 0, }, diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c index 40c3e7564cb6..417757e78c65 100644 --- a/arch/arm/mach-mx3/mx31moboard-smartbot.c +++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c @@ -134,7 +134,7 @@ static struct mxc_usbh_platform_data otg_host_pdata = { static int __init smartbot_otg_host_init(void) { otg_host_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); return mxc_register_device(&mxc_otg_host, &otg_host_pdata); } diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index b18d7c28ab7a..3b02d3b944af 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -1,3 +1,7 @@ +if ARCH_OMAP1 + +menu "TI OMAP1 specific features" + comment "OMAP Core Type" depends on ARCH_OMAP1 @@ -224,6 +228,12 @@ config OMAP_ARM_120MHZ help Enable 120MHz clock for OMAP CPU. If unsure, say N. +config OMAP_ARM_96MHZ + bool "OMAP ARM 96 MHz CPU" + depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) + help + Enable 96MHz clock for OMAP CPU. If unsure, say N. + config OMAP_ARM_60MHZ bool "OMAP ARM 60 MHz CPU" depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) @@ -237,3 +247,6 @@ config OMAP_ARM_30MHZ help Enable 30MHz clock for OMAP CPU. If unsure, say N. +endmenu + +endif diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index ea231c7a550a..facfaeb1ae5c 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -23,6 +23,9 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y) led-y := leds.o +usb-fs-$(CONFIG_USB) := usb.o +obj-y += $(usb-fs-m) $(usb-fs-y) + # Specific board support obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o board-h2-mmc.o obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 0a9d61d2d229..41992ab71961 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -235,7 +235,7 @@ static void __init ams_delta_init(void) /* Clear latch2 (NAND, LCD, modem enable) */ ams_delta_latch2_write(~0, 0); - omap_usb_init(&ams_delta_usb_config); + omap1_usb_init(&ams_delta_usb_config); platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); #ifdef CONFIG_AMS_DELTA_FIQ diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 059bac60b35a..180ce79e5eac 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -292,6 +292,18 @@ static void __init omap_fsample_init(void) omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); + /* Mux pins for keypad */ + omap_cfg_reg(E2_7XX_KBR0); + omap_cfg_reg(J7_7XX_KBR1); + omap_cfg_reg(E1_7XX_KBR2); + omap_cfg_reg(F3_7XX_KBR3); + omap_cfg_reg(D2_7XX_KBR4); + omap_cfg_reg(C2_7XX_KBC0); + omap_cfg_reg(D3_7XX_KBC1); + omap_cfg_reg(E4_7XX_KBC2); + omap_cfg_reg(F4_7XX_KBC3); + omap_cfg_reg(E3_7XX_KBC4); + platform_add_devices(devices, ARRAY_SIZE(devices)); omap_board_config = fsample_config; diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 7a65684d2a15..93b9ab8fc3be 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -72,12 +72,12 @@ static void __init omap_generic_init(void) omap_cfg_reg(UART3_TX); omap_cfg_reg(UART3_RX); - omap_usb_init(&generic1510_usb_config); + omap1_usb_init(&generic1510_usb_config); } #endif #if defined(CONFIG_ARCH_OMAP16XX) if (!cpu_is_omap1510()) { - omap_usb_init(&generic1610_usb_config); + omap1_usb_init(&generic1610_usb_config); } #endif diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 68b2beda8b99..d2cda58bcc48 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -292,15 +292,6 @@ static struct platform_device h2_kp_device = { #define H2_IRDA_FIRSEL_GPIO_PIN 17 -#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) -static int h2_transceiver_mode(struct device *dev, int state) -{ - /* SIR when low, else MIR/FIR when HIGH */ - gpio_set_value(H2_IRDA_FIRSEL_GPIO_PIN, !(state & IR_SIRMODE)); - return 0; -} -#endif - static struct omap_irda_config h2_irda_data = { .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE, .rx_channel = OMAP_DMA_UART3_RX, @@ -437,14 +428,18 @@ static void __init h2_init(void) /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ - /* Irda */ -#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) - omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A); - if (gpio_request(H2_IRDA_FIRSEL_GPIO_PIN, "IRDA mode") < 0) - BUG(); - gpio_direction_output(H2_IRDA_FIRSEL_GPIO_PIN, 0); - h2_irda_data.transceiver_mode = h2_transceiver_mode; -#endif + /* Mux pins for keypad */ + omap_cfg_reg(F18_1610_KBC0); + omap_cfg_reg(D20_1610_KBC1); + omap_cfg_reg(D19_1610_KBC2); + omap_cfg_reg(E18_1610_KBC3); + omap_cfg_reg(C21_1610_KBC4); + omap_cfg_reg(G18_1610_KBR0); + omap_cfg_reg(F19_1610_KBR1); + omap_cfg_reg(H14_1610_KBR2); + omap_cfg_reg(E20_1610_KBR3); + omap_cfg_reg(E19_1610_KBR4); + omap_cfg_reg(N19_1610_KBR5); platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); omap_board_config = h2_config; @@ -452,7 +447,7 @@ static void __init h2_init(void) omap_serial_init(); omap_register_i2c_bus(1, 100, h2_i2c_board_info, ARRAY_SIZE(h2_i2c_board_info)); - omap_usb_init(&h2_usb_config); + omap1_usb_init(&h2_usb_config); h2_mmc_init(); } diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 0b0825fe6751..c2ef4ff846c7 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -397,6 +397,19 @@ static void __init h3_init(void) /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ omap_cfg_reg(V2_1710_GPIO10); + /* Mux pins for keypad */ + omap_cfg_reg(F18_1610_KBC0); + omap_cfg_reg(D20_1610_KBC1); + omap_cfg_reg(D19_1610_KBC2); + omap_cfg_reg(E18_1610_KBC3); + omap_cfg_reg(C21_1610_KBC4); + omap_cfg_reg(G18_1610_KBR0); + omap_cfg_reg(F19_1610_KBR1); + omap_cfg_reg(H14_1610_KBR2); + omap_cfg_reg(E20_1610_KBR3); + omap_cfg_reg(E19_1610_KBR4); + omap_cfg_reg(N19_1610_KBR5); + platform_add_devices(devices, ARRAY_SIZE(devices)); spi_register_board_info(h3_spi_board_info, ARRAY_SIZE(h3_spi_board_info)); @@ -405,7 +418,7 @@ static void __init h3_init(void) omap_serial_init(); omap_register_i2c_bus(1, 100, h3_i2c_board_info, ARRAY_SIZE(h3_i2c_board_info)); - omap_usb_init(&h3_usb_config); + omap1_usb_init(&h3_usb_config); h3_mmc_init(); } diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index d70a4f0923f5..311899ff5ffc 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -287,7 +287,7 @@ static void __init htcherald_init(void) htcherald_disable_watchdog(); htcherald_usb_enable(); - omap_usb_init(&htcherald_usb_config); + omap1_usb_init(&htcherald_usb_config); } static void __init htcherald_init_irq(void) diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 91064b37859a..3daf87ad2576 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -422,13 +422,13 @@ static void __init innovator_init(void) #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap1510()) { - omap_usb_init(&innovator1510_usb_config); + omap1_usb_init(&innovator1510_usb_config); innovator_config[1].data = &innovator1510_lcd_config; } #endif #ifdef CONFIG_ARCH_OMAP16XX if (cpu_is_omap1610()) { - omap_usb_init(&h2_usb_config); + omap1_usb_init(&h2_usb_config); innovator_config[1].data = &innovator1610_lcd_config; } #endif diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 8c28b10f3dae..51a4539aecf5 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -32,7 +32,6 @@ #include #include #include -#include #include #include #include @@ -242,138 +241,6 @@ static inline void nokia770_mmc_init(void) } #endif -#if defined(CONFIG_OMAP_DSP) -/* - * audio power control - */ -#define HEADPHONE_GPIO 14 -#define AMPLIFIER_CTRL_GPIO 58 - -static struct clk *dspxor_ck; -static DEFINE_MUTEX(audio_pwr_lock); -/* - * audio_pwr_state - * +--+-------------------------+---------------------------------------+ - * |-1|down |power-up request -> 0 | - * +--+-------------------------+---------------------------------------+ - * | 0|up |power-down(1) request -> 1 | - * | | |power-down(2) request -> (ignore) | - * +--+-------------------------+---------------------------------------+ - * | 1|up, |power-up request -> 0 | - * | |received down(1) request |power-down(2) request -> -1 | - * +--+-------------------------+---------------------------------------+ - */ -static int audio_pwr_state = -1; - -static inline void aic23_power_up(void) -{ -} -static inline void aic23_power_down(void) -{ -} - -/* - * audio_pwr_up / down should be called under audio_pwr_lock - */ -static void nokia770_audio_pwr_up(void) -{ - clk_enable(dspxor_ck); - - /* Turn on codec */ - aic23_power_up(); - - if (gpio_get_value(HEADPHONE_GPIO)) - /* HP not connected, turn on amplifier */ - gpio_set_value(AMPLIFIER_CTRL_GPIO, 1); - else - /* HP connected, do not turn on amplifier */ - printk("HP connected\n"); -} - -static void codec_delayed_power_down(struct work_struct *work) -{ - mutex_lock(&audio_pwr_lock); - if (audio_pwr_state == -1) - aic23_power_down(); - clk_disable(dspxor_ck); - mutex_unlock(&audio_pwr_lock); -} - -static DECLARE_DELAYED_WORK(codec_power_down_work, codec_delayed_power_down); - -static void nokia770_audio_pwr_down(void) -{ - /* Turn off amplifier */ - gpio_set_value(AMPLIFIER_CTRL_GPIO, 0); - - /* Turn off codec: schedule delayed work */ - schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */ -} - -static int -nokia770_audio_pwr_up_request(struct dsp_kfunc_device *kdev, int stage) -{ - mutex_lock(&audio_pwr_lock); - if (audio_pwr_state == -1) - nokia770_audio_pwr_up(); - /* force audio_pwr_state = 0, even if it was 1. */ - audio_pwr_state = 0; - mutex_unlock(&audio_pwr_lock); - return 0; -} - -static int -nokia770_audio_pwr_down_request(struct dsp_kfunc_device *kdev, int stage) -{ - mutex_lock(&audio_pwr_lock); - switch (stage) { - case 1: - if (audio_pwr_state == 0) - audio_pwr_state = 1; - break; - case 2: - if (audio_pwr_state == 1) { - nokia770_audio_pwr_down(); - audio_pwr_state = -1; - } - break; - } - mutex_unlock(&audio_pwr_lock); - return 0; -} - -static struct dsp_kfunc_device nokia770_audio_device = { - .name = "audio", - .type = DSP_KFUNC_DEV_TYPE_AUDIO, - .enable = nokia770_audio_pwr_up_request, - .disable = nokia770_audio_pwr_down_request, -}; - -static __init int omap_dsp_init(void) -{ - int ret; - - dspxor_ck = clk_get(0, "dspxor_ck"); - if (IS_ERR(dspxor_ck)) { - printk(KERN_ERR "couldn't acquire dspxor_ck\n"); - return PTR_ERR(dspxor_ck); - } - - ret = dsp_kfunc_device_register(&nokia770_audio_device); - if (ret) { - printk(KERN_ERR - "KFUNC device registration faild: %s\n", - nokia770_audio_device.name); - goto out; - } - return 0; - out: - return ret; -} -#else -#define omap_dsp_init() do {} while (0) -#endif /* CONFIG_OMAP_DSP */ - static void __init omap_nokia770_init(void) { platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); @@ -382,11 +249,10 @@ static void __init omap_nokia770_init(void) omap_gpio_init(); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); - omap_dsp_init(); hwa742_dev_init(); ads7846_dev_init(); mipid_dev_init(); - omap_usb_init(&nokia770_usb_config); + omap1_usb_init(&nokia770_usb_config); nokia770_mmc_init(); } diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index e2a72af30890..679740cc1e90 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -560,7 +560,7 @@ static void __init osk_init(void) l |= (3 << 1); omap_writel(l, USB_TRANSCEIVER_CTRL); - omap_usb_init(&osk_usb_config); + omap1_usb_init(&osk_usb_config); /* irq for tps65010 chip */ /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */ diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 61a2321b9732..782bb257a85d 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -213,90 +213,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = { .ctrl_name = "internal", }; -#ifdef CONFIG_APM -/* - * Values measured in 10 minute intervals averaged over 10 samples. - * May differ slightly from device to device but should be accurate - * enough to give basic idea of battery life left and trigger - * potential alerts. - */ -static const int palmte_battery_sample[] = { - 2194, 2157, 2138, 2120, - 2104, 2089, 2075, 2061, - 2048, 2038, 2026, 2016, - 2008, 1998, 1989, 1980, - 1970, 1958, 1945, 1928, - 1910, 1888, 1860, 1827, - 1791, 1751, 1709, 1656, -}; - -#define INTERVAL 10 -#define BATTERY_HIGH_TRESHOLD 66 -#define BATTERY_LOW_TRESHOLD 33 - -static void palmte_get_power_status(struct apm_power_info *info, int *battery) -{ - int charging, batt, hi, lo, mid; - - charging = !gpio_get_value(PALMTE_DC_GPIO); - batt = battery[0]; - if (charging) - batt -= 60; - - hi = ARRAY_SIZE(palmte_battery_sample); - lo = 0; - - info->battery_flag = 0; - info->units = APM_UNITS_MINS; - - if (batt > palmte_battery_sample[lo]) { - info->battery_life = 100; - info->time = INTERVAL * ARRAY_SIZE(palmte_battery_sample); - } else if (batt <= palmte_battery_sample[hi - 1]) { - info->battery_life = 0; - info->time = 0; - } else { - while (hi > lo + 1) { - mid = (hi + lo) >> 1; - if (batt <= palmte_battery_sample[mid]) - lo = mid; - else - hi = mid; - } - - mid = palmte_battery_sample[lo] - palmte_battery_sample[hi]; - hi = palmte_battery_sample[lo] - batt; - info->battery_life = 100 - (100 * lo + 100 * hi / mid) / - ARRAY_SIZE(palmte_battery_sample); - info->time = INTERVAL * (ARRAY_SIZE(palmte_battery_sample) - - lo) - INTERVAL * hi / mid; - } - - if (charging) { - info->ac_line_status = APM_AC_ONLINE; - info->battery_status = APM_BATTERY_STATUS_CHARGING; - info->battery_flag |= APM_BATTERY_FLAG_CHARGING; - } else { - info->ac_line_status = APM_AC_OFFLINE; - if (info->battery_life > BATTERY_HIGH_TRESHOLD) - info->battery_status = APM_BATTERY_STATUS_HIGH; - else if (info->battery_life > BATTERY_LOW_TRESHOLD) - info->battery_status = APM_BATTERY_STATUS_LOW; - else - info->battery_status = APM_BATTERY_STATUS_CRITICAL; - } - - if (info->battery_life > BATTERY_HIGH_TRESHOLD) - info->battery_flag |= APM_BATTERY_FLAG_HIGH; - else if (info->battery_life > BATTERY_LOW_TRESHOLD) - info->battery_flag |= APM_BATTERY_FLAG_LOW; - else - info->battery_flag |= APM_BATTERY_FLAG_CRITICAL; -} -#else -#define palmte_get_power_status NULL -#endif - static struct omap_board_config_kernel palmte_config[] __initdata = { { OMAP_TAG_LCD, &palmte_lcd_config }, }; @@ -359,7 +275,7 @@ static void __init omap_palmte_init(void) spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); palmte_misc_gpio_setup(); omap_serial_init(); - omap_usb_init(&palmte_usb_config); + omap1_usb_init(&palmte_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); } diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 21c01c6afcc1..0b35ef54a64f 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -307,7 +307,7 @@ static void __init omap_palmtt_init(void) spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); omap_serial_init(); - omap_usb_init(&palmtt_usb_config); + omap1_usb_init(&palmtt_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); } diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index f32492451533..66362903b6e2 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -325,7 +325,7 @@ omap_palmz71_init(void) spi_register_board_info(palmz71_boardinfo, ARRAY_SIZE(palmz71_boardinfo)); - omap_usb_init(&palmz71_usb_config); + omap1_usb_init(&palmz71_usb_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); palmz71_gpio_setup(0); diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 8b5ab1fcc405..34ab354758b0 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -260,6 +260,18 @@ static void __init omap_perseus2_init(void) omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); + /* Mux pins for keypad */ + omap_cfg_reg(E2_7XX_KBR0); + omap_cfg_reg(J7_7XX_KBR1); + omap_cfg_reg(E1_7XX_KBR2); + omap_cfg_reg(F3_7XX_KBR3); + omap_cfg_reg(D2_7XX_KBR4); + omap_cfg_reg(C2_7XX_KBC0); + omap_cfg_reg(D3_7XX_KBC1); + omap_cfg_reg(E4_7XX_KBC2); + omap_cfg_reg(F4_7XX_KBC3); + omap_cfg_reg(E3_7XX_KBC4); + platform_add_devices(devices, ARRAY_SIZE(devices)); omap_board_config = perseus2_config; diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 995566b862bb..2eb148b8de93 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -392,7 +392,7 @@ static void __init omap_sx1_init(void) omap_board_config_size = ARRAY_SIZE(sx1_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); - omap_usb_init(&sx1_usb_config); + omap1_usb_init(&sx1_usb_config); sx1_mmc_init(); /* turn on USB power */ diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 4c483dc1de5c..6b3cf14bc757 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -198,7 +198,7 @@ static void __init voiceblue_init(void) omap_board_config = voiceblue_config; omap_board_config_size = ARRAY_SIZE(voiceblue_config); omap_serial_init(); - omap_usb_init(&voiceblue_usb_config); + omap1_usb_init(&voiceblue_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); /* There is a good chance board is going up, so enable power LED diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 6bbb1b8b8294..b8c7fb9d7921 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -11,7 +11,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include #include #include #include @@ -34,9 +33,9 @@ __u32 arm_idlect1_mask; struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; -/*------------------------------------------------------------------------- +/* * Omap1 specific clock functions - *-------------------------------------------------------------------------*/ + */ unsigned long omap1_uart_recalc(struct clk *clk) { @@ -523,7 +522,8 @@ const struct clkops clkops_dspck = { .disable = omap1_clk_disable_dsp_domain, }; -static int omap1_clk_enable_uart_functional(struct clk *clk) +/* XXX SYSC register handling does not belong in the clock framework */ +static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) { int ret; struct uart_clk *uclk; @@ -539,7 +539,8 @@ static int omap1_clk_enable_uart_functional(struct clk *clk) return ret; } -static void omap1_clk_disable_uart_functional(struct clk *clk) +/* XXX SYSC register handling does not belong in the clock framework */ +static void omap1_clk_disable_uart_functional_16xx(struct clk *clk) { struct uart_clk *uclk; @@ -550,9 +551,10 @@ static void omap1_clk_disable_uart_functional(struct clk *clk) omap1_clk_disable_generic(clk); } -const struct clkops clkops_uart = { - .enable = omap1_clk_enable_uart_functional, - .disable = omap1_clk_disable_uart_functional, +/* XXX SYSC register handling does not belong in the clock framework */ +const struct clkops clkops_uart_16xx = { + .enable = omap1_clk_enable_uart_functional_16xx, + .disable = omap1_clk_disable_uart_functional_16xx, }; long omap1_clk_round_rate(struct clk *clk, unsigned long rate) @@ -572,9 +574,9 @@ int omap1_clk_set_rate(struct clk *clk, unsigned long rate) return ret; } -/*------------------------------------------------------------------------- +/* * Omap1 clock reset and init functions - *-------------------------------------------------------------------------*/ + */ #ifdef CONFIG_OMAP_RESET_CLOCKS diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 75d0d7d90bff..eaf09efb91ca 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -107,7 +107,7 @@ extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; extern const struct clkops clkops_dspck; extern const struct clkops clkops_dummy; -extern const struct clkops clkops_uart; +extern const struct clkops clkops_uart_16xx; extern const struct clkops clkops_generic; #endif diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index aa8558adbf1c..af54114b8f08 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -8,6 +8,10 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. + * + * To do: + * - Clocks that are only available on some chips should be marked with the + * chips that they are present on. */ #include @@ -23,9 +27,49 @@ #include "clock.h" -/*------------------------------------------------------------------------ +/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ +#define IDL_CLKOUT_ARM_SHIFT 12 +#define IDLTIM_ARM_SHIFT 9 +#define IDLAPI_ARM_SHIFT 8 +#define IDLIF_ARM_SHIFT 6 +#define IDLLB_ARM_SHIFT 4 /* undocumented? */ +#define OMAP1510_IDLLCD_ARM_SHIFT 3 /* undocumented? */ +#define IDLPER_ARM_SHIFT 2 +#define IDLXORP_ARM_SHIFT 1 +#define IDLWDT_ARM_SHIFT 0 + +/* Some MOD_CONF_CTRL_0 bit shifts - used in struct clk.enable_bit */ +#define CONF_MOD_UART3_CLK_MODE_R 31 +#define CONF_MOD_UART2_CLK_MODE_R 30 +#define CONF_MOD_UART1_CLK_MODE_R 29 +#define CONF_MOD_MMC_SD_CLK_REQ_R 23 +#define CONF_MOD_MCBSP3_AUXON 20 + +/* Some MOD_CONF_CTRL_1 bit shifts - used in struct clk.enable_bit */ +#define CONF_MOD_SOSSI_CLK_EN_R 16 + +/* Some OTG_SYSCON_2-specific bit fields */ +#define OTG_SYSCON_2_UHOST_EN_SHIFT 8 + +/* Some SOFT_REQ_REG bit fields - used in struct clk.enable_bit */ +#define SOFT_MMC2_DPLL_REQ_SHIFT 13 +#define SOFT_MMC_DPLL_REQ_SHIFT 12 +#define SOFT_UART3_DPLL_REQ_SHIFT 11 +#define SOFT_UART2_DPLL_REQ_SHIFT 10 +#define SOFT_UART1_DPLL_REQ_SHIFT 9 +#define SOFT_USB_OTG_DPLL_REQ_SHIFT 8 +#define SOFT_CAM_DPLL_REQ_SHIFT 7 +#define SOFT_COM_MCKO_REQ_SHIFT 6 +#define SOFT_PERIPH_REQ_SHIFT 5 /* sys_ck gate for UART2 ? */ +#define USB_REQ_EN_SHIFT 4 +#define SOFT_USB_REQ_SHIFT 3 /* sys_ck gate for USB host? */ +#define SOFT_SDW_REQ_SHIFT 2 /* sys_ck gate for Bluetooth? */ +#define SOFT_COM_REQ_SHIFT 1 /* sys_ck gate for com proc? */ +#define SOFT_DPLL_REQ_SHIFT 0 + +/* * Omap1 clocks - *-------------------------------------------------------------------------*/ + */ static struct clk ck_ref = { .name = "ck_ref", @@ -54,7 +98,7 @@ static struct arm_idlect1_clk ck_dpll1out = { .enable_bit = EN_CKOUT_ARM, .recalc = &followparent_recalc, }, - .idlect_shift = 12, + .idlect_shift = IDL_CLKOUT_ARM_SHIFT, }; static struct clk sossi_ck = { @@ -63,7 +107,7 @@ static struct clk sossi_ck = { .parent = &ck_dpll1out.clk, .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), - .enable_bit = 16, + .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, .recalc = &omap1_sossi_recalc, .set_rate = &omap1_set_sossi_rate, }; @@ -91,7 +135,7 @@ static struct arm_idlect1_clk armper_ck = { .round_rate = omap1_clk_round_rate_ckctl_arm, .set_rate = omap1_clk_set_rate_ckctl_arm, }, - .idlect_shift = 2, + .idlect_shift = IDLPER_ARM_SHIFT, }; /* @@ -118,7 +162,7 @@ static struct arm_idlect1_clk armxor_ck = { .enable_bit = EN_XORPCK, .recalc = &followparent_recalc, }, - .idlect_shift = 1, + .idlect_shift = IDLXORP_ARM_SHIFT, }; static struct arm_idlect1_clk armtim_ck = { @@ -131,7 +175,7 @@ static struct arm_idlect1_clk armtim_ck = { .enable_bit = EN_TIMCK, .recalc = &followparent_recalc, }, - .idlect_shift = 9, + .idlect_shift = IDLTIM_ARM_SHIFT, }; static struct arm_idlect1_clk armwdt_ck = { @@ -145,7 +189,7 @@ static struct arm_idlect1_clk armwdt_ck = { .fixed_div = 14, .recalc = &omap_fixed_divisor_recalc, }, - .idlect_shift = 0, + .idlect_shift = IDLWDT_ARM_SHIFT, }; static struct clk arminth_ck16xx = { @@ -212,7 +256,6 @@ static struct clk dsptim_ck = { .recalc = &followparent_recalc, }; -/* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */ static struct arm_idlect1_clk tc_ck = { .clk = { .name = "tc_ck", @@ -224,7 +267,7 @@ static struct arm_idlect1_clk tc_ck = { .round_rate = omap1_clk_round_rate_ckctl_arm, .set_rate = omap1_clk_set_rate_ckctl_arm, }, - .idlect_shift = 6, + .idlect_shift = IDLIF_ARM_SHIFT, }; static struct clk arminth_ck1510 = { @@ -304,7 +347,7 @@ static struct arm_idlect1_clk api_ck = { .enable_bit = EN_APICK, .recalc = &followparent_recalc, }, - .idlect_shift = 8, + .idlect_shift = IDLAPI_ARM_SHIFT, }; static struct arm_idlect1_clk lb_ck = { @@ -317,7 +360,7 @@ static struct arm_idlect1_clk lb_ck = { .enable_bit = EN_LBCK, .recalc = &followparent_recalc, }, - .idlect_shift = 4, + .idlect_shift = IDLLB_ARM_SHIFT, }; static struct clk rhea1_ck = { @@ -359,9 +402,15 @@ static struct arm_idlect1_clk lcd_ck_1510 = { .round_rate = omap1_clk_round_rate_ckctl_arm, .set_rate = omap1_clk_set_rate_ckctl_arm, }, - .idlect_shift = 3, + .idlect_shift = OMAP1510_IDLLCD_ARM_SHIFT, }; +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ static struct clk uart1_1510 = { .name = "uart1_ck", .ops = &clkops_null, @@ -370,25 +419,37 @@ static struct clk uart1_1510 = { .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ + .enable_bit = CONF_MOD_UART1_CLK_MODE_R, .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, }; +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX SYSC register handling does not belong in the clock framework + */ static struct uart_clk uart1_16xx = { .clk = { .name = "uart1_ck", - .ops = &clkops_uart, + .ops = &clkops_uart_16xx, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 29, + .enable_bit = CONF_MOD_UART1_CLK_MODE_R, }, .sysc_addr = 0xfffb0054, }; +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ static struct clk uart2_ck = { .name = "uart2_ck", .ops = &clkops_null, @@ -397,11 +458,17 @@ static struct clk uart2_ck = { .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ + .enable_bit = CONF_MOD_UART2_CLK_MODE_R, .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, }; +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ static struct clk uart3_1510 = { .name = "uart3_ck", .ops = &clkops_null, @@ -410,21 +477,27 @@ static struct clk uart3_1510 = { .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ + .enable_bit = CONF_MOD_UART3_CLK_MODE_R, .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, }; +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX SYSC register handling does not belong in the clock framework + */ static struct uart_clk uart3_16xx = { .clk = { .name = "uart3_ck", - .ops = &clkops_uart, + .ops = &clkops_uart_16xx, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 31, + .enable_bit = CONF_MOD_UART3_CLK_MODE_R, }, .sysc_addr = 0xfffb9854, }; @@ -457,7 +530,7 @@ static struct clk usb_hhc_ck16xx = { /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ .flags = ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ - .enable_bit = 8 /* UHOST_EN */, + .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT }; static struct clk usb_dc_ck = { @@ -466,7 +539,7 @@ static struct clk usb_dc_ck = { /* Direct from ULPD, no parent */ .rate = 48000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 4, + .enable_bit = USB_REQ_EN_SHIFT, }; static struct clk usb_dc_ck7xx = { @@ -475,7 +548,25 @@ static struct clk usb_dc_ck7xx = { /* Direct from ULPD, no parent */ .rate = 48000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 8, + .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, +}; + +static struct clk uart1_7xx = { + .name = "uart1_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 9, +}; + +static struct clk uart2_7xx = { + .name = "uart2_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 11, }; static struct clk mclk_1510 = { @@ -484,7 +575,7 @@ static struct clk mclk_1510 = { /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .rate = 12000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 6, + .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, }; static struct clk mclk_16xx = { @@ -524,9 +615,13 @@ static struct clk mmc1_ck = { .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 23, + .enable_bit = CONF_MOD_MMC_SD_CLK_REQ_R, }; +/* + * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as + * CONF_MOD_MCBSP3_AUXON ?? + */ static struct clk mmc2_ck = { .name = "mmc2_ck", .ops = &clkops_generic, @@ -546,7 +641,7 @@ static struct clk mmc3_ck = { .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 12, + .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, }; static struct clk virtual_ck_mpu = { @@ -620,7 +715,9 @@ static struct omap_clk omap_clks[] = { /* ULPD clocks */ CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), + CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX), CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX), CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 379100c17639..aa0725608fb1 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -63,44 +63,7 @@ static void omap_init_rtc(void) static inline void omap_init_rtc(void) {} #endif -#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) - -#if defined(CONFIG_ARCH_OMAP15XX) -# define OMAP1_MBOX_SIZE 0x23 -# define INT_DSP_MAILBOX1 INT_1510_DSP_MAILBOX1 -#elif defined(CONFIG_ARCH_OMAP16XX) -# define OMAP1_MBOX_SIZE 0x2f -# define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 -#endif - -#define OMAP1_MBOX_BASE OMAP16XX_MAILBOX_BASE - -static struct resource mbox_resources[] = { - { - .start = OMAP1_MBOX_BASE, - .end = OMAP1_MBOX_BASE + OMAP1_MBOX_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_DSP_MAILBOX1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mbox_device = { - .name = "omap1-mailbox", - .id = -1, - .num_resources = ARRAY_SIZE(mbox_resources), - .resource = mbox_resources, -}; - -static inline void omap_init_mbox(void) -{ - platform_device_register(&mbox_device); -} -#else static inline void omap_init_mbox(void) { } -#endif /*-------------------------------------------------------------------------*/ @@ -230,42 +193,7 @@ static inline void omap_init_spi100k(void) /*-------------------------------------------------------------------------*/ -#if defined(CONFIG_OMAP_STI) - -#define OMAP1_STI_BASE 0xfffea000 -#define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) - -static struct resource sti_resources[] = { - { - .start = OMAP1_STI_BASE, - .end = OMAP1_STI_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP1_STI_CHANNEL_BASE, - .end = OMAP1_STI_CHANNEL_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_1610_STI, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device sti_device = { - .name = "sti", - .id = -1, - .num_resources = ARRAY_SIZE(sti_resources), - .resource = sti_resources, -}; - -static inline void omap_init_sti(void) -{ - platform_device_register(&sti_device); -} -#else static inline void omap_init_sti(void) {} -#endif /*-------------------------------------------------------------------------*/ diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index e8a8cf36b7f0..671408eb4ab4 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S @@ -33,7 +33,7 @@ omap_uart_virt: .word 0x0 /* Use omap_uart_phys/virt if already configured */ 9: mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? - ldreq \rx, =omap_uart_phys @ physical base address + ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address ldrne \rx, =omap_uart_virt @ virtual base ldr \rx, [\rx, #0] cmp \rx, #0 @ is port configured? @@ -68,11 +68,15 @@ omap_uart_virt: .word 0x0 /* Store both phys and virt address for the uart */ 98: add \rx, \rx, #0xff000000 @ phys base - ldr \tmp, =omap_uart_phys + mrc p15, 0, \tmp, c1, c0 + tst \tmp, #1 @ MMU enabled? + ldreq \tmp, =__virt_to_phys(omap_uart_phys) + ldrne \tmp, =omap_uart_phys str \rx, [\tmp, #0] sub \rx, \rx, #0xff000000 @ phys base add \rx, \rx, #0xfe000000 @ virt base - ldr \tmp, =omap_uart_virt + ldreq \tmp, =__virt_to_phys(omap_uart_virt) + ldrne \tmp, =omap_uart_virt str \rx, [\tmp, #0] b 9b 99: diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index 4f5b3da3d559..1a85a421007f 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c @@ -1,5 +1,5 @@ /* - * Mailbox reservation modules for DSP + * Mailbox reservation modules for OMAP1 * * Copyright (C) 2006-2009 Nokia Corporation * Written by: Hiroshi DOYU @@ -9,13 +9,10 @@ * for more details. */ -#include -#include #include #include #include #include -#include #define MAILBOX_ARM2DSP1 0x00 #define MAILBOX_ARM2DSP1b 0x04 @@ -83,7 +80,7 @@ static int omap1_mbox_fifo_full(struct omap_mbox *mbox) struct omap_mbox1_fifo *fifo = &((struct omap_mbox1_priv *)mbox->priv)->rx_fifo; - return (mbox_read_reg(fifo->flag)); + return mbox_read_reg(fifo->flag); } /* irq */ @@ -141,47 +138,37 @@ struct omap_mbox mbox_dsp_info = { .ops = &omap1_mbox_ops, .priv = &omap1_mbox_dsp_priv, }; -EXPORT_SYMBOL(mbox_dsp_info); + +struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL }; static int __devinit omap1_mbox_probe(struct platform_device *pdev) { - struct resource *res; + struct resource *mem; + int ret; + int i; + struct omap_mbox **list; - if (pdev->num_resources != 2) { - dev_err(&pdev->dev, "invalid number of resources: %d\n", - pdev->num_resources); - return -ENODEV; - } + list = omap1_mboxes; + list[0]->irq = platform_get_irq_byname(pdev, "dsp"); - /* MBOX base */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (unlikely(!res)) { - dev_err(&pdev->dev, "invalid mem resource\n"); - return -ENODEV; - } + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + mbox_base = ioremap(mem->start, resource_size(mem)); + if (!mbox_base) + return -ENOMEM; - mbox_base = ioremap(res->start, resource_size(res)); - if (!mbox_base) { - dev_err(&pdev->dev, "ioremap failed\n"); - return -ENODEV; - } - - /* DSP IRQ */ - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (unlikely(!res)) { - dev_err(&pdev->dev, "invalid irq resource\n"); + ret = omap_mbox_register(&pdev->dev, list); + if (ret) { iounmap(mbox_base); - return -ENODEV; + return ret; } - mbox_dsp_info.irq = res->start; - return omap_mbox_register(&pdev->dev, &mbox_dsp_info); + return 0; } static int __devexit omap1_mbox_remove(struct platform_device *pdev) { - omap_mbox_unregister(&mbox_dsp_info); - + omap_mbox_unregister(); + iounmap(mbox_base); return 0; } @@ -189,7 +176,7 @@ static struct platform_driver omap1_mbox_driver = { .probe = omap1_mbox_probe, .remove = __devexit_p(omap1_mbox_remove), .driver = { - .name = "omap1-mailbox", + .name = "omap-mailbox", }, }; diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index e9bdff192f82..b3a796a6da03 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -23,7 +23,6 @@ #include #include #include -#include #define DPS_RSTCT2_PER_EN (1 << 0) #define DSP_RSTCT2_WD_PER_EN (1 << 1) @@ -46,7 +45,6 @@ static void omap1_mcbsp_request(unsigned int id) clk_enable(api_clk); clk_enable(dsp_clk); - omap_dsp_request_mem(); /* * DSP external peripheral reset * FIXME: This should be moved to dsp code @@ -62,7 +60,6 @@ static void omap1_mcbsp_free(unsigned int id) { if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { if (--dsp_use == 0) { - omap_dsp_release_mem(); if (!IS_ERR(api_clk)) { clk_disable(api_clk); clk_put(api_clk); diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 84341377232d..7835add00344 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -70,6 +70,10 @@ MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) + +/* UART pins */ +MUX_CFG_7XX("UART_7XX_1", 3, 21, 0, 20, 0, 0) +MUX_CFG_7XX("UART_7XX_2", 8, 1, 6, 0, 0, 0) }; #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) #else @@ -440,7 +444,7 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) } #endif -#ifdef CONFIG_OMAP_MUX_ERRORS +#ifdef CONFIG_OMAP_MUX_WARNINGS return warn ? -ETXTBSY : 0; #else return 0; diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 349de90194e3..b78d0749f13d 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -122,6 +122,13 @@ void __init omap_serial_init(void) for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { + /* Don't look at UARTs higher than 2 for omap7xx */ + if (cpu_is_omap7xx() && i > 1) { + serial_platform_data[i].membase = NULL; + serial_platform_data[i].mapbase = 0; + continue; + } + /* Static mapping, never released */ serial_platform_data[i].membase = ioremap(serial_platform_data[i].mapbase, SZ_2K); diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c new file mode 100644 index 000000000000..19de03b074e3 --- /dev/null +++ b/arch/arm/mach-omap1/usb.c @@ -0,0 +1,530 @@ +/* + * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx + * + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include + +#include + +#include +#include + +/* These routines should handle the standard chip-specific modes + * for usb0/1/2 ports, covering basic mux and transceiver setup. + * + * Some board-*.c files will need to set up additional mux options, + * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup. + */ + +/* TESTED ON: + * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables + * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables + * - 5912 OSK UDC, with *nonstandard* A-to-A cable + * - 1510 Innovator UDC with bundled usb0 cable + * - 1510 Innovator OHCI with bundled usb1/usb2 cable + * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS + * - 1710 custom development board using alternate pin group + * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables + */ + +#define INT_USB_IRQ_GEN IH2_BASE + 20 +#define INT_USB_IRQ_NISO IH2_BASE + 30 +#define INT_USB_IRQ_ISO IH2_BASE + 29 +#define INT_USB_IRQ_HGEN INT_USB_HHC_1 +#define INT_USB_IRQ_OTG IH2_BASE + 8 + +#ifdef CONFIG_USB_GADGET_OMAP + +static struct resource udc_resources[] = { + /* order is significant! */ + { /* registers */ + .start = UDC_BASE, + .end = UDC_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { /* general IRQ */ + .start = INT_USB_IRQ_GEN, + .flags = IORESOURCE_IRQ, + }, { /* PIO IRQ */ + .start = INT_USB_IRQ_NISO, + .flags = IORESOURCE_IRQ, + }, { /* SOF IRQ */ + .start = INT_USB_IRQ_ISO, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 udc_dmamask = ~(u32)0; + +static struct platform_device udc_device = { + .name = "omap_udc", + .id = -1, + .dev = { + .dma_mask = &udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(udc_resources), + .resource = udc_resources, +}; + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ + /* IRQ numbers for omap7xx */ + if(cpu_is_omap7xx()) { + udc_resources[1].start = INT_7XX_USB_GENI; + udc_resources[2].start = INT_7XX_USB_NON_ISO; + udc_resources[3].start = INT_7XX_USB_ISO; + } + pdata->udc_device = &udc_device; +} + +#else + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + +/* The dmamask must be set for OHCI to work */ +static u64 ohci_dmamask = ~(u32)0; + +static struct resource ohci_resources[] = { + { + .start = OMAP_OHCI_BASE, + .end = OMAP_OHCI_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_USB_IRQ_HGEN, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ohci_device = { + .name = "ohci", + .id = -1, + .dev = { + .dma_mask = &ohci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(ohci_resources), + .resource = ohci_resources, +}; + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ + if (cpu_is_omap7xx()) + ohci_resources[1].start = INT_7XX_USB_HHC_1; + pdata->ohci_device = &ohci_device; +} + +#else + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) + +static struct resource otg_resources[] = { + /* order is significant! */ + { + .start = OTG_BASE, + .end = OTG_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { + .start = INT_USB_IRQ_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device otg_device = { + .name = "omap_otg", + .id = -1, + .num_resources = ARRAY_SIZE(otg_resources), + .resource = otg_resources, +}; + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ + if (cpu_is_omap7xx()) + otg_resources[1].start = INT_7XX_USB_OTG; + pdata->otg_device = &otg_device; +} + +#else + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) +{ + u32 syscon1 = 0; + + if (nwires == 0) { + if (!cpu_is_omap15xx()) { + u32 l; + + /* pulldown D+/D- */ + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~(3 << 1); + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + return 0; + } + + if (is_device) { + if (cpu_is_omap7xx()) { + omap_cfg_reg(AA17_7XX_USB_DM); + omap_cfg_reg(W16_7XX_USB_PU_EN); + omap_cfg_reg(W17_7XX_USB_VBUSI); + omap_cfg_reg(W18_7XX_USB_DMCK_OUT); + omap_cfg_reg(W19_7XX_USB_DCRST); + } else + omap_cfg_reg(W4_USB_PUEN); + } + + if (nwires == 2) { + u32 l; + + // omap_cfg_reg(P9_USB_DP); + // omap_cfg_reg(R8_USB_DM); + + if (cpu_is_omap15xx()) { + /* This works on 1510-Innovator */ + return 0; + } + + /* NOTES: + * - peripheral should configure VBUS detection! + * - only peripherals may use the internal D+/D- pulldowns + * - OTG support on this port not yet written + */ + + /* Don't do this for omap7xx -- it causes USB to not work correctly */ + if (!cpu_is_omap7xx()) { + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~(7 << 4); + if (!is_device) + l |= (3 << 1); + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + + return 3 << 16; + } + + /* alternate pin config, external transceiver */ + if (cpu_is_omap15xx()) { + printk(KERN_ERR "no usb0 alt pin config on 15xx\n"); + return 0; + } + + omap_cfg_reg(V6_USB0_TXD); + omap_cfg_reg(W9_USB0_TXEN); + omap_cfg_reg(W5_USB0_SE0); + if (nwires != 3) + omap_cfg_reg(Y5_USB0_RCV); + + /* NOTE: SPEED and SUSP aren't configured here. OTG hosts + * may be able to use I2C requests to set those bits along + * with VBUS switching and overcurrent detection. + */ + + if (nwires != 6) { + u32 l; + + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~CONF_USB2_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + + switch (nwires) { + case 3: + syscon1 = 2; + break; + case 4: + syscon1 = 1; + break; + case 6: + syscon1 = 3; + { + u32 l; + + omap_cfg_reg(AA9_USB0_VP); + omap_cfg_reg(R9_USB0_VM); + l = omap_readl(USB_TRANSCEIVER_CTRL); + l |= CONF_USB2_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + break; + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 0, nwires); + } + + return syscon1 << 16; +} + +u32 __init omap1_usb1_init(unsigned nwires) +{ + u32 syscon1 = 0; + + if (!cpu_is_omap15xx() && nwires != 6) { + u32 l; + + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~CONF_USB1_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + if (nwires == 0) + return 0; + + /* external transceiver */ + omap_cfg_reg(USB1_TXD); + omap_cfg_reg(USB1_TXEN); + if (nwires != 3) + omap_cfg_reg(USB1_RCV); + + if (cpu_is_omap15xx()) { + omap_cfg_reg(USB1_SEO); + omap_cfg_reg(USB1_SPEED); + // SUSP + } else if (cpu_is_omap1610() || cpu_is_omap5912()) { + omap_cfg_reg(W13_1610_USB1_SE0); + omap_cfg_reg(R13_1610_USB1_SPEED); + // SUSP + } else if (cpu_is_omap1710()) { + omap_cfg_reg(R13_1710_USB1_SE0); + // SUSP + } else { + pr_debug("usb%d cpu unrecognized\n", 1); + return 0; + } + + switch (nwires) { + case 2: + goto bad; + case 3: + syscon1 = 2; + break; + case 4: + syscon1 = 1; + break; + case 6: + syscon1 = 3; + omap_cfg_reg(USB1_VP); + omap_cfg_reg(USB1_VM); + if (!cpu_is_omap15xx()) { + u32 l; + + l = omap_readl(USB_TRANSCEIVER_CTRL); + l |= CONF_USB1_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + break; + default: +bad: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 1, nwires); + } + + return syscon1 << 20; +} + +u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) +{ + u32 syscon1 = 0; + + /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ + if (alt_pingroup || nwires == 0) + return 0; + + if (!cpu_is_omap15xx() && nwires != 6) { + u32 l; + + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~CONF_USB2_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + + /* external transceiver */ + if (cpu_is_omap15xx()) { + omap_cfg_reg(USB2_TXD); + omap_cfg_reg(USB2_TXEN); + omap_cfg_reg(USB2_SEO); + if (nwires != 3) + omap_cfg_reg(USB2_RCV); + /* there is no USB2_SPEED */ + } else if (cpu_is_omap16xx()) { + omap_cfg_reg(V6_USB2_TXD); + omap_cfg_reg(W9_USB2_TXEN); + omap_cfg_reg(W5_USB2_SE0); + if (nwires != 3) + omap_cfg_reg(Y5_USB2_RCV); + // FIXME omap_cfg_reg(USB2_SPEED); + } else { + pr_debug("usb%d cpu unrecognized\n", 1); + return 0; + } + + // omap_cfg_reg(USB2_SUSP); + + switch (nwires) { + case 2: + goto bad; + case 3: + syscon1 = 2; + break; + case 4: + syscon1 = 1; + break; + case 5: + goto bad; + case 6: + syscon1 = 3; + if (cpu_is_omap15xx()) { + omap_cfg_reg(USB2_VP); + omap_cfg_reg(USB2_VM); + } else { + u32 l; + + omap_cfg_reg(AA9_USB2_VP); + omap_cfg_reg(R9_USB2_VM); + l = omap_readl(USB_TRANSCEIVER_CTRL); + l |= CONF_USB2_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + break; + default: +bad: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 2, nwires); + } + + return syscon1 << 24; +} + +#ifdef CONFIG_ARCH_OMAP15XX + +/* ULPD_DPLL_CTRL */ +#define DPLL_IOB (1 << 13) +#define DPLL_PLL_ENABLE (1 << 4) +#define DPLL_LOCK (1 << 0) + +/* ULPD_APLL_CTRL */ +#define APLL_NDPLL_SWITCH (1 << 0) + +static void __init omap_1510_usb_init(struct omap_usb_config *config) +{ + unsigned int val; + u16 w; + + config->usb0_init(config->pins[0], is_usb0_device(config)); + config->usb1_init(config->pins[1]); + config->usb2_init(config->pins[2], 0); + + val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1); + val |= (config->hmc_mode << 1); + omap_writel(val, MOD_CONF_CTRL_0); + + printk("USB: hmc %d", config->hmc_mode); + if (config->pins[0]) + printk(", usb0 %d wires%s", config->pins[0], + is_usb0_device(config) ? " (dev)" : ""); + if (config->pins[1]) + printk(", usb1 %d wires", config->pins[1]); + if (config->pins[2]) + printk(", usb2 %d wires", config->pins[2]); + printk("\n"); + + /* use DPLL for 48 MHz function clock */ + pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL), + omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ)); + + w = omap_readw(ULPD_APLL_CTRL); + w &= ~APLL_NDPLL_SWITCH; + omap_writew(w, ULPD_APLL_CTRL); + + w = omap_readw(ULPD_DPLL_CTRL); + w |= DPLL_IOB | DPLL_PLL_ENABLE; + omap_writew(w, ULPD_DPLL_CTRL); + + w = omap_readw(ULPD_SOFT_REQ); + w |= SOFT_UDC_REQ | SOFT_DPLL_REQ; + omap_writew(w, ULPD_SOFT_REQ); + + while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK)) + cpu_relax(); + +#ifdef CONFIG_USB_GADGET_OMAP + if (config->register_dev) { + int status; + + udc_device.dev.platform_data = config; + status = platform_device_register(&udc_device); + if (status) + pr_debug("can't register UDC device, %d\n", status); + /* udc driver gates 48MHz by D+ pullup */ + } +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + if (config->register_host) { + int status; + + ohci_device.dev.platform_data = config; + status = platform_device_register(&ohci_device); + if (status) + pr_debug("can't register OHCI device, %d\n", status); + /* hcd explicitly gates 48MHz */ + } +#endif +} + +#else +static inline void omap_1510_usb_init(struct omap_usb_config *config) {} +#endif + +void __init omap1_usb_init(struct omap_usb_config *pdata) +{ + pdata->usb0_init = omap1_usb0_init; + pdata->usb1_init = omap1_usb1_init; + pdata->usb2_init = omap1_usb2_init; + udc_device_init(pdata); + ohci_device_init(pdata); + otg_device_init(pdata); + + if (cpu_is_omap7xx() || cpu_is_omap16xx()) + omap_otg_init(pdata); + else if (cpu_is_omap15xx()) + omap_1510_usb_init(pdata); + else + printk(KERN_ERR "USB: No init for your chip yet\n"); +} diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index b31b6f123122..b48bacf0a7aa 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -1,22 +1,77 @@ +if ARCH_OMAP2PLUS + +menu "TI OMAP2/3/4 Specific Features" + +config ARCH_OMAP2PLUS_TYPICAL + bool "Typical OMAP configuration" + default y + select AEABI + select REGULATOR + select PM + select PM_RUNTIME + select VFP + select NEON if ARCH_OMAP3 || ARCH_OMAP4 + select SERIAL_8250 + select SERIAL_CORE_CONSOLE + select SERIAL_8250_CONSOLE + select I2C + select I2C_OMAP + select MFD + select MENELAUS if ARCH_OMAP2 + select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 + select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 + help + Compile a kernel suitable for booting most boards + +config ARCH_OMAP2 + bool "TI OMAP2" + depends on ARCH_OMAP2PLUS + default y + select CPU_V6 + +config ARCH_OMAP3 + bool "TI OMAP3" + depends on ARCH_OMAP2PLUS + default y + select CPU_V7 + select USB_ARCH_HAS_EHCI + select ARM_L1_CACHE_SHIFT_6 + +config ARCH_OMAP4 + bool "TI OMAP4" + default y + depends on ARCH_OMAP2PLUS + select CPU_V7 + select ARM_GIC + comment "OMAP Core Type" depends on ARCH_OMAP2 config ARCH_OMAP2420 bool "OMAP2420 support" depends on ARCH_OMAP2 + default y select OMAP_DM_TIMER select ARCH_OMAP_OTG config ARCH_OMAP2430 bool "OMAP2430 support" depends on ARCH_OMAP2 + default y select ARCH_OMAP_OTG config ARCH_OMAP3430 bool "OMAP3430 support" depends on ARCH_OMAP3 + default y select ARCH_OMAP_OTG +config OMAP_PACKAGE_ZAF + bool + +config OMAP_PACKAGE_ZAC + bool + config OMAP_PACKAGE_CBC bool @@ -35,6 +90,7 @@ comment "OMAP Board Type" config MACH_OMAP_GENERIC bool "Generic OMAP board" depends on ARCH_OMAP2 + default y config MACH_OMAP2_TUSB6010 bool @@ -44,60 +100,75 @@ config MACH_OMAP2_TUSB6010 config MACH_OMAP_H4 bool "OMAP 2420 H4 board" depends on ARCH_OMAP2 + default y + select OMAP_PACKAGE_ZAF select OMAP_DEBUG_DEVICES config MACH_OMAP_APOLLON bool "OMAP 2420 Apollon board" depends on ARCH_OMAP2 + default y + select OMAP_PACKAGE_ZAC config MACH_OMAP_2430SDP bool "OMAP 2430 SDP board" depends on ARCH_OMAP2 + default y + select OMAP_PACKAGE_ZAC config MACH_OMAP3_BEAGLE bool "OMAP3 BEAGLE board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_DEVKIT8000 bool "DEVKIT8000 board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CUS select OMAP_MUX config MACH_OMAP_LDP bool "OMAP3 LDP board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_OVERO bool "Gumstix Overo board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_OMAP3EVM bool "OMAP 3530 EVM board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_OMAP3517EVM bool "OMAP3517/ AM3517 EVM board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_OMAP3_PANDORA bool "OMAP3 Pandora" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_OMAP3_TOUCHBOOK bool "OMAP3 Touch Book" depends on ARCH_OMAP3 + default y select BACKLIGHT_CLASS_DEVICE config MACH_OMAP_3430SDP bool "OMAP 3430 SDP board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_NOKIA_N800 @@ -112,6 +183,8 @@ config MACH_NOKIA_N810_WIMAX config MACH_NOKIA_N8X0 bool "Nokia N800/N810" depends on ARCH_OMAP2420 + default y + select OMAP_PACKAGE_ZAC select MACH_NOKIA_N800 select MACH_NOKIA_N810 select MACH_NOKIA_N810_WIMAX @@ -119,42 +192,55 @@ config MACH_NOKIA_N8X0 config MACH_NOKIA_RX51 bool "Nokia RX-51 board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_OMAP_ZOOM2 bool "OMAP3 Zoom2 board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_OMAP_ZOOM3 bool "OMAP3630 Zoom3 board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBP config MACH_CM_T35 bool "CompuLab CM-T35 module" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CUS select OMAP_MUX config MACH_IGEP0020 bool "IGEP v2 board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBB config MACH_SBC3530 bool "OMAP3 SBC STALKER board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CUS select OMAP_MUX config MACH_OMAP_3630SDP bool "OMAP3630 SDP board" depends on ARCH_OMAP3 + default y select OMAP_PACKAGE_CBP config MACH_OMAP_4430SDP bool "OMAP 4430 SDP board" + default y + depends on ARCH_OMAP4 + +config MACH_OMAP4_PANDA + bool "OMAP4 Panda Board" + default y depends on ARCH_OMAP4 config OMAP3_EMU @@ -176,3 +262,6 @@ config OMAP3_SDRC_AC_TIMING wish to say no. Selecting yes without understanding what is going on could result in system crashes; +endmenu + +endif diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ea52b034e963..63b2d8859c3c 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -3,7 +3,7 @@ # # Common support -obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o +obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o omap-2-3-common = irq.o sdrc.o hwmod-common = omap_hwmod.o \ @@ -15,13 +15,14 @@ clock-common = clock.o clock_common_data.o \ obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(hwmod-common) obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(hwmod-common) -obj-$(CONFIG_ARCH_OMAP4) += $(prcm-common) +obj-$(CONFIG_ARCH_OMAP4) += $(prcm-common) $(hwmod-common) obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o # SMP support ONLY available for OMAP4 obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o +obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a @@ -36,6 +37,8 @@ AFLAGS_sram243x.o :=-Wa,-march=armv6 AFLAGS_sram34xx.o :=-Wa,-march=armv7-a # Pin multiplexing +obj-$(CONFIG_ARCH_OMAP2420) += mux2420.o +obj-$(CONFIG_ARCH_OMAP2430) += mux2430.o obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o # SMS/SDRC @@ -47,6 +50,7 @@ ifeq ($(CONFIG_PM),y) obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o +obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o AFLAGS_sleep24xx.o :=-Wa,-march=armv6 @@ -89,7 +93,10 @@ obj-$(CONFIG_OMAP3_EMU) += emu.o obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o mailbox_mach-objs := mailbox.o -obj-$(CONFIG_OMAP_IOMMU) := iommu2.o omap-iommu.o +obj-$(CONFIG_OMAP_IOMMU) += iommu2.o + +iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o +obj-y += $(iommu-m) $(iommu-y) i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o obj-y += $(i2c-omap-m) $(i2c-omap-y) @@ -105,6 +112,7 @@ obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o \ obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o \ hsmmc.o obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o \ + board-flash.o \ hsmmc.o obj-$(CONFIG_MACH_OVERO) += board-overo.o \ hsmmc.o @@ -114,7 +122,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \ hsmmc.o obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \ hsmmc.o \ - board-sdp-flash.o + board-flash.o obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ board-rx51-sdram.o \ @@ -123,14 +131,17 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ hsmmc.o obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \ board-zoom-peripherals.o \ + board-flash.o \ hsmmc.o \ board-zoom-debugboard.o obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom3.o \ board-zoom-peripherals.o \ + board-flash.o \ hsmmc.o \ board-zoom-debugboard.o obj-$(CONFIG_MACH_OMAP_3630SDP) += board-3630sdp.o \ board-zoom-peripherals.o \ + board-flash.o \ hsmmc.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \ hsmmc.o @@ -140,12 +151,16 @@ obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o \ hsmmc.o obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o \ hsmmc.o +obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o \ + hsmmc.o obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o \ hsmmc.o # Platform specific device init code +usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o +obj-y += $(usbfs-m) $(usbfs-y) obj-y += usb-musb.o obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o obj-y += usb-ehci.o diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 42f49f785c93..8538e4131d27 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -31,13 +31,13 @@ #include #include -#include #include #include #include #include #include +#include "mux.h" #include "hsmmc.h" #define SDP2430_CS0_BASE 0x04000000 @@ -122,11 +122,7 @@ static struct omap_smc91x_platform_data board_smc91x_data = { static void __init board_smc91x_init(void) { - if (omap_rev() > OMAP3430_REV_ES1_0) - board_smc91x_data.gpio_irq = 6; - else - board_smc91x_data.gpio_irq = 29; - + omap_mux_init_gpio(149, OMAP_PIN_INPUT); gpmc_smc91x_init(&board_smc91x_data); } @@ -217,17 +213,30 @@ static struct omap_usb_config sdp2430_usb_config __initdata = { .pins[0] = 3, }; +#ifdef CONFIG_OMAP_MUX +static struct omap_board_mux board_mux[] __initdata = { + { .reg_offset = OMAP_MUX_TERMINATOR }, +}; +#else +#define board_mux NULL +#endif + static void __init omap_2430sdp_init(void) { int ret; + omap2430_mux_init(board_mux, OMAP_PACKAGE_ZAC); + omap2430_i2c_init(); platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); omap_serial_init(); omap2_hsmmc_init(mmc); - omap_usb_init(&sdp2430_usb_config); + omap2_usbfs_init(&sdp2430_usb_config); + + omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); usb_musb_init(&musb_board_data); + board_smc91x_init(); /* Turn off secondary LCD backlight */ diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index dd9c03171a19..67b95b5f1a2f 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -41,7 +41,7 @@ #include #include -#include +#include #include "mux.h" #include "sdram-qimonda-hyb18m512160af-6.h" @@ -667,6 +667,18 @@ static struct omap_board_mux board_mux[] __initdata = { #define board_mux NULL #endif +/* + * SDP3430 V2 Board CS organization + * Different from SDP3430 V1. Now 4 switches used to specify CS + * + * See also the Switch S8 settings in the comments. + */ +static char chip_sel_3430[][GPMC_CS_NUM] = { + {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ + {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ + {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ +}; + static struct mtd_partition sdp_nor_partitions[] = { /* bootloader (U-Boot, etc) in first sector */ { @@ -797,24 +809,18 @@ static void __init omap_3430sdp_init(void) omap_serial_init(); usb_musb_init(&musb_board_data); board_smc91x_init(); - sdp_flash_init(sdp_flash_partitions); + board_flash_init(sdp_flash_partitions, chip_sel_3430); sdp3430_display_init(); enable_board_wakeup_source(); usb_ehci_init(&ehci_pdata); } -static void __init omap_3430sdp_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") /* Maintainer: Syed Khasim - Texas Instruments Inc */ .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap_3430sdp_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap_3430sdp_init_irq, .init_machine = omap_3430sdp_init, diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 57290fb3fcd7..b359c3f7bb39 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -18,10 +18,10 @@ #include #include #include -#include #include #include +#include #include "mux.h" #include "sdram-hynix-h8mbx00u0mer-0em.h" @@ -66,12 +66,6 @@ static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { .reset_gpio_port[2] = -EINVAL }; -static void __init omap_sdp_map_io(void) -{ - omap2_set_globals_36xx(); - omap34xx_map_common_io(); -} - static struct omap_board_config_kernel sdp_config[] __initdata = { }; @@ -93,12 +87,131 @@ static struct omap_board_mux board_mux[] __initdata = { #define board_mux NULL #endif +/* + * SDP3630 CS organization + * See also the Switch S8 settings in the comments. + */ +static char chip_sel_sdp[][GPMC_CS_NUM] = { + {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ + {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ + {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ +}; + +static struct mtd_partition sdp_nor_partitions[] = { + /* bootloader (U-Boot, etc) in first sector */ + { + .name = "Bootloader-NOR", + .offset = 0, + .size = SZ_256K, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + /* bootloader params in the next sector */ + { + .name = "Params-NOR", + .offset = MTDPART_OFS_APPEND, + .size = SZ_256K, + .mask_flags = 0, + }, + /* kernel */ + { + .name = "Kernel-NOR", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M, + .mask_flags = 0 + }, + /* file system */ + { + .name = "Filesystem-NOR", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0 + } +}; + +static struct mtd_partition sdp_onenand_partitions[] = { + { + .name = "X-Loader-OneNAND", + .offset = 0, + .size = 4 * (64 * 2048), + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, + { + .name = "U-Boot-OneNAND", + .offset = MTDPART_OFS_APPEND, + .size = 2 * (64 * 2048), + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, + { + .name = "U-Boot Environment-OneNAND", + .offset = MTDPART_OFS_APPEND, + .size = 1 * (64 * 2048), + }, + { + .name = "Kernel-OneNAND", + .offset = MTDPART_OFS_APPEND, + .size = 16 * (64 * 2048), + }, + { + .name = "File System-OneNAND", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct mtd_partition sdp_nand_partitions[] = { + /* All the partition sizes are listed in terms of NAND block size */ + { + .name = "X-Loader-NAND", + .offset = 0, + .size = 4 * (64 * 2048), + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ + .size = 10 * (64 * 2048), + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "Boot Env-NAND", + + .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ + .size = 6 * (64 * 2048), + }, + { + .name = "Kernel-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ + .size = 40 * (64 * 2048), + }, + { + .name = "File System - NAND", + .size = MTDPART_SIZ_FULL, + .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */ + }, +}; + +static struct flash_partitions sdp_flash_partitions[] = { + { + .parts = sdp_nor_partitions, + .nr_parts = ARRAY_SIZE(sdp_nor_partitions), + }, + { + .parts = sdp_onenand_partitions, + .nr_parts = ARRAY_SIZE(sdp_onenand_partitions), + }, + { + .parts = sdp_nand_partitions, + .nr_parts = ARRAY_SIZE(sdp_nand_partitions), + }, +}; + static void __init omap_sdp_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); omap_serial_init(); zoom_peripherals_init(); board_smc91x_init(); + board_flash_init(sdp_flash_partitions, chip_sel_sdp); enable_board_wakeup_source(); usb_ehci_init(&ehci_pdata); } @@ -107,7 +220,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap_sdp_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap_sdp_init_irq, .init_machine = omap_sdp_init, diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 4bb2c5d151ec..9447644774c2 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -40,6 +41,54 @@ #define ETH_KS8851_POWER_ON 48 #define ETH_KS8851_QUART 138 +static struct gpio_led sdp4430_gpio_leds[] = { + { + .name = "omap4:green:debug0", + .gpio = 61, + }, + { + .name = "omap4:green:debug1", + .gpio = 30, + }, + { + .name = "omap4:green:debug2", + .gpio = 7, + }, + { + .name = "omap4:green:debug3", + .gpio = 8, + }, + { + .name = "omap4:green:debug4", + .gpio = 50, + }, + { + .name = "omap4:blue:user", + .gpio = 169, + }, + { + .name = "omap4:red:user", + .gpio = 170, + }, + { + .name = "omap4:green:user", + .gpio = 139, + }, + +}; + +static struct gpio_led_platform_data sdp4430_led_data = { + .leds = sdp4430_gpio_leds, + .num_leds = ARRAY_SIZE(sdp4430_gpio_leds), +}; + +static struct platform_device sdp4430_leds_gpio = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &sdp4430_led_data, + }, +}; static struct spi_board_info sdp4430_spi_board_info[] __initdata = { { .modalias = "ks8851", @@ -112,6 +161,7 @@ static struct platform_device sdp4430_lcd_device = { static struct platform_device *sdp4430_devices[] __initdata = { &sdp4430_lcd_device, + &sdp4430_leds_gpio, }; static struct omap_lcd_config sdp4430_lcd_config __initdata = { @@ -156,15 +206,17 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; +static struct regulator_consumer_supply sdp4430_vaux_supply[] = { + { + .supply = "vmmc", + .dev_name = "mmci-omap-hs.1", + }, +}; static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { { .supply = "vmmc", .dev_name = "mmci-omap-hs.0", }, - { - .supply = "vmmc", - .dev_name = "mmci-omap-hs.1", - }, }; static int omap4_twl6030_hsmmc_late_init(struct device *dev) @@ -210,6 +262,8 @@ static struct regulator_init_data sdp4430_vaux1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, + .num_consumer_supplies = 1, + .consumer_supplies = sdp4430_vaux_supply, }; static struct regulator_init_data sdp4430_vaux2 = { @@ -250,7 +304,7 @@ static struct regulator_init_data sdp4430_vmmc = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 2, + .num_consumer_supplies = 1, .consumer_supplies = sdp4430_vmmc_supply, }; @@ -353,6 +407,11 @@ static struct i2c_board_info __initdata sdp4430_i2c_boardinfo[] = { .platform_data = &sdp4430_twldata, }, }; +static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = { + { + I2C_BOARD_INFO("tmp105", 0x48), + }, +}; static int __init omap4_i2c_init(void) { /* @@ -362,7 +421,8 @@ static int __init omap4_i2c_init(void) omap_register_i2c_bus(1, 400, sdp4430_i2c_boardinfo, ARRAY_SIZE(sdp4430_i2c_boardinfo)); omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, NULL, 0); + omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, + ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); omap_register_i2c_bus(4, 400, NULL, 0); return 0; } diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 7da92defcde0..4d0f58592864 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -461,17 +461,11 @@ static void __init am3517_evm_init(void) am3517_evm_ethernet_init(&am3517_evm_emac_pdata); } -static void __init am3517_evm_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") .phys_io = 0x48000000, .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = am3517_evm_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = am3517_evm_init_irq, .init_machine = am3517_evm_init, diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index bd75642aee65..c6421a72514a 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -35,13 +35,14 @@ #include #include -#include #include #include #include #include #include +#include "mux.h" + /* LED & Switch macros */ #define LED0_GPIO13 13 #define LED1_GPIO14 14 @@ -244,7 +245,7 @@ static inline void __init apollon_init_smc91x(void) apollon_smc91x_resources[0].end = base + 0x30f; udelay(100); - omap_cfg_reg(W4__24XX_GPIO74); + omap_mux_init_gpio(74, 0); if (gpio_request(APOLLON_ETHR_GPIO_IRQ, "SMC91x irq") < 0) { printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", APOLLON_ETHR_GPIO_IRQ); @@ -286,15 +287,15 @@ static void __init omap_apollon_init_irq(void) static void __init apollon_led_init(void) { /* LED0 - AA10 */ - omap_cfg_reg(AA10_242X_GPIO13); + omap_mux_init_signal("vlynq_clk.gpio_13", 0); gpio_request(LED0_GPIO13, "LED0"); gpio_direction_output(LED0_GPIO13, 0); /* LED1 - AA6 */ - omap_cfg_reg(AA6_242X_GPIO14); + omap_mux_init_signal("vlynq_rx1.gpio_14", 0); gpio_request(LED1_GPIO14, "LED1"); gpio_direction_output(LED1_GPIO14, 0); /* LED2 - AA4 */ - omap_cfg_reg(AA4_242X_GPIO15); + omap_mux_init_signal("vlynq_rx0.gpio_15", 0); gpio_request(LED2_GPIO15, "LED2"); gpio_direction_output(LED2_GPIO15, 0); } @@ -303,22 +304,35 @@ static void __init apollon_usb_init(void) { /* USB device */ /* DEVICE_SUSPEND */ - omap_cfg_reg(P21_242X_GPIO12); + omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); gpio_request(12, "USB suspend"); gpio_direction_output(12, 0); - omap_usb_init(&apollon_usb_config); + omap2_usbfs_init(&apollon_usb_config); } +#ifdef CONFIG_OMAP_MUX +static struct omap_board_mux board_mux[] __initdata = { + { .reg_offset = OMAP_MUX_TERMINATOR }, +}; +#else +#define board_mux NULL +#endif + static void __init omap_apollon_init(void) { u32 v; + omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC); + apollon_led_init(); apollon_flash_init(); apollon_usb_init(); /* REVISIT: where's the correct place */ - omap_cfg_reg(W19_24XX_SYS_NIRQ); + omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP); + + /* LCD PWR_EN */ + omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP); /* Use Interal loop-back in MMC/SDIO Module Input Clock selection */ v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index bc4c3f807068..e10bc109415c 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -61,8 +61,6 @@ #define SB_T35_SMSC911X_GPIO 65 #define NAND_BLOCK_SIZE SZ_128K -#define GPMC_CS0_BASE 0x60 -#define GPMC_CS0_BASE_ADDR (OMAP34XX_GPMC_VIRT + GPMC_CS0_BASE) #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) #include @@ -223,28 +221,12 @@ static struct omap_nand_platform_data cm_t35_nand_data = { .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions), .dma_channel = -1, /* disable DMA in OMAP NAND driver */ .cs = 0, - .gpmc_cs_baseaddr = (void __iomem *)GPMC_CS0_BASE_ADDR, - .gpmc_baseaddr = (void __iomem *)OMAP34XX_GPMC_VIRT, }; -static struct resource cm_t35_nand_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device cm_t35_nand_device = { - .name = "omap2-nand", - .id = -1, - .num_resources = 1, - .resource = &cm_t35_nand_resource, - .dev = { - .platform_data = &cm_t35_nand_data, - }, -}; - static void __init cm_t35_init_nand(void) { - if (platform_device_register(&cm_t35_nand_device) < 0) + if (gpmc_nand_init(&cm_t35_nand_data) < 0) pr_err("CM-T35: Unable to register NAND device\n"); } #else @@ -708,12 +690,6 @@ static void __init cm_t35_init_irq(void) omap_gpio_init(); } -static void __init cm_t35_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - static struct omap_board_mux board_mux[] __initdata = { /* nCS and IRQ for CM-T35 ethernet */ OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0), @@ -836,7 +812,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35") .phys_io = 0x48000000, .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = cm_t35_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = cm_t35_init_irq, .init_machine = cm_t35_init, diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 922b7464807f..a07086d6a0b2 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -33,6 +33,7 @@ #include #include +#include #include #include #include @@ -58,9 +59,6 @@ #include "mux.h" #include "hsmmc.h" -#define GPMC_CS0_BASE 0x60 -#define GPMC_CS_SIZE 0x30 - #define NAND_BLOCK_SIZE SZ_128K #define OMAP_DM9000_GPIO_IRQ 25 @@ -104,20 +102,6 @@ static struct omap_nand_platform_data devkit8000_nand_data = { .dma_channel = -1, /* disable DMA in OMAP NAND driver */ }; -static struct resource devkit8000_nand_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device devkit8000_nand_device = { - .name = "omap2-nand", - .id = -1, - .dev = { - .platform_data = &devkit8000_nand_data, - }, - .num_resources = 1, - .resource = &devkit8000_nand_resource, -}; - static struct omap2_hsmmc_info mmc[] = { { .mmc = 1, @@ -126,54 +110,50 @@ static struct omap2_hsmmc_info mmc[] = { }, {} /* Terminator */ }; -static struct omap_board_config_kernel devkit8000_config[] __initdata = { -}; static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) { twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1); twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0); + if (gpio_is_valid(dssdev->reset_gpio)) + gpio_set_value(dssdev->reset_gpio, 1); return 0; } static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev) { + if (gpio_is_valid(dssdev->reset_gpio)) + gpio_set_value(dssdev->reset_gpio, 0); } + static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev) { + if (gpio_is_valid(dssdev->reset_gpio)) + gpio_set_value(dssdev->reset_gpio, 1); return 0; } static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev) { + if (gpio_is_valid(dssdev->reset_gpio)) + gpio_set_value(dssdev->reset_gpio, 0); } -static int devkit8000_panel_enable_tv(struct omap_dss_device *dssdev) -{ - - return 0; -} - -static void devkit8000_panel_disable_tv(struct omap_dss_device *dssdev) -{ -} +static struct regulator_consumer_supply devkit8000_vmmc1_supply = + REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0"); -static struct regulator_consumer_supply devkit8000_vmmc1_supply = { - .supply = "vmmc", -}; - -static struct regulator_consumer_supply devkit8000_vsim_supply = { - .supply = "vmmc_aux", -}; - +/* ads7846 on SPI */ +static struct regulator_consumer_supply devkit8000_vio_supply = + REGULATOR_SUPPLY("vcc", "spi2.0"); static struct omap_dss_device devkit8000_lcd_device = { .name = "lcd", - .driver_name = "innolux_at_panel", + .driver_name = "generic_panel", .type = OMAP_DISPLAY_TYPE_DPI, .phy.dpi.data_lines = 24, + .reset_gpio = -EINVAL, /* will be replaced */ .platform_enable = devkit8000_panel_enable_lcd, .platform_disable = devkit8000_panel_disable_lcd, }; @@ -182,6 +162,7 @@ static struct omap_dss_device devkit8000_dvi_device = { .driver_name = "generic_panel", .type = OMAP_DISPLAY_TYPE_DPI, .phy.dpi.data_lines = 24, + .reset_gpio = -EINVAL, /* will be replaced */ .platform_enable = devkit8000_panel_enable_dvi, .platform_disable = devkit8000_panel_disable_dvi, }; @@ -191,8 +172,6 @@ static struct omap_dss_device devkit8000_tv_device = { .driver_name = "venc", .type = OMAP_DISPLAY_TYPE_VENC, .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, - .platform_enable = devkit8000_panel_enable_tv, - .platform_disable = devkit8000_panel_disable_tv, }; @@ -216,10 +195,8 @@ static struct platform_device devkit8000_dss_device = { }, }; -static struct regulator_consumer_supply devkit8000_vdda_dac_supply = { - .supply = "vdda_dac", - .dev = &devkit8000_dss_device.dev, -}; +static struct regulator_consumer_supply devkit8000_vdda_dac_supply = + REGULATOR_SUPPLY("vdda_dac", "omapdss"); static int board_keymap[] = { KEY(0, 0, KEY_1), @@ -266,7 +243,21 @@ static int devkit8000_twl_gpio_setup(struct device *dev, /* link regulators to MMC adapters */ devkit8000_vmmc1_supply.dev = mmc[0].dev; - devkit8000_vsim_supply.dev = mmc[0].dev; + + /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ + gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; + + /* gpio + 1 is "LCD_PWREN" (out, active high) */ + devkit8000_lcd_device.reset_gpio = gpio + 1; + gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN"); + /* Disable until needed */ + gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0); + + /* gpio + 7 is "DVI_PD" (out, active low) */ + devkit8000_dvi_device.reset_gpio = gpio + 7; + gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown"); + /* Disable until needed */ + gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0); return 0; } @@ -282,16 +273,8 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = { .setup = devkit8000_twl_gpio_setup, }; -static struct regulator_consumer_supply devkit8000_vpll2_supplies[] = { - { - .supply = "vdvi", - .dev = &devkit8000_lcd_device.dev, - }, - { - .supply = "vdds_dsi", - .dev = &devkit8000_dss_device.dev, - } -}; +static struct regulator_consumer_supply devkit8000_vpll1_supply = + REGULATOR_SUPPLY("vdds_dsi", "omapdss"); /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ static struct regulator_init_data devkit8000_vmmc1 = { @@ -308,21 +291,6 @@ static struct regulator_init_data devkit8000_vmmc1 = { .consumer_supplies = &devkit8000_vmmc1_supply, }; -/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -static struct regulator_init_data devkit8000_vsim = { - .constraints = { - .min_uV = 1800000, - .max_uV = 3000000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &devkit8000_vsim_supply, -}; - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ static struct regulator_init_data devkit8000_vdac = { .constraints = { @@ -337,10 +305,9 @@ static struct regulator_init_data devkit8000_vdac = { .consumer_supplies = &devkit8000_vdda_dac_supply, }; -/* VPLL2 for digital video outputs */ -static struct regulator_init_data devkit8000_vpll2 = { +/* VPLL1 for digital video outputs */ +static struct regulator_init_data devkit8000_vpll1 = { .constraints = { - .name = "VDVI", .min_uV = 1800000, .max_uV = 1800000, .valid_modes_mask = REGULATOR_MODE_NORMAL @@ -348,8 +315,23 @@ static struct regulator_init_data devkit8000_vpll2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll2_supplies), - .consumer_supplies = devkit8000_vpll2_supplies, + .num_consumer_supplies = 1, + .consumer_supplies = &devkit8000_vpll1_supply, +}; + +/* VAUX4 for ads7846 and nubs */ +static struct regulator_init_data devkit8000_vio = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &devkit8000_vio_supply, }; static struct twl4030_usb_data devkit8000_usb_data = { @@ -374,15 +356,15 @@ static struct twl4030_platform_data devkit8000_twldata = { .gpio = &devkit8000_gpio_data, .codec = &devkit8000_codec_data, .vmmc1 = &devkit8000_vmmc1, - .vsim = &devkit8000_vsim, .vdac = &devkit8000_vdac, - .vpll2 = &devkit8000_vpll2, + .vpll1 = &devkit8000_vpll1, + .vio = &devkit8000_vio, .keypad = &devkit8000_kp_data, }; static struct i2c_board_info __initdata devkit8000_i2c_boardinfo[] = { { - I2C_BOARD_INFO("twl4030", 0x48), + I2C_BOARD_INFO("tps65930", 0x48), .flags = I2C_CLIENT_WAKE, .irq = INT_34XX_SYS_NIRQ, .platform_data = &devkit8000_twldata, @@ -464,8 +446,6 @@ static struct platform_device keys_gpio = { static void __init devkit8000_init_irq(void) { - omap_board_config = devkit8000_config; - omap_board_config_size = ARRAY_SIZE(devkit8000_config); omap2_init_common_hw(mt46h32m32lf6_sdrc_params, mt46h32m32lf6_sdrc_params); omap_init_irq(); @@ -560,6 +540,9 @@ static struct platform_device omap_dm9000_dev = { static void __init omap_dm9000_init(void) { + unsigned char *eth_addr = omap_dm9000_platdata.dev_addr; + struct omap_die_id odi; + if (gpio_request(OMAP_DM9000_GPIO_IRQ, "dm9000 irq") < 0) { printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n", OMAP_DM9000_GPIO_IRQ); @@ -567,6 +550,16 @@ static void __init omap_dm9000_init(void) } gpio_direction_input(OMAP_DM9000_GPIO_IRQ); + + /* init the mac address using DIE id */ + omap_get_die_id(&odi); + + eth_addr[0] = 0x02; /* locally administered */ + eth_addr[1] = odi.id_1 & 0xff; + eth_addr[2] = (odi.id_0 & 0xff000000) >> 24; + eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16; + eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8; + eth_addr[5] = (odi.id_0 & 0x000000ff); } static struct platform_device *devkit8000_devices[] __initdata = { @@ -581,8 +574,6 @@ static void __init devkit8000_flash_init(void) u8 cs = 0; u8 nandcs = GPMC_CS_NUM + 1; - u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; - /* find out the chip-select on which NAND exists */ while (cs < GPMC_CS_NUM) { u32 ret = 0; @@ -604,13 +595,9 @@ static void __init devkit8000_flash_init(void) if (nandcs < GPMC_CS_NUM) { devkit8000_nand_data.cs = nandcs; - devkit8000_nand_data.gpmc_cs_baseaddr = (void *) - (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); - devkit8000_nand_data.gpmc_baseaddr = (void *) - (gpmc_base_add); printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); - if (platform_device_register(&devkit8000_nand_device) < 0) + if (gpmc_nand_init(&devkit8000_nand_data) < 0) printk(KERN_ERR "Unable to register NAND device\n"); } } @@ -797,8 +784,6 @@ static void __init devkit8000_init(void) devkit8000_i2c_init(); platform_add_devices(devkit8000_devices, ARRAY_SIZE(devkit8000_devices)); - omap_board_config = devkit8000_config; - omap_board_config_size = ARRAY_SIZE(devkit8000_config); spi_register_board_info(devkit8000_spi_board_info, ARRAY_SIZE(devkit8000_spi_board_info)); @@ -814,17 +799,11 @@ static void __init devkit8000_init(void) omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); } -static void __init devkit8000_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .phys_io = 0x48000000, .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = devkit8000_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = devkit8000_init_irq, .init_machine = devkit8000_init, diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c new file mode 100644 index 000000000000..ac834aa7abf6 --- /dev/null +++ b/arch/arm/mach-omap2/board-flash.c @@ -0,0 +1,253 @@ +/* + * board-sdp-flash.c + * Modified from mach-omap2/board-3430sdp-flash.c + * + * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2009 Texas Instruments + * + * Vimal Singh + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#define REG_FPGA_REV 0x10 +#define REG_FPGA_DIP_SWITCH_INPUT2 0x60 +#define MAX_SUPPORTED_GPMC_CONFIG 3 + +#define DEBUG_BASE 0x08000000 /* debug board */ + +/* various memory sizes */ +#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */ +#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */ + +static struct physmap_flash_data board_nor_data = { + .width = 2, +}; + +static struct resource board_nor_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device board_nor_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &board_nor_data, + }, + .num_resources = 1, + .resource = &board_nor_resource, +}; + +static void +__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs) +{ + int err; + + board_nor_data.parts = nor_parts; + board_nor_data.nr_parts = nr_parts; + + /* Configure start address and size of NOR device */ + if (omap_rev() >= OMAP3430_REV_ES1_0) { + err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1, + (unsigned long *)&board_nor_resource.start); + board_nor_resource.end = board_nor_resource.start + + FLASH_SIZE_SDPV2 - 1; + } else { + err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1, + (unsigned long *)&board_nor_resource.start); + board_nor_resource.end = board_nor_resource.start + + FLASH_SIZE_SDPV1 - 1; + } + if (err < 0) { + printk(KERN_ERR "NOR: Can't request GPMC CS\n"); + return; + } + if (platform_device_register(&board_nor_device) < 0) + printk(KERN_ERR "Unable to register NOR device\n"); +} + +#if defined(CONFIG_MTD_ONENAND_OMAP2) || \ + defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) +static struct omap_onenand_platform_data board_onenand_data = { + .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */ +}; + +static void +__init board_onenand_init(struct mtd_partition *onenand_parts, + u8 nr_parts, u8 cs) +{ + board_onenand_data.cs = cs; + board_onenand_data.parts = onenand_parts; + board_onenand_data.nr_parts = nr_parts; + + gpmc_onenand_init(&board_onenand_data); +} +#else +static void +__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs) +{ +} +#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */ + +#if defined(CONFIG_MTD_NAND_OMAP2) || \ + defined(CONFIG_MTD_NAND_OMAP2_MODULE) + +/* Note that all values in this struct are in nanoseconds */ +static struct gpmc_timings nand_timings = { + + .sync_clk = 0, + + .cs_on = 0, + .cs_rd_off = 36, + .cs_wr_off = 36, + + .adv_on = 6, + .adv_rd_off = 24, + .adv_wr_off = 36, + + .we_off = 30, + .oe_off = 48, + + .access = 54, + .rd_cycle = 72, + .wr_cycle = 72, + + .wr_access = 30, + .wr_data_mux_bus = 0, +}; + +static struct omap_nand_platform_data board_nand_data = { + .nand_setup = NULL, + .gpmc_t = &nand_timings, + .dma_channel = -1, /* disable DMA in OMAP NAND driver */ + .dev_ready = NULL, + .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */ +}; + +void +__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs) +{ + board_nand_data.cs = cs; + board_nand_data.parts = nand_parts; + board_nand_data.nr_parts = nr_parts; + + gpmc_nand_init(&board_nand_data); +} +#else +void +__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs) +{ +} +#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ + +/** + * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get + * the various cs values. + */ +static u8 get_gpmc0_type(void) +{ + u8 cs = 0; + void __iomem *fpga_map_addr; + + fpga_map_addr = ioremap(DEBUG_BASE, 4096); + if (!fpga_map_addr) + return -ENOMEM; + + if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV))) + /* we dont have an DEBUG FPGA??? */ + /* Depend on #defines!! default to strata boot return param */ + goto unmap; + + /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */ + cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf; + + /* ES2.0 SDP's onwards 4 dip switches are provided for CS */ + if (omap_rev() >= OMAP3430_REV_ES1_0) + /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */ + cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) | + ((cs & 2) << 1) | ((cs & 1) << 3); + else + /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */ + cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2); +unmap: + iounmap(fpga_map_addr); + return cs; +} + +/** + * sdp3430_flash_init - Identify devices connected to GPMC and register. + * + * @return - void. + */ +void board_flash_init(struct flash_partitions partition_info[], + char chip_sel_board[][GPMC_CS_NUM]) +{ + u8 cs = 0; + u8 norcs = GPMC_CS_NUM + 1; + u8 nandcs = GPMC_CS_NUM + 1; + u8 onenandcs = GPMC_CS_NUM + 1; + u8 idx; + unsigned char *config_sel = NULL; + + /* REVISIT: Is this return correct idx for 2430 SDP? + * for which cs configuration matches for 2430 SDP? + */ + idx = get_gpmc0_type(); + if (idx >= MAX_SUPPORTED_GPMC_CONFIG) { + printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs); + return; + } + config_sel = (unsigned char *)(chip_sel_board[idx]); + + while (cs < GPMC_CS_NUM) { + switch (config_sel[cs]) { + case PDC_NOR: + if (norcs > GPMC_CS_NUM) + norcs = cs; + break; + case PDC_NAND: + if (nandcs > GPMC_CS_NUM) + nandcs = cs; + break; + case PDC_ONENAND: + if (onenandcs > GPMC_CS_NUM) + onenandcs = cs; + break; + }; + cs++; + } + + if (norcs > GPMC_CS_NUM) + printk(KERN_INFO "NOR: Unable to find configuration " + "in GPMC\n"); + else + board_nor_init(partition_info[0].parts, + partition_info[0].nr_parts, norcs); + + if (onenandcs > GPMC_CS_NUM) + printk(KERN_INFO "OneNAND: Unable to find configuration " + "in GPMC\n"); + else + board_onenand_init(partition_info[1].parts, + partition_info[1].nr_parts, onenandcs); + + if (nandcs > GPMC_CS_NUM) + printk(KERN_INFO "NAND: Unable to find configuration " + "in GPMC\n"); + else + board_nand_init(partition_info[2].parts, + partition_info[2].nr_parts, nandcs); +} diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 9242902d3a43..3482b99e8c86 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -26,7 +26,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 16703fdb3515..e09bd686389f 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -33,7 +33,6 @@ #include #include -#include #include #include #include @@ -42,6 +41,8 @@ #include #include +#include "mux.h" + #define H4_FLASH_CS 0 #define H4_SMC91X_CS 1 @@ -246,7 +247,7 @@ static inline void __init h4_init_debug(void) udelay(100); - omap_cfg_reg(M15_24XX_GPIO92); + omap_mux_init_gpio(92, 0); if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) < 0) gpmc_cs_free(eth_cs); @@ -272,27 +273,6 @@ static struct omap_lcd_config h4_lcd_config __initdata = { }; static struct omap_usb_config h4_usb_config __initdata = { -#ifdef CONFIG_MACH_OMAP2_H4_USB1 - /* NOTE: usb1 could also be used with 3 wire signaling */ - .pins[1] = 4, -#endif - -#ifdef CONFIG_MACH_OMAP_H4_OTG - /* S1.10 ON -- USB OTG port - * usb0 switched to Mini-AB port and isp1301 transceiver; - * S2.POS3 = OFF, S2.POS4 = ON ... to allow battery charging - */ - .otg = 1, - .pins[0] = 4, -#ifdef CONFIG_USB_GADGET_OMAP - /* use OTG cable, or standard A-to-MiniB */ - .hmc_mode = 0x14, /* 0:dev/otg 1:host 2:disable */ -#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) - /* use OTG cable, or NONSTANDARD (B-to-MiniB) */ - .hmc_mode = 0x11, /* 0:host 1:host 2:disable */ -#endif /* XX */ - -#else /* S1.10 OFF -- usb "download port" * usb0 switched to Mini-B port and isp1105 transceiver; * S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging @@ -301,7 +281,6 @@ static struct omap_usb_config h4_usb_config __initdata = { .pins[0] = 3, /* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */ .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */ -#endif }; static struct omap_board_config_kernel h4_config[] = { @@ -338,31 +317,54 @@ static struct i2c_board_info __initdata h4_i2c_board_info[] = { }, }; +#ifdef CONFIG_OMAP_MUX +static struct omap_board_mux board_mux[] __initdata = { + { .reg_offset = OMAP_MUX_TERMINATOR }, +}; +#else +#define board_mux NULL +#endif + static void __init omap_h4_init(void) { + omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAF); + /* * Make sure the serial ports are muxed on at this point. * You have to mux them off in device drivers later on * if not needed. */ -#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) - omap_cfg_reg(K15_24XX_UART3_TX); - omap_cfg_reg(K14_24XX_UART3_RX); -#endif #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE) + omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP); if (omap_has_menelaus()) { + omap_mux_init_signal("sdrc_a14.gpio0", + OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_signal("vlynq_rx0.gpio_15", 0); + omap_mux_init_signal("gpio_98", 0); row_gpios[5] = 0; col_gpios[2] = 15; col_gpios[6] = 18; + } else { + omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_signal("gpio_100", 0); + omap_mux_init_signal("gpio_98", 0); } + omap_mux_init_signal("gpio_90", 0); + omap_mux_init_signal("gpio_91", 0); + omap_mux_init_signal("gpio_36", 0); + omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); + omap_mux_init_signal("gpio_97", 0); #endif i2c_register_board_info(1, h4_i2c_board_info, ARRAY_SIZE(h4_i2c_board_info)); platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); - omap_usb_init(&h4_usb_config); + omap2_usbfs_init(&h4_usb_config); omap_serial_init(); } diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 759e39d1a702..175f04339761 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -532,17 +532,11 @@ static void __init igep2_init(void) pr_warning("IGEP v2: Could not obtain gpio GPIO_WIFI_NRESET\n"); } -static void __init igep2_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(IGEP0020, "IGEP v2 board") .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = igep2_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = igep2_init_irq, .init_machine = igep2_init, diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 9cd2669113e4..00d9b13b01c5 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include @@ -388,6 +389,38 @@ static struct omap_musb_board_data musb_board_data = { .power = 100, }; +static struct mtd_partition ldp_nand_partitions[] = { + /* All the partition sizes are listed in terms of NAND block size */ + { + .name = "X-Loader-NAND", + .offset = 0, + .size = 4 * (64 * 2048), /* 512KB, 0x80000 */ + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ + .size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */ + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "Boot Env-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ + .size = 2 * (64 * 2048), /* 256KB, 0x40000 */ + }, + { + .name = "Kernel-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/ + .size = 240 * (64 * 2048), /* 30M, 0x1E00000 */ + }, + { + .name = "File System - NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */ + .size = MTDPART_SIZ_FULL, /* 96MB, 0x6000000 */ + }, + +}; + static void __init omap_ldp_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); @@ -400,23 +433,19 @@ static void __init omap_ldp_init(void) ads7846_dev_init(); omap_serial_init(); usb_musb_init(&musb_board_data); + board_nand_init(ldp_nand_partitions, + ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS); omap2_hsmmc_init(mmc); /* link regulators to MMC adapters */ ldp_vmmc1_supply.dev = mmc[0].dev; } -static void __init omap_ldp_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(OMAP_LDP, "OMAP LDP board") .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap_ldp_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap_ldp_init_irq, .init_machine = omap_ldp_init, diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 2565ff08a221..a3e2b49aa39f 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -33,6 +33,8 @@ #include #include +#include "mux.h" + static int slot1_cover_open; static int slot2_cover_open; static struct device *mmc_device; @@ -649,8 +651,17 @@ static void __init n8x0_init_irq(void) omap_gpio_init(); } +#ifdef CONFIG_OMAP_MUX +static struct omap_board_mux board_mux[] __initdata = { + { .reg_offset = OMAP_MUX_TERMINATOR }, +}; +#else +#define board_mux NULL +#endif + static void __init n8x0_init_machine(void) { + omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC); /* FIXME: add n810 spi devices */ spi_register_board_info(n800_spi_board_info, ARRAY_SIZE(n800_spi_board_info)); diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 0ab0c26db4dd..87969c7df652 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -48,9 +48,6 @@ #include "mux.h" #include "hsmmc.h" -#define GPMC_CS0_BASE 0x60 -#define GPMC_CS_SIZE 0x30 - #define NAND_BLOCK_SIZE SZ_128K static struct mtd_partition omap3beagle_nand_partitions[] = { @@ -93,20 +90,6 @@ static struct omap_nand_platform_data omap3beagle_nand_data = { .dev_ready = NULL, }; -static struct resource omap3beagle_nand_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device omap3beagle_nand_device = { - .name = "omap2-nand", - .id = -1, - .dev = { - .platform_data = &omap3beagle_nand_data, - }, - .num_resources = 1, - .resource = &omap3beagle_nand_resource, -}; - /* DSS */ static int beagle_enable_dvi(struct omap_dss_device *dssdev) @@ -424,8 +407,6 @@ static void __init omap3beagle_flash_init(void) u8 cs = 0; u8 nandcs = GPMC_CS_NUM + 1; - u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; - /* find out the chip-select on which NAND exists */ while (cs < GPMC_CS_NUM) { u32 ret = 0; @@ -447,12 +428,9 @@ static void __init omap3beagle_flash_init(void) if (nandcs < GPMC_CS_NUM) { omap3beagle_nand_data.cs = nandcs; - omap3beagle_nand_data.gpmc_cs_baseaddr = (void *) - (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); - omap3beagle_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add); printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); - if (platform_device_register(&omap3beagle_nand_device) < 0) + if (gpmc_nand_init(&omap3beagle_nand_data) < 0) printk(KERN_ERR "Unable to register NAND device\n"); } } @@ -507,18 +485,12 @@ static void __init omap3_beagle_init(void) beagle_display_init(); } -static void __init omap3_beagle_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap3_beagle_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap3_beagle_init_irq, .init_machine = omap3_beagle_init, diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index a3d2e285e116..f76d9c0a47a1 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -514,14 +514,11 @@ static struct regulator_init_data omap3_evm_vdac = { }; /* VPLL2 for digital video outputs */ -static struct regulator_consumer_supply omap3_evm_vpll2_supply = { - .supply = "vdvi", - .dev = &omap3_evm_lcd_device.dev, -}; +static struct regulator_consumer_supply omap3_evm_vpll2_supply = + REGULATOR_SUPPLY("vdds_dsi", "omapdss"); static struct regulator_init_data omap3_evm_vpll2 = { .constraints = { - .name = "VDVI", .min_uV = 1800000, .max_uV = 1800000, .apply_uV = true, @@ -715,18 +712,12 @@ static void __init omap3_evm_init(void) omap3_evm_display_init(); } -static void __init omap3_evm_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(OMAP3EVM, "OMAP3 EVM") /* Maintainer: Syed Mohammed Khasim - Texas Instruments */ .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap3_evm_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap3_evm_init_irq, .init_machine = omap3_evm_init, diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index c0f4f12eba54..dd3af2be13be 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -25,10 +25,14 @@ #include #include #include +#include +#include +#include #include #include #include #include +#include #include #include @@ -41,15 +45,49 @@ #include #include #include +#include #include "mux.h" #include "sdram-micron-mt46h32m32lf-6.h" #include "hsmmc.h" +#define PANDORA_WIFI_IRQ_GPIO 21 +#define PANDORA_WIFI_NRESET_GPIO 23 #define OMAP3_PANDORA_TS_GPIO 94 -/* hardware debounce: (value + 1) * 31us */ -#define GPIO_DEBOUNCE_TIME 127 +#define NAND_BLOCK_SIZE SZ_128K + +static struct mtd_partition omap3pandora_nand_partitions[] = { + { + .name = "xloader", + .offset = 0, + .size = 4 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE + }, { + .name = "uboot", + .offset = MTDPART_OFS_APPEND, + .size = 15 * NAND_BLOCK_SIZE, + }, { + .name = "uboot-env", + .offset = MTDPART_OFS_APPEND, + .size = 1 * NAND_BLOCK_SIZE, + }, { + .name = "boot", + .offset = MTDPART_OFS_APPEND, + .size = 80 * NAND_BLOCK_SIZE, + }, { + .name = "rootfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct omap_nand_platform_data pandora_nand_data = { + .cs = 0, + .devsize = 1, /* '0' for 8-bit, '1' for 16-bit device */ + .parts = omap3pandora_nand_partitions, + .nr_parts = ARRAY_SIZE(omap3pandora_nand_partitions), +}; static struct gpio_led pandora_gpio_leds[] = { { @@ -88,6 +126,7 @@ static struct platform_device pandora_leds_gpio = { .type = ev_type, \ .code = ev_code, \ .active_low = act_low, \ + .debounce_interval = 4, \ .desc = "btn " descr, \ } @@ -99,14 +138,14 @@ static struct gpio_keys_button pandora_gpio_keys[] = { GPIO_BUTTON_LOW(103, KEY_DOWN, "down"), GPIO_BUTTON_LOW(96, KEY_LEFT, "left"), GPIO_BUTTON_LOW(98, KEY_RIGHT, "right"), - GPIO_BUTTON_LOW(109, KEY_KP1, "game 1"), - GPIO_BUTTON_LOW(111, KEY_KP2, "game 2"), - GPIO_BUTTON_LOW(106, KEY_KP3, "game 3"), - GPIO_BUTTON_LOW(101, KEY_KP4, "game 4"), - GPIO_BUTTON_LOW(102, BTN_TL, "l"), - GPIO_BUTTON_LOW(97, BTN_TL2, "l2"), - GPIO_BUTTON_LOW(105, BTN_TR, "r"), - GPIO_BUTTON_LOW(107, BTN_TR2, "r2"), + GPIO_BUTTON_LOW(109, KEY_PAGEUP, "game 1"), + GPIO_BUTTON_LOW(111, KEY_END, "game 2"), + GPIO_BUTTON_LOW(106, KEY_PAGEDOWN, "game 3"), + GPIO_BUTTON_LOW(101, KEY_HOME, "game 4"), + GPIO_BUTTON_LOW(102, KEY_RIGHTSHIFT, "l"), + GPIO_BUTTON_LOW(97, KEY_KPPLUS, "l2"), + GPIO_BUTTON_LOW(105, KEY_RIGHTCTRL, "r"), + GPIO_BUTTON_LOW(107, KEY_KPMINUS, "r2"), GPIO_BUTTON_LOW(104, KEY_LEFTCTRL, "ctrl"), GPIO_BUTTON_LOW(99, KEY_MENU, "menu"), GPIO_BUTTON_LOW(176, KEY_COFFEE, "hold"), @@ -127,14 +166,7 @@ static struct platform_device pandora_keys_gpio = { }, }; -static void __init pandora_keys_gpio_init(void) -{ - /* set debounce time for GPIO banks 4 and 6 */ - gpio_set_debounce(32 * 3, GPIO_DEBOUNCE_TIME); - gpio_set_debounce(32 * 5, GPIO_DEBOUNCE_TIME); -} - -static int board_keymap[] = { +static const uint32_t board_keymap[] = { /* row, col, code */ KEY(0, 0, KEY_9), KEY(0, 1, KEY_8), @@ -227,6 +259,20 @@ static struct platform_device pandora_dss_device = { }, }; +static void pandora_wl1251_init_card(struct mmc_card *card) +{ + /* + * We have TI wl1251 attached to MMC3. Pass this information to + * SDIO core because it can't be probed by normal methods. + */ + card->quirks |= MMC_QUIRK_NONSTD_SDIO; + card->cccr.wide_bus = 1; + card->cis.vendor = 0x104c; + card->cis.device = 0x9066; + card->cis.blksize = 512; + card->cis.max_dtr = 20000000; +} + static struct omap2_hsmmc_info omap3pandora_mmc[] = { { .mmc = 1, @@ -248,6 +294,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = { .wires = 4, .gpio_cd = -EINVAL, .gpio_wp = -EINVAL, + .init_card = pandora_wl1251_init_card, }, {} /* Terminator */ }; @@ -255,12 +302,33 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = { static int omap3pandora_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) { + int ret, gpio_32khz; + /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */ omap3pandora_mmc[0].gpio_cd = gpio + 0; omap3pandora_mmc[1].gpio_cd = gpio + 1; omap2_hsmmc_init(omap3pandora_mmc); + /* gpio + 13 drives 32kHz buffer for wifi module */ + gpio_32khz = gpio + 13; + ret = gpio_request(gpio_32khz, "wifi 32kHz"); + if (ret < 0) { + pr_err("Cannot get GPIO line %d, ret=%d\n", gpio_32khz, ret); + goto fail; + } + + ret = gpio_direction_output(gpio_32khz, 1); + if (ret < 0) { + pr_err("Cannot set GPIO line %d, ret=%d\n", gpio_32khz, ret); + goto fail_direction; + } + return 0; + +fail_direction: + gpio_free(gpio_32khz); +fail: + return -ENODEV; } static struct twl4030_gpio_platform_data omap3pandora_gpio_data = { @@ -539,10 +607,67 @@ static void __init omap3pandora_init_irq(void) omap_gpio_init(); } +static void pandora_wl1251_set_power(bool enable) +{ + /* + * Keep power always on until wl1251_sdio driver learns to re-init + * the chip after powering it down and back up. + */ +} + +static struct wl12xx_platform_data pandora_wl1251_pdata = { + .set_power = pandora_wl1251_set_power, + .use_eeprom = true, +}; + +static struct platform_device pandora_wl1251_data = { + .name = "wl1251_data", + .id = -1, + .dev = { + .platform_data = &pandora_wl1251_pdata, + }, +}; + +static void pandora_wl1251_init(void) +{ + int ret; + + ret = gpio_request(PANDORA_WIFI_IRQ_GPIO, "wl1251 irq"); + if (ret < 0) + goto fail; + + ret = gpio_direction_input(PANDORA_WIFI_IRQ_GPIO); + if (ret < 0) + goto fail_irq; + + pandora_wl1251_pdata.irq = gpio_to_irq(PANDORA_WIFI_IRQ_GPIO); + if (pandora_wl1251_pdata.irq < 0) + goto fail_irq; + + ret = gpio_request(PANDORA_WIFI_NRESET_GPIO, "wl1251 nreset"); + if (ret < 0) + goto fail_irq; + + /* start powered so that it probes with MMC subsystem */ + ret = gpio_direction_output(PANDORA_WIFI_NRESET_GPIO, 1); + if (ret < 0) + goto fail_nreset; + + return; + +fail_nreset: + gpio_free(PANDORA_WIFI_NRESET_GPIO); +fail_irq: + gpio_free(PANDORA_WIFI_IRQ_GPIO); +fail: + printk(KERN_ERR "wl1251 board initialisation failed\n"); +} + static struct platform_device *omap3pandora_devices[] __initdata = { &pandora_leds_gpio, &pandora_keys_gpio, &pandora_dss_device, + &pandora_wl1251_data, }; static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { @@ -575,6 +700,7 @@ static void __init omap3pandora_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); omap3pandora_i2c_init(); + pandora_wl1251_init(); platform_add_devices(omap3pandora_devices, ARRAY_SIZE(omap3pandora_devices)); omap_serial_init(); @@ -582,25 +708,19 @@ static void __init omap3pandora_init(void) ARRAY_SIZE(omap3pandora_spi_board_info)); omap3pandora_ads7846_init(); usb_ehci_init(&ehci_pdata); - pandora_keys_gpio_init(); usb_musb_init(&musb_board_data); + gpmc_nand_init(&pandora_nand_data); /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); } -static void __init omap3pandora_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap3pandora_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap3pandora_init_irq, .init_machine = omap3pandora_init, diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index a04cffd691c5..bcd01d278c65 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -652,18 +652,12 @@ static void __init omap3_stalker_init(void) omap_mux_init_signal("sdr_cke1", OMAP_PIN_OUTPUT); } -static void __init omap3_stalker_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(SBC3530, "OMAP3 STALKER") /* Maintainer: Jason Lam -lzg@ema-tech.com */ .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap3_stalker_map_io, + .map_io = omap3_map_io, .init_irq = omap3_stalker_init_irq, .init_machine = omap3_stalker_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index f05b867c5851..663c62d271e8 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -54,9 +54,6 @@ #include -#define GPMC_CS0_BASE 0x60 -#define GPMC_CS_SIZE 0x30 - #define NAND_BLOCK_SIZE SZ_128K #define OMAP3_AC_GPIO 136 @@ -106,20 +103,6 @@ static struct omap_nand_platform_data omap3touchbook_nand_data = { .dev_ready = NULL, }; -static struct resource omap3touchbook_nand_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device omap3touchbook_nand_device = { - .name = "omap2-nand", - .id = -1, - .dev = { - .platform_data = &omap3touchbook_nand_data, - }, - .num_resources = 1, - .resource = &omap3touchbook_nand_resource, -}; - #include "sdram-micron-mt46h32m32lf-6.h" static struct omap2_hsmmc_info mmc[] = { @@ -458,8 +441,6 @@ static void __init omap3touchbook_flash_init(void) u8 cs = 0; u8 nandcs = GPMC_CS_NUM + 1; - u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; - /* find out the chip-select on which NAND exists */ while (cs < GPMC_CS_NUM) { u32 ret = 0; @@ -481,13 +462,9 @@ static void __init omap3touchbook_flash_init(void) if (nandcs < GPMC_CS_NUM) { omap3touchbook_nand_data.cs = nandcs; - omap3touchbook_nand_data.gpmc_cs_baseaddr = (void *) - (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); - omap3touchbook_nand_data.gpmc_baseaddr = - (void *) (gpmc_base_add); printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); - if (platform_device_register(&omap3touchbook_nand_device) < 0) + if (gpmc_nand_init(&omap3touchbook_nand_data) < 0) printk(KERN_ERR "Unable to register NAND device\n"); } } @@ -559,18 +536,12 @@ static void __init omap3_touchbook_init(void) omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); } -static void __init omap3_touchbook_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") /* Maintainer: Gregoire Gentil - http://www.alwaysinnovating.com */ .phys_io = 0x48000000, .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap3_touchbook_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap3_touchbook_init_irq, .init_machine = omap3_touchbook_init, diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c new file mode 100644 index 000000000000..c03d1d56db56 --- /dev/null +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -0,0 +1,304 @@ +/* + * Board support file for OMAP4430 based PandaBoard. + * + * Copyright (C) 2010 Texas Instruments + * + * Author: David Anders + * + * Based on mach-omap2/board-4430sdp.c + * + * Author: Santosh Shilimkar + * + * Based on mach-omap2/board-3430sdp.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include "hsmmc.h" + + +static void __init omap4_panda_init_irq(void) +{ + omap2_init_common_hw(NULL, NULL); + gic_init_irq(); + omap_gpio_init(); +} + +static struct omap_musb_board_data musb_board_data = { + .interface_type = MUSB_INTERFACE_UTMI, + .mode = MUSB_PERIPHERAL, + .power = 100, +}; + +static struct omap2_hsmmc_info mmc[] = { + { + .mmc = 1, + .wires = 8, + .gpio_wp = -EINVAL, + }, + {} /* Terminator */ +}; + +static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { + { + .supply = "vmmc", + .dev_name = "mmci-omap-hs.0", + }, + { + .supply = "vmmc", + .dev_name = "mmci-omap-hs.1", + }, +}; + +static int omap4_twl6030_hsmmc_late_init(struct device *dev) +{ + int ret = 0; + struct platform_device *pdev = container_of(dev, + struct platform_device, dev); + struct omap_mmc_platform_data *pdata = dev->platform_data; + + /* Setting MMC1 Card detect Irq */ + if (pdev->id == 0) + pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE + + MMCDETECT_INTR_OFFSET; + return ret; +} + +static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev) +{ + struct omap_mmc_platform_data *pdata = dev->platform_data; + + pdata->init = omap4_twl6030_hsmmc_late_init; +} + +static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) +{ + struct omap2_hsmmc_info *c; + + omap2_hsmmc_init(controllers); + for (c = controllers; c->mmc; c++) + omap4_twl6030_hsmmc_set_late_init(c->dev); + + return 0; +} + +static struct regulator_init_data omap4_panda_vaux1 = { + .constraints = { + .min_uV = 1000000, + .max_uV = 3000000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_panda_vaux2 = { + .constraints = { + .min_uV = 1200000, + .max_uV = 2800000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_panda_vaux3 = { + .constraints = { + .min_uV = 1000000, + .max_uV = 3000000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +/* VMMC1 for MMC1 card */ +static struct regulator_init_data omap4_panda_vmmc = { + .constraints = { + .min_uV = 1200000, + .max_uV = 3000000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 2, + .consumer_supplies = omap4_panda_vmmc_supply, +}; + +static struct regulator_init_data omap4_panda_vpp = { + .constraints = { + .min_uV = 1800000, + .max_uV = 2500000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_panda_vusim = { + .constraints = { + .min_uV = 1200000, + .max_uV = 2900000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_panda_vana = { + .constraints = { + .min_uV = 2100000, + .max_uV = 2100000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_panda_vcxio = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_panda_vdac = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct regulator_init_data omap4_panda_vusb = { + .constraints = { + .min_uV = 3300000, + .max_uV = 3300000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, +}; + +static struct twl4030_platform_data omap4_panda_twldata = { + .irq_base = TWL6030_IRQ_BASE, + .irq_end = TWL6030_IRQ_END, + + /* Regulators */ + .vmmc = &omap4_panda_vmmc, + .vpp = &omap4_panda_vpp, + .vusim = &omap4_panda_vusim, + .vana = &omap4_panda_vana, + .vcxio = &omap4_panda_vcxio, + .vdac = &omap4_panda_vdac, + .vusb = &omap4_panda_vusb, + .vaux1 = &omap4_panda_vaux1, + .vaux2 = &omap4_panda_vaux2, + .vaux3 = &omap4_panda_vaux3, +}; + +static struct i2c_board_info __initdata omap4_panda_i2c_boardinfo[] = { + { + I2C_BOARD_INFO("twl6030", 0x48), + .flags = I2C_CLIENT_WAKE, + .irq = OMAP44XX_IRQ_SYS_1N, + .platform_data = &omap4_panda_twldata, + }, +}; +static int __init omap4_panda_i2c_init(void) +{ + /* + * Phoenix Audio IC needs I2C1 to + * start with 400 KHz or less + */ + omap_register_i2c_bus(1, 400, omap4_panda_i2c_boardinfo, + ARRAY_SIZE(omap4_panda_i2c_boardinfo)); + omap_register_i2c_bus(2, 400, NULL, 0); + omap_register_i2c_bus(3, 400, NULL, 0); + omap_register_i2c_bus(4, 400, NULL, 0); + return 0; +} +static void __init omap4_panda_init(void) +{ + int status; + + omap4_panda_i2c_init(); + omap_serial_init(); + omap4_twl6030_hsmmc_init(mmc); + /* OMAP4 Panda uses internal transceiver so register nop transceiver */ + usb_nop_xceiv_register(); + /* FIXME: allow multi-omap to boot until musb is updated for omap4 */ + if (!cpu_is_omap44xx()) + usb_musb_init(&musb_board_data); +} + +static void __init omap4_panda_map_io(void) +{ + omap2_set_globals_443x(); + omap44xx_map_common_io(); +} + +MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") + /* Maintainer: David Anders - Texas Instruments Inc */ + .phys_io = 0x48000000, + .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = omap4_panda_map_io, + .init_irq = omap4_panda_init_irq, + .init_machine = omap4_panda_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 87acb2f198ec..4c4843618350 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -58,8 +58,6 @@ #define OVERO_GPIO_USBH_NRESET 183 #define NAND_BLOCK_SIZE SZ_128K -#define GPMC_CS0_BASE 0x60 -#define GPMC_CS_SIZE 0x30 #define OVERO_SMSC911X_CS 5 #define OVERO_SMSC911X_GPIO 176 @@ -166,9 +164,26 @@ static struct platform_device overo_smsc911x_device = { }, }; +static struct platform_device overo_smsc911x2_device = { + .name = "smsc911x", + .id = 1, + .num_resources = ARRAY_SIZE(overo_smsc911x2_resources), + .resource = overo_smsc911x2_resources, + .dev = { + .platform_data = &overo_smsc911x_config, + }, +}; + +static struct platform_device *smsc911x_devices[] = { + &overo_smsc911x_device, + &overo_smsc911x2_device, +}; + static inline void __init overo_init_smsc911x(void) { - unsigned long cs_mem_base; + unsigned long cs_mem_base, cs_mem_base2; + + /* set up first smsc911x chip */ if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) { printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n"); @@ -189,7 +204,28 @@ static inline void __init overo_init_smsc911x(void) overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO); overo_smsc911x_resources[1].end = 0; - platform_device_register(&overo_smsc911x_device); + /* set up second smsc911x chip */ + + if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) { + printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n"); + return; + } + + overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0; + overo_smsc911x2_resources[0].end = cs_mem_base2 + 0xff; + + if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) && + (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) { + gpio_export(OVERO_SMSC911X2_GPIO, 0); + } else { + printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n"); + return; + } + + overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO); + overo_smsc911x2_resources[1].end = 0; + + platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices)); } #else @@ -231,28 +267,11 @@ static struct omap_nand_platform_data overo_nand_data = { .dma_channel = -1, /* disable DMA in OMAP NAND driver */ }; -static struct resource overo_nand_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device overo_nand_device = { - .name = "omap2-nand", - .id = -1, - .dev = { - .platform_data = &overo_nand_data, - }, - .num_resources = 1, - .resource = &overo_nand_resource, -}; - - static void __init overo_flash_init(void) { u8 cs = 0; u8 nandcs = GPMC_CS_NUM + 1; - u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; - /* find out the chip-select on which NAND exists */ while (cs < GPMC_CS_NUM) { u32 ret = 0; @@ -274,12 +293,9 @@ static void __init overo_flash_init(void) if (nandcs < GPMC_CS_NUM) { overo_nand_data.cs = nandcs; - overo_nand_data.gpmc_cs_baseaddr = (void *) - (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); - overo_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add); printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); - if (platform_device_register(&overo_nand_device) < 0) + if (gpmc_nand_init(&overo_nand_data) < 0) printk(KERN_ERR "Unable to register NAND device\n"); } } @@ -484,17 +500,11 @@ static void __init overo_init(void) "OVERO_GPIO_USBH_CPEN\n"); } -static void __init overo_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(OVERO, "Gumstix Overo") .phys_io = 0x48000000, .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = overo_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = overo_init_irq, .init_machine = overo_init, diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 03483920ed6e..9a5eb87425fc 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -25,7 +25,6 @@ #include #include -#include #include #include #include @@ -33,6 +32,11 @@ #include #include +#include +#include + +#include <../drivers/staging/iio/light/tsl2563.h> + #include "mux.h" #include "hsmmc.h" @@ -51,6 +55,12 @@ enum { static struct wl12xx_platform_data wl1251_pdata; +#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) +static struct tsl2563_platform_data rx51_tsl2563_platform_data = { + .cover_comp_gain = 16, +}; +#endif + static struct omap2_mcspi_device_config wl1251_mcspi_config = { .turbo_mode = 0, .single_channel = 1, @@ -311,48 +321,29 @@ static struct omap2_hsmmc_info mmc[] __initdata = { {} /* Terminator */ }; -static struct regulator_consumer_supply rx51_vmmc1_supply = { - .supply = "vmmc", - .dev_name = "mmci-omap-hs.0", -}; +static struct regulator_consumer_supply rx51_vmmc1_supply = + REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0"); -static struct regulator_consumer_supply rx51_vaux3_supply = { - .supply = "vmmc", - .dev_name = "mmci-omap-hs.1", -}; +static struct regulator_consumer_supply rx51_vaux3_supply = + REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"); -static struct regulator_consumer_supply rx51_vsim_supply = { - .supply = "vmmc_aux", - .dev_name = "mmci-omap-hs.1", -}; +static struct regulator_consumer_supply rx51_vsim_supply = + REGULATOR_SUPPLY("vmmc_aux", "mmci-omap-hs.1"); static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { /* tlv320aic3x analog supplies */ - { - .supply = "AVDD", - .dev_name = "2-0018", - }, - { - .supply = "DRVDD", - .dev_name = "2-0018", - }, + REGULATOR_SUPPLY("AVDD", "2-0018"), + REGULATOR_SUPPLY("DRVDD", "2-0018"), + /* tpa6130a2 */ + REGULATOR_SUPPLY("Vdd", "2-0060"), /* Keep vmmc as last item. It is not iterated for newer boards */ - { - .supply = "vmmc", - .dev_name = "mmci-omap-hs.1", - }, + REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"), }; static struct regulator_consumer_supply rx51_vio_supplies[] = { /* tlv320aic3x digital supplies */ - { - .supply = "IOVDD", - .dev_name = "2-0018" - }, - { - .supply = "DVDD", - .dev_name = "2-0018" - }, + REGULATOR_SUPPLY("IOVDD", "2-0018"), + REGULATOR_SUPPLY("DVDD", "2-0018"), }; #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) @@ -373,6 +364,7 @@ static struct regulator_init_data rx51_vaux1 = { .name = "V28", .min_uV = 2800000, .max_uV = 2800000, + .always_on = true, /* due battery cover sensor */ .valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY, .valid_ops_mask = REGULATOR_CHANGE_MODE @@ -718,6 +710,15 @@ static struct twl4030_platform_data rx51_twldata __initdata = { .vio = &rx51_vio, }; +static struct aic3x_pdata rx51_aic3x_data __initdata = { + .gpio_reset = 60, +}; + +static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata = { + .id = TPA6130A2, + .power_gpio = 98, +}; + static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { { I2C_BOARD_INFO("twl5030", 0x48), @@ -730,7 +731,18 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { { I2C_BOARD_INFO("tlv320aic3x", 0x18), + .platform_data = &rx51_aic3x_data, }, +#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) + { + I2C_BOARD_INFO("tsl2563", 0x29), + .platform_data = &rx51_tsl2563_platform_data, + }, +#endif + { + I2C_BOARD_INFO("tpa6130a2", 0x60), + .platform_data = &rx51_tpa6130a2_data, + } }; static int __init rx51_i2c_init(void) diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c index b743a4f42649..5a1005ba9815 100644 --- a/arch/arm/mach-omap2/board-rx51-video.c +++ b/arch/arm/mach-omap2/board-rx51-video.c @@ -16,7 +16,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 3bd956f9e19f..a58e8cb1a7fc 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -143,7 +143,7 @@ static void __init rx51_init(void) static void __init rx51_map_io(void) { - omap2_set_globals_343x(); + omap2_set_globals_3xxx(); rx51_video_mem_init(); omap34xx_map_common_io(); } diff --git a/arch/arm/mach-omap2/board-sdp-flash.c b/arch/arm/mach-omap2/board-sdp-flash.c deleted file mode 100644 index 2d026328e385..000000000000 --- a/arch/arm/mach-omap2/board-sdp-flash.c +++ /dev/null @@ -1,272 +0,0 @@ -/* - * board-sdp-flash.c - * Modified from mach-omap2/board-3430sdp-flash.c - * - * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2009 Texas Instruments - * - * Vimal Singh - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#define REG_FPGA_REV 0x10 -#define REG_FPGA_DIP_SWITCH_INPUT2 0x60 -#define MAX_SUPPORTED_GPMC_CONFIG 3 - -#define DEBUG_BASE 0x08000000 /* debug board */ - -#define PDC_NOR 1 -#define PDC_NAND 2 -#define PDC_ONENAND 3 -#define DBG_MPDB 4 - -/* various memory sizes */ -#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */ -#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */ - -/* - * SDP3430 V2 Board CS organization - * Different from SDP3430 V1. Now 4 switches used to specify CS - * - * See also the Switch S8 settings in the comments. - * - * REVISIT: Add support for 2430 SDP - */ -static const unsigned char chip_sel_sdp[][GPMC_CS_NUM] = { - {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ - {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ - {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ -}; - -static struct physmap_flash_data sdp_nor_data = { - .width = 2, -}; - -static struct resource sdp_nor_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device sdp_nor_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &sdp_nor_data, - }, - .num_resources = 1, - .resource = &sdp_nor_resource, -}; - -static void -__init board_nor_init(struct flash_partitions sdp_nor_parts, u8 cs) -{ - int err; - - sdp_nor_data.parts = sdp_nor_parts.parts; - sdp_nor_data.nr_parts = sdp_nor_parts.nr_parts; - - /* Configure start address and size of NOR device */ - if (omap_rev() >= OMAP3430_REV_ES1_0) { - err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1, - (unsigned long *)&sdp_nor_resource.start); - sdp_nor_resource.end = sdp_nor_resource.start - + FLASH_SIZE_SDPV2 - 1; - } else { - err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1, - (unsigned long *)&sdp_nor_resource.start); - sdp_nor_resource.end = sdp_nor_resource.start - + FLASH_SIZE_SDPV1 - 1; - } - if (err < 0) { - printk(KERN_ERR "NOR: Can't request GPMC CS\n"); - return; - } - if (platform_device_register(&sdp_nor_device) < 0) - printk(KERN_ERR "Unable to register NOR device\n"); -} - -#if defined(CONFIG_MTD_ONENAND_OMAP2) || \ - defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) -static struct omap_onenand_platform_data board_onenand_data = { - .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */ -}; - -static void -__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs) -{ - board_onenand_data.cs = cs; - board_onenand_data.parts = sdp_onenand_parts.parts; - board_onenand_data.nr_parts = sdp_onenand_parts.nr_parts; - - gpmc_onenand_init(&board_onenand_data); -} -#else -static void -__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs) -{ -} -#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */ - -#if defined(CONFIG_MTD_NAND_OMAP2) || \ - defined(CONFIG_MTD_NAND_OMAP2_MODULE) - -/* Note that all values in this struct are in nanoseconds */ -static struct gpmc_timings nand_timings = { - - .sync_clk = 0, - - .cs_on = 0, - .cs_rd_off = 36, - .cs_wr_off = 36, - - .adv_on = 6, - .adv_rd_off = 24, - .adv_wr_off = 36, - - .we_off = 30, - .oe_off = 48, - - .access = 54, - .rd_cycle = 72, - .wr_cycle = 72, - - .wr_access = 30, - .wr_data_mux_bus = 0, -}; - -static struct omap_nand_platform_data sdp_nand_data = { - .nand_setup = NULL, - .gpmc_t = &nand_timings, - .dma_channel = -1, /* disable DMA in OMAP NAND driver */ - .dev_ready = NULL, - .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */ -}; - -static void -__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs) -{ - sdp_nand_data.cs = cs; - sdp_nand_data.parts = sdp_nand_parts.parts; - sdp_nand_data.nr_parts = sdp_nand_parts.nr_parts; - - sdp_nand_data.gpmc_cs_baseaddr = (void *)(OMAP34XX_GPMC_VIRT + - GPMC_CS0_BASE + - cs * GPMC_CS_SIZE); - sdp_nand_data.gpmc_baseaddr = (void *) (OMAP34XX_GPMC_VIRT); - - gpmc_nand_init(&sdp_nand_data); -} -#else -static void -__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs) -{ -} -#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ - -/** - * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get - * the various cs values. - */ -static u8 get_gpmc0_type(void) -{ - u8 cs = 0; - void __iomem *fpga_map_addr; - - fpga_map_addr = ioremap(DEBUG_BASE, 4096); - if (!fpga_map_addr) - return -ENOMEM; - - if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV))) - /* we dont have an DEBUG FPGA??? */ - /* Depend on #defines!! default to strata boot return param */ - goto unmap; - - /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */ - cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf; - - /* ES2.0 SDP's onwards 4 dip switches are provided for CS */ - if (omap_rev() >= OMAP3430_REV_ES1_0) - /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */ - cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) | - ((cs & 2) << 1) | ((cs & 1) << 3); - else - /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */ - cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2); -unmap: - iounmap(fpga_map_addr); - return cs; -} - -/** - * sdp3430_flash_init - Identify devices connected to GPMC and register. - * - * @return - void. - */ -void __init sdp_flash_init(struct flash_partitions sdp_partition_info[]) -{ - u8 cs = 0; - u8 norcs = GPMC_CS_NUM + 1; - u8 nandcs = GPMC_CS_NUM + 1; - u8 onenandcs = GPMC_CS_NUM + 1; - u8 idx; - unsigned char *config_sel = NULL; - - /* REVISIT: Is this return correct idx for 2430 SDP? - * for which cs configuration matches for 2430 SDP? - */ - idx = get_gpmc0_type(); - if (idx >= MAX_SUPPORTED_GPMC_CONFIG) { - printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs); - return; - } - config_sel = (unsigned char *)(chip_sel_sdp[idx]); - - while (cs < GPMC_CS_NUM) { - switch (config_sel[cs]) { - case PDC_NOR: - if (norcs > GPMC_CS_NUM) - norcs = cs; - break; - case PDC_NAND: - if (nandcs > GPMC_CS_NUM) - nandcs = cs; - break; - case PDC_ONENAND: - if (onenandcs > GPMC_CS_NUM) - onenandcs = cs; - break; - }; - cs++; - } - - if (norcs > GPMC_CS_NUM) - printk(KERN_INFO "NOR: Unable to find configuration " - "in GPMC\n"); - else - board_nor_init(sdp_partition_info[0], norcs); - - if (onenandcs > GPMC_CS_NUM) - printk(KERN_INFO "OneNAND: Unable to find configuration " - "in GPMC\n"); - else - board_onenand_init(sdp_partition_info[1], onenandcs); - - if (nandcs > GPMC_CS_NUM) - printk(KERN_INFO "NAND: Unable to find configuration " - "in GPMC\n"); - else - board_nand_init(sdp_partition_info[2], nandcs); -} diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index ffe188cb18e9..3ad9ecf7f5e2 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -71,30 +71,80 @@ static struct twl4030_platform_data zoom2_twldata = { #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { + /* WLAN IRQ - GPIO 162 */ + OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), + /* WLAN POWER ENABLE - GPIO 101 */ + OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), + /* WLAN SDIO: MMC3 CMD */ + OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP), + /* WLAN SDIO: MMC3 CLK */ + OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), + /* WLAN SDIO: MMC3 DAT[0-3] */ + OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), + OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), + OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), + OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), { .reg_offset = OMAP_MUX_TERMINATOR }, }; #else #define board_mux NULL #endif +static struct mtd_partition zoom_nand_partitions[] = { + /* All the partition sizes are listed in terms of NAND block size */ + { + .name = "X-Loader-NAND", + .offset = 0, + .size = 4 * (64 * 2048), /* 512KB, 0x80000 */ + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ + .size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */ + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "Boot Env-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ + .size = 2 * (64 * 2048), /* 256KB, 0x40000 */ + }, + { + .name = "Kernel-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/ + .size = 240 * (64 * 2048), /* 30M, 0x1E00000 */ + }, + { + .name = "system", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */ + .size = 3328 * (64 * 2048), /* 416M, 0x1A000000 */ + }, + { + .name = "userdata", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x1C000000*/ + .size = 256 * (64 * 2048), /* 32M, 0x2000000 */ + }, + { + .name = "cache", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x1E000000*/ + .size = 256 * (64 * 2048), /* 32M, 0x2000000 */ + }, +}; + static void __init omap_zoom2_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); zoom_peripherals_init(); + board_nand_init(zoom_nand_partitions, + ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS); zoom_debugboard_init(); } -static void __init omap_zoom2_map_io(void) -{ - omap2_set_globals_343x(); - omap34xx_map_common_io(); -} - MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") .phys_io = ZOOM_UART_BASE, .io_pg_offst = (ZOOM_UART_VIRT >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap_zoom2_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap_zoom2_init_irq, .init_machine = omap_zoom2_init, diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c index 5b605eba3e7b..6ca0b8341615 100644 --- a/arch/arm/mach-omap2/board-zoom3.c +++ b/arch/arm/mach-omap2/board-zoom3.c @@ -25,15 +25,50 @@ #include "mux.h" #include "sdram-hynix-h8mbx00u0mer-0em.h" -static void __init omap_zoom_map_io(void) -{ - omap2_set_globals_36xx(); - omap34xx_map_common_io(); -} - static struct omap_board_config_kernel zoom_config[] __initdata = { }; +static struct mtd_partition zoom_nand_partitions[] = { + /* All the partition sizes are listed in terms of NAND block size */ + { + .name = "X-Loader-NAND", + .offset = 0, + .size = 4 * (64 * 2048), /* 512KB, 0x80000 */ + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ + .size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */ + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "Boot Env-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ + .size = 2 * (64 * 2048), /* 256KB, 0x40000 */ + }, + { + .name = "Kernel-NAND", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/ + .size = 240 * (64 * 2048), /* 30M, 0x1E00000 */ + }, + { + .name = "system", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */ + .size = 3328 * (64 * 2048), /* 416M, 0x1A000000 */ + }, + { + .name = "userdata", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x1C000000*/ + .size = 256 * (64 * 2048), /* 32M, 0x2000000 */ + }, + { + .name = "cache", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x1E000000*/ + .size = 256 * (64 * 2048), /* 32M, 0x2000000 */ + }, +}; + static void __init omap_zoom_init_irq(void) { omap_board_config = zoom_config; @@ -46,6 +81,19 @@ static void __init omap_zoom_init_irq(void) #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { + /* WLAN IRQ - GPIO 162 */ + OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), + /* WLAN POWER ENABLE - GPIO 101 */ + OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), + /* WLAN SDIO: MMC3 CMD */ + OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP), + /* WLAN SDIO: MMC3 CLK */ + OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), + /* WLAN SDIO: MMC3 DAT[0-3] */ + OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), + OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), + OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), + OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), { .reg_offset = OMAP_MUX_TERMINATOR }, }; #else @@ -66,6 +114,8 @@ static void __init omap_zoom_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); zoom_peripherals_init(); + board_nand_init(zoom_nand_partitions, + ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS); zoom_debugboard_init(); omap_mux_init_gpio(64, OMAP_PIN_OUTPUT); @@ -76,7 +126,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") .phys_io = ZOOM_UART_BASE, .io_pg_offst = (ZOOM_UART_VIRT >> 18) & 0xfffc, .boot_params = 0x80000100, - .map_io = omap_zoom_map_io, + .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap_zoom_init_irq, .init_machine = omap_zoom_init, diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index d33744117ce2..138646deac89 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -1408,7 +1408,7 @@ static struct clk ts_fck = { static struct clk usbtll_fck = { .name = "usbtll_fck", - .ops = &clkops_omap2_dflt, + .ops = &clkops_omap2_dflt_wait, .parent = &dpll5_m2_ck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, diff --git a/arch/arm/mach-omap2/cm.c b/arch/arm/mach-omap2/cm.c index 2d83565d2be2..721c3b66740a 100644 --- a/arch/arm/mach-omap2/cm.c +++ b/arch/arm/mach-omap2/cm.c @@ -50,15 +50,15 @@ int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) cm_idlest_reg = cm_idlest_offs[idlest_id - 1]; + mask = 1 << idlest_shift; + if (cpu_is_omap24xx()) - ena = idlest_shift; + ena = mask; else if (cpu_is_omap34xx()) ena = 0; else BUG(); - mask = 1 << idlest_shift; - /* XXX should be OMAP2 CM */ omap_test_timeout(((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena), MAX_MODULE_READY_TIME, i); diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 03e6c9ed82a4..2dbb265bedd4 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include @@ -153,10 +152,12 @@ static struct resource omap2_mbox_resources[] = { { .start = INT_24XX_MAIL_U0_MPU, .flags = IORESOURCE_IRQ, + .name = "dsp", }, { .start = INT_24XX_MAIL_U3_MPU, .flags = IORESOURCE_IRQ, + .name = "iva", }, }; static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources); @@ -175,6 +176,7 @@ static struct resource omap3_mbox_resources[] = { { .start = INT_24XX_MAIL_U0_MPU, .flags = IORESOURCE_IRQ, + .name = "dsp", }, }; static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources); @@ -196,6 +198,7 @@ static struct resource omap4_mbox_resources[] = { { .start = OMAP44XX_IRQ_MAIL_U0, .flags = IORESOURCE_IRQ, + .name = "mbox", }, }; static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources); @@ -205,7 +208,7 @@ static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources); #endif static struct platform_device mbox_device = { - .name = "omap2-mailbox", + .name = "omap-mailbox", .id = -1, }; @@ -230,64 +233,7 @@ static inline void omap_init_mbox(void) static inline void omap_init_mbox(void) { } #endif /* CONFIG_OMAP_MBOX_FWK */ -#if defined(CONFIG_OMAP_STI) - -#if defined(CONFIG_ARCH_OMAP2) - -#define OMAP2_STI_BASE 0x48068000 -#define OMAP2_STI_CHANNEL_BASE 0x54000000 -#define OMAP2_STI_IRQ 4 - -static struct resource sti_resources[] = { - { - .start = OMAP2_STI_BASE, - .end = OMAP2_STI_BASE + 0x7ff, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP2_STI_CHANNEL_BASE, - .end = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP2_STI_IRQ, - .flags = IORESOURCE_IRQ, - } -}; -#elif defined(CONFIG_ARCH_OMAP3) - -#define OMAP3_SDTI_BASE 0x54500000 -#define OMAP3_SDTI_CHANNEL_BASE 0x54600000 - -static struct resource sti_resources[] = { - { - .start = OMAP3_SDTI_BASE, - .end = OMAP3_SDTI_BASE + 0xFFF, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3_SDTI_CHANNEL_BASE, - .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1, - .flags = IORESOURCE_MEM, - } -}; - -#endif - -static struct platform_device sti_device = { - .name = "sti", - .id = -1, - .num_resources = ARRAY_SIZE(sti_resources), - .resource = sti_resources, -}; - -static inline void omap_init_sti(void) -{ - platform_device_register(&sti_device); -} -#else static inline void omap_init_sti(void) {} -#endif #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) @@ -672,19 +618,19 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, OMAP_PIN_INPUT_PULLUP); if (cpu_is_omap2420() && controller_nr == 0) { - omap_cfg_reg(H18_24XX_MMC_CMD); - omap_cfg_reg(H15_24XX_MMC_CLKI); - omap_cfg_reg(G19_24XX_MMC_CLKO); - omap_cfg_reg(F20_24XX_MMC_DAT0); - omap_cfg_reg(F19_24XX_MMC_DAT_DIR0); - omap_cfg_reg(G18_24XX_MMC_CMD_DIR); + omap_mux_init_signal("sdmmc_cmd", 0); + omap_mux_init_signal("sdmmc_clki", 0); + omap_mux_init_signal("sdmmc_clko", 0); + omap_mux_init_signal("sdmmc_dat0", 0); + omap_mux_init_signal("sdmmc_dat_dir0", 0); + omap_mux_init_signal("sdmmc_cmd_dir", 0); if (mmc_controller->slots[0].wires == 4) { - omap_cfg_reg(H14_24XX_MMC_DAT1); - omap_cfg_reg(E19_24XX_MMC_DAT2); - omap_cfg_reg(D19_24XX_MMC_DAT3); - omap_cfg_reg(E20_24XX_MMC_DAT_DIR1); - omap_cfg_reg(F18_24XX_MMC_DAT_DIR2); - omap_cfg_reg(E18_24XX_MMC_DAT_DIR3); + omap_mux_init_signal("sdmmc_dat1", 0); + omap_mux_init_signal("sdmmc_dat2", 0); + omap_mux_init_signal("sdmmc_dat3", 0); + omap_mux_init_signal("sdmmc_dat_dir1", 0); + omap_mux_init_signal("sdmmc_dat_dir2", 0); + omap_mux_init_signal("sdmmc_dat_dir3", 0); } /* diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index b32ccd954a1b..ed8d330522f1 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -463,7 +463,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) } if (!ret) { /* - * Switch the parent clock in the heirarchy, and make sure + * Switch the parent clock in the hierarchy, and make sure * that the new parent's usecount is correct. Note: we * enable the new parent before disabling the old to avoid * any unnecessary hardware disable->enable transitions. diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index e57fb29ff855..722209601927 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -19,8 +19,6 @@ #include #include -#define WR_RD_PIN_MONITORING 0x00600000 - static struct omap_nand_platform_data *gpmc_nand_data; static struct resource gpmc_nand_resource = { @@ -71,10 +69,10 @@ static int omap2_nand_gpmc_retime(void) t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle); /* Configure GPMC */ - gpmc_cs_write_reg(gpmc_nand_data->cs, GPMC_CS_CONFIG1, - GPMC_CONFIG1_DEVICESIZE(gpmc_nand_data->devsize) | - GPMC_CONFIG1_DEVICETYPE_NAND); - + gpmc_cs_configure(gpmc_nand_data->cs, + GPMC_CONFIG_DEV_SIZE, gpmc_nand_data->devsize); + gpmc_cs_configure(gpmc_nand_data->cs, + GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND); err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); if (err) return err; @@ -82,27 +80,13 @@ static int omap2_nand_gpmc_retime(void) return 0; } -static int gpmc_nand_setup(void) -{ - struct device *dev = &gpmc_nand_device.dev; - - /* Set timings in GPMC */ - if (omap2_nand_gpmc_retime() < 0) { - dev_err(dev, "Unable to set gpmc timings\n"); - return -EINVAL; - } - - return 0; -} - int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) { - unsigned int val; int err = 0; struct device *dev = &gpmc_nand_device.dev; gpmc_nand_data = _nand_data; - gpmc_nand_data->nand_setup = gpmc_nand_setup; + gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime; gpmc_nand_device.dev.platform_data = gpmc_nand_data; err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, @@ -112,19 +96,16 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) return err; } - err = gpmc_nand_setup(); + /* Set timings in GPMC */ + err = omap2_nand_gpmc_retime(); if (err < 0) { - dev_err(dev, "NAND platform setup failed: %d\n", err); + dev_err(dev, "Unable to set gpmc timings: %d\n", err); return err; } /* Enable RD PIN Monitoring Reg */ if (gpmc_nand_data->dev_ready) { - val = gpmc_cs_read_reg(gpmc_nand_data->cs, - GPMC_CS_CONFIG1); - val |= WR_RD_PIN_MONITORING; - gpmc_cs_write_reg(gpmc_nand_data->cs, - GPMC_CS_CONFIG1, val); + gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1); } err = platform_device_register(&gpmc_nand_device); diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 5bc3ca03551c..f46933bc9373 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -46,8 +46,9 @@ #define GPMC_ECC_CONFIG 0x1f4 #define GPMC_ECC_CONTROL 0x1f8 #define GPMC_ECC_SIZE_CONFIG 0x1fc +#define GPMC_ECC1_RESULT 0x200 -#define GPMC_CS0 0x60 +#define GPMC_CS0_OFFSET 0x60 #define GPMC_CS_SIZE 0x30 #define GPMC_MEM_START 0x00000000 @@ -92,7 +93,8 @@ struct omap3_gpmc_regs { static struct resource gpmc_mem_root; static struct resource gpmc_cs_mem[GPMC_CS_NUM]; static DEFINE_SPINLOCK(gpmc_mem_lock); -static unsigned gpmc_cs_map; +static unsigned int gpmc_cs_map; /* flag for cs which are initialized */ +static int gpmc_ecc_used = -EINVAL; /* cs using ecc engine */ static void __iomem *gpmc_base; @@ -108,11 +110,27 @@ static u32 gpmc_read_reg(int idx) return __raw_readl(gpmc_base + idx); } +static void gpmc_cs_write_byte(int cs, int idx, u8 val) +{ + void __iomem *reg_addr; + + reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; + __raw_writeb(val, reg_addr); +} + +static u8 gpmc_cs_read_byte(int cs, int idx) +{ + void __iomem *reg_addr; + + reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; + return __raw_readb(reg_addr); +} + void gpmc_cs_write_reg(int cs, int idx, u32 val) { void __iomem *reg_addr; - reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx; + reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; __raw_writel(val, reg_addr); } @@ -120,7 +138,7 @@ u32 gpmc_cs_read_reg(int cs, int idx) { void __iomem *reg_addr; - reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx; + reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; return __raw_readl(reg_addr); } @@ -418,9 +436,158 @@ void gpmc_cs_free(int cs) } EXPORT_SYMBOL(gpmc_cs_free); +/** + * gpmc_read_status - read access request to get the different gpmc status + * @cmd: command type + * @return status + */ +int gpmc_read_status(int cmd) +{ + int status = -EINVAL; + u32 regval = 0; + + switch (cmd) { + case GPMC_GET_IRQ_STATUS: + status = gpmc_read_reg(GPMC_IRQSTATUS); + break; + + case GPMC_PREFETCH_FIFO_CNT: + regval = gpmc_read_reg(GPMC_PREFETCH_STATUS); + status = GPMC_PREFETCH_STATUS_FIFO_CNT(regval); + break; + + case GPMC_PREFETCH_COUNT: + regval = gpmc_read_reg(GPMC_PREFETCH_STATUS); + status = GPMC_PREFETCH_STATUS_COUNT(regval); + break; + + case GPMC_STATUS_BUFFER: + regval = gpmc_read_reg(GPMC_STATUS); + /* 1 : buffer is available to write */ + status = regval & GPMC_STATUS_BUFF_EMPTY; + break; + + default: + printk(KERN_ERR "gpmc_read_status: Not supported\n"); + } + return status; +} +EXPORT_SYMBOL(gpmc_read_status); + +/** + * gpmc_cs_configure - write request to configure gpmc + * @cs: chip select number + * @cmd: command type + * @wval: value to write + * @return status of the operation + */ +int gpmc_cs_configure(int cs, int cmd, int wval) +{ + int err = 0; + u32 regval = 0; + + switch (cmd) { + case GPMC_SET_IRQ_STATUS: + gpmc_write_reg(GPMC_IRQSTATUS, wval); + break; + + case GPMC_CONFIG_WP: + regval = gpmc_read_reg(GPMC_CONFIG); + if (wval) + regval &= ~GPMC_CONFIG_WRITEPROTECT; /* WP is ON */ + else + regval |= GPMC_CONFIG_WRITEPROTECT; /* WP is OFF */ + gpmc_write_reg(GPMC_CONFIG, regval); + break; + + case GPMC_CONFIG_RDY_BSY: + regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + if (wval) + regval |= WR_RD_PIN_MONITORING; + else + regval &= ~WR_RD_PIN_MONITORING; + gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); + break; + + case GPMC_CONFIG_DEV_SIZE: + regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + regval |= GPMC_CONFIG1_DEVICESIZE(wval); + gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); + break; + + case GPMC_CONFIG_DEV_TYPE: + regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + regval |= GPMC_CONFIG1_DEVICETYPE(wval); + if (wval == GPMC_DEVICETYPE_NOR) + regval |= GPMC_CONFIG1_MUXADDDATA; + gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); + break; + + default: + printk(KERN_ERR "gpmc_configure_cs: Not supported\n"); + err = -EINVAL; + } + + return err; +} +EXPORT_SYMBOL(gpmc_cs_configure); + +/** + * gpmc_nand_read - nand specific read access request + * @cs: chip select number + * @cmd: command type + */ +int gpmc_nand_read(int cs, int cmd) +{ + int rval = -EINVAL; + + switch (cmd) { + case GPMC_NAND_DATA: + rval = gpmc_cs_read_byte(cs, GPMC_CS_NAND_DATA); + break; + + default: + printk(KERN_ERR "gpmc_read_nand_ctrl: Not supported\n"); + } + return rval; +} +EXPORT_SYMBOL(gpmc_nand_read); + +/** + * gpmc_nand_write - nand specific write request + * @cs: chip select number + * @cmd: command type + * @wval: value to write + */ +int gpmc_nand_write(int cs, int cmd, int wval) +{ + int err = 0; + + switch (cmd) { + case GPMC_NAND_COMMAND: + gpmc_cs_write_byte(cs, GPMC_CS_NAND_COMMAND, wval); + break; + + case GPMC_NAND_ADDRESS: + gpmc_cs_write_byte(cs, GPMC_CS_NAND_ADDRESS, wval); + break; + + case GPMC_NAND_DATA: + gpmc_cs_write_byte(cs, GPMC_CS_NAND_DATA, wval); + + default: + printk(KERN_ERR "gpmc_write_nand_ctrl: Not supported\n"); + err = -EINVAL; + } + return err; +} +EXPORT_SYMBOL(gpmc_nand_write); + + + /** * gpmc_prefetch_enable - configures and starts prefetch transfer - * @cs: nand cs (chip select) number + * @cs: cs (chip select) number * @dma_mode: dma mode enable (1) or disable (0) * @u32_count: number of bytes to be transferred * @is_write: prefetch read(0) or write post(1) mode @@ -428,7 +595,6 @@ EXPORT_SYMBOL(gpmc_cs_free); int gpmc_prefetch_enable(int cs, int dma_mode, unsigned int u32_count, int is_write) { - uint32_t prefetch_config1; if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) { /* Set the amount of bytes to be prefetched */ @@ -437,17 +603,17 @@ int gpmc_prefetch_enable(int cs, int dma_mode, /* Set dma/mpu mode, the prefetch read / post write and * enable the engine. Set which cs is has requested for. */ - prefetch_config1 = ((cs << CS_NUM_SHIFT) | + gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) | PREFETCH_FIFOTHRESHOLD | ENABLE_PREFETCH | (dma_mode << DMA_MPU_MODE) | - (0x1 & is_write)); - gpmc_write_reg(GPMC_PREFETCH_CONFIG1, prefetch_config1); + (0x1 & is_write))); + + /* Start the prefetch engine */ + gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1); } else { return -EBUSY; } - /* Start the prefetch engine */ - gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1); return 0; } @@ -456,25 +622,25 @@ EXPORT_SYMBOL(gpmc_prefetch_enable); /** * gpmc_prefetch_reset - disables and stops the prefetch engine */ -void gpmc_prefetch_reset(void) +int gpmc_prefetch_reset(int cs) { + u32 config1; + + /* check if the same module/cs is trying to reset */ + config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); + if (((config1 >> CS_NUM_SHIFT) & 0x7) != cs) + return -EINVAL; + /* Stop the PFPW engine */ gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x0); /* Reset/disable the PFPW engine */ gpmc_write_reg(GPMC_PREFETCH_CONFIG1, 0x0); + + return 0; } EXPORT_SYMBOL(gpmc_prefetch_reset); -/** - * gpmc_prefetch_status - reads prefetch status of engine - */ -int gpmc_prefetch_status(void) -{ - return gpmc_read_reg(GPMC_PREFETCH_STATUS); -} -EXPORT_SYMBOL(gpmc_prefetch_status); - static void __init gpmc_mem_init(void) { int cs; @@ -615,3 +781,79 @@ void omap3_gpmc_restore_context(void) } } #endif /* CONFIG_ARCH_OMAP3 */ + +/** + * gpmc_enable_hwecc - enable hardware ecc functionality + * @cs: chip select number + * @mode: read/write mode + * @dev_width: device bus width(1 for x16, 0 for x8) + * @ecc_size: bytes for which ECC will be generated + */ +int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size) +{ + unsigned int val; + + /* check if ecc module is in used */ + if (gpmc_ecc_used != -EINVAL) + return -EINVAL; + + gpmc_ecc_used = cs; + + /* clear ecc and enable bits */ + val = ((0x00000001<<8) | 0x00000001); + gpmc_write_reg(GPMC_ECC_CONTROL, val); + + /* program ecc and result sizes */ + val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F)); + gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, val); + + switch (mode) { + case GPMC_ECC_READ: + gpmc_write_reg(GPMC_ECC_CONTROL, 0x101); + break; + case GPMC_ECC_READSYN: + gpmc_write_reg(GPMC_ECC_CONTROL, 0x100); + break; + case GPMC_ECC_WRITE: + gpmc_write_reg(GPMC_ECC_CONTROL, 0x101); + break; + default: + printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode); + break; + } + + /* (ECC 16 or 8 bit col) | ( CS ) | ECC Enable */ + val = (dev_width << 7) | (cs << 1) | (0x1); + gpmc_write_reg(GPMC_ECC_CONFIG, val); + return 0; +} + +/** + * gpmc_calculate_ecc - generate non-inverted ecc bytes + * @cs: chip select number + * @dat: data pointer over which ecc is computed + * @ecc_code: ecc code buffer + * + * Using non-inverted ECC is considered ugly since writing a blank + * page (padding) will clear the ECC bytes. This is not a problem as long + * no one is trying to write data on the seemingly unused page. Reading + * an erased page will produce an ECC mismatch between generated and read + * ECC bytes that has to be dealt with separately. + */ +int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code) +{ + unsigned int val = 0x0; + + if (gpmc_ecc_used != cs) + return -EINVAL; + + /* read ecc result */ + val = gpmc_read_reg(GPMC_ECC1_RESULT); + *ecc_code++ = val; /* P128e, ..., P1e */ + *ecc_code++ = val >> 16; /* P128o, ..., P1o */ + /* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */ + *ecc_code++ = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0); + + gpmc_ecc_used = -EINVAL; + return 0; +} diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 1ef54b036103..c8f647b6205e 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -268,6 +268,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) mmc->slots[0].gpio_wp = c->gpio_wp; mmc->slots[0].remux = c->remux; + mmc->slots[0].init_card = c->init_card; if (c->cover_only) mmc->slots[0].cover = 1; diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h index 36f0ba8d89e2..1fe6f0187177 100644 --- a/arch/arm/mach-omap2/hsmmc.h +++ b/arch/arm/mach-omap2/hsmmc.h @@ -6,6 +6,8 @@ * published by the Free Software Foundation. */ +struct mmc_card; + struct omap2_hsmmc_info { u8 mmc; /* controller 1/2/3 */ u8 wires; /* 1/4/8 wires */ @@ -23,6 +25,8 @@ struct omap2_hsmmc_info { int ocr_mask; /* temporary HACK */ /* Remux (pad configuation) when powering on/off */ void (*remux)(struct device *dev, int slot, int power_on); + /* init some special card */ + void (*init_card)(struct mmc_card *card); }; #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index 7951ae1447ee..79c478c4cb1c 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -21,32 +21,19 @@ #include #include -#include #include "mux.h" void __init omap2_i2c_mux_pins(int bus_id) { - if (cpu_is_omap24xx()) { - const int omap24xx_pins[][2] = { - { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA }, - { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA }, - }; - int scl, sda; - - scl = omap24xx_pins[bus_id - 1][0]; - sda = omap24xx_pins[bus_id - 1][1]; - omap_cfg_reg(sda); - omap_cfg_reg(scl); - } + char mux_name[sizeof("i2c2_scl.i2c2_scl")]; /* First I2C bus is not muxable */ - if (cpu_is_omap34xx() && bus_id > 1) { - char mux_name[sizeof("i2c2_scl.i2c2_scl")]; + if (bus_id == 1) + return; - sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id); - omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); - sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); - omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); - } + sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id); + omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); + sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); + omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); } diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 37b8a1a4adf8..e8256a2ed8e7 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -25,6 +25,8 @@ #include #include +#include + static struct omap_chip_id omap_chip; static unsigned int omap_revision; @@ -102,30 +104,36 @@ static struct omap_id omap_ids[] __initdata = { static void __iomem *tap_base; static u16 tap_prod_id; -void __init omap24xx_check_revision(void) +void omap_get_die_id(struct omap_die_id *odi) +{ + odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0); + odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1); + odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2); + odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3); +} + +static void __init omap24xx_check_revision(void) { int i, j; u32 idcode, prod_id; u16 hawkeye; u8 dev_type, rev; + struct omap_die_id odi; idcode = read_tap_reg(OMAP_TAP_IDCODE); prod_id = read_tap_reg(tap_prod_id); hawkeye = (idcode >> 12) & 0xffff; rev = (idcode >> 28) & 0x0f; dev_type = (prod_id >> 16) & 0x0f; + omap_get_die_id(&odi); pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n", idcode, rev, hawkeye, (idcode >> 1) & 0x7ff); - pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", - read_tap_reg(OMAP_TAP_DIE_ID_0)); + pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0); pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n", - read_tap_reg(OMAP_TAP_DIE_ID_1), - (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf); - pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", - read_tap_reg(OMAP_TAP_DIE_ID_2)); - pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", - read_tap_reg(OMAP_TAP_DIE_ID_3)); + odi.id_1, (odi.id_1 >> 28) & 0xf); + pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2); + pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3); pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n", prod_id, dev_type); @@ -164,7 +172,7 @@ void __init omap24xx_check_revision(void) omap3_features |= OMAP3_HAS_ ##feat; \ } -void __init omap3_check_features(void) +static void __init omap3_check_features(void) { u32 status; @@ -179,6 +187,8 @@ void __init omap3_check_features(void) OMAP3_CHECK_FEATURE(status, ISP); if (cpu_is_omap3630()) omap3_features |= OMAP3_HAS_192MHZ_CLK; + if (!cpu_is_omap3505() && !cpu_is_omap3517()) + omap3_features |= OMAP3_HAS_IO_WAKEUP; /* * TODO: Get additional info (where applicable) @@ -186,7 +196,7 @@ void __init omap3_check_features(void) */ } -void __init omap3_check_revision(void) +static void __init omap3_check_revision(void) { u32 cpuid, idcode; u16 hawkeye; @@ -259,15 +269,31 @@ void __init omap3_check_revision(void) omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; case 0xb891: - /* FALLTHROUGH */ + /* Handle 36xx devices */ + omap_chip.oc |= CHIP_IS_OMAP3630ES1; + + switch(rev) { + case 0: /* Take care of early samples */ + omap_revision = OMAP3630_REV_ES1_0; + break; + case 1: + omap_revision = OMAP3630_REV_ES1_1; + omap_chip.oc |= CHIP_IS_OMAP3630ES1_1; + break; + case 2: + default: + omap_revision = OMAP3630_REV_ES1_2; + omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; + break; + } default: /* Unknown default to latest silicon rev as default*/ - omap_revision = OMAP3630_REV_ES1_0; - omap_chip.oc |= CHIP_IS_OMAP3630ES1; + omap_revision = OMAP3630_REV_ES1_2; + omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; } } -void __init omap4_check_revision(void) +static void __init omap4_check_revision(void) { u32 idcode; u16 hawkeye; @@ -297,7 +323,7 @@ void __init omap4_check_revision(void) if (omap3_has_ ##feat()) \ printk(#feat" "); -void __init omap3_cpuinfo(void) +static void __init omap3_cpuinfo(void) { u8 rev = GET_OMAP_REVISION(); char cpu_name[16], cpu_rev[16]; @@ -339,6 +365,12 @@ void __init omap3_cpuinfo(void) case OMAP_REVBITS_00: strcpy(cpu_rev, "1.0"); break; + case OMAP_REVBITS_01: + strcpy(cpu_rev, "1.1"); + break; + case OMAP_REVBITS_02: + strcpy(cpu_rev, "1.2"); + break; case OMAP_REVBITS_10: strcpy(cpu_rev, "2.0"); break; diff --git a/arch/arm/mach-omap2/include/mach/board-flash.h b/arch/arm/mach-omap2/include/mach/board-flash.h new file mode 100644 index 000000000000..b2242ae2bb6f --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/board-flash.h @@ -0,0 +1,28 @@ +/* + * board-sdp.h + * + * Information structures for SDP-specific board config data + * + * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2009 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include + +#define PDC_NOR 1 +#define PDC_NAND 2 +#define PDC_ONENAND 3 +#define DBG_MPDB 4 + +struct flash_partitions { + struct mtd_partition *parts; + int nr_parts; +}; + +extern void board_flash_init(struct flash_partitions [], + char chip_sel[][GPMC_CS_NUM]); diff --git a/arch/arm/mach-omap2/include/mach/board-sdp.h b/arch/arm/mach-omap2/include/mach/board-sdp.h deleted file mode 100644 index 465169c0908a..000000000000 --- a/arch/arm/mach-omap2/include/mach/board-sdp.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * board-sdp.h - * - * Information structures for SDP-specific board config data - * - * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2009 Texas Instruments - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include - -struct flash_partitions { - struct mtd_partition *parts; - int nr_parts; -}; - -extern void sdp_flash_init(struct flash_partitions []); diff --git a/arch/arm/mach-omap2/include/mach/board-zoom.h b/arch/arm/mach-omap2/include/mach/board-zoom.h index c93b29e21b78..3af69d2c3dcd 100644 --- a/arch/arm/mach-omap2/include/mach/board-zoom.h +++ b/arch/arm/mach-omap2/include/mach/board-zoom.h @@ -1,5 +1,11 @@ /* * Defines for zoom boards */ +#include +#include + +#define ZOOM_NAND_CS 0 + +extern void __init board_nand_init(struct mtd_partition *, u8 nr_parts, u8 cs); extern int __init zoom_debugboard_init(void); extern void __init zoom_peripherals_init(void); diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index 35b24409a0c8..09331bbbda52 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S @@ -36,7 +36,7 @@ omap_uart_lsr: .word 0 /* Use omap_uart_phys/virt if already configured */ 10: mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? - ldreq \rx, =omap_uart_phys @ physical base address + ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address ldrne \rx, =omap_uart_virt @ virtual base address ldr \rx, [\rx, #0] cmp \rx, #0 @ is port configured? @@ -89,26 +89,36 @@ omap_uart_lsr: .word 0 44: mov \rx, #UART_OFFSET(OMAP4_UART4_BASE) b 98f 95: ldr \rx, =ZOOM_UART_BASE - ldr \tmp, =omap_uart_phys + mrc p15, 0, \tmp, c1, c0 + tst \tmp, #1 @ MMU enabled? + ldreq \tmp, =__virt_to_phys(omap_uart_phys) + ldrne \tmp, =omap_uart_phys str \rx, [\tmp, #0] ldr \rx, =ZOOM_UART_VIRT - ldr \tmp, =omap_uart_virt + ldreq \tmp, =__virt_to_phys(omap_uart_virt) + ldrne \tmp, =omap_uart_virt str \rx, [\tmp, #0] mov \rx, #(UART_LSR << ZOOM_PORT_SHIFT) - ldr \tmp, =omap_uart_lsr + ldreq \tmp, =__virt_to_phys(omap_uart_lsr) + ldrne \tmp, =omap_uart_lsr str \rx, [\tmp, #0] b 10b /* Store both phys and virt address for the uart */ 98: add \rx, \rx, #0x48000000 @ phys base - ldr \tmp, =omap_uart_phys + mrc p15, 0, \tmp, c1, c0 + tst \tmp, #1 @ MMU enabled? + ldreq \tmp, =__virt_to_phys(omap_uart_phys) + ldrne \tmp, =omap_uart_phys str \rx, [\tmp, #0] sub \rx, \rx, #0x48000000 @ phys base add \rx, \rx, #0xfa000000 @ virt base - ldr \tmp, =omap_uart_virt + ldreq \tmp, =__virt_to_phys(omap_uart_virt) + ldrne \tmp, =omap_uart_virt str \rx, [\tmp, #0] mov \rx, #(UART_LSR << OMAP_PORT_SHIFT) - ldr \tmp, =omap_uart_lsr + ldreq \tmp, =__virt_to_phys(omap_uart_lsr) + ldrne \tmp, =omap_uart_lsr str \rx, [\tmp, #0] b 10b @@ -120,7 +130,10 @@ omap_uart_lsr: .word 0 .endm .macro busyuart,rd,rx -1001: ldr \rd, =omap_uart_lsr +1001: mrc p15, 0, \rd, c1, c0 + tst \rd, #1 @ MMU enabled? + ldreq \rd, =__virt_to_phys(omap_uart_lsr) + ldrne \rd, =omap_uart_lsr ldr \rd, [\rd, #0] ldrb \rd, [\rx, \rd] and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) diff --git a/arch/arm/mach-omap2/include/mach/id.h b/arch/arm/mach-omap2/include/mach/id.h new file mode 100644 index 000000000000..02ed3aa56f1e --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/id.h @@ -0,0 +1,22 @@ +/* + * OMAP2 CPU identification code + * + * Copyright (C) 2010 Kan-Ru Chen + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef OMAP2_ARCH_ID_H +#define OMAP2_ARCH_ID_H + +struct omap_die_id { + u32 id_0; + u32 id_1; + u32 id_2; + u32 id_3; +}; + +void omap_get_die_id(struct omap_die_id *odi); + +#endif diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h index 423af3a6dd31..2744dfee1ff4 100644 --- a/arch/arm/mach-omap2/include/mach/omap4-common.h +++ b/arch/arm/mach-omap2/include/mach/omap4-common.h @@ -13,6 +13,13 @@ #ifndef OMAP_ARCH_OMAP4_COMMON_H #define OMAP_ARCH_OMAP4_COMMON_H +/* + * wfi used in low power code. Directly opcode is used instead + * of instruction to avoid mulit-omap build break + */ +#define do_wfi() \ + __asm__ __volatile__ (".word 0xe320f003" : : : "memory") + #ifdef CONFIG_CACHE_L2X0 extern void __iomem *l2cache_base; #endif diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 4e1f53d0b880..b9ea70bce563 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -28,7 +28,6 @@ #include -#include #include #include #include @@ -44,6 +43,7 @@ #include #include "clockdomains.h" + #include /* @@ -313,6 +313,8 @@ static int __init _omap2_init_reprogram_sdrc(void) void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { + u8 skip_setup_idle = 0; + pwrdm_init(powerdomains_omap); clkdm_init(clockdomains_omap, clkdm_autodeps); if (cpu_is_omap242x()) @@ -321,7 +323,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, omap2430_hwmod_init(); else if (cpu_is_omap34xx()) omap3xxx_hwmod_init(); - omap2_mux_init(); /* The OPP tables have to be registered before a clk init */ omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps); @@ -337,9 +338,13 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, pr_err("Could not init clock framework - unknown CPU\n"); omap_serial_early_init(); + +#ifndef CONFIG_PM_RUNTIME + skip_setup_idle = 1; +#endif if (cpu_is_omap24xx() || cpu_is_omap34xx()) /* FIXME: OMAP4 */ - omap_hwmod_late_init(); - omap_pm_if_init(); + omap_hwmod_late_init(skip_setup_idle); + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c index e82da680d908..14ee686b6492 100644 --- a/arch/arm/mach-omap2/iommu2.c +++ b/arch/arm/mach-omap2/iommu2.c @@ -44,9 +44,13 @@ #define MMU_IRQ_EMUMISS (1 << 2) #define MMU_IRQ_TRANSLATIONFAULT (1 << 1) #define MMU_IRQ_TLBMISS (1 << 0) -#define MMU_IRQ_MASK \ - (MMU_IRQ_MULTIHITFAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_EMUMISS | \ - MMU_IRQ_TRANSLATIONFAULT) + +#define __MMU_IRQ_FAULT \ + (MMU_IRQ_MULTIHITFAULT | MMU_IRQ_EMUMISS | MMU_IRQ_TRANSLATIONFAULT) +#define MMU_IRQ_MASK \ + (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_TLBMISS) +#define MMU_IRQ_TWL_MASK (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT) +#define MMU_IRQ_TLB_MISS_MASK (__MMU_IRQ_FAULT | MMU_IRQ_TLBMISS) /* MMU_CNTL */ #define MMU_CNTL_SHIFT 1 @@ -61,6 +65,26 @@ ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 : \ ((pgsz) == MMU_CAM_PGSZ_4K) ? 0xfffff000 : 0) + +static void __iommu_set_twl(struct iommu *obj, bool on) +{ + u32 l = iommu_read_reg(obj, MMU_CNTL); + + if (on) + iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE); + else + iommu_write_reg(obj, MMU_IRQ_TLB_MISS_MASK, MMU_IRQENABLE); + + l &= ~MMU_CNTL_MASK; + if (on) + l |= (MMU_CNTL_MMU_EN | MMU_CNTL_TWL_EN); + else + l |= (MMU_CNTL_MMU_EN); + + iommu_write_reg(obj, l, MMU_CNTL); +} + + static int omap2_iommu_enable(struct iommu *obj) { u32 l, pa; @@ -96,13 +120,9 @@ static int omap2_iommu_enable(struct iommu *obj) l |= (MMU_SYS_IDLE_SMART | MMU_SYS_AUTOIDLE); iommu_write_reg(obj, l, MMU_SYSCONFIG); - iommu_write_reg(obj, MMU_IRQ_MASK, MMU_IRQENABLE); iommu_write_reg(obj, pa, MMU_TTB); - l = iommu_read_reg(obj, MMU_CNTL); - l &= ~MMU_CNTL_MASK; - l |= (MMU_CNTL_MMU_EN | MMU_CNTL_TWL_EN); - iommu_write_reg(obj, l, MMU_CNTL); + __iommu_set_twl(obj, true); return 0; } @@ -118,6 +138,11 @@ static void omap2_iommu_disable(struct iommu *obj) dev_dbg(obj->dev, "%s is shutting down\n", obj->name); } +static void omap2_iommu_set_twl(struct iommu *obj, bool on) +{ + __iommu_set_twl(obj, false); +} + static u32 omap2_iommu_fault_isr(struct iommu *obj, u32 *ra) { int i; @@ -147,7 +172,7 @@ static u32 omap2_iommu_fault_isr(struct iommu *obj, u32 *ra) printk("\n"); iommu_write_reg(obj, stat, MMU_IRQSTATUS); - omap2_iommu_disable(obj); + return stat; } @@ -300,6 +325,7 @@ static const struct iommu_functions omap2_iommu_ops = { .enable = omap2_iommu_enable, .disable = omap2_iommu_disable, + .set_twl = omap2_iommu_set_twl, .fault_isr = omap2_iommu_fault_isr, .tlb_read_cr = omap2_tlb_read_cr, diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 318f3638653c..42dbfa46e656 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -10,7 +10,6 @@ * for more details. */ -#include #include #include #include @@ -18,8 +17,6 @@ #include #include -#define DRV_NAME "omap2-mailbox" - #define MAILBOX_REVISION 0x000 #define MAILBOX_SYSCONFIG 0x010 #define MAILBOX_SYSSTATUS 0x014 @@ -131,7 +128,7 @@ static int omap2_mbox_startup(struct omap_mbox *mbox) } l = mbox_read_reg(MAILBOX_REVISION); - pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f)); + pr_debug("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f)); if (cpu_is_omap44xx()) l = OMAP4_SMARTIDLE; @@ -283,6 +280,8 @@ static struct omap_mbox_ops omap2_mbox_ops = { */ /* FIXME: the following structs should be filled automatically by the user id */ + +#if defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_ARCH_OMAP2420) /* DSP */ static struct omap_mbox2_priv omap2_mbox_dsp_priv = { .tx_fifo = { @@ -300,10 +299,46 @@ static struct omap_mbox2_priv omap2_mbox_dsp_priv = { .irqdisable = MAILBOX_IRQENABLE(0), }; +struct omap_mbox mbox_dsp_info = { + .name = "dsp", + .ops = &omap2_mbox_ops, + .priv = &omap2_mbox_dsp_priv, +}; +#endif +#if defined(CONFIG_ARCH_OMAP3430) +struct omap_mbox *omap3_mboxes[] = { &mbox_dsp_info, NULL }; +#endif -/* OMAP4 specific data structure. Use the cpu_is_omap4xxx() -to use this*/ +#if defined(CONFIG_ARCH_OMAP2420) +/* IVA */ +static struct omap_mbox2_priv omap2_mbox_iva_priv = { + .tx_fifo = { + .msg = MAILBOX_MESSAGE(2), + .fifo_stat = MAILBOX_FIFOSTATUS(2), + }, + .rx_fifo = { + .msg = MAILBOX_MESSAGE(3), + .msg_stat = MAILBOX_MSGSTATUS(3), + }, + .irqenable = MAILBOX_IRQENABLE(3), + .irqstatus = MAILBOX_IRQSTATUS(3), + .notfull_bit = MAILBOX_IRQ_NOTFULL(2), + .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), + .irqdisable = MAILBOX_IRQENABLE(3), +}; + +static struct omap_mbox mbox_iva_info = { + .name = "iva", + .ops = &omap2_mbox_ops, + .priv = &omap2_mbox_iva_priv, +}; + +struct omap_mbox *omap2_mboxes[] = { &mbox_iva_info, &mbox_dsp_info, NULL }; +#endif + +#if defined(CONFIG_ARCH_OMAP4) +/* OMAP4 */ static struct omap_mbox2_priv omap2_mbox_1_priv = { .tx_fifo = { .msg = MAILBOX_MESSAGE(0), @@ -325,14 +360,6 @@ struct omap_mbox mbox_1_info = { .ops = &omap2_mbox_ops, .priv = &omap2_mbox_1_priv, }; -EXPORT_SYMBOL(mbox_1_info); - -struct omap_mbox mbox_dsp_info = { - .name = "dsp", - .ops = &omap2_mbox_ops, - .priv = &omap2_mbox_dsp_priv, -}; -EXPORT_SYMBOL(mbox_dsp_info); static struct omap_mbox2_priv omap2_mbox_2_priv = { .tx_fifo = { @@ -355,110 +382,64 @@ struct omap_mbox mbox_2_info = { .ops = &omap2_mbox_ops, .priv = &omap2_mbox_2_priv, }; -EXPORT_SYMBOL(mbox_2_info); - -#if defined(CONFIG_ARCH_OMAP2420) /* IVA */ -static struct omap_mbox2_priv omap2_mbox_iva_priv = { - .tx_fifo = { - .msg = MAILBOX_MESSAGE(2), - .fifo_stat = MAILBOX_FIFOSTATUS(2), - }, - .rx_fifo = { - .msg = MAILBOX_MESSAGE(3), - .msg_stat = MAILBOX_MSGSTATUS(3), - }, - .irqenable = MAILBOX_IRQENABLE(3), - .irqstatus = MAILBOX_IRQSTATUS(3), - .notfull_bit = MAILBOX_IRQ_NOTFULL(2), - .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), - .irqdisable = MAILBOX_IRQENABLE(3), -}; - -static struct omap_mbox mbox_iva_info = { - .name = "iva", - .ops = &omap2_mbox_ops, - .priv = &omap2_mbox_iva_priv, -}; +struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL }; #endif static int __devinit omap2_mbox_probe(struct platform_device *pdev) { - struct resource *res; + struct resource *mem; int ret; + struct omap_mbox **list; - /* MBOX base */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (unlikely(!res)) { - dev_err(&pdev->dev, "invalid mem resource\n"); + if (false) + ; +#if defined(CONFIG_ARCH_OMAP3430) + else if (cpu_is_omap3430()) { + list = omap3_mboxes; + + list[0]->irq = platform_get_irq_byname(pdev, "dsp"); + } +#endif +#if defined(CONFIG_ARCH_OMAP2420) + else if (cpu_is_omap2420()) { + list = omap2_mboxes; + + list[0]->irq = platform_get_irq_byname(pdev, "dsp"); + list[1]->irq = platform_get_irq_byname(pdev, "iva"); + } +#endif +#if defined(CONFIG_ARCH_OMAP4) + else if (cpu_is_omap44xx()) { + list = omap4_mboxes; + + list[0]->irq = list[1]->irq = + platform_get_irq_byname(pdev, "mbox"); + } +#endif + else { + pr_err("%s: platform not supported\n", __func__); return -ENODEV; } - mbox_base = ioremap(res->start, resource_size(res)); + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + mbox_base = ioremap(mem->start, resource_size(mem)); if (!mbox_base) return -ENOMEM; - /* DSP or IVA2 IRQ */ - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - - if (unlikely(!res)) { - dev_err(&pdev->dev, "invalid irq resource\n"); - ret = -ENODEV; - goto err_dsp; + ret = omap_mbox_register(&pdev->dev, list); + if (ret) { + iounmap(mbox_base); + return ret; } - if (cpu_is_omap44xx()) { - mbox_1_info.irq = res->start; - ret = omap_mbox_register(&pdev->dev, &mbox_1_info); - } else { - mbox_dsp_info.irq = res->start; - ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info); - } - if (ret) - goto err_dsp; - - if (cpu_is_omap44xx()) { - mbox_2_info.irq = res->start; - ret = omap_mbox_register(&pdev->dev, &mbox_2_info); - if (ret) { - omap_mbox_unregister(&mbox_1_info); - goto err_dsp; - } - } -#if defined(CONFIG_ARCH_OMAP2420) /* IVA */ - if (cpu_is_omap2420()) { - /* IVA IRQ */ - res = platform_get_resource(pdev, IORESOURCE_IRQ, 1); - if (unlikely(!res)) { - dev_err(&pdev->dev, "invalid irq resource\n"); - ret = -ENODEV; - omap_mbox_unregister(&mbox_dsp_info); - goto err_dsp; - } - mbox_iva_info.irq = res->start; - ret = omap_mbox_register(&pdev->dev, &mbox_iva_info); - if (ret) { - omap_mbox_unregister(&mbox_dsp_info); - goto err_dsp; - } - } -#endif return 0; -err_dsp: - iounmap(mbox_base); return ret; } static int __devexit omap2_mbox_remove(struct platform_device *pdev) { -#if defined(CONFIG_ARCH_OMAP2420) - omap_mbox_unregister(&mbox_iva_info); -#endif - - if (cpu_is_omap44xx()) { - omap_mbox_unregister(&mbox_2_info); - omap_mbox_unregister(&mbox_1_info); - } else - omap_mbox_unregister(&mbox_dsp_info); + omap_mbox_unregister(); iounmap(mbox_base); return 0; } @@ -467,7 +448,7 @@ static struct platform_driver omap2_mbox_driver = { .probe = omap2_mbox_probe, .remove = __devexit_p(omap2_mbox_remove), .driver = { - .name = DRV_NAME, + .name = "omap-mailbox", }, }; @@ -486,5 +467,6 @@ module_exit(omap2_mbox_exit); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions"); -MODULE_AUTHOR("Hiroshi DOYU , Paul Mundt"); -MODULE_ALIAS("platform:"DRV_NAME); +MODULE_AUTHOR("Hiroshi DOYU "); +MODULE_AUTHOR("Paul Mundt"); +MODULE_ALIAS("platform:omap2-mailbox"); diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index c29337074ad3..467aae245781 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -20,17 +20,18 @@ #include #include -#include #include #include +#include "mux.h" + static void omap2_mcbsp2_mux_setup(void) { - omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); - omap_cfg_reg(R14_24XX_MCBSP2_FSX); - omap_cfg_reg(W15_24XX_MCBSP2_DR); - omap_cfg_reg(V15_24XX_MCBSP2_DX); - omap_cfg_reg(V14_24XX_GPIO117); + omap_mux_init_signal("eac_ac_sclk.mcbsp2_clkx", OMAP_PULL_ENA); + omap_mux_init_signal("eac_ac_fs.mcbsp2_fsx", OMAP_PULL_ENA); + omap_mux_init_signal("eac_ac_din.mcbsp2_dr", OMAP_PULL_ENA); + omap_mux_init_signal("eac_ac_dout.mcbsp2_dx", OMAP_PULL_ENA); + omap_mux_init_gpio(117, OMAP_PULL_ENA); /* * TODO: Need to add MUX settings for OMAP 2430 SDP */ @@ -133,7 +134,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP1_IRQ_RX, .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x6F, + .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { .phys_base = OMAP34XX_MCBSP2_BASE, @@ -143,7 +144,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP2_IRQ_RX, .tx_irq = INT_24XX_MCBSP2_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x3FF, + .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */ }, { .phys_base = OMAP34XX_MCBSP3_BASE, @@ -153,7 +154,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP3_IRQ_RX, .tx_irq = INT_24XX_MCBSP3_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x6F, + .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { .phys_base = OMAP34XX_MCBSP4_BASE, @@ -162,7 +163,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP4_IRQ_RX, .tx_irq = INT_24XX_MCBSP4_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x6F, + .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { .phys_base = OMAP34XX_MCBSP5_BASE, @@ -171,7 +172,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP5_IRQ_RX, .tx_irq = INT_24XX_MCBSP5_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x6F, + .buffer_size = 0x80, /* The FIFO has 128 locations */ }, }; #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 8b3d26935a39..ab403b2ed26b 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -37,12 +37,12 @@ #include #include -#include #include "mux.h" #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ #define OMAP_MUX_BASE_SZ 0x5ca +#define MUXABLE_GPIO_MODE3 BIT(0) struct omap_mux_entry { struct omap_mux mux; @@ -51,6 +51,7 @@ struct omap_mux_entry { static unsigned long mux_phys; static void __iomem *mux_base; +static u8 omap_mux_flags; u16 omap_mux_read(u16 reg) { @@ -76,301 +77,6 @@ void omap_mux_write_array(struct omap_board_mux *board_mux) } } -#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_OMAP_MUX) - -static struct omap_mux_cfg arch_mux_cfg; - -/* NOTE: See mux.h for the enumeration */ - -static struct pin_config __initdata_or_module omap24xx_pins[] = { -/* - * description mux mux pull pull debug - * offset mode ena type - */ - -/* 24xx I2C */ -MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1) -MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1) -MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1) -MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1) - -/* Menelaus interrupt */ -MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) - -/* 24xx clocks */ -MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) - -/* 24xx GPMC chipselects, wait pin monitoring */ -MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) -MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) -MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) -MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1) -MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1) -MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1) - -/* 24xx McBSP */ -MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1) -MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1) -MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1) -MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) - -/* 24xx GPIO */ -MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) -MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) -MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) -MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) -MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) -MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) -MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) -MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) -MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) -MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) -MUX_CFG_24XX("N15_24XX_GPIO85", 0x103, 3, 0, 0, 1) -MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) -MUX_CFG_24XX("P20_24XX_GPIO93", 0x10b, 3, 0, 0, 1) -MUX_CFG_24XX("P18_24XX_GPIO95", 0x10d, 3, 0, 0, 1) -MUX_CFG_24XX("M18_24XX_GPIO96", 0x10e, 3, 0, 0, 1) -MUX_CFG_24XX("L14_24XX_GPIO97", 0x10f, 3, 0, 0, 1) -MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) -MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) -MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1) - -/* 242x DBG GPIO */ -MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1) -MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1) -MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1) -MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1) -MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1) -MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1) -MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1) -MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1) -MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1) -MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1) - -/* 24xx external DMA requests */ -MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) -MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) -MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) -MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) -MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) -MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1) - -/* UART3 */ -MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1) -MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1) - -/* MMC/SDIO */ -MUX_CFG_24XX("G19_24XX_MMC_CLKO", 0x0f3, 0, 0, 0, 1) -MUX_CFG_24XX("H18_24XX_MMC_CMD", 0x0f4, 0, 0, 0, 1) -MUX_CFG_24XX("F20_24XX_MMC_DAT0", 0x0f5, 0, 0, 0, 1) -MUX_CFG_24XX("H14_24XX_MMC_DAT1", 0x0f6, 0, 0, 0, 1) -MUX_CFG_24XX("E19_24XX_MMC_DAT2", 0x0f7, 0, 0, 0, 1) -MUX_CFG_24XX("D19_24XX_MMC_DAT3", 0x0f8, 0, 0, 0, 1) -MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0", 0x0f9, 0, 0, 0, 1) -MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1", 0x0fa, 0, 0, 0, 1) -MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2", 0x0fb, 0, 0, 0, 1) -MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1) -MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1) -MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1) - -/* Full speed USB */ -MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1) -MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1) -MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1) -MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1) -MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1) -MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1) -MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1) - -MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1) -MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1) -MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1) -MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1) -MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1) -MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1) -MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1) -MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1) - -MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1) -MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1) -MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1) -MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1) -MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0", 0x0e7, 2, 0, 0, 1) - -/* Keypad GPIO*/ -MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1) -MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1) -MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1) -MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1) -MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1) -MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1) -MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1) -MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1) -MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1) -MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1) -MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1) -MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1) -MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1) - -/* 24xx Menelaus Keypad GPIO */ -MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1) -MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1) -MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1) - -/* 2430 USB */ -MUX_CFG_24XX("AD9_2430_USB0_PUEN", 0x133, 4, 0, 0, 1) -MUX_CFG_24XX("Y11_2430_USB0_VP", 0x134, 4, 0, 0, 1) -MUX_CFG_24XX("AD7_2430_USB0_VM", 0x135, 4, 0, 0, 1) -MUX_CFG_24XX("AE7_2430_USB0_RCV", 0x136, 4, 0, 0, 1) -MUX_CFG_24XX("AD4_2430_USB0_TXEN", 0x137, 4, 0, 0, 1) -MUX_CFG_24XX("AF9_2430_USB0_SE0", 0x138, 4, 0, 0, 1) -MUX_CFG_24XX("AE6_2430_USB0_DAT", 0x139, 4, 0, 0, 1) -MUX_CFG_24XX("AD24_2430_USB1_SE0", 0x107, 2, 0, 0, 1) -MUX_CFG_24XX("AB24_2430_USB1_RCV", 0x108, 2, 0, 0, 1) -MUX_CFG_24XX("Y25_2430_USB1_TXEN", 0x109, 2, 0, 0, 1) -MUX_CFG_24XX("AA26_2430_USB1_DAT", 0x10A, 2, 0, 0, 1) - -/* 2430 HS-USB */ -MUX_CFG_24XX("AD9_2430_USB0HS_DATA3", 0x133, 0, 0, 0, 1) -MUX_CFG_24XX("Y11_2430_USB0HS_DATA4", 0x134, 0, 0, 0, 1) -MUX_CFG_24XX("AD7_2430_USB0HS_DATA5", 0x135, 0, 0, 0, 1) -MUX_CFG_24XX("AE7_2430_USB0HS_DATA6", 0x136, 0, 0, 0, 1) -MUX_CFG_24XX("AD4_2430_USB0HS_DATA2", 0x137, 0, 0, 0, 1) -MUX_CFG_24XX("AF9_2430_USB0HS_DATA0", 0x138, 0, 0, 0, 1) -MUX_CFG_24XX("AE6_2430_USB0HS_DATA1", 0x139, 0, 0, 0, 1) -MUX_CFG_24XX("AE8_2430_USB0HS_CLK", 0x13A, 0, 0, 0, 1) -MUX_CFG_24XX("AD8_2430_USB0HS_DIR", 0x13B, 0, 0, 0, 1) -MUX_CFG_24XX("AE5_2430_USB0HS_STP", 0x13c, 0, 1, 1, 1) -MUX_CFG_24XX("AE9_2430_USB0HS_NXT", 0x13D, 0, 0, 0, 1) -MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1) - -/* 2430 McBSP */ -MUX_CFG_24XX("AD6_2430_MCBSP_CLKS", 0x011E, 0, 0, 0, 1) - -MUX_CFG_24XX("AB2_2430_MCBSP1_CLKR", 0x011A, 0, 0, 0, 1) -MUX_CFG_24XX("AD5_2430_MCBSP1_FSR", 0x011B, 0, 0, 0, 1) -MUX_CFG_24XX("AA1_2430_MCBSP1_DX", 0x011C, 0, 0, 0, 1) -MUX_CFG_24XX("AF3_2430_MCBSP1_DR", 0x011D, 0, 0, 0, 1) -MUX_CFG_24XX("AB3_2430_MCBSP1_FSX", 0x011F, 0, 0, 0, 1) -MUX_CFG_24XX("Y9_2430_MCBSP1_CLKX", 0x0120, 0, 0, 0, 1) - -MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1) -MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1) -MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1) -MUX_CFG_24XX("AD13_2430_MCBSP2_DR", 0x0131, 1, 0, 0, 1) -MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0, 0, 0, 1) -MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1) -MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1) -MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1) - -MUX_CFG_24XX("AC9_2430_MCBSP3_CLKX", 0x0103, 0, 0, 0, 1) -MUX_CFG_24XX("AE4_2430_MCBSP3_FSX", 0x0104, 0, 0, 0, 1) -MUX_CFG_24XX("AE2_2430_MCBSP3_DR", 0x0105, 0, 0, 0, 1) -MUX_CFG_24XX("AF4_2430_MCBSP3_DX", 0x0106, 0, 0, 0, 1) - -MUX_CFG_24XX("N3_2430_MCBSP4_CLKX", 0x010B, 1, 0, 0, 1) -MUX_CFG_24XX("AD23_2430_MCBSP4_DR", 0x010C, 1, 0, 0, 1) -MUX_CFG_24XX("AB25_2430_MCBSP4_DX", 0x010D, 1, 0, 0, 1) -MUX_CFG_24XX("AC25_2430_MCBSP4_FSX", 0x010E, 1, 0, 0, 1) - -MUX_CFG_24XX("AE16_2430_MCBSP5_CLKX", 0x00ED, 1, 0, 0, 1) -MUX_CFG_24XX("AF12_2430_MCBSP5_FSX", 0x00ED, 1, 0, 0, 1) -MUX_CFG_24XX("K7_2430_MCBSP5_DX", 0x00EF, 1, 0, 0, 1) -MUX_CFG_24XX("M1_2430_MCBSP5_DR", 0x00F0, 1, 0, 0, 1) - -/* 2430 MCSPI1 */ -MUX_CFG_24XX("Y18_2430_MCSPI1_CLK", 0x010F, 0, 0, 0, 1) -MUX_CFG_24XX("AD15_2430_MCSPI1_SIMO", 0x0110, 0, 0, 0, 1) -MUX_CFG_24XX("AE17_2430_MCSPI1_SOMI", 0x0111, 0, 0, 0, 1) -MUX_CFG_24XX("U1_2430_MCSPI1_CS0", 0x0112, 0, 0, 0, 1) - -/* Touchscreen GPIO */ -MUX_CFG_24XX("AF19_2430_GPIO_85", 0x0113, 3, 0, 0, 1) - -}; - -#define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins) - -#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) - -static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg) -{ - u16 orig; - u8 warn = 0, debug = 0; - - orig = omap_mux_read(cfg->mux_reg - OMAP_MUX_BASE_OFFSET); - -#ifdef CONFIG_OMAP_MUX_DEBUG - debug = cfg->debug; -#endif - warn = (orig != reg); - if (debug || warn) - printk(KERN_WARNING - "MUX: setup %s (0x%p): 0x%04x -> 0x%04x\n", - cfg->name, omap_ctrl_base_get() + cfg->mux_reg, - orig, reg); -} -#else -#define omap2_cfg_debug(x, y) do {} while (0) -#endif - -static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) -{ - static DEFINE_SPINLOCK(mux_spin_lock); - unsigned long flags; - u8 reg = 0; - - spin_lock_irqsave(&mux_spin_lock, flags); - reg |= cfg->mask & 0x7; - if (cfg->pull_val) - reg |= OMAP2_PULL_ENA; - if (cfg->pu_pd_val) - reg |= OMAP2_PULL_UP; - omap2_cfg_debug(cfg, reg); - omap_mux_write(reg, cfg->mux_reg - OMAP_MUX_BASE_OFFSET); - spin_unlock_irqrestore(&mux_spin_lock, flags); - - return 0; -} - -int __init omap2_mux_init(void) -{ - u32 mux_pbase; - - if (cpu_is_omap2420()) - mux_pbase = OMAP2420_CTRL_BASE + OMAP_MUX_BASE_OFFSET; - else if (cpu_is_omap2430()) - mux_pbase = OMAP243X_CTRL_BASE + OMAP_MUX_BASE_OFFSET; - else - return -ENODEV; - - mux_base = ioremap(mux_pbase, OMAP_MUX_BASE_SZ); - if (!mux_base) { - printk(KERN_ERR "mux: Could not ioremap\n"); - return -ENODEV; - } - - if (cpu_is_omap24xx()) { - arch_mux_cfg.pins = omap24xx_pins; - arch_mux_cfg.size = OMAP24XX_PINS_SZ; - arch_mux_cfg.cfg_reg = omap24xx_cfg_reg; - - return omap_mux_register(&arch_mux_cfg); - } - - return 0; -} - -#else -int __init omap2_mux_init(void) -{ - return 0; -} -#endif /* CONFIG_OMAP_MUX */ - -/*----------------------------------------------------------------------------*/ - -#ifdef CONFIG_ARCH_OMAP3 static LIST_HEAD(muxmodes); static DEFINE_MUTEX(muxmode_mutex); @@ -381,6 +87,9 @@ static char *omap_mux_options; int __init omap_mux_init_gpio(int gpio, int val) { struct omap_mux_entry *e; + struct omap_mux *gpio_mux; + u16 old_mode; + u16 mux_mode; int found = 0; if (!gpio) @@ -389,31 +98,33 @@ int __init omap_mux_init_gpio(int gpio, int val) list_for_each_entry(e, &muxmodes, node) { struct omap_mux *m = &e->mux; if (gpio == m->gpio) { - u16 old_mode; - u16 mux_mode; - - old_mode = omap_mux_read(m->reg_offset); - mux_mode = val & ~(OMAP_MUX_NR_MODES - 1); - mux_mode |= OMAP_MUX_MODE4; - printk(KERN_DEBUG "mux: Setting signal " - "%s.gpio%i 0x%04x -> 0x%04x\n", - m->muxnames[0], gpio, old_mode, mux_mode); - omap_mux_write(mux_mode, m->reg_offset); + gpio_mux = m; found++; } } - if (found == 1) - return 0; + if (found == 0) { + printk(KERN_ERR "mux: Could not set gpio%i\n", gpio); + return -ENODEV; + } if (found > 1) { - printk(KERN_ERR "mux: Multiple gpio paths for gpio%i\n", gpio); + printk(KERN_INFO "mux: Multiple gpio paths (%d) for gpio%i\n", + found, gpio); return -EINVAL; } - printk(KERN_ERR "mux: Could not set gpio%i\n", gpio); + old_mode = omap_mux_read(gpio_mux->reg_offset); + mux_mode = val & ~(OMAP_MUX_NR_MODES - 1); + if (omap_mux_flags & MUXABLE_GPIO_MODE3) + mux_mode |= OMAP_MUX_MODE3; + else + mux_mode |= OMAP_MUX_MODE4; + printk(KERN_DEBUG "mux: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n", + gpio_mux->muxnames[0], gpio, old_mode, mux_mode); + omap_mux_write(mux_mode, gpio_mux->reg_offset); - return -ENODEV; + return 0; } int __init omap_mux_init_signal(char *muxname, int val) @@ -1032,6 +743,9 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, return -ENODEV; } + if (cpu_is_omap24xx()) + omap_mux_flags = MUXABLE_GPIO_MODE3; + omap_mux_init_package(superset, package_subset, package_balls); omap_mux_init_list(superset); omap_mux_init_signals(board_mux); @@ -1039,5 +753,3 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, return 0; } -#endif /* CONFIG_ARCH_OMAP3 */ - diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h index 480abc56e605..a8e040c2c7e9 100644 --- a/arch/arm/mach-omap2/mux.h +++ b/arch/arm/mach-omap2/mux.h @@ -7,6 +7,8 @@ * published by the Free Software Foundation. */ +#include "mux2420.h" +#include "mux2430.h" #include "mux34xx.h" #define OMAP_MUX_TERMINATOR 0xffff @@ -56,10 +58,12 @@ /* Flags for omap_mux_init */ #define OMAP_PACKAGE_MASK 0xffff -#define OMAP_PACKAGE_CBP 4 /* 515-pin 0.40 0.50 */ -#define OMAP_PACKAGE_CUS 3 /* 423-pin 0.65 */ -#define OMAP_PACKAGE_CBB 2 /* 515-pin 0.40 0.50 */ -#define OMAP_PACKAGE_CBC 1 /* 515-pin 0.50 0.65 */ +#define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */ +#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */ +#define OMAP_PACKAGE_CBB 4 /* 515-pin 0.40 0.50 */ +#define OMAP_PACKAGE_CBC 3 /* 515-pin 0.50 0.65 */ +#define OMAP_PACKAGE_ZAC 2 /* 24xx 447-pin POP */ +#define OMAP_PACKAGE_ZAF 1 /* 2420 447-pin SIP */ #define OMAP_MUX_NR_MODES 8 /* Available modes */ @@ -102,7 +106,7 @@ struct omap_board_mux { u16 value; }; -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_ARCH_OMAP3) +#if defined(CONFIG_OMAP_MUX) /** * omap_mux_init_gpio - initialize a signal based on the GPIO number @@ -170,6 +174,20 @@ void omap_mux_write(u16 val, u16 mux_offset); */ void omap_mux_write_array(struct omap_board_mux *board_mux); +/** + * omap2420_mux_init() - initialize mux system with board specific set + * @board_mux: Board specific mux table + * @flags: OMAP package type used for the board + */ +int omap2420_mux_init(struct omap_board_mux *board_mux, int flags); + +/** + * omap2430_mux_init() - initialize mux system with board specific set + * @board_mux: Board specific mux table + * @flags: OMAP package type used for the board + */ +int omap2430_mux_init(struct omap_board_mux *board_mux, int flags); + /** * omap3_mux_init() - initialize mux system with board specific set * @board_mux: Board specific mux table diff --git a/arch/arm/mach-omap2/mux2420.c b/arch/arm/mach-omap2/mux2420.c new file mode 100644 index 000000000000..fdb04a7eb8aa --- /dev/null +++ b/arch/arm/mach-omap2/mux2420.c @@ -0,0 +1,688 @@ +/* + * Copyright (C) 2010 Nokia + * Copyright (C) 2010 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +#include "mux.h" + +#ifdef CONFIG_OMAP_MUX + +#define _OMAP2420_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ +{ \ + .reg_offset = (OMAP2420_CONTROL_PADCONF_##M0##_OFFSET), \ + .gpio = (g), \ + .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \ +} + +#else + +#define _OMAP2420_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ +{ \ + .reg_offset = (OMAP2420_CONTROL_PADCONF_##M0##_OFFSET), \ + .gpio = (g), \ +} + +#endif + +#define _OMAP2420_BALLENTRY(M0, bb, bt) \ +{ \ + .reg_offset = (OMAP2420_CONTROL_PADCONF_##M0##_OFFSET), \ + .balls = { bb, bt }, \ +} + +/* + * Superset of all mux modes for omap2420 + */ +static struct omap_mux __initdata omap2420_muxmodes[] = { + _OMAP2420_MUXENTRY(CAM_D0, 54, + "cam_d0", "hw_dbg2", "sti_dout", "gpio_54", + NULL, NULL, "etk_d2", NULL), + _OMAP2420_MUXENTRY(CAM_D1, 53, + "cam_d1", "hw_dbg3", "sti_din", "gpio_53", + NULL, NULL, "etk_d3", NULL), + _OMAP2420_MUXENTRY(CAM_D2, 52, + "cam_d2", "hw_dbg4", "mcbsp1_clkx", "gpio_52", + NULL, NULL, "etk_d4", NULL), + _OMAP2420_MUXENTRY(CAM_D3, 51, + "cam_d3", "hw_dbg5", "mcbsp1_dr", "gpio_51", + NULL, NULL, "etk_d5", NULL), + _OMAP2420_MUXENTRY(CAM_D4, 50, + "cam_d4", "hw_dbg6", "mcbsp1_fsr", "gpio_50", + NULL, NULL, "etk_d6", NULL), + _OMAP2420_MUXENTRY(CAM_D5, 49, + "cam_d5", "hw_dbg7", "mcbsp1_clkr", "gpio_49", + NULL, NULL, "etk_d7", NULL), + _OMAP2420_MUXENTRY(CAM_D6, 0, + "cam_d6", "hw_dbg8", NULL, NULL, + NULL, NULL, "etk_d8", NULL), + _OMAP2420_MUXENTRY(CAM_D7, 0, + "cam_d7", "hw_dbg9", NULL, NULL, + NULL, NULL, "etk_d9", NULL), + _OMAP2420_MUXENTRY(CAM_D8, 54, + "cam_d8", "hw_dbg10", NULL, "gpio_54", + NULL, NULL, "etk_d10", NULL), + _OMAP2420_MUXENTRY(CAM_D9, 53, + "cam_d9", "hw_dbg11", NULL, "gpio_53", + NULL, NULL, "etk_d11", NULL), + _OMAP2420_MUXENTRY(CAM_HS, 55, + "cam_hs", "hw_dbg1", "mcbsp1_dx", "gpio_55", + NULL, NULL, "etk_d1", NULL), + _OMAP2420_MUXENTRY(CAM_LCLK, 57, + "cam_lclk", NULL, "mcbsp_clks", "gpio_57", + NULL, NULL, "etk_c1", NULL), + _OMAP2420_MUXENTRY(CAM_VS, 56, + "cam_vs", "hw_dbg0", "mcbsp1_fsx", "gpio_56", + NULL, NULL, "etk_d0", NULL), + _OMAP2420_MUXENTRY(CAM_XCLK, 0, + "cam_xclk", NULL, "sti_clk", NULL, + NULL, NULL, "etk_c2", NULL), + _OMAP2420_MUXENTRY(DSS_ACBIAS, 48, + "dss_acbias", NULL, "mcbsp2_fsx", "gpio_48", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA10, 40, + "dss_data10", NULL, NULL, "gpio_40", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA11, 41, + "dss_data11", NULL, NULL, "gpio_41", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA12, 42, + "dss_data12", NULL, NULL, "gpio_42", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA13, 43, + "dss_data13", NULL, NULL, "gpio_43", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA14, 44, + "dss_data14", NULL, NULL, "gpio_44", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA15, 45, + "dss_data15", NULL, NULL, "gpio_45", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA16, 46, + "dss_data16", NULL, NULL, "gpio_46", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA17, 47, + "dss_data17", NULL, NULL, "gpio_47", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA8, 38, + "dss_data8", NULL, NULL, "gpio_38", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(DSS_DATA9, 39, + "dss_data9", NULL, NULL, "gpio_39", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(EAC_AC_DIN, 115, + "eac_ac_din", "mcbsp2_dr", NULL, "gpio_115", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(EAC_AC_DOUT, 116, + "eac_ac_dout", "mcbsp2_dx", NULL, "gpio_116", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(EAC_AC_FS, 114, + "eac_ac_fs", "mcbsp2_fsx", NULL, "gpio_114", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(EAC_AC_MCLK, 117, + "eac_ac_mclk", NULL, NULL, "gpio_117", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(EAC_AC_RST, 118, + "eac_ac_rst", "eac_bt_din", NULL, "gpio_118", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(EAC_AC_SCLK, 113, + "eac_ac_sclk", "mcbsp2_clkx", NULL, "gpio_113", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(EAC_BT_DIN, 73, + "eac_bt_din", NULL, NULL, "gpio_73", + NULL, NULL, "etk_d9", NULL), + _OMAP2420_MUXENTRY(EAC_BT_DOUT, 74, + "eac_bt_dout", NULL, "sti_clk", "gpio_74", + NULL, NULL, "etk_d8", NULL), + _OMAP2420_MUXENTRY(EAC_BT_FS, 72, + "eac_bt_fs", NULL, NULL, "gpio_72", + NULL, NULL, "etk_d10", NULL), + _OMAP2420_MUXENTRY(EAC_BT_SCLK, 71, + "eac_bt_sclk", NULL, NULL, "gpio_71", + NULL, NULL, "etk_d11", NULL), + _OMAP2420_MUXENTRY(GPIO_119, 119, + "gpio_119", NULL, "sti_din", "gpio_119", + NULL, "sys_boot0", "etk_d12", NULL), + _OMAP2420_MUXENTRY(GPIO_120, 120, + "gpio_120", NULL, "sti_dout", "gpio_120", + "cam_d9", "sys_boot1", "etk_d13", NULL), + _OMAP2420_MUXENTRY(GPIO_121, 121, + "gpio_121", NULL, NULL, "gpio_121", + "jtag_emu2", "sys_boot2", "etk_d14", NULL), + _OMAP2420_MUXENTRY(GPIO_122, 122, + "gpio_122", NULL, NULL, "gpio_122", + "jtag_emu3", "sys_boot3", "etk_d15", NULL), + _OMAP2420_MUXENTRY(GPIO_124, 124, + "gpio_124", NULL, NULL, "gpio_124", + NULL, "sys_boot5", NULL, NULL), + _OMAP2420_MUXENTRY(GPIO_125, 125, + "gpio_125", "sys_jtagsel1", "sys_jtagsel2", "gpio_125", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPIO_36, 36, + "gpio_36", NULL, NULL, "gpio_36", + NULL, "sys_boot4", NULL, NULL), + _OMAP2420_MUXENTRY(GPIO_62, 62, + "gpio_62", "uart1_rx", "usb1_dat", "gpio_62", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPIO_6, 6, + "gpio_6", "tv_detpulse", NULL, "gpio_6", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A10, 3, + "gpmc_a10", NULL, "sys_ndmareq5", "gpio_3", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A1, 12, + "gpmc_a1", "dss_data18", NULL, "gpio_12", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A2, 11, + "gpmc_a2", "dss_data19", NULL, "gpio_11", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A3, 10, + "gpmc_a3", "dss_data20", NULL, "gpio_10", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A4, 9, + "gpmc_a4", "dss_data21", NULL, "gpio_9", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A5, 8, + "gpmc_a5", "dss_data22", NULL, "gpio_8", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A6, 7, + "gpmc_a6", "dss_data23", NULL, "gpio_7", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A7, 6, + "gpmc_a7", NULL, "sys_ndmareq2", "gpio_6", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A8, 5, + "gpmc_a8", NULL, "sys_ndmareq3", "gpio_5", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_A9, 4, + "gpmc_a9", NULL, "sys_ndmareq4", "gpio_4", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_CLK, 21, + "gpmc_clk", NULL, NULL, "gpio_21", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_D10, 18, + "gpmc_d10", "ssi2_rdy_rx", NULL, "gpio_18", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_D11, 17, + "gpmc_d11", "ssi2_flag_rx", NULL, "gpio_17", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_D12, 16, + "gpmc_d12", "ssi2_dat_rx", NULL, "gpio_16", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_D13, 15, + "gpmc_d13", "ssi2_rdy_tx", NULL, "gpio_15", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_D14, 14, + "gpmc_d14", "ssi2_flag_tx", NULL, "gpio_14", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_D15, 13, + "gpmc_d15", "ssi2_dat_tx", NULL, "gpio_13", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_D8, 20, + "gpmc_d8", NULL, NULL, "gpio_20", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_D9, 19, + "gpmc_d9", "ssi2_wake", NULL, "gpio_19", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NBE0, 29, + "gpmc_nbe0", NULL, NULL, "gpio_29", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NBE1, 30, + "gpmc_nbe1", NULL, NULL, "gpio_30", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NCS1, 22, + "gpmc_ncs1", NULL, NULL, "gpio_22", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NCS2, 23, + "gpmc_ncs2", NULL, NULL, "gpio_23", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NCS3, 24, + "gpmc_ncs3", "gpmc_io_dir", NULL, "gpio_24", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NCS4, 25, + "gpmc_ncs4", NULL, NULL, "gpio_25", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NCS5, 26, + "gpmc_ncs5", NULL, NULL, "gpio_26", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NCS6, 27, + "gpmc_ncs6", NULL, NULL, "gpio_27", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NCS7, 28, + "gpmc_ncs7", "gpmc_io_dir", "gpio_28", NULL, + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_NWP, 31, + "gpmc_nwp", NULL, NULL, "gpio_31", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_WAIT1, 33, + "gpmc_wait1", NULL, NULL, "gpio_33", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_WAIT2, 34, + "gpmc_wait2", NULL, NULL, "gpio_34", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(GPMC_WAIT3, 35, + "gpmc_wait3", NULL, NULL, "gpio_35", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(HDQ_SIO, 101, + "hdq_sio", "usb2_tllse0", "sys_altclk", "gpio_101", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(I2C2_SCL, 99, + "i2c2_scl", NULL, "gpt9_pwm_evt", "gpio_99", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(I2C2_SDA, 100, + "i2c2_sda", NULL, "spi2_ncs1", "gpio_100", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(JTAG_EMU0, 127, + "jtag_emu0", NULL, NULL, "gpio_127", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(JTAG_EMU1, 126, + "jtag_emu1", NULL, NULL, "gpio_126", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP1_CLKR, 92, + "mcbsp1_clkr", "ssi2_dat_tx", "vlynq_tx1", "gpio_92", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP1_CLKX, 98, + "mcbsp1_clkx", "ssi2_wake", "vlynq_nla", "gpio_98", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP1_DR, 95, + "mcbsp1_dr", "ssi2_dat_rx", "vlynq_rx1", "gpio_95", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP1_DX, 94, + "mcbsp1_dx", "ssi2_rdy_tx", "vlynq_clk", "gpio_94", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP1_FSR, 93, + "mcbsp1_fsr", "ssi2_flag_tx", "vlynq_tx0", "gpio_93", + "spi2_ncs1", NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP1_FSX, 97, + "mcbsp1_fsx", "ssi2_rdy_rx", NULL, "gpio_97", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP2_CLKX, 12, + "mcbsp2_clkx", NULL, "dss_data23", "gpio_12", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP2_DR, 11, + "mcbsp2_dr", NULL, "dss_data22", "gpio_11", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MCBSP_CLKS, 96, + "mcbsp_clks", "ssi2_flag_rx", "vlynq_rx0", "gpio_96", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_CLKI, 59, + "sdmmc_clki", "ms_clki", NULL, "gpio_59", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_CLKO, 0, + "sdmmc_clko", "ms_clko", NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_CMD_DIR, 8, + "sdmmc_cmd_dir", NULL, NULL, "gpio_8", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_CMD, 0, + "sdmmc_cmd", "ms_bs", NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_DAT_DIR0, 7, + "sdmmc_dat_dir0", "ms_dat0_dir", NULL, "gpio_7", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_DAT0, 0, + "sdmmc_dat0", "ms_dat0", NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_DAT_DIR1, 78, + "sdmmc_dat_dir1", "ms_datu_dir", "uart2_rts", "gpio_78", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_DAT1, 75, + "sdmmc_dat1", "ms_dat1", NULL, "gpio_75", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_DAT_DIR2, 79, + "sdmmc_dat_dir2", "ms_datu_dir", "uart2_tx", "gpio_79", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_DAT2, 76, + "sdmmc_dat2", "ms_dat2", "uart2_cts", "gpio_76", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_DAT_DIR3, 80, + "sdmmc_dat_dir3", "ms_datu_dir", "uart2_rx", "gpio_80", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(MMC_DAT3, 77, + "sdmmc_dat3", "ms_dat3", NULL, "gpio_77", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SDRC_A12, 2, + "sdrc_a12", NULL, NULL, "gpio_2", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SDRC_A13, 1, + "sdrc_a13", NULL, NULL, "gpio_1", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SDRC_A14, 0, + "sdrc_a14", NULL, NULL, "gpio_0", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SDRC_CKE1, 38, + "sdrc_cke1", NULL, NULL, "gpio_38", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SDRC_NCS1, 37, + "sdrc_ncs1", NULL, NULL, "gpio_37", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI1_CLK, 81, + "spi1_clk", NULL, NULL, "gpio_81", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI1_NCS0, 84, + "spi1_ncs0", NULL, NULL, "gpio_84", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI1_NCS1, 85, + "spi1_ncs1", NULL, NULL, "gpio_85", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI1_NCS2, 86, + "spi1_ncs2", NULL, NULL, "gpio_86", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI1_NCS3, 87, + "spi1_ncs3", NULL, NULL, "gpio_87", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI1_SIMO, 82, + "spi1_simo", NULL, NULL, "gpio_82", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI1_SOMI, 83, + "spi1_somi", NULL, NULL, "gpio_83", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI2_CLK, 88, + "spi2_clk", NULL, NULL, "gpio_88", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI2_NCS0, 91, + "spi2_ncs0", "gpt12_pwm_evt", NULL, "gpio_91", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI2_SIMO, 89, + "spi2_simo", "gpt10_pwm_evt", NULL, "gpio_89", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SPI2_SOMI, 90, + "spi2_somi", "gpt11_pwm_evt", NULL, "gpio_90", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SSI1_DAT_RX, 63, + "ssi1_dat_rx", "eac_md_sclk", NULL, "gpio_63", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SSI1_DAT_TX, 59, + "ssi1_dat_tx", "uart1_tx", "usb1_se0", "gpio_59", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SSI1_FLAG_RX, 64, + "ssi1_flag_rx", "eac_md_din", NULL, "gpio_64", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SSI1_FLAG_TX, 25, + "ssi1_flag_tx", "uart1_rts", "usb1_rcv", "gpio_25", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SSI1_RDY_RX, 65, + "ssi1_rdy_rx", "eac_md_dout", NULL, "gpio_65", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SSI1_RDY_TX, 61, + "ssi1_rdy_tx", "uart1_cts", "usb1_txen", "gpio_61", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SSI1_WAKE, 66, + "ssi1_wake", "eac_md_fs", NULL, "gpio_66", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SYS_CLKOUT, 123, + "sys_clkout", NULL, NULL, "gpio_123", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SYS_CLKREQ, 52, + "sys_clkreq", NULL, NULL, "gpio_52", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(SYS_NIRQ, 60, + "sys_nirq", NULL, NULL, "gpio_60", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART1_CTS, 32, + "uart1_cts", NULL, "dss_data18", "gpio_32", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART1_RTS, 8, + "uart1_rts", NULL, "dss_data19", "gpio_8", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART1_RX, 10, + "uart1_rx", NULL, "dss_data21", "gpio_10", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART1_TX, 9, + "uart1_tx", NULL, "dss_data20", "gpio_9", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART2_CTS, 67, + "uart2_cts", "usb1_rcv", "gpt9_pwm_evt", "gpio_67", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART2_RTS, 68, + "uart2_rts", "usb1_txen", "gpt10_pwm_evt", "gpio_68", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART2_RX, 70, + "uart2_rx", "usb1_dat", "gpt12_pwm_evt", "gpio_70", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART2_TX, 69, + "uart2_tx", "usb1_se0", "gpt11_pwm_evt", "gpio_69", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART3_CTS_RCTX, 102, + "uart3_cts_rctx", "uart3_rx_irrx", NULL, "gpio_102", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART3_RTS_SD, 103, + "uart3_rts_sd", "uart3_tx_irtx", NULL, "gpio_103", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART3_RX_IRRX, 105, + "uart3_rx_irrx", NULL, NULL, "gpio_105", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(UART3_TX_IRTX, 104, + "uart3_tx_irtx", "uart3_cts_rctx", NULL, "gpio_104", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(USB0_DAT, 112, + "usb0_dat", "uart3_rx_irrx", "uart2_rx", "gpio_112", + "uart2_tx", NULL, NULL, NULL), + _OMAP2420_MUXENTRY(USB0_PUEN, 106, + "usb0_puen", "mcbsp2_dx", NULL, "gpio_106", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(USB0_RCV, 109, + "usb0_rcv", "mcbsp2_fsx", NULL, "gpio_109", + "uart2_cts", NULL, NULL, NULL), + _OMAP2420_MUXENTRY(USB0_SE0, 111, + "usb0_se0", "uart3_tx_irtx", "uart2_tx", "gpio_111", + "uart2_rx", NULL, NULL, NULL), + _OMAP2420_MUXENTRY(USB0_TXEN, 110, + "usb0_txen", "uart3_cts_rctx", "uart2_cts", "gpio_110", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(USB0_VM, 108, + "usb0_vm", "mcbsp2_clkx", NULL, "gpio_108", + "uart2_rx", NULL, NULL, NULL), + _OMAP2420_MUXENTRY(USB0_VP, 107, + "usb0_vp", "mcbsp2_dr", NULL, "gpio_107", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(VLYNQ_CLK, 13, + "vlynq_clk", "usb2_se0", "sys_ndmareq0", "gpio_13", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(VLYNQ_NLA, 58, + "vlynq_nla", NULL, NULL, "gpio_58", + "cam_d6", NULL, NULL, NULL), + _OMAP2420_MUXENTRY(VLYNQ_RX0, 15, + "vlynq_rx0", "usb2_tllse0", NULL, "gpio_15", + "cam_d7", NULL, NULL, NULL), + _OMAP2420_MUXENTRY(VLYNQ_RX1, 14, + "vlynq_rx1", "usb2_rcv", "sys_ndmareq1", "gpio_14", + "cam_d8", NULL, NULL, NULL), + _OMAP2420_MUXENTRY(VLYNQ_TX0, 17, + "vlynq_tx0", "usb2_txen", NULL, "gpio_17", + NULL, NULL, NULL, NULL), + _OMAP2420_MUXENTRY(VLYNQ_TX1, 16, + "vlynq_tx1", "usb2_dat", "sys_clkout2", "gpio_16", + NULL, NULL, NULL, NULL), + { .reg_offset = OMAP_MUX_TERMINATOR }, +}; + +/* + * Balls for 447-pin POP package + */ +#ifdef CONFIG_DEBUG_FS +struct omap_ball __initdata omap2420_pop_ball[] = { + _OMAP2420_BALLENTRY(CAM_D0, "y4", NULL), + _OMAP2420_BALLENTRY(CAM_D1, "y3", NULL), + _OMAP2420_BALLENTRY(CAM_D2, "u7", NULL), + _OMAP2420_BALLENTRY(CAM_D3, "ab3", NULL), + _OMAP2420_BALLENTRY(CAM_D4, "v2", NULL), + _OMAP2420_BALLENTRY(CAM_D5, "ad3", NULL), + _OMAP2420_BALLENTRY(CAM_D6, "aa4", NULL), + _OMAP2420_BALLENTRY(CAM_D7, "ab4", NULL), + _OMAP2420_BALLENTRY(CAM_D8, "ac6", NULL), + _OMAP2420_BALLENTRY(CAM_D9, "ac7", NULL), + _OMAP2420_BALLENTRY(CAM_HS, "v4", NULL), + _OMAP2420_BALLENTRY(CAM_LCLK, "ad6", NULL), + _OMAP2420_BALLENTRY(CAM_VS, "p7", NULL), + _OMAP2420_BALLENTRY(CAM_XCLK, "w4", NULL), + _OMAP2420_BALLENTRY(DSS_ACBIAS, "ae8", NULL), + _OMAP2420_BALLENTRY(DSS_DATA10, "ac12", NULL), + _OMAP2420_BALLENTRY(DSS_DATA11, "ae11", NULL), + _OMAP2420_BALLENTRY(DSS_DATA12, "ae13", NULL), + _OMAP2420_BALLENTRY(DSS_DATA13, "ad13", NULL), + _OMAP2420_BALLENTRY(DSS_DATA14, "ac13", NULL), + _OMAP2420_BALLENTRY(DSS_DATA15, "y12", NULL), + _OMAP2420_BALLENTRY(DSS_DATA16, "ad14", NULL), + _OMAP2420_BALLENTRY(DSS_DATA17, "y13", NULL), + _OMAP2420_BALLENTRY(DSS_DATA8, "ad11", NULL), + _OMAP2420_BALLENTRY(DSS_DATA9, "ad12", NULL), + _OMAP2420_BALLENTRY(EAC_AC_DIN, "ad19", NULL), + _OMAP2420_BALLENTRY(EAC_AC_DOUT, "af22", NULL), + _OMAP2420_BALLENTRY(EAC_AC_FS, "ad16", NULL), + _OMAP2420_BALLENTRY(EAC_AC_MCLK, "y17", NULL), + _OMAP2420_BALLENTRY(EAC_AC_RST, "ae22", NULL), + _OMAP2420_BALLENTRY(EAC_AC_SCLK, "ac18", NULL), + _OMAP2420_BALLENTRY(EAC_BT_DIN, "u8", NULL), + _OMAP2420_BALLENTRY(EAC_BT_DOUT, "ad5", NULL), + _OMAP2420_BALLENTRY(EAC_BT_FS, "w7", NULL), + _OMAP2420_BALLENTRY(EAC_BT_SCLK, "ad4", NULL), + _OMAP2420_BALLENTRY(GPIO_119, "af6", NULL), + _OMAP2420_BALLENTRY(GPIO_120, "af4", NULL), + _OMAP2420_BALLENTRY(GPIO_121, "ae6", NULL), + _OMAP2420_BALLENTRY(GPIO_122, "w3", NULL), + _OMAP2420_BALLENTRY(GPIO_124, "y19", NULL), + _OMAP2420_BALLENTRY(GPIO_125, "ae24", NULL), + _OMAP2420_BALLENTRY(GPIO_36, "y18", NULL), + _OMAP2420_BALLENTRY(GPIO_6, "d6", NULL), + _OMAP2420_BALLENTRY(GPIO_62, "ad18", NULL), + _OMAP2420_BALLENTRY(GPMC_A1, "m8", NULL), + _OMAP2420_BALLENTRY(GPMC_A10, "d5", NULL), + _OMAP2420_BALLENTRY(GPMC_A2, "w9", NULL), + _OMAP2420_BALLENTRY(GPMC_A3, "af10", NULL), + _OMAP2420_BALLENTRY(GPMC_A4, "w8", NULL), + _OMAP2420_BALLENTRY(GPMC_A5, "ae16", NULL), + _OMAP2420_BALLENTRY(GPMC_A6, "af9", NULL), + _OMAP2420_BALLENTRY(GPMC_A7, "e4", NULL), + _OMAP2420_BALLENTRY(GPMC_A8, "j7", NULL), + _OMAP2420_BALLENTRY(GPMC_A9, "ae18", NULL), + _OMAP2420_BALLENTRY(GPMC_CLK, "p1", "l1"), + _OMAP2420_BALLENTRY(GPMC_D10, "t1", "n1"), + _OMAP2420_BALLENTRY(GPMC_D11, "u2", "p2"), + _OMAP2420_BALLENTRY(GPMC_D12, "u1", "p1"), + _OMAP2420_BALLENTRY(GPMC_D13, "p2", "m1"), + _OMAP2420_BALLENTRY(GPMC_D14, "h2", "j2"), + _OMAP2420_BALLENTRY(GPMC_D15, "h1", "k2"), + _OMAP2420_BALLENTRY(GPMC_D8, "v1", "r1"), + _OMAP2420_BALLENTRY(GPMC_D9, "y1", "t1"), + _OMAP2420_BALLENTRY(GPMC_NBE0, "af12", "aa10"), + _OMAP2420_BALLENTRY(GPMC_NBE1, "u3", NULL), + _OMAP2420_BALLENTRY(GPMC_NCS1, "af14", "w1"), + _OMAP2420_BALLENTRY(GPMC_NCS2, "g4", NULL), + _OMAP2420_BALLENTRY(GPMC_NCS3, "t8", NULL), + _OMAP2420_BALLENTRY(GPMC_NCS4, "h8", NULL), + _OMAP2420_BALLENTRY(GPMC_NCS5, "k3", NULL), + _OMAP2420_BALLENTRY(GPMC_NCS6, "m7", NULL), + _OMAP2420_BALLENTRY(GPMC_NCS7, "p3", NULL), + _OMAP2420_BALLENTRY(GPMC_NWP, "ae15", "y5"), + _OMAP2420_BALLENTRY(GPMC_WAIT1, "ae20", "y8"), + _OMAP2420_BALLENTRY(GPMC_WAIT2, "n2", NULL), + _OMAP2420_BALLENTRY(GPMC_WAIT3, "t4", NULL), + _OMAP2420_BALLENTRY(HDQ_SIO, "t23", NULL), + _OMAP2420_BALLENTRY(I2C2_SCL, "l2", NULL), + _OMAP2420_BALLENTRY(I2C2_SDA, "k19", NULL), + _OMAP2420_BALLENTRY(JTAG_EMU0, "n24", NULL), + _OMAP2420_BALLENTRY(JTAG_EMU1, "ac22", NULL), + _OMAP2420_BALLENTRY(MCBSP1_CLKR, "y24", NULL), + _OMAP2420_BALLENTRY(MCBSP1_CLKX, "t19", NULL), + _OMAP2420_BALLENTRY(MCBSP1_DR, "u23", NULL), + _OMAP2420_BALLENTRY(MCBSP1_DX, "r24", NULL), + _OMAP2420_BALLENTRY(MCBSP1_FSR, "r20", NULL), + _OMAP2420_BALLENTRY(MCBSP1_FSX, "r23", NULL), + _OMAP2420_BALLENTRY(MCBSP2_CLKX, "t24", NULL), + _OMAP2420_BALLENTRY(MCBSP2_DR, "p20", NULL), + _OMAP2420_BALLENTRY(MCBSP_CLKS, "p23", NULL), + _OMAP2420_BALLENTRY(MMC_CLKI, "c23", NULL), + _OMAP2420_BALLENTRY(MMC_CLKO, "h23", NULL), + _OMAP2420_BALLENTRY(MMC_CMD, "j23", NULL), + _OMAP2420_BALLENTRY(MMC_CMD_DIR, "j24", NULL), + _OMAP2420_BALLENTRY(MMC_DAT0, "h17", NULL), + _OMAP2420_BALLENTRY(MMC_DAT_DIR0, "f23", NULL), + _OMAP2420_BALLENTRY(MMC_DAT1, "g19", NULL), + _OMAP2420_BALLENTRY(MMC_DAT_DIR1, "d23", NULL), + _OMAP2420_BALLENTRY(MMC_DAT2, "h20", NULL), + _OMAP2420_BALLENTRY(MMC_DAT_DIR2, "g23", NULL), + _OMAP2420_BALLENTRY(MMC_DAT3, "d24", NULL), + _OMAP2420_BALLENTRY(MMC_DAT_DIR3, "e23", NULL), + _OMAP2420_BALLENTRY(SDRC_A12, "w26", "r21"), + _OMAP2420_BALLENTRY(SDRC_A13, "w25", "aa15"), + _OMAP2420_BALLENTRY(SDRC_A14, "aa26", "y12"), + _OMAP2420_BALLENTRY(SDRC_CKE1, "ae25", "y13"), + _OMAP2420_BALLENTRY(SDRC_NCS1, "y25", "t20"), + _OMAP2420_BALLENTRY(SPI1_CLK, "y23", NULL), + _OMAP2420_BALLENTRY(SPI1_NCS0, "w24", NULL), + _OMAP2420_BALLENTRY(SPI1_NCS1, "w23", NULL), + _OMAP2420_BALLENTRY(SPI1_NCS2, "v23", NULL), + _OMAP2420_BALLENTRY(SPI1_NCS3, "u20", NULL), + _OMAP2420_BALLENTRY(SPI1_SIMO, "h10", NULL), + _OMAP2420_BALLENTRY(SPI1_SOMI, "v19", NULL), + _OMAP2420_BALLENTRY(SPI2_CLK, "v24", NULL), + _OMAP2420_BALLENTRY(SPI2_NCS0, "aa24", NULL), + _OMAP2420_BALLENTRY(SPI2_SIMO, "u24", NULL), + _OMAP2420_BALLENTRY(SPI2_SOMI, "v25", NULL), + _OMAP2420_BALLENTRY(SSI1_DAT_RX, "w15", NULL), + _OMAP2420_BALLENTRY(SSI1_DAT_TX, "w13", NULL), + _OMAP2420_BALLENTRY(SSI1_FLAG_RX, "af11", NULL), + _OMAP2420_BALLENTRY(SSI1_FLAG_TX, "ac15", NULL), + _OMAP2420_BALLENTRY(SSI1_RDY_RX, "ac16", NULL), + _OMAP2420_BALLENTRY(SSI1_RDY_TX, "af15", NULL), + _OMAP2420_BALLENTRY(SSI1_WAKE, "ad15", NULL), + _OMAP2420_BALLENTRY(SYS_CLKOUT, "ae19", NULL), + _OMAP2420_BALLENTRY(SYS_CLKREQ, "ad20", NULL), + _OMAP2420_BALLENTRY(SYS_NIRQ, "y20", NULL), + _OMAP2420_BALLENTRY(UART1_CTS, "g20", NULL), + _OMAP2420_BALLENTRY(UART1_RTS, "k20", NULL), + _OMAP2420_BALLENTRY(UART1_RX, "t20", NULL), + _OMAP2420_BALLENTRY(UART1_TX, "h12", NULL), + _OMAP2420_BALLENTRY(UART2_CTS, "ac24", NULL), + _OMAP2420_BALLENTRY(UART2_RTS, "w20", NULL), + _OMAP2420_BALLENTRY(UART2_RX, "ad24", NULL), + _OMAP2420_BALLENTRY(UART2_TX, "ab24", NULL), + _OMAP2420_BALLENTRY(UART3_CTS_RCTX, "k24", NULL), + _OMAP2420_BALLENTRY(UART3_RTS_SD, "m20", NULL), + _OMAP2420_BALLENTRY(UART3_RX_IRRX, "h24", NULL), + _OMAP2420_BALLENTRY(UART3_TX_IRTX, "g24", NULL), + _OMAP2420_BALLENTRY(USB0_DAT, "j25", NULL), + _OMAP2420_BALLENTRY(USB0_PUEN, "l23", NULL), + _OMAP2420_BALLENTRY(USB0_RCV, "k23", NULL), + _OMAP2420_BALLENTRY(USB0_SE0, "l24", NULL), + _OMAP2420_BALLENTRY(USB0_TXEN, "m24", NULL), + _OMAP2420_BALLENTRY(USB0_VM, "n23", NULL), + _OMAP2420_BALLENTRY(USB0_VP, "m23", NULL), + _OMAP2420_BALLENTRY(VLYNQ_CLK, "w12", NULL), + _OMAP2420_BALLENTRY(VLYNQ_NLA, "ae10", NULL), + _OMAP2420_BALLENTRY(VLYNQ_RX0, "ad7", NULL), + _OMAP2420_BALLENTRY(VLYNQ_RX1, "w10", NULL), + _OMAP2420_BALLENTRY(VLYNQ_TX0, "y15", NULL), + _OMAP2420_BALLENTRY(VLYNQ_TX1, "w14", NULL), + { .reg_offset = OMAP_MUX_TERMINATOR }, +}; +#else +#define omap2420_pop_ball NULL +#endif + +int __init omap2420_mux_init(struct omap_board_mux *board_subset, int flags) +{ + struct omap_ball *package_balls = NULL; + + switch (flags & OMAP_PACKAGE_MASK) { + case OMAP_PACKAGE_ZAC: + package_balls = omap2420_pop_ball; + break; + case OMAP_PACKAGE_ZAF: + /* REVISIT: Please add data */ + default: + pr_warning("mux: No ball data available for omap2420 package\n"); + } + + return omap_mux_init(OMAP2420_CONTROL_PADCONF_MUX_PBASE, + OMAP2420_CONTROL_PADCONF_MUX_SIZE, + omap2420_muxmodes, NULL, board_subset, + package_balls); +} diff --git a/arch/arm/mach-omap2/mux2420.h b/arch/arm/mach-omap2/mux2420.h new file mode 100644 index 000000000000..0f555aa847b5 --- /dev/null +++ b/arch/arm/mach-omap2/mux2420.h @@ -0,0 +1,282 @@ +/* + * Copyright (C) 2009 Nokia + * Copyright (C) 2009 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define OMAP2420_CONTROL_PADCONF_MUX_PBASE 0x48000030LU + +#define OMAP2420_MUX(mode0, mux_value) \ +{ \ + .reg_offset = (OMAP2420_CONTROL_PADCONF_##mode0##_OFFSET), \ + .value = (mux_value), \ +} + +/* + * OMAP2420 CONTROL_PADCONF* register offsets for pin-muxing + * + * Extracted from the TRM. Add 0x48000030 to these values to get the + * absolute addresses. The name in the macro is the mode-0 name of + * the pin. NOTE: These registers are 8-bits wide. + */ +#define OMAP2420_CONTROL_PADCONF_SDRC_A14_OFFSET 0x000 +#define OMAP2420_CONTROL_PADCONF_SDRC_A13_OFFSET 0x001 +#define OMAP2420_CONTROL_PADCONF_SDRC_A12_OFFSET 0x002 +#define OMAP2420_CONTROL_PADCONF_SDRC_BA1_OFFSET 0x003 +#define OMAP2420_CONTROL_PADCONF_SDRC_BA0_OFFSET 0x004 +#define OMAP2420_CONTROL_PADCONF_SDRC_A11_OFFSET 0x005 +#define OMAP2420_CONTROL_PADCONF_SDRC_A10_OFFSET 0x006 +#define OMAP2420_CONTROL_PADCONF_SDRC_A9_OFFSET 0x007 +#define OMAP2420_CONTROL_PADCONF_SDRC_A8_OFFSET 0x008 +#define OMAP2420_CONTROL_PADCONF_SDRC_A7_OFFSET 0x009 +#define OMAP2420_CONTROL_PADCONF_SDRC_A6_OFFSET 0x00a +#define OMAP2420_CONTROL_PADCONF_SDRC_A5_OFFSET 0x00b +#define OMAP2420_CONTROL_PADCONF_SDRC_A4_OFFSET 0x00c +#define OMAP2420_CONTROL_PADCONF_SDRC_A3_OFFSET 0x00d +#define OMAP2420_CONTROL_PADCONF_SDRC_A2_OFFSET 0x00e +#define OMAP2420_CONTROL_PADCONF_SDRC_A1_OFFSET 0x00f +#define OMAP2420_CONTROL_PADCONF_SDRC_A0_OFFSET 0x010 +#define OMAP2420_CONTROL_PADCONF_SDRC_D31_OFFSET 0x021 +#define OMAP2420_CONTROL_PADCONF_SDRC_D30_OFFSET 0x022 +#define OMAP2420_CONTROL_PADCONF_SDRC_D29_OFFSET 0x023 +#define OMAP2420_CONTROL_PADCONF_SDRC_D28_OFFSET 0x024 +#define OMAP2420_CONTROL_PADCONF_SDRC_D27_OFFSET 0x025 +#define OMAP2420_CONTROL_PADCONF_SDRC_D26_OFFSET 0x026 +#define OMAP2420_CONTROL_PADCONF_SDRC_D25_OFFSET 0x027 +#define OMAP2420_CONTROL_PADCONF_SDRC_D24_OFFSET 0x028 +#define OMAP2420_CONTROL_PADCONF_SDRC_D23_OFFSET 0x029 +#define OMAP2420_CONTROL_PADCONF_SDRC_D22_OFFSET 0x02a +#define OMAP2420_CONTROL_PADCONF_SDRC_D21_OFFSET 0x02b +#define OMAP2420_CONTROL_PADCONF_SDRC_D20_OFFSET 0x02c +#define OMAP2420_CONTROL_PADCONF_SDRC_D19_OFFSET 0x02d +#define OMAP2420_CONTROL_PADCONF_SDRC_D18_OFFSET 0x02e +#define OMAP2420_CONTROL_PADCONF_SDRC_D17_OFFSET 0x02f +#define OMAP2420_CONTROL_PADCONF_SDRC_D16_OFFSET 0x030 +#define OMAP2420_CONTROL_PADCONF_SDRC_D15_OFFSET 0x031 +#define OMAP2420_CONTROL_PADCONF_SDRC_D14_OFFSET 0x032 +#define OMAP2420_CONTROL_PADCONF_SDRC_D13_OFFSET 0x033 +#define OMAP2420_CONTROL_PADCONF_SDRC_D12_OFFSET 0x034 +#define OMAP2420_CONTROL_PADCONF_SDRC_D11_OFFSET 0x035 +#define OMAP2420_CONTROL_PADCONF_SDRC_D10_OFFSET 0x036 +#define OMAP2420_CONTROL_PADCONF_SDRC_D9_OFFSET 0x037 +#define OMAP2420_CONTROL_PADCONF_SDRC_D8_OFFSET 0x038 +#define OMAP2420_CONTROL_PADCONF_SDRC_D7_OFFSET 0x039 +#define OMAP2420_CONTROL_PADCONF_SDRC_D6_OFFSET 0x03a +#define OMAP2420_CONTROL_PADCONF_SDRC_D5_OFFSET 0x03b +#define OMAP2420_CONTROL_PADCONF_SDRC_D4_OFFSET 0x03c +#define OMAP2420_CONTROL_PADCONF_SDRC_D3_OFFSET 0x03d +#define OMAP2420_CONTROL_PADCONF_SDRC_D2_OFFSET 0x03e +#define OMAP2420_CONTROL_PADCONF_SDRC_D1_OFFSET 0x03f +#define OMAP2420_CONTROL_PADCONF_SDRC_D0_OFFSET 0x040 +#define OMAP2420_CONTROL_PADCONF_GPMC_A10_OFFSET 0x041 +#define OMAP2420_CONTROL_PADCONF_GPMC_A9_OFFSET 0x042 +#define OMAP2420_CONTROL_PADCONF_GPMC_A8_OFFSET 0x043 +#define OMAP2420_CONTROL_PADCONF_GPMC_A7_OFFSET 0x044 +#define OMAP2420_CONTROL_PADCONF_GPMC_A6_OFFSET 0x045 +#define OMAP2420_CONTROL_PADCONF_GPMC_A5_OFFSET 0x046 +#define OMAP2420_CONTROL_PADCONF_GPMC_A4_OFFSET 0x047 +#define OMAP2420_CONTROL_PADCONF_GPMC_A3_OFFSET 0x048 +#define OMAP2420_CONTROL_PADCONF_GPMC_A2_OFFSET 0x049 +#define OMAP2420_CONTROL_PADCONF_GPMC_A1_OFFSET 0x04a +#define OMAP2420_CONTROL_PADCONF_GPMC_D15_OFFSET 0x04b +#define OMAP2420_CONTROL_PADCONF_GPMC_D14_OFFSET 0x04c +#define OMAP2420_CONTROL_PADCONF_GPMC_D13_OFFSET 0x04d +#define OMAP2420_CONTROL_PADCONF_GPMC_D12_OFFSET 0x04e +#define OMAP2420_CONTROL_PADCONF_GPMC_D11_OFFSET 0x04f +#define OMAP2420_CONTROL_PADCONF_GPMC_D10_OFFSET 0x050 +#define OMAP2420_CONTROL_PADCONF_GPMC_D9_OFFSET 0x051 +#define OMAP2420_CONTROL_PADCONF_GPMC_D8_OFFSET 0x052 +#define OMAP2420_CONTROL_PADCONF_GPMC_D7_OFFSET 0x053 +#define OMAP2420_CONTROL_PADCONF_GPMC_D6_OFFSET 0x054 +#define OMAP2420_CONTROL_PADCONF_GPMC_D5_OFFSET 0x055 +#define OMAP2420_CONTROL_PADCONF_GPMC_D4_OFFSET 0x056 +#define OMAP2420_CONTROL_PADCONF_GPMC_D3_OFFSET 0x057 +#define OMAP2420_CONTROL_PADCONF_GPMC_D2_OFFSET 0x058 +#define OMAP2420_CONTROL_PADCONF_GPMC_D1_OFFSET 0x059 +#define OMAP2420_CONTROL_PADCONF_GPMC_D0_OFFSET 0x05a +#define OMAP2420_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x05b +#define OMAP2420_CONTROL_PADCONF_GPMC_NCS0_OFFSET 0x05c +#define OMAP2420_CONTROL_PADCONF_GPMC_NCS1_OFFSET 0x05d +#define OMAP2420_CONTROL_PADCONF_GPMC_NCS2_OFFSET 0x05e +#define OMAP2420_CONTROL_PADCONF_GPMC_NCS3_OFFSET 0x05f +#define OMAP2420_CONTROL_PADCONF_GPMC_NCS4_OFFSET 0x060 +#define OMAP2420_CONTROL_PADCONF_GPMC_NCS5_OFFSET 0x061 +#define OMAP2420_CONTROL_PADCONF_GPMC_NCS6_OFFSET 0x062 +#define OMAP2420_CONTROL_PADCONF_GPMC_NCS7_OFFSET 0x063 +#define OMAP2420_CONTROL_PADCONF_GPMC_NALE_ALE_OFFSET 0x064 +#define OMAP2420_CONTROL_PADCONF_GPMC_NOE_OFFSET 0x065 +#define OMAP2420_CONTROL_PADCONF_GPMC_NWE_OFFSET 0x066 +#define OMAP2420_CONTROL_PADCONF_GPMC_NBE0_OFFSET 0x067 +#define OMAP2420_CONTROL_PADCONF_GPMC_NBE1_OFFSET 0x068 +#define OMAP2420_CONTROL_PADCONF_GPMC_NWP_OFFSET 0x069 +#define OMAP2420_CONTROL_PADCONF_GPMC_WAIT0_OFFSET 0x06a +#define OMAP2420_CONTROL_PADCONF_GPMC_WAIT1_OFFSET 0x06b +#define OMAP2420_CONTROL_PADCONF_GPMC_WAIT2_OFFSET 0x06c +#define OMAP2420_CONTROL_PADCONF_GPMC_WAIT3_OFFSET 0x06d +#define OMAP2420_CONTROL_PADCONF_SDRC_CLK_OFFSET 0x06e +#define OMAP2420_CONTROL_PADCONF_SDRC_NCLK_OFFSET 0x06f +#define OMAP2420_CONTROL_PADCONF_SDRC_NCS0_OFFSET 0x070 +#define OMAP2420_CONTROL_PADCONF_SDRC_NCS1_OFFSET 0x071 +#define OMAP2420_CONTROL_PADCONF_SDRC_CKE0_OFFSET 0x072 +#define OMAP2420_CONTROL_PADCONF_SDRC_CKE1_OFFSET 0x073 +#define OMAP2420_CONTROL_PADCONF_SDRC_NRAS_OFFSET 0x074 +#define OMAP2420_CONTROL_PADCONF_SDRC_NCAS_OFFSET 0x075 +#define OMAP2420_CONTROL_PADCONF_SDRC_NWE_OFFSET 0x076 +#define OMAP2420_CONTROL_PADCONF_SDRC_DM0_OFFSET 0x077 +#define OMAP2420_CONTROL_PADCONF_SDRC_DM1_OFFSET 0x078 +#define OMAP2420_CONTROL_PADCONF_SDRC_DM2_OFFSET 0x079 +#define OMAP2420_CONTROL_PADCONF_SDRC_DM3_OFFSET 0x07a +#define OMAP2420_CONTROL_PADCONF_SDRC_DQS0_OFFSET 0x07f +#define OMAP2420_CONTROL_PADCONF_SDRC_DQS1_OFFSET 0x080 +#define OMAP2420_CONTROL_PADCONF_SDRC_DQS2_OFFSET 0x081 +#define OMAP2420_CONTROL_PADCONF_SDRC_DQS3_OFFSET 0x082 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA0_OFFSET 0x083 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA1_OFFSET 0x084 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA2_OFFSET 0x085 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA3_OFFSET 0x086 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA4_OFFSET 0x087 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA5_OFFSET 0x088 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA6_OFFSET 0x089 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA7_OFFSET 0x08a +#define OMAP2420_CONTROL_PADCONF_DSS_DATA8_OFFSET 0x08b +#define OMAP2420_CONTROL_PADCONF_DSS_DATA9_OFFSET 0x08c +#define OMAP2420_CONTROL_PADCONF_DSS_DATA10_OFFSET 0x08d +#define OMAP2420_CONTROL_PADCONF_DSS_DATA11_OFFSET 0x08e +#define OMAP2420_CONTROL_PADCONF_DSS_DATA12_OFFSET 0x08f +#define OMAP2420_CONTROL_PADCONF_DSS_DATA13_OFFSET 0x090 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA14_OFFSET 0x091 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA15_OFFSET 0x092 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA16_OFFSET 0x093 +#define OMAP2420_CONTROL_PADCONF_DSS_DATA17_OFFSET 0x094 +#define OMAP2420_CONTROL_PADCONF_UART1_CTS_OFFSET 0x095 +#define OMAP2420_CONTROL_PADCONF_UART1_RTS_OFFSET 0x096 +#define OMAP2420_CONTROL_PADCONF_UART1_TX_OFFSET 0x097 +#define OMAP2420_CONTROL_PADCONF_UART1_RX_OFFSET 0x098 +#define OMAP2420_CONTROL_PADCONF_MCBSP2_DR_OFFSET 0x099 +#define OMAP2420_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET 0x09a +#define OMAP2420_CONTROL_PADCONF_DSS_PCL_OFFSET 0x09b +#define OMAP2420_CONTROL_PADCONF_DSS_VSYNC_OFFSET 0x09c +#define OMAP2420_CONTROL_PADCONF_DSS_HSYNC_OFFSET 0x09d +#define OMAP2420_CONTROL_PADCONF_DSS_ACBIAS_OFFSET 0x09e +#define OMAP2420_CONTROL_PADCONF_CAM_D9_OFFSET 0x09f +#define OMAP2420_CONTROL_PADCONF_CAM_D8_OFFSET 0x0a0 +#define OMAP2420_CONTROL_PADCONF_CAM_D7_OFFSET 0x0a1 +#define OMAP2420_CONTROL_PADCONF_CAM_D6_OFFSET 0x0a2 +#define OMAP2420_CONTROL_PADCONF_CAM_D5_OFFSET 0x0a3 +#define OMAP2420_CONTROL_PADCONF_CAM_D4_OFFSET 0x0a4 +#define OMAP2420_CONTROL_PADCONF_CAM_D3_OFFSET 0x0a5 +#define OMAP2420_CONTROL_PADCONF_CAM_D2_OFFSET 0x0a6 +#define OMAP2420_CONTROL_PADCONF_CAM_D1_OFFSET 0x0a7 +#define OMAP2420_CONTROL_PADCONF_CAM_D0_OFFSET 0x0a8 +#define OMAP2420_CONTROL_PADCONF_CAM_HS_OFFSET 0x0a9 +#define OMAP2420_CONTROL_PADCONF_CAM_VS_OFFSET 0x0aa +#define OMAP2420_CONTROL_PADCONF_CAM_LCLK_OFFSET 0x0ab +#define OMAP2420_CONTROL_PADCONF_CAM_XCLK_OFFSET 0x0ac +#define OMAP2420_CONTROL_PADCONF_SSI1_DAT_TX_OFFSET 0x0ad +#define OMAP2420_CONTROL_PADCONF_SSI1_FLAG_TX_OFFSET 0x0ae +#define OMAP2420_CONTROL_PADCONF_SSI1_RDY_TX_OFFSET 0x0af +#define OMAP2420_CONTROL_PADCONF_GPIO_62_OFFSET 0x0b0 +#define OMAP2420_CONTROL_PADCONF_SSI1_DAT_RX_OFFSET 0x0b1 +#define OMAP2420_CONTROL_PADCONF_SSI1_FLAG_RX_OFFSET 0x0b2 +#define OMAP2420_CONTROL_PADCONF_SSI1_RDY_RX_OFFSET 0x0b3 +#define OMAP2420_CONTROL_PADCONF_SSI1_WAKE_OFFSET 0x0b4 +#define OMAP2420_CONTROL_PADCONF_VLYNQ_CLK_OFFSET 0x0b5 +#define OMAP2420_CONTROL_PADCONF_VLYNQ_RX1_OFFSET 0x0b6 +#define OMAP2420_CONTROL_PADCONF_VLYNQ_RX0_OFFSET 0x0b7 +#define OMAP2420_CONTROL_PADCONF_VLYNQ_TX1_OFFSET 0x0b8 +#define OMAP2420_CONTROL_PADCONF_VLYNQ_TX0_OFFSET 0x0b9 +#define OMAP2420_CONTROL_PADCONF_VLYNQ_NLA_OFFSET 0x0ba +#define OMAP2420_CONTROL_PADCONF_UART2_CTS_OFFSET 0x0bb +#define OMAP2420_CONTROL_PADCONF_UART2_RTS_OFFSET 0x0bc +#define OMAP2420_CONTROL_PADCONF_UART2_TX_OFFSET 0x0bd +#define OMAP2420_CONTROL_PADCONF_UART2_RX_OFFSET 0x0be +#define OMAP2420_CONTROL_PADCONF_EAC_BT_SCLK_OFFSET 0x0bf +#define OMAP2420_CONTROL_PADCONF_EAC_BT_FS_OFFSET 0x0c0 +#define OMAP2420_CONTROL_PADCONF_EAC_BT_DIN_OFFSET 0x0c1 +#define OMAP2420_CONTROL_PADCONF_EAC_BT_DOUT_OFFSET 0x0c2 +#define OMAP2420_CONTROL_PADCONF_MMC_CLKO_OFFSET 0x0c3 +#define OMAP2420_CONTROL_PADCONF_MMC_CMD_OFFSET 0x0c4 +#define OMAP2420_CONTROL_PADCONF_MMC_DAT0_OFFSET 0x0c5 +#define OMAP2420_CONTROL_PADCONF_MMC_DAT1_OFFSET 0x0c6 +#define OMAP2420_CONTROL_PADCONF_MMC_DAT2_OFFSET 0x0c7 +#define OMAP2420_CONTROL_PADCONF_MMC_DAT3_OFFSET 0x0c8 +#define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR0_OFFSET 0x0c9 +#define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR1_OFFSET 0x0ca +#define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR2_OFFSET 0x0cb +#define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR3_OFFSET 0x0cc +#define OMAP2420_CONTROL_PADCONF_MMC_CMD_DIR_OFFSET 0x0cd +#define OMAP2420_CONTROL_PADCONF_MMC_CLKI_OFFSET 0x0ce +#define OMAP2420_CONTROL_PADCONF_SPI1_CLK_OFFSET 0x0cf +#define OMAP2420_CONTROL_PADCONF_SPI1_SIMO_OFFSET 0x0d0 +#define OMAP2420_CONTROL_PADCONF_SPI1_SOMI_OFFSET 0x0d1 +#define OMAP2420_CONTROL_PADCONF_SPI1_NCS0_OFFSET 0x0d2 +#define OMAP2420_CONTROL_PADCONF_SPI1_NCS1_OFFSET 0x0d3 +#define OMAP2420_CONTROL_PADCONF_SPI1_NCS2_OFFSET 0x0d4 +#define OMAP2420_CONTROL_PADCONF_SPI1_NCS3_OFFSET 0x0d5 +#define OMAP2420_CONTROL_PADCONF_SPI2_CLK_OFFSET 0x0d6 +#define OMAP2420_CONTROL_PADCONF_SPI2_SIMO_OFFSET 0x0d7 +#define OMAP2420_CONTROL_PADCONF_SPI2_SOMI_OFFSET 0x0d8 +#define OMAP2420_CONTROL_PADCONF_SPI2_NCS0_OFFSET 0x0d9 +#define OMAP2420_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET 0x0da +#define OMAP2420_CONTROL_PADCONF_MCBSP1_FSR_OFFSET 0x0db +#define OMAP2420_CONTROL_PADCONF_MCBSP1_DX_OFFSET 0x0dc +#define OMAP2420_CONTROL_PADCONF_MCBSP1_DR_OFFSET 0x0dd +#define OMAP2420_CONTROL_PADCONF_MCBSP_CLKS_OFFSET 0x0de +#define OMAP2420_CONTROL_PADCONF_MCBSP1_FSX_OFFSET 0x0df +#define OMAP2420_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET 0x0e0 +#define OMAP2420_CONTROL_PADCONF_I2C1_SCL_OFFSET 0x0e1 +#define OMAP2420_CONTROL_PADCONF_I2C1_SDA_OFFSET 0x0e2 +#define OMAP2420_CONTROL_PADCONF_I2C2_SCL_OFFSET 0x0e3 +#define OMAP2420_CONTROL_PADCONF_I2C2_SDA_OFFSET 0x0e4 +#define OMAP2420_CONTROL_PADCONF_HDQ_SIO_OFFSET 0x0e5 +#define OMAP2420_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET 0x0e6 +#define OMAP2420_CONTROL_PADCONF_UART3_RTS_SD_OFFSET 0x0e7 +#define OMAP2420_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET 0x0e8 +#define OMAP2420_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET 0x0e9 +#define OMAP2420_CONTROL_PADCONF_TV_CVBS_OFFSET 0x0ea +#define OMAP2420_CONTROL_PADCONF_TV_VREF_OFFSET 0x0eb +#define OMAP2420_CONTROL_PADCONF_TV_RREF_OFFSET 0x0ec +#define OMAP2420_CONTROL_PADCONF_USB0_PUEN_OFFSET 0x0ed +#define OMAP2420_CONTROL_PADCONF_USB0_VP_OFFSET 0x0ee +#define OMAP2420_CONTROL_PADCONF_USB0_VM_OFFSET 0x0ef +#define OMAP2420_CONTROL_PADCONF_USB0_RCV_OFFSET 0x0f0 +#define OMAP2420_CONTROL_PADCONF_USB0_TXEN_OFFSET 0x0f1 +#define OMAP2420_CONTROL_PADCONF_USB0_SE0_OFFSET 0x0f2 +#define OMAP2420_CONTROL_PADCONF_USB0_DAT_OFFSET 0x0f3 +#define OMAP2420_CONTROL_PADCONF_EAC_AC_SCLK_OFFSET 0x0f4 +#define OMAP2420_CONTROL_PADCONF_EAC_AC_FS_OFFSET 0x0f5 +#define OMAP2420_CONTROL_PADCONF_EAC_AC_DIN_OFFSET 0x0f6 +#define OMAP2420_CONTROL_PADCONF_EAC_AC_DOUT_OFFSET 0x0f7 +#define OMAP2420_CONTROL_PADCONF_EAC_AC_MCLK_OFFSET 0x0f8 +#define OMAP2420_CONTROL_PADCONF_EAC_AC_RST_OFFSET 0x0f9 +#define OMAP2420_CONTROL_PADCONF_SYS_NRESPWRON_OFFSET 0x0fa +#define OMAP2420_CONTROL_PADCONF_SYS_NRESWARM_OFFSET 0x0fb +#define OMAP2420_CONTROL_PADCONF_SYS_NIRQ_OFFSET 0x0fc +#define OMAP2420_CONTROL_PADCONF_SYS_NV_OFFSET 0x0fd +#define OMAP2420_CONTROL_PADCONF_GPIO_119_OFFSET 0x0fe +#define OMAP2420_CONTROL_PADCONF_GPIO_120_OFFSET 0x0ff +#define OMAP2420_CONTROL_PADCONF_GPIO_121_OFFSET 0x100 +#define OMAP2420_CONTROL_PADCONF_GPIO_122_OFFSET 0x101 +#define OMAP2420_CONTROL_PADCONF_SYS_32K_OFFSET 0x102 +#define OMAP2420_CONTROL_PADCONF_SYS_XTALIN_OFFSET 0x103 +#define OMAP2420_CONTROL_PADCONF_SYS_XTALOUT_OFFSET 0x104 +#define OMAP2420_CONTROL_PADCONF_GPIO_36_OFFSET 0x105 +#define OMAP2420_CONTROL_PADCONF_SYS_CLKREQ_OFFSET 0x106 +#define OMAP2420_CONTROL_PADCONF_SYS_CLKOUT_OFFSET 0x107 +#define OMAP2420_CONTROL_PADCONF_GPIO_6_OFFSET 0x108 +#define OMAP2420_CONTROL_PADCONF_GPIO_124_OFFSET 0x109 +#define OMAP2420_CONTROL_PADCONF_GPIO_125_OFFSET 0x10a +#define OMAP2420_CONTROL_PADCONF_JTAG_EMU1_OFFSET 0x10b +#define OMAP2420_CONTROL_PADCONF_JTAG_EMU0_OFFSET 0x10c +#define OMAP2420_CONTROL_PADCONF_JTAG_NTRST_OFFSET 0x10d +#define OMAP2420_CONTROL_PADCONF_JTAG_TCK_OFFSET 0x10e +#define OMAP2420_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0x10f +#define OMAP2420_CONTROL_PADCONF_JTAG_TMS_OFFSET 0x110 +#define OMAP2420_CONTROL_PADCONF_JTAG_TDI_OFFSET 0x111 +#define OMAP2420_CONTROL_PADCONF_JTAG_TDO_OFFSET 0x112 + +#define OMAP2420_CONTROL_PADCONF_MUX_SIZE \ + (OMAP2420_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x1) diff --git a/arch/arm/mach-omap2/mux2430.c b/arch/arm/mach-omap2/mux2430.c new file mode 100644 index 000000000000..7dcaaa8af32a --- /dev/null +++ b/arch/arm/mach-omap2/mux2430.c @@ -0,0 +1,791 @@ +/* + * Copyright (C) 2010 Nokia + * Copyright (C) 2010 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +#include "mux.h" + +#ifdef CONFIG_OMAP_MUX + +#define _OMAP2430_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ +{ \ + .reg_offset = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET), \ + .gpio = (g), \ + .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \ +} + +#else + +#define _OMAP2430_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ +{ \ + .reg_offset = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET), \ + .gpio = (g), \ +} + +#endif + +#define _OMAP2430_BALLENTRY(M0, bb, bt) \ +{ \ + .reg_offset = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET), \ + .balls = { bb, bt }, \ +} + +/* + * Superset of all mux modes for omap2430 + */ +static struct omap_mux __initdata omap2430_muxmodes[] = { + _OMAP2430_MUXENTRY(CAM_D0, 133, + "cam_d0", "hw_dbg0", "sti_dout", "gpio_133", + NULL, NULL, "etk_d2", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D10, 146, + "cam_d10", NULL, NULL, "gpio_146", + NULL, NULL, "etk_d12", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D11, 145, + "cam_d11", NULL, NULL, "gpio_145", + NULL, NULL, "etk_d13", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D1, 132, + "cam_d1", "hw_dbg1", "sti_din", "gpio_132", + NULL, NULL, "etk_d3", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D2, 129, + "cam_d2", "hw_dbg2", "mcbsp1_clkx", "gpio_129", + NULL, NULL, "etk_d4", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D3, 128, + "cam_d3", "hw_dbg3", "mcbsp1_dr", "gpio_128", + NULL, NULL, "etk_d5", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D4, 143, + "cam_d4", "hw_dbg4", "mcbsp1_fsr", "gpio_143", + NULL, NULL, "etk_d6", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D5, 112, + "cam_d5", "hw_dbg5", "mcbsp1_clkr", "gpio_112", + NULL, NULL, "etk_d7", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D6, 137, + "cam_d6", "hw_dbg6", NULL, "gpio_137", + NULL, NULL, "etk_d8", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D7, 136, + "cam_d7", "hw_dbg7", NULL, "gpio_136", + NULL, NULL, "etk_d9", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D8, 135, + "cam_d8", "hw_dbg8", NULL, "gpio_135", + NULL, NULL, "etk_d10", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_D9, 134, + "cam_d9", "hw_dbg9", NULL, "gpio_134", + NULL, NULL, "etk_d11", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_HS, 11, + "cam_hs", "hw_dbg10", "mcbsp1_dx", "gpio_11", + NULL, NULL, "etk_d1", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_LCLK, 0, + "cam_lclk", NULL, "mcbsp_clks", NULL, + NULL, NULL, "etk_c1", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_VS, 12, + "cam_vs", "hw_dbg11", "mcbsp1_fsx", "gpio_12", + NULL, NULL, "etk_d0", "safe_mode"), + _OMAP2430_MUXENTRY(CAM_XCLK, 0, + "cam_xclk", NULL, "sti_clk", NULL, + NULL, NULL, "etk_c2", NULL), + _OMAP2430_MUXENTRY(DSS_ACBIAS, 48, + "dss_acbias", NULL, "mcbsp2_fsx", "gpio_48", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA0, 40, + "dss_data0", "uart1_cts", NULL, "gpio_40", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA10, 128, + "dss_data10", "sdi_data1n", NULL, "gpio_128", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA11, 129, + "dss_data11", "sdi_data1p", NULL, "gpio_129", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA12, 130, + "dss_data12", "sdi_data2n", NULL, "gpio_130", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA13, 131, + "dss_data13", "sdi_data2p", NULL, "gpio_131", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA14, 132, + "dss_data14", "sdi_data3n", NULL, "gpio_132", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA15, 133, + "dss_data15", "sdi_data3p", NULL, "gpio_133", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA16, 46, + "dss_data16", NULL, NULL, "gpio_46", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA17, 47, + "dss_data17", NULL, NULL, "gpio_47", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA1, 41, + "dss_data1", "uart1_rts", NULL, "gpio_41", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA2, 42, + "dss_data2", "uart1_tx", NULL, "gpio_42", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA3, 43, + "dss_data3", "uart1_rx", NULL, "gpio_43", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA4, 44, + "dss_data4", "uart3_rx_irrx", NULL, "gpio_44", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA5, 45, + "dss_data5", "uart3_tx_irtx", NULL, "gpio_45", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA6, 144, + "dss_data6", NULL, NULL, "gpio_144", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA7, 147, + "dss_data7", NULL, NULL, "gpio_147", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA8, 38, + "dss_data8", NULL, NULL, "gpio_38", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_DATA9, 39, + "dss_data9", NULL, NULL, "gpio_39", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(DSS_HSYNC, 110, + "dss_hsync", NULL, NULL, "gpio_110", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_113, 113, + "gpio_113", "mcbsp2_clkx", NULL, "gpio_113", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_114, 114, + "gpio_114", "mcbsp2_fsx", NULL, "gpio_114", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_115, 115, + "gpio_115", "mcbsp2_dr", NULL, "gpio_115", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_116, 116, + "gpio_116", "mcbsp2_dx", NULL, "gpio_116", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_128, 128, + "gpio_128", NULL, "sti_din", "gpio_128", + NULL, "sys_boot0", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_129, 129, + "gpio_129", NULL, "sti_dout", "gpio_129", + NULL, "sys_boot1", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_130, 130, + "gpio_130", NULL, NULL, "gpio_130", + "jtag_emu2", "sys_boot2", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_131, 131, + "gpio_131", NULL, NULL, "gpio_131", + "jtag_emu3", "sys_boot3", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_132, 132, + "gpio_132", NULL, NULL, "gpio_132", + NULL, "sys_boot4", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_133, 133, + "gpio_133", NULL, NULL, "gpio_133", + NULL, "sys_boot5", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_134, 134, + "gpio_134", "ccp_datn", NULL, "gpio_134", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_135, 135, + "gpio_135", "ccp_datp", NULL, "gpio_135", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_136, 136, + "gpio_136", "ccp_clkn", NULL, "gpio_136", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_137, 137, + "gpio_137", "ccp_clkp", NULL, "gpio_137", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_138, 138, + "gpio_138", "spi3_clk", NULL, "gpio_138", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_139, 139, + "gpio_139", "spi3_cs0", "sys_ndmareq3", "gpio_139", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_140, 140, + "gpio_140", "spi3_simo", "sys_ndmareq4", "gpio_140", + NULL, NULL, "etk_d14", "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_141, 141, + "gpio_141", "spi3_somi", NULL, "gpio_141", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_142, 142, + "gpio_142", "spi3_cs1", "sys_ndmareq2", "gpio_142", + NULL, NULL, "etk_d15", "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_148, 148, + "gpio_148", "mcbsp5_fsx", NULL, "gpio_148", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_149, 149, + "gpio_149", "mcbsp5_dx", NULL, "gpio_149", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_150, 150, + "gpio_150", "mcbsp5_dr", NULL, "gpio_150", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_151, 151, + "gpio_151", "sys_pwrok", NULL, "gpio_151", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_152, 152, + "gpio_152", "uart1_cts", "sys_ndmareq1", "gpio_152", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_153, 153, + "gpio_153", "uart1_rx", "sys_ndmareq0", "gpio_153", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_154, 154, + "gpio_154", "mcbsp5_clkx", NULL, "gpio_154", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_63, 63, + "gpio_63", "mcbsp4_clkx", NULL, "gpio_63", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_78, 78, + "gpio_78", NULL, "uart2_rts", "gpio_78", + "uart3_rts_sd", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_79, 79, + "gpio_79", "secure_indicator", "uart2_tx", "gpio_79", + "uart3_tx_irtx", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_7, 7, + "gpio_7", NULL, "uart2_cts", "gpio_7", + "uart3_cts_rctx", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPIO_80, 80, + "gpio_80", NULL, "uart2_rx", "gpio_80", + "uart3_rx_irrx", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A10, 3, + "gpmc_a10", NULL, "sys_ndmareq0", "gpio_3", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A1, 31, + "gpmc_a1", NULL, NULL, "gpio_31", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A2, 30, + "gpmc_a2", NULL, NULL, "gpio_30", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A3, 29, + "gpmc_a3", NULL, NULL, "gpio_29", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A4, 49, + "gpmc_a4", NULL, NULL, "gpio_49", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A5, 53, + "gpmc_a5", NULL, NULL, "gpio_53", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A6, 52, + "gpmc_a6", NULL, NULL, "gpio_52", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A7, 6, + "gpmc_a7", NULL, NULL, "gpio_6", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A8, 5, + "gpmc_a8", NULL, NULL, "gpio_5", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_A9, 4, + "gpmc_a9", NULL, "sys_ndmareq1", "gpio_4", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_CLK, 21, + "gpmc_clk", NULL, NULL, "gpio_21", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_D10, 18, + "gpmc_d10", NULL, NULL, "gpio_18", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_D11, 57, + "gpmc_d11", NULL, NULL, "gpio_57", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_D12, 77, + "gpmc_d12", NULL, NULL, "gpio_77", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_D13, 76, + "gpmc_d13", NULL, NULL, "gpio_76", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_D14, 55, + "gpmc_d14", NULL, NULL, "gpio_55", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_D15, 54, + "gpmc_d15", NULL, NULL, "gpio_54", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_D8, 20, + "gpmc_d8", NULL, NULL, "gpio_20", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_D9, 19, + "gpmc_d9", NULL, NULL, "gpio_19", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_NCS1, 22, + "gpmc_ncs1", NULL, NULL, "gpio_22", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_NCS2, 23, + "gpmc_ncs2", NULL, NULL, "gpio_23", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_NCS3, 24, + "gpmc_ncs3", "gpmc_io_dir", NULL, "gpio_24", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_NCS4, 25, + "gpmc_ncs4", NULL, NULL, "gpio_25", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_NCS5, 26, + "gpmc_ncs5", NULL, NULL, "gpio_26", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_NCS6, 27, + "gpmc_ncs6", NULL, NULL, "gpio_27", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_NCS7, 28, + "gpmc_ncs7", "gpmc_io_dir", NULL, "gpio_28", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_WAIT1, 33, + "gpmc_wait1", NULL, NULL, "gpio_33", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_WAIT2, 34, + "gpmc_wait2", NULL, NULL, "gpio_34", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(GPMC_WAIT3, 35, + "gpmc_wait3", NULL, NULL, "gpio_35", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(HDQ_SIO, 101, + "hdq_sio", "usb2_tllse0", "sys_altclk", "gpio_101", + "uart3_rx_irrx", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(I2C1_SCL, 50, + "i2c1_scl", NULL, NULL, "gpio_50", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(I2C1_SDA, 51, + "i2c1_sda", NULL, NULL, "gpio_51", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(I2C2_SCL, 99, + "i2c2_scl", NULL, NULL, "gpio_99", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(I2C2_SDA, 100, + "i2c2_sda", NULL, NULL, "gpio_100", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(JTAG_EMU0, 127, + "jtag_emu0", "secure_indicator", NULL, "gpio_127", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(JTAG_EMU1, 126, + "jtag_emu1", NULL, NULL, "gpio_126", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP1_CLKR, 92, + "mcbsp1_clkr", "ssi2_dat_tx", NULL, "gpio_92", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP1_CLKX, 98, + "mcbsp1_clkx", "ssi2_wake", NULL, "gpio_98", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP1_DR, 95, + "mcbsp1_dr", "ssi2_dat_rx", NULL, "gpio_95", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP1_DX, 94, + "mcbsp1_dx", "ssi2_rdy_tx", NULL, "gpio_94", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP1_FSR, 93, + "mcbsp1_fsr", "ssi2_flag_tx", NULL, "gpio_93", + "spi2_cs1", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP1_FSX, 97, + "mcbsp1_fsx", "ssi2_rdy_rx", NULL, "gpio_97", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP2_CLKX, 147, + "mcbsp2_clkx", "sdi_clkp", "dss_data23", "gpio_147", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP2_DR, 144, + "mcbsp2_dr", "sdi_clkn", "dss_data22", "gpio_144", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP3_CLKX, 71, + "mcbsp3_clkx", NULL, NULL, "gpio_71", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP3_DR, 73, + "mcbsp3_dr", NULL, NULL, "gpio_73", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP3_DX, 74, + "mcbsp3_dx", NULL, "sti_clk", "gpio_74", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP3_FSX, 72, + "mcbsp3_fsx", NULL, NULL, "gpio_72", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(MCBSP_CLKS, 96, + "mcbsp_clks", "ssi2_flag_rx", NULL, "gpio_96", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC1_CLKO, 0, + "sdmmc1_clko", "ms_clko", NULL, NULL, + NULL, "hw_dbg9", "hw_dbg3", "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC1_CMD, 0, + "sdmmc1_cmd", "ms_bs", NULL, NULL, + NULL, "hw_dbg8", "hw_dbg2", "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC1_DAT0, 0, + "sdmmc1_dat0", "ms_dat0", NULL, NULL, + NULL, "hw_dbg7", "hw_dbg1", "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC1_DAT1, 75, + "sdmmc1_dat1", "ms_dat1", NULL, "gpio_75", + NULL, "hw_dbg6", "hw_dbg0", "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC1_DAT2, 0, + "sdmmc1_dat2", "ms_dat2", NULL, NULL, + NULL, "hw_dbg5", "hw_dbg10", "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC1_DAT3, 0, + "sdmmc1_dat3", "ms_dat3", NULL, NULL, + NULL, "hw_dbg4", "hw_dbg11", "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC2_CLKO, 13, + "sdmmc2_clko", NULL, NULL, "gpio_13", + NULL, "spi3_clk", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC2_CMD, 15, + "sdmmc2_cmd", "usb2_rcv", NULL, "gpio_15", + NULL, "spi3_simo", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC2_DAT0, 16, + "sdmmc2_dat0", "usb2_tllse0", NULL, "gpio_16", + NULL, "spi3_somi", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC2_DAT1, 58, + "sdmmc2_dat1", "usb2_txen", NULL, "gpio_58", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC2_DAT2, 17, + "sdmmc2_dat2", "usb2_dat", NULL, "gpio_17", + NULL, "spi3_cs1", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDMMC2_DAT3, 14, + "sdmmc2_dat3", "usb2_se0", NULL, "gpio_14", + NULL, "spi3_cs0", NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDRC_A12, 2, + "sdrc_a12", NULL, NULL, "gpio_2", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDRC_A13, 1, + "sdrc_a13", NULL, NULL, "gpio_1", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDRC_A14, 0, + "sdrc_a14", NULL, NULL, "gpio_0", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDRC_CKE1, 36, + "sdrc_cke1", NULL, NULL, "gpio_36", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SDRC_NCS1, 37, + "sdrc_ncs1", NULL, NULL, "gpio_37", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI1_CLK, 81, + "spi1_clk", NULL, NULL, "gpio_81", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI1_CS0, 84, + "spi1_cs0", NULL, NULL, "gpio_84", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI1_CS1, 85, + "spi1_cs1", NULL, NULL, "gpio_85", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI1_CS2, 86, + "spi1_cs2", NULL, NULL, "gpio_86", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI1_CS3, 87, + "spi1_cs3", "spi2_cs1", NULL, "gpio_87", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI1_SIMO, 82, + "spi1_simo", NULL, NULL, "gpio_82", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI1_SOMI, 83, + "spi1_somi", NULL, NULL, "gpio_83", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI2_CLK, 88, + "spi2_clk", "gpt9_pwm_evt", NULL, "gpio_88", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI2_CS0, 91, + "spi2_cs0", "gpt12_pwm_evt", NULL, "gpio_91", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI2_SIMO, 89, + "spi2_simo", "gpt10_pwm_evt", NULL, "gpio_89", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SPI2_SOMI, 90, + "spi2_somi", "gpt11_pwm_evt", NULL, "gpio_90", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SSI1_DAT_RX, 62, + "ssi1_dat_rx", "uart1_rx", "usb1_dat", "gpio_62", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SSI1_DAT_TX, 59, + "ssi1_dat_tx", "uart1_tx", "usb1_se0", "gpio_59", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SSI1_FLAG_RX, 64, + "ssi1_flag_rx", "mcbsp4_dr", NULL, "gpio_64", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SSI1_FLAG_TX, 60, + "ssi1_flag_tx", "uart1_rts", "usb1_rcv", "gpio_60", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SSI1_RDY_RX, 65, + "ssi1_rdy_rx", "mcbsp4_dx", NULL, "gpio_65", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SSI1_RDY_TX, 61, + "ssi1_rdy_tx", "uart1_cts", "usb1_txen", "gpio_61", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SSI1_WAKE, 66, + "ssi1_wake", "mcbsp4_fsx", NULL, "gpio_66", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SYS_CLKOUT, 111, + "sys_clkout", NULL, NULL, "gpio_111", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SYS_DRM_MSECURE, 118, + "sys_drm_msecure", NULL, "sys_ndmareq6", "gpio_118", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SYS_NIRQ0, 56, + "sys_nirq0", NULL, NULL, "gpio_56", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(SYS_NIRQ1, 125, + "sys_nirq1", NULL, "sys_ndmareq5", "gpio_125", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART1_CTS, 32, + "uart1_cts", "sdi_vsync", "dss_data18", "gpio_32", + "mcbsp5_clkx", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART1_RTS, 8, + "uart1_rts", "sdi_hsync", "dss_data19", "gpio_8", + "mcbsp5_fsx", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART1_RX, 10, + "uart1_rx", "sdi_stp", "dss_data21", "gpio_10", + "mcbsp5_dr", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART1_TX, 9, + "uart1_tx", "sdi_den", "dss_data20", "gpio_9", + "mcbsp5_dx", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART2_CTS, 67, + "uart2_cts", "usb1_rcv", "gpt9_pwm_evt", "gpio_67", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART2_RTS, 68, + "uart2_rts", "usb1_txen", "gpt10_pwm_evt", "gpio_68", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART2_RX, 70, + "uart2_rx", "usb1_dat", "gpt12_pwm_evt", "gpio_70", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART2_TX, 69, + "uart2_tx", "usb1_se0", "gpt11_pwm_evt", "gpio_69", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART3_CTS_RCTX, 102, + "uart3_cts_rctx", "uart3_rx_irrx", NULL, "gpio_102", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART3_RTS_SD, 103, + "uart3_rts_sd", "uart3_tx_irtx", NULL, "gpio_103", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART3_RX_IRRX, 105, + "uart3_rx_irrx", NULL, NULL, "gpio_105", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(UART3_TX_IRTX, 104, + "uart3_tx_irtx", "uart3_cts_rctx", NULL, "gpio_104", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_CLK, 120, + "usb0hs_clk", NULL, NULL, "gpio_120", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DATA0, 0, + "usb0hs_data0", "uart3_tx_irtx", NULL, NULL, + "usb0_txen", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DATA1, 0, + "usb0hs_data1", "uart3_rx_irrx", NULL, NULL, + "usb0_dat", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DATA2, 0, + "usb0hs_data2", "uart3_rts_sd", NULL, NULL, + "usb0_se0", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DATA3, 106, + "usb0hs_data3", NULL, "uart3_cts_rctx", "gpio_106", + "usb0_puen", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DATA4, 107, + "usb0hs_data4", "mcbsp2_dr", NULL, "gpio_107", + "usb0_vp", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DATA5, 108, + "usb0hs_data5", "mcbsp2_dx", NULL, "gpio_108", + "usb0_vm", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DATA6, 109, + "usb0hs_data6", "mcbsp2_fsx", NULL, "gpio_109", + "usb0_rcv", NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DATA7, 124, + "usb0hs_data7", "mcbsp2_clkx", NULL, "gpio_124", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_DIR, 121, + "usb0hs_dir", NULL, NULL, "gpio_121", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_NXT, 123, + "usb0hs_nxt", NULL, NULL, "gpio_123", + NULL, NULL, NULL, "safe_mode"), + _OMAP2430_MUXENTRY(USB0HS_STP, 122, + "usb0hs_stp", NULL, NULL, "gpio_122", + NULL, NULL, NULL, "safe_mode"), + { .reg_offset = OMAP_MUX_TERMINATOR }, +}; + +/* + * Balls for POP package + * 447-pin s-PBGA Package, 0.00mm Ball Pitch (Bottom) + */ +#ifdef CONFIG_DEBUG_FS +struct omap_ball __initdata omap2430_pop_ball[] = { + _OMAP2430_BALLENTRY(CAM_D0, "t8", NULL), + _OMAP2430_BALLENTRY(CAM_D1, "t4", NULL), + _OMAP2430_BALLENTRY(CAM_D10, "r4", NULL), + _OMAP2430_BALLENTRY(CAM_D11, "w3", NULL), + _OMAP2430_BALLENTRY(CAM_D2, "r2", NULL), + _OMAP2430_BALLENTRY(CAM_D3, "u3", NULL), + _OMAP2430_BALLENTRY(CAM_D4, "u2", NULL), + _OMAP2430_BALLENTRY(CAM_D5, "v1", NULL), + _OMAP2430_BALLENTRY(CAM_D6, "t3", NULL), + _OMAP2430_BALLENTRY(CAM_D7, "r3", NULL), + _OMAP2430_BALLENTRY(CAM_D8, "u7", NULL), + _OMAP2430_BALLENTRY(CAM_D9, "t7", NULL), + _OMAP2430_BALLENTRY(CAM_HS, "p2", NULL), + _OMAP2430_BALLENTRY(CAM_LCLK, "r7", NULL), + _OMAP2430_BALLENTRY(CAM_VS, "n2", NULL), + _OMAP2430_BALLENTRY(CAM_XCLK, "p3", NULL), + _OMAP2430_BALLENTRY(DSS_ACBIAS, "y3", NULL), + _OMAP2430_BALLENTRY(DSS_DATA0, "v8", NULL), + _OMAP2430_BALLENTRY(DSS_DATA1, "w1", NULL), + _OMAP2430_BALLENTRY(DSS_DATA10, "k25", NULL), + _OMAP2430_BALLENTRY(DSS_DATA11, "j25", NULL), + _OMAP2430_BALLENTRY(DSS_DATA12, "k24", NULL), + _OMAP2430_BALLENTRY(DSS_DATA13, "j24", NULL), + _OMAP2430_BALLENTRY(DSS_DATA14, "h25", NULL), + _OMAP2430_BALLENTRY(DSS_DATA15, "g25", NULL), + _OMAP2430_BALLENTRY(DSS_DATA16, "ac3", NULL), + _OMAP2430_BALLENTRY(DSS_DATA17, "y7", NULL), + _OMAP2430_BALLENTRY(DSS_DATA2, "u8", NULL), + _OMAP2430_BALLENTRY(DSS_DATA3, "u4", NULL), + _OMAP2430_BALLENTRY(DSS_DATA4, "v3", NULL), + _OMAP2430_BALLENTRY(DSS_DATA5, "aa4", NULL), + _OMAP2430_BALLENTRY(DSS_DATA6, "w8", NULL), + _OMAP2430_BALLENTRY(DSS_DATA7, "y1", NULL), + _OMAP2430_BALLENTRY(DSS_DATA8, "aa2", NULL), + _OMAP2430_BALLENTRY(DSS_DATA9, "ab4", NULL), + _OMAP2430_BALLENTRY(DSS_HSYNC, "v2", NULL), + _OMAP2430_BALLENTRY(GPIO_113, "ad16", NULL), + _OMAP2430_BALLENTRY(GPIO_114, "ac10", NULL), + _OMAP2430_BALLENTRY(GPIO_115, "ad13", NULL), + _OMAP2430_BALLENTRY(GPIO_116, "ae15", NULL), + _OMAP2430_BALLENTRY(GPIO_128, "p1", NULL), + _OMAP2430_BALLENTRY(GPIO_129, "r1", NULL), + _OMAP2430_BALLENTRY(GPIO_130, "p7", NULL), + _OMAP2430_BALLENTRY(GPIO_131, "l8", NULL), + _OMAP2430_BALLENTRY(GPIO_132, "w24", NULL), + _OMAP2430_BALLENTRY(GPIO_133, "aa24", NULL), + _OMAP2430_BALLENTRY(GPIO_134, "ae12", NULL), + _OMAP2430_BALLENTRY(GPIO_135, "ae11", NULL), + _OMAP2430_BALLENTRY(GPIO_136, "ad12", NULL), + _OMAP2430_BALLENTRY(GPIO_137, "ad11", NULL), + _OMAP2430_BALLENTRY(GPIO_138, "y12", NULL), + _OMAP2430_BALLENTRY(GPIO_139, "ad17", NULL), + _OMAP2430_BALLENTRY(GPIO_140, "l7", NULL), + _OMAP2430_BALLENTRY(GPIO_141, "ac24", NULL), + _OMAP2430_BALLENTRY(GPIO_142, "m3", NULL), + _OMAP2430_BALLENTRY(GPIO_148, "af12", NULL), + _OMAP2430_BALLENTRY(GPIO_149, "k7", NULL), + _OMAP2430_BALLENTRY(GPIO_150, "m1", NULL), + _OMAP2430_BALLENTRY(GPIO_151, "ad14", NULL), + _OMAP2430_BALLENTRY(GPIO_152, "ad18", NULL), + _OMAP2430_BALLENTRY(GPIO_153, "u24", NULL), + _OMAP2430_BALLENTRY(GPIO_154, "ae16", NULL), + _OMAP2430_BALLENTRY(GPIO_63, "n3", NULL), + _OMAP2430_BALLENTRY(GPIO_7, "ac23", NULL), + _OMAP2430_BALLENTRY(GPIO_78, "ad10", NULL), + _OMAP2430_BALLENTRY(GPIO_79, "ae10", NULL), + _OMAP2430_BALLENTRY(GPIO_80, "ae13", NULL), + _OMAP2430_BALLENTRY(GPMC_A1, "a9", NULL), + _OMAP2430_BALLENTRY(GPMC_A10, "g12", NULL), + _OMAP2430_BALLENTRY(GPMC_A2, "b8", NULL), + _OMAP2430_BALLENTRY(GPMC_A3, "g10", NULL), + _OMAP2430_BALLENTRY(GPMC_A4, "g11", NULL), + _OMAP2430_BALLENTRY(GPMC_A5, "a10", NULL), + _OMAP2430_BALLENTRY(GPMC_A6, "g13", NULL), + _OMAP2430_BALLENTRY(GPMC_A7, "a6", NULL), + _OMAP2430_BALLENTRY(GPMC_A8, "h1", NULL), + _OMAP2430_BALLENTRY(GPMC_A9, "c8", NULL), + _OMAP2430_BALLENTRY(GPMC_CLK, "n1", "l1"), + _OMAP2430_BALLENTRY(GPMC_D10, "d1", "n1"), + _OMAP2430_BALLENTRY(GPMC_D11, "d2", "p2"), + _OMAP2430_BALLENTRY(GPMC_D12, "e1", "p1"), + _OMAP2430_BALLENTRY(GPMC_D13, "e3", "m1"), + _OMAP2430_BALLENTRY(GPMC_D14, "c7", "j2"), + _OMAP2430_BALLENTRY(GPMC_D15, "f3", "k2"), + _OMAP2430_BALLENTRY(GPMC_D8, "e2", "r1"), + _OMAP2430_BALLENTRY(GPMC_D9, "ab1", "t1"), + _OMAP2430_BALLENTRY(GPMC_NCS1, "ac1", "w1"), + _OMAP2430_BALLENTRY(GPMC_NCS2, "c6", NULL), + _OMAP2430_BALLENTRY(GPMC_NCS3, "b9", NULL), + _OMAP2430_BALLENTRY(GPMC_NCS4, "b4", NULL), + _OMAP2430_BALLENTRY(GPMC_NCS5, "a4", NULL), + _OMAP2430_BALLENTRY(GPMC_NCS6, "f1", NULL), + _OMAP2430_BALLENTRY(GPMC_NCS7, "a7", NULL), + _OMAP2430_BALLENTRY(GPMC_WAIT1, "j1", "y8"), + _OMAP2430_BALLENTRY(GPMC_WAIT2, "b7", NULL), + _OMAP2430_BALLENTRY(GPMC_WAIT3, "g14", NULL), + _OMAP2430_BALLENTRY(HDQ_SIO, "h20", NULL), + _OMAP2430_BALLENTRY(I2C1_SCL, "y17", NULL), + _OMAP2430_BALLENTRY(I2C1_SDA, "ac19", NULL), + _OMAP2430_BALLENTRY(I2C2_SCL, "n7", NULL), + _OMAP2430_BALLENTRY(I2C2_SDA, "m4", NULL), + _OMAP2430_BALLENTRY(JTAG_EMU0, "e25", NULL), + _OMAP2430_BALLENTRY(JTAG_EMU1, "e24", NULL), + _OMAP2430_BALLENTRY(MCBSP1_CLKR, "ab2", NULL), + _OMAP2430_BALLENTRY(MCBSP1_CLKX, "y9", NULL), + _OMAP2430_BALLENTRY(MCBSP1_DR, "af3", NULL), + _OMAP2430_BALLENTRY(MCBSP1_DX, "aa1", NULL), + _OMAP2430_BALLENTRY(MCBSP1_FSR, "ad5", NULL), + _OMAP2430_BALLENTRY(MCBSP1_FSX, "ab3", NULL), + _OMAP2430_BALLENTRY(MCBSP2_CLKX, "j26", NULL), + _OMAP2430_BALLENTRY(MCBSP2_DR, "k26", NULL), + _OMAP2430_BALLENTRY(MCBSP3_CLKX, "ac9", NULL), + _OMAP2430_BALLENTRY(MCBSP3_DR, "ae2", NULL), + _OMAP2430_BALLENTRY(MCBSP3_DX, "af4", NULL), + _OMAP2430_BALLENTRY(MCBSP3_FSX, "ae4", NULL), + _OMAP2430_BALLENTRY(MCBSP_CLKS, "ad6", NULL), + _OMAP2430_BALLENTRY(SDMMC1_CLKO, "n23", NULL), + _OMAP2430_BALLENTRY(SDMMC1_CMD, "l23", NULL), + _OMAP2430_BALLENTRY(SDMMC1_DAT0, "m24", NULL), + _OMAP2430_BALLENTRY(SDMMC1_DAT1, "p23", NULL), + _OMAP2430_BALLENTRY(SDMMC1_DAT2, "t20", NULL), + _OMAP2430_BALLENTRY(SDMMC1_DAT3, "r20", NULL), + _OMAP2430_BALLENTRY(SDMMC2_CLKO, "v26", NULL), + _OMAP2430_BALLENTRY(SDMMC2_CMD, "w20", NULL), + _OMAP2430_BALLENTRY(SDMMC2_DAT0, "v23", NULL), + _OMAP2430_BALLENTRY(SDMMC2_DAT1, "y24", NULL), + _OMAP2430_BALLENTRY(SDMMC2_DAT2, "v25", NULL), + _OMAP2430_BALLENTRY(SDMMC2_DAT3, "v24", NULL), + _OMAP2430_BALLENTRY(SDRC_A12, "w26", "r21"), + _OMAP2430_BALLENTRY(SDRC_A13, "af20", "aa15"), + _OMAP2430_BALLENTRY(SDRC_A14, "af16", "y12"), + _OMAP2430_BALLENTRY(SDRC_CKE1, "af15", "y13"), + _OMAP2430_BALLENTRY(SDRC_NCS1, "aa25", "t20"), + _OMAP2430_BALLENTRY(SPI1_CLK, "y18", NULL), + _OMAP2430_BALLENTRY(SPI1_CS0, "u1", NULL), + _OMAP2430_BALLENTRY(SPI1_CS1, "af19", NULL), + _OMAP2430_BALLENTRY(SPI1_CS2, "ae19", NULL), + _OMAP2430_BALLENTRY(SPI1_CS3, "h24", NULL), + _OMAP2430_BALLENTRY(SPI1_SIMO, "ad15", NULL), + _OMAP2430_BALLENTRY(SPI1_SOMI, "ae17", NULL), + _OMAP2430_BALLENTRY(SPI2_CLK, "y20", NULL), + _OMAP2430_BALLENTRY(SPI2_CS0, "y19", NULL), + _OMAP2430_BALLENTRY(SPI2_SIMO, "ac20", NULL), + _OMAP2430_BALLENTRY(SPI2_SOMI, "ad19", NULL), + _OMAP2430_BALLENTRY(SSI1_DAT_RX, "aa26", NULL), + _OMAP2430_BALLENTRY(SSI1_DAT_TX, "ad24", NULL), + _OMAP2430_BALLENTRY(SSI1_FLAG_RX, "ad23", NULL), + _OMAP2430_BALLENTRY(SSI1_FLAG_TX, "ab24", NULL), + _OMAP2430_BALLENTRY(SSI1_RDY_RX, "ab25", NULL), + _OMAP2430_BALLENTRY(SSI1_RDY_TX, "y25", NULL), + _OMAP2430_BALLENTRY(SSI1_WAKE, "ac25", NULL), + _OMAP2430_BALLENTRY(SYS_CLKOUT, "r25", NULL), + _OMAP2430_BALLENTRY(SYS_DRM_MSECURE, "ae3", NULL), + _OMAP2430_BALLENTRY(SYS_NIRQ0, "w25", NULL), + _OMAP2430_BALLENTRY(SYS_NIRQ1, "ad21", NULL), + _OMAP2430_BALLENTRY(UART1_CTS, "p24", NULL), + _OMAP2430_BALLENTRY(UART1_RTS, "p25", NULL), + _OMAP2430_BALLENTRY(UART1_RX, "n24", NULL), + _OMAP2430_BALLENTRY(UART1_TX, "r24", NULL), + _OMAP2430_BALLENTRY(UART2_CTS, "u25", NULL), + _OMAP2430_BALLENTRY(UART2_RTS, "t23", NULL), + _OMAP2430_BALLENTRY(UART2_RX, "t24", NULL), + _OMAP2430_BALLENTRY(UART2_TX, "u20", NULL), + _OMAP2430_BALLENTRY(UART3_CTS_RCTX, "m2", NULL), + _OMAP2430_BALLENTRY(UART3_RTS_SD, "k2", NULL), + _OMAP2430_BALLENTRY(UART3_RX_IRRX, "l3", NULL), + _OMAP2430_BALLENTRY(UART3_TX_IRTX, "l2", NULL), + _OMAP2430_BALLENTRY(USB0HS_CLK, "ae8", NULL), + _OMAP2430_BALLENTRY(USB0HS_DATA0, "ad4", NULL), + _OMAP2430_BALLENTRY(USB0HS_DATA1, "ae6", NULL), + _OMAP2430_BALLENTRY(USB0HS_DATA2, "af9", NULL), + _OMAP2430_BALLENTRY(USB0HS_DATA3, "ad9", NULL), + _OMAP2430_BALLENTRY(USB0HS_DATA4, "y11", NULL), + _OMAP2430_BALLENTRY(USB0HS_DATA5, "ad7", NULL), + _OMAP2430_BALLENTRY(USB0HS_DATA6, "ae7", NULL), + _OMAP2430_BALLENTRY(USB0HS_DATA7, "ac7", NULL), + _OMAP2430_BALLENTRY(USB0HS_DIR, "ad8", NULL), + _OMAP2430_BALLENTRY(USB0HS_NXT, "ae9", NULL), + _OMAP2430_BALLENTRY(USB0HS_STP, "ae5", NULL), + { .reg_offset = OMAP_MUX_TERMINATOR }, +}; +#else +#define omap2430_pop_ball NULL +#endif + +int __init omap2430_mux_init(struct omap_board_mux *board_subset, int flags) +{ + struct omap_ball *package_balls = NULL; + + switch (flags & OMAP_PACKAGE_MASK) { + case OMAP_PACKAGE_ZAC: + package_balls = omap2430_pop_ball; + break; + default: + pr_warning("mux: No ball data available for omap2420 package\n"); + } + + return omap_mux_init(OMAP2430_CONTROL_PADCONF_MUX_PBASE, + OMAP2430_CONTROL_PADCONF_MUX_SIZE, + omap2430_muxmodes, NULL, board_subset, + package_balls); +} diff --git a/arch/arm/mach-omap2/mux2430.h b/arch/arm/mach-omap2/mux2430.h new file mode 100644 index 000000000000..adbea0d03e08 --- /dev/null +++ b/arch/arm/mach-omap2/mux2430.h @@ -0,0 +1,370 @@ +/* + * Copyright (C) 2009 Nokia + * Copyright (C) 2009 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define OMAP2430_CONTROL_PADCONF_MUX_PBASE 0x49002030LU + +#define OMAP2430_MUX(mode0, mux_value) \ +{ \ + .reg_offset = (OMAP2430_CONTROL_PADCONF_##mode0##_OFFSET), \ + .value = (mux_value), \ +} + +/* + * OMAP2430 CONTROL_PADCONF* register offsets for pin-muxing + * + * Extracted from the TRM. Add 0x49002030 to these values to get the + * absolute addresses. The name in the macro is the mode-0 name of + * the pin. NOTE: These registers are 8-bits wide. + * + * Note that these defines use SDMMC instead of MMC for compability + * with signal names used in 3630. + */ +#define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000 +#define OMAP2430_CONTROL_PADCONF_GPMC_NCS0_OFFSET 0x001 +#define OMAP2430_CONTROL_PADCONF_GPMC_NCS1_OFFSET 0x002 +#define OMAP2430_CONTROL_PADCONF_GPMC_NCS2_OFFSET 0x003 +#define OMAP2430_CONTROL_PADCONF_GPMC_NCS3_OFFSET 0x004 +#define OMAP2430_CONTROL_PADCONF_GPMC_NCS4_OFFSET 0x005 +#define OMAP2430_CONTROL_PADCONF_GPMC_NCS5_OFFSET 0x006 +#define OMAP2430_CONTROL_PADCONF_GPMC_NCS6_OFFSET 0x007 +#define OMAP2430_CONTROL_PADCONF_GPMC_NCS7_OFFSET 0x008 +#define OMAP2430_CONTROL_PADCONF_GPMC_NADV_ALE_OFFSET 0x009 +#define OMAP2430_CONTROL_PADCONF_GPMC_NOE_NRE_OFFSET 0x00a +#define OMAP2430_CONTROL_PADCONF_GPMC_NWE_OFFSET 0x00b +#define OMAP2430_CONTROL_PADCONF_GPMC_NBE0_CLE_OFFSET 0x00c +#define OMAP2430_CONTROL_PADCONF_GPMC_NBE1_OFFSET 0x00d +#define OMAP2430_CONTROL_PADCONF_GPMC_NWP_OFFSET 0x00e +#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT0_OFFSET 0x00f +#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT1_OFFSET 0x010 +#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT2_OFFSET 0x011 +#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT3_OFFSET 0x012 +#define OMAP2430_CONTROL_PADCONF_SDRC_CLK_OFFSET 0x013 +#define OMAP2430_CONTROL_PADCONF_SDRC_NCLK_OFFSET 0x014 +#define OMAP2430_CONTROL_PADCONF_SDRC_NCS0_OFFSET 0x015 +#define OMAP2430_CONTROL_PADCONF_SDRC_NCS1_OFFSET 0x016 +#define OMAP2430_CONTROL_PADCONF_SDRC_CKE0_OFFSET 0x017 +#define OMAP2430_CONTROL_PADCONF_SDRC_CKE1_OFFSET 0x018 +#define OMAP2430_CONTROL_PADCONF_SDRC_NRAS_OFFSET 0x019 +#define OMAP2430_CONTROL_PADCONF_SDRC_NCAS_OFFSET 0x01a +#define OMAP2430_CONTROL_PADCONF_SDRC_NWE_OFFSET 0x01b +#define OMAP2430_CONTROL_PADCONF_SDRC_DM0_OFFSET 0x01c +#define OMAP2430_CONTROL_PADCONF_SDRC_DM1_OFFSET 0x01d +#define OMAP2430_CONTROL_PADCONF_SDRC_DM2_OFFSET 0x01e +#define OMAP2430_CONTROL_PADCONF_SDRC_DM3_OFFSET 0x01f +#define OMAP2430_CONTROL_PADCONF_SDRC_DQS0_OFFSET 0x020 +#define OMAP2430_CONTROL_PADCONF_SDRC_DQS1_OFFSET 0x021 +#define OMAP2430_CONTROL_PADCONF_SDRC_DQS2_OFFSET 0x022 +#define OMAP2430_CONTROL_PADCONF_SDRC_DQS3_OFFSET 0x023 +#define OMAP2430_CONTROL_PADCONF_SDRC_A14_OFFSET 0x024 +#define OMAP2430_CONTROL_PADCONF_SDRC_A13_OFFSET 0x025 +#define OMAP2430_CONTROL_PADCONF_SDRC_A12_OFFSET 0x026 +#define OMAP2430_CONTROL_PADCONF_SDRC_BA1_OFFSET 0x027 +#define OMAP2430_CONTROL_PADCONF_SDRC_BA0_OFFSET 0x028 +#define OMAP2430_CONTROL_PADCONF_SDRC_A11_OFFSET 0x029 +#define OMAP2430_CONTROL_PADCONF_SDRC_A10_OFFSET 0x02a +#define OMAP2430_CONTROL_PADCONF_SDRC_A9_OFFSET 0x02b +#define OMAP2430_CONTROL_PADCONF_SDRC_A8_OFFSET 0x02c +#define OMAP2430_CONTROL_PADCONF_SDRC_A7_OFFSET 0x02d +#define OMAP2430_CONTROL_PADCONF_SDRC_A6_OFFSET 0x02e +#define OMAP2430_CONTROL_PADCONF_SDRC_A5_OFFSET 0x02f +#define OMAP2430_CONTROL_PADCONF_SDRC_A4_OFFSET 0x030 +#define OMAP2430_CONTROL_PADCONF_SDRC_A3_OFFSET 0x031 +#define OMAP2430_CONTROL_PADCONF_SDRC_A2_OFFSET 0x032 +#define OMAP2430_CONTROL_PADCONF_SDRC_A1_OFFSET 0x033 +#define OMAP2430_CONTROL_PADCONF_SDRC_A0_OFFSET 0x034 +#define OMAP2430_CONTROL_PADCONF_SDRC_D31_OFFSET 0x035 +#define OMAP2430_CONTROL_PADCONF_SDRC_D30_OFFSET 0x036 +#define OMAP2430_CONTROL_PADCONF_SDRC_D29_OFFSET 0x037 +#define OMAP2430_CONTROL_PADCONF_SDRC_D28_OFFSET 0x038 +#define OMAP2430_CONTROL_PADCONF_SDRC_D27_OFFSET 0x039 +#define OMAP2430_CONTROL_PADCONF_SDRC_D26_OFFSET 0x03a +#define OMAP2430_CONTROL_PADCONF_SDRC_D25_OFFSET 0x03b +#define OMAP2430_CONTROL_PADCONF_SDRC_D24_OFFSET 0x03c +#define OMAP2430_CONTROL_PADCONF_SDRC_D23_OFFSET 0x03d +#define OMAP2430_CONTROL_PADCONF_SDRC_D22_OFFSET 0x03e +#define OMAP2430_CONTROL_PADCONF_SDRC_D21_OFFSET 0x03f +#define OMAP2430_CONTROL_PADCONF_SDRC_D20_OFFSET 0x040 +#define OMAP2430_CONTROL_PADCONF_SDRC_D19_OFFSET 0x041 +#define OMAP2430_CONTROL_PADCONF_SDRC_D18_OFFSET 0x042 +#define OMAP2430_CONTROL_PADCONF_SDRC_D17_OFFSET 0x043 +#define OMAP2430_CONTROL_PADCONF_SDRC_D16_OFFSET 0x044 +#define OMAP2430_CONTROL_PADCONF_SDRC_D15_OFFSET 0x045 +#define OMAP2430_CONTROL_PADCONF_SDRC_D14_OFFSET 0x046 +#define OMAP2430_CONTROL_PADCONF_SDRC_D13_OFFSET 0x047 +#define OMAP2430_CONTROL_PADCONF_SDRC_D12_OFFSET 0x048 +#define OMAP2430_CONTROL_PADCONF_SDRC_D11_OFFSET 0x049 +#define OMAP2430_CONTROL_PADCONF_SDRC_D10_OFFSET 0x04a +#define OMAP2430_CONTROL_PADCONF_SDRC_D9_OFFSET 0x04b +#define OMAP2430_CONTROL_PADCONF_SDRC_D8_OFFSET 0x04c +#define OMAP2430_CONTROL_PADCONF_SDRC_D7_OFFSET 0x04d +#define OMAP2430_CONTROL_PADCONF_SDRC_D6_OFFSET 0x04e +#define OMAP2430_CONTROL_PADCONF_SDRC_D5_OFFSET 0x04f +#define OMAP2430_CONTROL_PADCONF_SDRC_D4_OFFSET 0x050 +#define OMAP2430_CONTROL_PADCONF_SDRC_D3_OFFSET 0x051 +#define OMAP2430_CONTROL_PADCONF_SDRC_D2_OFFSET 0x052 +#define OMAP2430_CONTROL_PADCONF_SDRC_D1_OFFSET 0x053 +#define OMAP2430_CONTROL_PADCONF_SDRC_D0_OFFSET 0x054 +#define OMAP2430_CONTROL_PADCONF_GPMC_A10_OFFSET 0x055 +#define OMAP2430_CONTROL_PADCONF_GPMC_A9_OFFSET 0x056 +#define OMAP2430_CONTROL_PADCONF_GPMC_A8_OFFSET 0x057 +#define OMAP2430_CONTROL_PADCONF_GPMC_A7_OFFSET 0x058 +#define OMAP2430_CONTROL_PADCONF_GPMC_A6_OFFSET 0x059 +#define OMAP2430_CONTROL_PADCONF_GPMC_A5_OFFSET 0x05a +#define OMAP2430_CONTROL_PADCONF_GPMC_A4_OFFSET 0x05b +#define OMAP2430_CONTROL_PADCONF_GPMC_A3_OFFSET 0x05c +#define OMAP2430_CONTROL_PADCONF_GPMC_A2_OFFSET 0x05d +#define OMAP2430_CONTROL_PADCONF_GPMC_A1_OFFSET 0x05e +#define OMAP2430_CONTROL_PADCONF_GPMC_D15_OFFSET 0x05f +#define OMAP2430_CONTROL_PADCONF_GPMC_D14_OFFSET 0x060 +#define OMAP2430_CONTROL_PADCONF_GPMC_D13_OFFSET 0x061 +#define OMAP2430_CONTROL_PADCONF_GPMC_D12_OFFSET 0x062 +#define OMAP2430_CONTROL_PADCONF_GPMC_D11_OFFSET 0x063 +#define OMAP2430_CONTROL_PADCONF_GPMC_D10_OFFSET 0x064 +#define OMAP2430_CONTROL_PADCONF_GPMC_D9_OFFSET 0x065 +#define OMAP2430_CONTROL_PADCONF_GPMC_D8_OFFSET 0x066 +#define OMAP2430_CONTROL_PADCONF_GPMC_D7_OFFSET 0x067 +#define OMAP2430_CONTROL_PADCONF_GPMC_D6_OFFSET 0x068 +#define OMAP2430_CONTROL_PADCONF_GPMC_D5_OFFSET 0x069 +#define OMAP2430_CONTROL_PADCONF_GPMC_D4_OFFSET 0x06a +#define OMAP2430_CONTROL_PADCONF_GPMC_D3_OFFSET 0x06b +#define OMAP2430_CONTROL_PADCONF_GPMC_D2_OFFSET 0x06c +#define OMAP2430_CONTROL_PADCONF_GPMC_D1_OFFSET 0x06d +#define OMAP2430_CONTROL_PADCONF_GPMC_D0_OFFSET 0x06e +#define OMAP2430_CONTROL_PADCONF_DSS_DATA0_OFFSET 0x06f +#define OMAP2430_CONTROL_PADCONF_DSS_DATA1_OFFSET 0x070 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA2_OFFSET 0x071 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA3_OFFSET 0x072 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA4_OFFSET 0x073 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA5_OFFSET 0x074 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA6_OFFSET 0x075 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA7_OFFSET 0x076 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA8_OFFSET 0x077 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA9_OFFSET 0x078 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA10_OFFSET 0x079 +#define OMAP2430_CONTROL_PADCONF_DSS_DATA11_OFFSET 0x07a +#define OMAP2430_CONTROL_PADCONF_DSS_DATA12_OFFSET 0x07b +#define OMAP2430_CONTROL_PADCONF_DSS_DATA13_OFFSET 0x07c +#define OMAP2430_CONTROL_PADCONF_DSS_DATA14_OFFSET 0x07d +#define OMAP2430_CONTROL_PADCONF_DSS_DATA15_OFFSET 0x07e +#define OMAP2430_CONTROL_PADCONF_DSS_DATA16_OFFSET 0x07f +#define OMAP2430_CONTROL_PADCONF_DSS_DATA17_OFFSET 0x080 +#define OMAP2430_CONTROL_PADCONF_UART1_CTS_OFFSET 0x081 +#define OMAP2430_CONTROL_PADCONF_UART1_RTS_OFFSET 0x082 +#define OMAP2430_CONTROL_PADCONF_UART1_TX_OFFSET 0x083 +#define OMAP2430_CONTROL_PADCONF_UART1_RX_OFFSET 0x084 +#define OMAP2430_CONTROL_PADCONF_MCBSP2_DR_OFFSET 0x085 +#define OMAP2430_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET 0x086 +#define OMAP2430_CONTROL_PADCONF_DSS_PCLK_OFFSET 0x087 +#define OMAP2430_CONTROL_PADCONF_DSS_VSYNC_OFFSET 0x088 +#define OMAP2430_CONTROL_PADCONF_DSS_HSYNC_OFFSET 0x089 +#define OMAP2430_CONTROL_PADCONF_DSS_ACBIAS_OFFSET 0x08a +#define OMAP2430_CONTROL_PADCONF_SYS_NRESPWRON_OFFSET 0x08b +#define OMAP2430_CONTROL_PADCONF_SYS_NRESWARM_OFFSET 0x08c +#define OMAP2430_CONTROL_PADCONF_SYS_NIRQ0_OFFSET 0x08d +#define OMAP2430_CONTROL_PADCONF_SYS_NIRQ1_OFFSET 0x08e +#define OMAP2430_CONTROL_PADCONF_SYS_VMODE_OFFSET 0x08f +#define OMAP2430_CONTROL_PADCONF_GPIO_128_OFFSET 0x090 +#define OMAP2430_CONTROL_PADCONF_GPIO_129_OFFSET 0x091 +#define OMAP2430_CONTROL_PADCONF_GPIO_130_OFFSET 0x092 +#define OMAP2430_CONTROL_PADCONF_GPIO_131_OFFSET 0x093 +#define OMAP2430_CONTROL_PADCONF_SYS_32K_OFFSET 0x094 +#define OMAP2430_CONTROL_PADCONF_SYS_XTALIN_OFFSET 0x095 +#define OMAP2430_CONTROL_PADCONF_SYS_XTALOUT_OFFSET 0x096 +#define OMAP2430_CONTROL_PADCONF_GPIO_132_OFFSET 0x097 +#define OMAP2430_CONTROL_PADCONF_SYS_CLKREQ_OFFSET 0x098 +#define OMAP2430_CONTROL_PADCONF_SYS_CLKOUT_OFFSET 0x099 +#define OMAP2430_CONTROL_PADCONF_GPIO_151_OFFSET 0x09a +#define OMAP2430_CONTROL_PADCONF_GPIO_133_OFFSET 0x09b +#define OMAP2430_CONTROL_PADCONF_JTAG_EMU1_OFFSET 0x09c +#define OMAP2430_CONTROL_PADCONF_JTAG_EMU0_OFFSET 0x09d +#define OMAP2430_CONTROL_PADCONF_JTAG_NTRST_OFFSET 0x09e +#define OMAP2430_CONTROL_PADCONF_JTAG_TCK_OFFSET 0x09f +#define OMAP2430_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0x0a0 +#define OMAP2430_CONTROL_PADCONF_JTAG_TMS_OFFSET 0x0a1 +#define OMAP2430_CONTROL_PADCONF_JTAG_TDI_OFFSET 0x0a2 +#define OMAP2430_CONTROL_PADCONF_JTAG_TDO_OFFSET 0x0a3 +#define OMAP2430_CONTROL_PADCONF_CAM_D9_OFFSET 0x0a4 +#define OMAP2430_CONTROL_PADCONF_CAM_D8_OFFSET 0x0a5 +#define OMAP2430_CONTROL_PADCONF_CAM_D7_OFFSET 0x0a6 +#define OMAP2430_CONTROL_PADCONF_CAM_D6_OFFSET 0x0a7 +#define OMAP2430_CONTROL_PADCONF_CAM_D5_OFFSET 0x0a8 +#define OMAP2430_CONTROL_PADCONF_CAM_D4_OFFSET 0x0a9 +#define OMAP2430_CONTROL_PADCONF_CAM_D3_OFFSET 0x0aa +#define OMAP2430_CONTROL_PADCONF_CAM_D2_OFFSET 0x0ab +#define OMAP2430_CONTROL_PADCONF_CAM_D1_OFFSET 0x0ac +#define OMAP2430_CONTROL_PADCONF_CAM_D0_OFFSET 0x0ad +#define OMAP2430_CONTROL_PADCONF_CAM_HS_OFFSET 0x0ae +#define OMAP2430_CONTROL_PADCONF_CAM_VS_OFFSET 0x0af +#define OMAP2430_CONTROL_PADCONF_CAM_LCLK_OFFSET 0x0b0 +#define OMAP2430_CONTROL_PADCONF_CAM_XCLK_OFFSET 0x0b1 +#define OMAP2430_CONTROL_PADCONF_CAM_D11_OFFSET 0x0b2 +#define OMAP2430_CONTROL_PADCONF_CAM_D10_OFFSET 0x0b3 +#define OMAP2430_CONTROL_PADCONF_GPIO_134_OFFSET 0x0b4 +#define OMAP2430_CONTROL_PADCONF_GPIO_135_OFFSET 0x0b5 +#define OMAP2430_CONTROL_PADCONF_GPIO_136_OFFSET 0x0b6 +#define OMAP2430_CONTROL_PADCONF_GPIO_137_OFFSET 0x0b7 +#define OMAP2430_CONTROL_PADCONF_GPIO_138_OFFSET 0x0b8 +#define OMAP2430_CONTROL_PADCONF_GPIO_139_OFFSET 0x0b9 +#define OMAP2430_CONTROL_PADCONF_GPIO_140_OFFSET 0x0ba +#define OMAP2430_CONTROL_PADCONF_GPIO_141_OFFSET 0x0bb +#define OMAP2430_CONTROL_PADCONF_GPIO_142_OFFSET 0x0bc +#define OMAP2430_CONTROL_PADCONF_GPIO_154_OFFSET 0x0bd +#define OMAP2430_CONTROL_PADCONF_GPIO_148_OFFSET 0x0be +#define OMAP2430_CONTROL_PADCONF_GPIO_149_OFFSET 0x0bf +#define OMAP2430_CONTROL_PADCONF_GPIO_150_OFFSET 0x0c0 +#define OMAP2430_CONTROL_PADCONF_GPIO_152_OFFSET 0x0c1 +#define OMAP2430_CONTROL_PADCONF_GPIO_153_OFFSET 0x0c2 +#define OMAP2430_CONTROL_PADCONF_SDMMC1_CLKO_OFFSET 0x0c3 +#define OMAP2430_CONTROL_PADCONF_SDMMC1_CMD_OFFSET 0x0c4 +#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT0_OFFSET 0x0c5 +#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT1_OFFSET 0x0c6 +#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT2_OFFSET 0x0c7 +#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT3_OFFSET 0x0c8 +#define OMAP2430_CONTROL_PADCONF_SDMMC2_CLKO_OFFSET 0x0c9 +#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT3_OFFSET 0x0ca +#define OMAP2430_CONTROL_PADCONF_SDMMC2_CMD_OFFSET 0x0cb +#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT0_OFFSET 0x0cc +#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT2_OFFSET 0x0cd +#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT1_OFFSET 0x0ce +#define OMAP2430_CONTROL_PADCONF_UART2_CTS_OFFSET 0x0cf +#define OMAP2430_CONTROL_PADCONF_UART2_RTS_OFFSET 0x0d0 +#define OMAP2430_CONTROL_PADCONF_UART2_TX_OFFSET 0x0d1 +#define OMAP2430_CONTROL_PADCONF_UART2_RX_OFFSET 0x0d2 +#define OMAP2430_CONTROL_PADCONF_MCBSP3_CLKX_OFFSET 0x0d3 +#define OMAP2430_CONTROL_PADCONF_MCBSP3_FSX_OFFSET 0x0d4 +#define OMAP2430_CONTROL_PADCONF_MCBSP3_DR_OFFSET 0x0d5 +#define OMAP2430_CONTROL_PADCONF_MCBSP3_DX_OFFSET 0x0d6 +#define OMAP2430_CONTROL_PADCONF_SSI1_DAT_TX_OFFSET 0x0d7 +#define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_TX_OFFSET 0x0d8 +#define OMAP2430_CONTROL_PADCONF_SSI1_RDY_TX_OFFSET 0x0d9 +#define OMAP2430_CONTROL_PADCONF_SSI1_DAT_RX_OFFSET 0x0da +#define OMAP2430_CONTROL_PADCONF_GPIO_63_OFFSET 0x0db +#define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_RX_OFFSET 0x0dc +#define OMAP2430_CONTROL_PADCONF_SSI1_RDY_RX_OFFSET 0x0dd +#define OMAP2430_CONTROL_PADCONF_SSI1_WAKE_OFFSET 0x0de +#define OMAP2430_CONTROL_PADCONF_SPI1_CLK_OFFSET 0x0df +#define OMAP2430_CONTROL_PADCONF_SPI1_SIMO_OFFSET 0x0e0 +#define OMAP2430_CONTROL_PADCONF_SPI1_SOMI_OFFSET 0x0e1 +#define OMAP2430_CONTROL_PADCONF_SPI1_CS0_OFFSET 0x0e2 +#define OMAP2430_CONTROL_PADCONF_SPI1_CS1_OFFSET 0x0e3 +#define OMAP2430_CONTROL_PADCONF_SPI1_CS2_OFFSET 0x0e4 +#define OMAP2430_CONTROL_PADCONF_SPI1_CS3_OFFSET 0x0e5 +#define OMAP2430_CONTROL_PADCONF_SPI2_CLK_OFFSET 0x0e6 +#define OMAP2430_CONTROL_PADCONF_SPI2_SIMO_OFFSET 0x0e7 +#define OMAP2430_CONTROL_PADCONF_SPI2_SOMI_OFFSET 0x0e8 +#define OMAP2430_CONTROL_PADCONF_SPI2_CS0_OFFSET 0x0e9 +#define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET 0x0ea +#define OMAP2430_CONTROL_PADCONF_MCBSP1_FSR_OFFSET 0x0eb +#define OMAP2430_CONTROL_PADCONF_MCBSP1_DX_OFFSET 0x0ec +#define OMAP2430_CONTROL_PADCONF_MCBSP1_DR_OFFSET 0x0ed +#define OMAP2430_CONTROL_PADCONF_MCBSP_CLKS_OFFSET 0x0ee +#define OMAP2430_CONTROL_PADCONF_MCBSP1_FSX_OFFSET 0x0ef +#define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET 0x0f0 +#define OMAP2430_CONTROL_PADCONF_I2C1_SCL_OFFSET 0x0f1 +#define OMAP2430_CONTROL_PADCONF_I2C1_SDA_OFFSET 0x0f2 +#define OMAP2430_CONTROL_PADCONF_I2C2_SCL_OFFSET 0x0f3 +#define OMAP2430_CONTROL_PADCONF_I2C2_SDA_OFFSET 0x0f4 +#define OMAP2430_CONTROL_PADCONF_HDQ_SIO_OFFSET 0x0f5 +#define OMAP2430_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET 0x0f6 +#define OMAP2430_CONTROL_PADCONF_UART3_RTS_SD_OFFSET 0x0f7 +#define OMAP2430_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET 0x0f8 +#define OMAP2430_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET 0x0f9 +#define OMAP2430_CONTROL_PADCONF_GPIO_7_OFFSET 0x0fa +#define OMAP2430_CONTROL_PADCONF_GPIO_78_OFFSET 0x0fb +#define OMAP2430_CONTROL_PADCONF_GPIO_79_OFFSET 0x0fc +#define OMAP2430_CONTROL_PADCONF_GPIO_80_OFFSET 0x0fd +#define OMAP2430_CONTROL_PADCONF_GPIO_113_OFFSET 0x0fe +#define OMAP2430_CONTROL_PADCONF_GPIO_114_OFFSET 0x0ff +#define OMAP2430_CONTROL_PADCONF_GPIO_115_OFFSET 0x100 +#define OMAP2430_CONTROL_PADCONF_GPIO_116_OFFSET 0x101 +#define OMAP2430_CONTROL_PADCONF_SYS_DRM_MSECURE_OFFSET 0x102 +#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA3_OFFSET 0x103 +#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA4_OFFSET 0x104 +#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA5_OFFSET 0x105 +#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA6_OFFSET 0x106 +#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA2_OFFSET 0x107 +#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA0_OFFSET 0x108 +#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA1_OFFSET 0x109 +#define OMAP2430_CONTROL_PADCONF_USB0HS_CLK_OFFSET 0x10a +#define OMAP2430_CONTROL_PADCONF_USB0HS_DIR_OFFSET 0x10b +#define OMAP2430_CONTROL_PADCONF_USB0HS_STP_OFFSET 0x10c +#define OMAP2430_CONTROL_PADCONF_USB0HS_NXT_OFFSET 0x10d +#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA7_OFFSET 0x10e +#define OMAP2430_CONTROL_PADCONF_TV_OUT_OFFSET 0x10f +#define OMAP2430_CONTROL_PADCONF_TV_VREF_OFFSET 0x110 +#define OMAP2430_CONTROL_PADCONF_TV_RSET_OFFSET 0x111 +#define OMAP2430_CONTROL_PADCONF_TV_VFB_OFFSET 0x112 +#define OMAP2430_CONTROL_PADCONF_TV_DACOUT_OFFSET 0x113 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD0_OFFSET 0x114 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD1_OFFSET 0x115 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD2_OFFSET 0x116 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD3_OFFSET 0x117 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD4_OFFSET 0x118 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD5_OFFSET 0x119 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD6_OFFSET 0x11a +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD7_OFFSET 0x11b +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD8_OFFSET 0x11c +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD9_OFFSET 0x11d +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD10_OFFSET 0x11e +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD11_OFFSET 0x11f +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD12_OFFSET 0x120 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD13_OFFSET 0x121 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD14_OFFSET 0x122 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD15_OFFSET 0x123 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD16_OFFSET 0x124 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD17_OFFSET 0x125 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD18_OFFSET 0x126 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD19_OFFSET 0x127 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD20_OFFSET 0x128 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD21_OFFSET 0x129 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD22_OFFSET 0x12a +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD23_OFFSET 0x12b +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD24_OFFSET 0x12c +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD25_OFFSET 0x12d +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD26_OFFSET 0x12e +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD27_OFFSET 0x12f +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD28_OFFSET 0x130 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD29_OFFSET 0x131 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD30_OFFSET 0x132 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD31_OFFSET 0x133 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD32_OFFSET 0x134 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD33_OFFSET 0x135 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD34_OFFSET 0x136 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD35_OFFSET 0x137 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD36_OFFSET 0x138 +#define OMAP2430_CONTROL_PADCONF_AD2DMCAD37_OFFSET 0x139 +#define OMAP2430_CONTROL_PADCONF_AD2DMWRITE_OFFSET 0x13a +#define OMAP2430_CONTROL_PADCONF_D2DCLK26MI_OFFSET 0x13b +#define OMAP2430_CONTROL_PADCONF_D2DNRESPWRON1_OFFSET 0x13c +#define OMAP2430_CONTROL_PADCONF_D2DNRESWARM_OFFSET 0x13d +#define OMAP2430_CONTROL_PADCONF_D2DARM9NIRQ_OFFSET 0x13e +#define OMAP2430_CONTROL_PADCONF_D2DUMA2P6FIQ_OFFSET 0x13f +#define OMAP2430_CONTROL_PADCONF_D2DSPINT_OFFSET 0x140 +#define OMAP2430_CONTROL_PADCONF_D2DFRINT_OFFSET 0x141 +#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ0_OFFSET 0x142 +#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ1_OFFSET 0x143 +#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ2_OFFSET 0x144 +#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ3_OFFSET 0x145 +#define OMAP2430_CONTROL_PADCONF_D2DN3GTRST_OFFSET 0x146 +#define OMAP2430_CONTROL_PADCONF_D2DN3GTDI_OFFSET 0x147 +#define OMAP2430_CONTROL_PADCONF_D2DN3GTDO_OFFSET 0x148 +#define OMAP2430_CONTROL_PADCONF_D2DN3GTMS_OFFSET 0x149 +#define OMAP2430_CONTROL_PADCONF_D2DN3GTCK_OFFSET 0x14a +#define OMAP2430_CONTROL_PADCONF_D2DN3GRTCK_OFFSET 0x14b +#define OMAP2430_CONTROL_PADCONF_D2DMSTDBY_OFFSET 0x14c +#define OMAP2430_CONTROL_PADCONF_AD2DSREAD_OFFSET 0x14d +#define OMAP2430_CONTROL_PADCONF_D2DSWAKEUP_OFFSET 0x14e +#define OMAP2430_CONTROL_PADCONF_D2DIDLEREQ_OFFSET 0x14f +#define OMAP2430_CONTROL_PADCONF_D2DIDLEACK_OFFSET 0x150 +#define OMAP2430_CONTROL_PADCONF_D2DSPARE0_OFFSET 0x151 +#define OMAP2430_CONTROL_PADCONF_AD2DSWRITE_OFFSET 0x152 +#define OMAP2430_CONTROL_PADCONF_AD2DMREAD_OFFSET 0x153 + +#define OMAP2430_CONTROL_PADCONF_MUX_SIZE \ + (OMAP2430_CONTROL_PADCONF_AD2DMREAD_OFFSET + 0x1) diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index 2ff4dce95ee8..f64d7eea3451 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c @@ -2032,19 +2032,19 @@ int __init omap3_mux_init(struct omap_board_mux *board_subset, int flags) struct omap_ball *package_balls; switch (flags & OMAP_PACKAGE_MASK) { - case (OMAP_PACKAGE_CBC): + case OMAP_PACKAGE_CBC: package_subset = omap3_cbc_subset; package_balls = omap3_cbc_ball; break; - case (OMAP_PACKAGE_CBB): + case OMAP_PACKAGE_CBB: package_subset = omap3_cbb_subset; package_balls = omap3_cbb_ball; break; - case (OMAP_PACKAGE_CUS): + case OMAP_PACKAGE_CUS: package_subset = omap3_cus_subset; package_balls = omap3_cus_ball; break; - case (OMAP_PACKAGE_CBP): + case OMAP_PACKAGE_CBP: package_subset = omap36xx_cbp_subset; package_balls = omap36xx_cbp_ball; break; diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S index ef0e7a00dd6c..6ae937a06cc1 100644 --- a/arch/arm/mach-omap2/omap-headsmp.S +++ b/arch/arm/mach-omap2/omap-headsmp.S @@ -47,19 +47,3 @@ hold: ldr r12,=0x103 b secondary_startup END(omap_secondary_startup) - -ENTRY(omap_modify_auxcoreboot0) - stmfd sp!, {r1-r12, lr} - ldr r12, =0x104 - dsb - smc #0 - ldmfd sp!, {r1-r12, pc} -END(omap_modify_auxcoreboot0) - -ENTRY(omap_auxcoreboot_addr) - stmfd sp!, {r2-r12, lr} - ldr r12, =0x105 - dsb - smc #0 - ldmfd sp!, {r2-r12, pc} -END(omap_auxcoreboot_addr) diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c new file mode 100644 index 000000000000..6cee456ca542 --- /dev/null +++ b/arch/arm/mach-omap2/omap-hotplug.c @@ -0,0 +1,79 @@ +/* + * OMAP4 SMP cpu-hotplug support + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Author: + * Santosh Shilimkar + * + * Platform file needed for the OMAP4 SMP. This file is based on arm + * realview smp platform. + * Copyright (c) 2002 ARM Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include +#include + +static DECLARE_COMPLETION(cpu_killed); + +int platform_cpu_kill(unsigned int cpu) +{ + return wait_for_completion_timeout(&cpu_killed, 5000); +} + +/* + * platform-specific code to shutdown a CPU + * Called with IRQs disabled + */ +void platform_cpu_die(unsigned int cpu) +{ + unsigned int this_cpu = hard_smp_processor_id(); + + if (cpu != this_cpu) { + pr_crit("platform_cpu_die running on %u, should be %u\n", + this_cpu, cpu); + BUG(); + } + pr_notice("CPU%u: shutdown\n", cpu); + complete(&cpu_killed); + flush_cache_all(); + dsb(); + + /* + * we're ready for shutdown now, so do it + */ + if (omap_modify_auxcoreboot0(0x0, 0x200) != 0x0) + printk(KERN_CRIT "Secure clear status failed\n"); + + for (;;) { + /* + * Execute WFI + */ + do_wfi(); + + if (omap_read_auxcoreboot0() == cpu) { + /* + * OK, proper wakeup, we're done + */ + break; + } + pr_debug("CPU%u: spurious wakeup call\n", cpu); + } +} + +int platform_cpu_disable(unsigned int cpu) +{ + /* + * we don't allow CPU 0 to be shutdown (it is still too special + * e.g. clock tick interrupts) + */ + return cpu == 0 ? -EPERM : 0; +} diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c index eb9bee73e0cb..f5a1aad1a5c0 100644 --- a/arch/arm/mach-omap2/omap-iommu.c +++ b/arch/arm/mach-omap2/omap-iommu.c @@ -59,7 +59,7 @@ static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES]; static struct iommu_device omap4_devices[] = { { .base = OMAP4_MMU1_BASE, - .irq = INT_44XX_DUCATI_MMU_IRQ, + .irq = OMAP44XX_IRQ_DUCATI_MMU, .pdata = { .name = "ducati", .nr_tlb_entries = 32, diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 1cf52313759e..af3c20c8d3f9 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -73,9 +73,10 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * the AuxCoreBoot1 register is updated with cpu state * A barrier is added to ensure that write buffer is drained */ - omap_modify_auxcoreboot0(0x200, 0x0); + omap_modify_auxcoreboot0(0x200, 0xfffffdff); flush_cache_all(); smp_wmb(); + smp_cross_call(cpumask_of(cpu)); /* * Now the secondary core is starting up let it run its diff --git a/arch/arm/mach-omap2/omap44xx-smc.S b/arch/arm/mach-omap2/omap44xx-smc.S index f61c7771ca47..1980dc31a1a2 100644 --- a/arch/arm/mach-omap2/omap44xx-smc.S +++ b/arch/arm/mach-omap2/omap44xx-smc.S @@ -30,3 +30,28 @@ ENTRY(omap_smc1) smc #0 ldmfd sp!, {r2-r12, pc} END(omap_smc1) + +ENTRY(omap_modify_auxcoreboot0) + stmfd sp!, {r1-r12, lr} + ldr r12, =0x104 + dsb + smc #0 + ldmfd sp!, {r1-r12, pc} +END(omap_modify_auxcoreboot0) + +ENTRY(omap_auxcoreboot_addr) + stmfd sp!, {r2-r12, lr} + ldr r12, =0x105 + dsb + smc #0 + ldmfd sp!, {r2-r12, pc} +END(omap_auxcoreboot_addr) + +ENTRY(omap_read_auxcoreboot0) + stmfd sp!, {r2-r12, lr} + ldr r12, =0x103 + dsb + smc #0 + mov r0, r0, lsr #9 + ldmfd sp!, {r2-r12, pc} +END(omap_read_auxcoreboot0) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index b7a4133267d8..cb911d7d1a3c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1,7 +1,7 @@ /* * omap_hwmod implementation for OMAP2/3/4 * - * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2009-2010 Nokia Corporation * * Paul Walmsley, Benoît Cousson, Kevin Hilman * @@ -423,7 +423,7 @@ static int _init_main_clk(struct omap_hwmod *oh) } /** - * _init_interface_clk - get a struct clk * for the the hwmod's interface clks + * _init_interface_clks - get a struct clk * for the the hwmod's interface clks * @oh: struct omap_hwmod * * * Called from _init_clocks(). Populates the @oh OCP slave interface @@ -764,6 +764,7 @@ static struct omap_hwmod *_lookup(const char *name) /** * _init_clocks - clk_get() all clocks associated with this hwmod * @oh: struct omap_hwmod * + * @data: not used; pass NULL * * Called by omap_hwmod_late_init() (after omap2_clk_init()). * Resolves all clock names embedded in the hwmod. Must be called @@ -771,7 +772,7 @@ static struct omap_hwmod *_lookup(const char *name) * has not yet been registered or if the clocks have already been * initialized, 0 on success, or a non-zero error on failure. */ -static int _init_clocks(struct omap_hwmod *oh) +static int _init_clocks(struct omap_hwmod *oh, void *data) { int ret = 0; @@ -886,7 +887,7 @@ static int _reset(struct omap_hwmod *oh) } /** - * _enable - enable an omap_hwmod + * _omap_hwmod_enable - enable an omap_hwmod * @oh: struct omap_hwmod * * * Enables an omap_hwmod @oh such that the MPU can access the hwmod's @@ -894,7 +895,7 @@ static int _reset(struct omap_hwmod *oh) * Returns -EINVAL if the hwmod is in the wrong state or passes along * the return value of _wait_target_ready(). */ -static int _enable(struct omap_hwmod *oh) +int _omap_hwmod_enable(struct omap_hwmod *oh) { int r; @@ -939,7 +940,7 @@ static int _enable(struct omap_hwmod *oh) * no further work. Returns -EINVAL if the hwmod is in the wrong * state or returns 0. */ -static int _idle(struct omap_hwmod *oh) +int _omap_hwmod_idle(struct omap_hwmod *oh) { if (oh->_state != _HWMOD_STATE_ENABLED) { WARN(1, "omap_hwmod: %s: idle state can only be entered from " @@ -996,19 +997,25 @@ static int _shutdown(struct omap_hwmod *oh) /** * _setup - do initial configuration of omap_hwmod * @oh: struct omap_hwmod * + * @skip_setup_idle_p: do not idle hwmods at the end of the fn if 1 * * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh - * OCP_SYSCONFIG register. Must be called with omap_hwmod_mutex - * held. Returns -EINVAL if the hwmod is in the wrong state or returns - * 0. + * OCP_SYSCONFIG register. Must be called with omap_hwmod_mutex held. + * @skip_setup_idle is intended to be used on a system that will not + * call omap_hwmod_enable() to enable devices (e.g., a system without + * PM runtime). Returns -EINVAL if the hwmod is in the wrong state or + * returns 0. */ -static int _setup(struct omap_hwmod *oh) +static int _setup(struct omap_hwmod *oh, void *data) { int i, r; + u8 skip_setup_idle; - if (!oh) + if (!oh || !data) return -EINVAL; + skip_setup_idle = *(u8 *)data; + /* Set iclk autoidle mode */ if (oh->slaves_cnt > 0) { for (i = 0; i < oh->slaves_cnt; i++) { @@ -1029,7 +1036,7 @@ static int _setup(struct omap_hwmod *oh) oh->_state = _HWMOD_STATE_INITIALIZED; - r = _enable(oh); + r = _omap_hwmod_enable(oh); if (r) { pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n", oh->name, oh->_state); @@ -1041,7 +1048,7 @@ static int _setup(struct omap_hwmod *oh) * XXX Do the OCP_SYSCONFIG bits need to be * reprogrammed after a reset? If not, then this can * be removed. If they do, then probably the - * _enable() function should be split to avoid the + * _omap_hwmod_enable() function should be split to avoid the * rewrite of the OCP_SYSCONFIG register. */ if (oh->class->sysc) { @@ -1050,8 +1057,8 @@ static int _setup(struct omap_hwmod *oh) } } - if (!(oh->flags & HWMOD_INIT_NO_IDLE)) - _idle(oh); + if (!(oh->flags & HWMOD_INIT_NO_IDLE) && !skip_setup_idle) + _omap_hwmod_idle(oh); return 0; } @@ -1062,14 +1069,29 @@ static int _setup(struct omap_hwmod *oh) u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs) { - return __raw_readl(oh->_rt_va + reg_offs); + return __raw_readl(oh->_mpu_rt_va + reg_offs); } void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs) { - __raw_writel(v, oh->_rt_va + reg_offs); + __raw_writel(v, oh->_mpu_rt_va + reg_offs); } +/** + * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode + * @oh: struct omap_hwmod * + * @idlemode: SIDLEMODE field bits (shifted to bit 0) + * + * Sets the IP block's OCP slave idlemode in hardware, and updates our + * local copy. Intended to be used by drivers that have some erratum + * that requires direct manipulation of the SIDLEMODE bits. Returns + * -EINVAL if @oh is null, or passes along the return value from + * _set_slave_idlemode(). + * + * XXX Does this function have any current users? If not, we should + * remove it; it is better to let the rest of the hwmod code handle this. + * Any users of this function should be scrutinized carefully. + */ int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode) { u32 v; @@ -1124,7 +1146,7 @@ int omap_hwmod_register(struct omap_hwmod *oh) ms_id = _find_mpu_port_index(oh); if (!IS_ERR_VALUE(ms_id)) { oh->_mpu_port_index = ms_id; - oh->_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); + oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); } else { oh->_int_flags |= _HWMOD_NO_MPU_PORT; } @@ -1164,6 +1186,7 @@ struct omap_hwmod *omap_hwmod_lookup(const char *name) /** * omap_hwmod_for_each - call function for each registered omap_hwmod * @fn: pointer to a callback function + * @data: void * data to pass to callback function * * Call @fn for each registered omap_hwmod, passing @data to each * function. @fn must return 0 for success or any other value for @@ -1172,7 +1195,8 @@ struct omap_hwmod *omap_hwmod_lookup(const char *name) * caller of omap_hwmod_for_each(). @fn is called with * omap_hwmod_for_each() held. */ -int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh)) +int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), + void *data) { struct omap_hwmod *temp_oh; int ret; @@ -1182,7 +1206,7 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh)) mutex_lock(&omap_hwmod_mutex); list_for_each_entry(temp_oh, &omap_hwmod_list, node) { - ret = (*fn)(temp_oh); + ret = (*fn)(temp_oh, data); if (ret) break; } @@ -1229,24 +1253,28 @@ int omap_hwmod_init(struct omap_hwmod **ohs) /** * omap_hwmod_late_init - do some post-clock framework initialization + * @skip_setup_idle: if 1, do not idle hwmods in _setup() * * Must be called after omap2_clk_init(). Resolves the struct clk names * to struct clk pointers for each registered omap_hwmod. Also calls * _setup() on each hwmod. Returns 0. */ -int omap_hwmod_late_init(void) +int omap_hwmod_late_init(u8 skip_setup_idle) { int r; /* XXX check return value */ - r = omap_hwmod_for_each(_init_clocks); + r = omap_hwmod_for_each(_init_clocks, NULL); WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n"); mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME); WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n", MPU_INITIATOR_NAME); - omap_hwmod_for_each(_setup); + if (skip_setup_idle) + pr_debug("omap_hwmod: will leave hwmods enabled during setup\n"); + + omap_hwmod_for_each(_setup, &skip_setup_idle); return 0; } @@ -1270,7 +1298,7 @@ int omap_hwmod_unregister(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: unregistering\n", oh->name); mutex_lock(&omap_hwmod_mutex); - iounmap(oh->_rt_va); + iounmap(oh->_mpu_rt_va); list_del(&oh->node); mutex_unlock(&omap_hwmod_mutex); @@ -1292,12 +1320,13 @@ int omap_hwmod_enable(struct omap_hwmod *oh) return -EINVAL; mutex_lock(&omap_hwmod_mutex); - r = _enable(oh); + r = _omap_hwmod_enable(oh); mutex_unlock(&omap_hwmod_mutex); return r; } + /** * omap_hwmod_idle - idle an omap_hwmod * @oh: struct omap_hwmod * @@ -1311,7 +1340,7 @@ int omap_hwmod_idle(struct omap_hwmod *oh) return -EINVAL; mutex_lock(&omap_hwmod_mutex); - _idle(oh); + _omap_hwmod_idle(oh); mutex_unlock(&omap_hwmod_mutex); return 0; @@ -1413,7 +1442,7 @@ int omap_hwmod_reset(struct omap_hwmod *oh) mutex_lock(&omap_hwmod_mutex); r = _reset(oh); if (!r) - r = _enable(oh); + r = _omap_hwmod_enable(oh); mutex_unlock(&omap_hwmod_mutex); return r; @@ -1529,6 +1558,29 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) } +/** + * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) + * @oh: struct omap_hwmod * + * + * Returns the virtual address corresponding to the beginning of the + * module's register target, in the address range that is intended to + * be used by the MPU. Returns the virtual address upon success or NULL + * upon error. + */ +void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) +{ + if (!oh) + return NULL; + + if (oh->_int_flags & _HWMOD_NO_MPU_PORT) + return NULL; + + if (oh->_state == _HWMOD_STATE_UNKNOWN) + return NULL; + + return oh->_mpu_rt_va; +} + /** * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh * @oh: struct omap_hwmod * diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index e5530c51f77d..3cc768e8bc04 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -30,42 +30,44 @@ */ static struct omap_hwmod omap2420_mpu_hwmod; -static struct omap_hwmod omap2420_l3_hwmod; +static struct omap_hwmod omap2420_iva_hwmod; +static struct omap_hwmod omap2420_l3_main_hwmod; static struct omap_hwmod omap2420_l4_core_hwmod; /* L3 -> L4_CORE interface */ -static struct omap_hwmod_ocp_if omap2420_l3__l4_core = { - .master = &omap2420_l3_hwmod, +static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { + .master = &omap2420_l3_main_hwmod, .slave = &omap2420_l4_core_hwmod, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* MPU -> L3 interface */ -static struct omap_hwmod_ocp_if omap2420_mpu__l3 = { +static struct omap_hwmod_ocp_if omap2420_mpu__l3_main = { .master = &omap2420_mpu_hwmod, - .slave = &omap2420_l3_hwmod, + .slave = &omap2420_l3_main_hwmod, .user = OCP_USER_MPU, }; /* Slave interfaces on the L3 interconnect */ -static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = { - &omap2420_mpu__l3, +static struct omap_hwmod_ocp_if *omap2420_l3_main_slaves[] = { + &omap2420_mpu__l3_main, }; /* Master interfaces on the L3 interconnect */ -static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = { - &omap2420_l3__l4_core, +static struct omap_hwmod_ocp_if *omap2420_l3_main_masters[] = { + &omap2420_l3_main__l4_core, }; /* L3 */ -static struct omap_hwmod omap2420_l3_hwmod = { - .name = "l3_hwmod", +static struct omap_hwmod omap2420_l3_main_hwmod = { + .name = "l3_main", .class = &l3_hwmod_class, - .masters = omap2420_l3_masters, - .masters_cnt = ARRAY_SIZE(omap2420_l3_masters), - .slaves = omap2420_l3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_l3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .masters = omap2420_l3_main_masters, + .masters_cnt = ARRAY_SIZE(omap2420_l3_main_masters), + .slaves = omap2420_l3_main_slaves, + .slaves_cnt = ARRAY_SIZE(omap2420_l3_main_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), + .flags = HWMOD_NO_IDLEST, }; static struct omap_hwmod omap2420_l4_wkup_hwmod; @@ -79,7 +81,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { /* Slave interfaces on the L4_CORE interconnect */ static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = { - &omap2420_l3__l4_core, + &omap2420_l3_main__l4_core, }; /* Master interfaces on the L4_CORE interconnect */ @@ -89,13 +91,14 @@ static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = { /* L4 CORE */ static struct omap_hwmod omap2420_l4_core_hwmod = { - .name = "l4_core_hwmod", + .name = "l4_core", .class = &l4_hwmod_class, .masters = omap2420_l4_core_masters, .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters), .slaves = omap2420_l4_core_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), + .flags = HWMOD_NO_IDLEST, }; /* Slave interfaces on the L4_WKUP interconnect */ @@ -109,18 +112,19 @@ static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = { /* L4 WKUP */ static struct omap_hwmod omap2420_l4_wkup_hwmod = { - .name = "l4_wkup_hwmod", + .name = "l4_wkup", .class = &l4_hwmod_class, .masters = omap2420_l4_wkup_masters, .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters), .slaves = omap2420_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), + .flags = HWMOD_NO_IDLEST, }; /* Master interfaces on the MPU device */ static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = { - &omap2420_mpu__l3, + &omap2420_mpu__l3_main, }; /* MPU */ @@ -133,11 +137,40 @@ static struct omap_hwmod omap2420_mpu_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; +/* + * IVA1 interface data + */ + +/* IVA <- L3 interface */ +static struct omap_hwmod_ocp_if omap2420_l3__iva = { + .master = &omap2420_l3_main_hwmod, + .slave = &omap2420_iva_hwmod, + .clk = "iva1_ifck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_ocp_if *omap2420_iva_masters[] = { + &omap2420_l3__iva, +}; + +/* + * IVA2 (IVA2) + */ + +static struct omap_hwmod omap2420_iva_hwmod = { + .name = "iva", + .class = &iva_hwmod_class, + .masters = omap2420_iva_masters, + .masters_cnt = ARRAY_SIZE(omap2420_iva_masters), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) +}; + static __initdata struct omap_hwmod *omap2420_hwmods[] = { - &omap2420_l3_hwmod, + &omap2420_l3_main_hwmod, &omap2420_l4_core_hwmod, &omap2420_l4_wkup_hwmod, &omap2420_mpu_hwmod, + &omap2420_iva_hwmod, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 0852d954da40..4526628ed287 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -30,47 +30,47 @@ */ static struct omap_hwmod omap2430_mpu_hwmod; -static struct omap_hwmod omap2430_l3_hwmod; +static struct omap_hwmod omap2430_iva_hwmod; +static struct omap_hwmod omap2430_l3_main_hwmod; static struct omap_hwmod omap2430_l4_core_hwmod; /* L3 -> L4_CORE interface */ -static struct omap_hwmod_ocp_if omap2430_l3__l4_core = { - .master = &omap2430_l3_hwmod, +static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { + .master = &omap2430_l3_main_hwmod, .slave = &omap2430_l4_core_hwmod, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* MPU -> L3 interface */ -static struct omap_hwmod_ocp_if omap2430_mpu__l3 = { +static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = { .master = &omap2430_mpu_hwmod, - .slave = &omap2430_l3_hwmod, + .slave = &omap2430_l3_main_hwmod, .user = OCP_USER_MPU, }; /* Slave interfaces on the L3 interconnect */ -static struct omap_hwmod_ocp_if *omap2430_l3_slaves[] = { - &omap2430_mpu__l3, +static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = { + &omap2430_mpu__l3_main, }; /* Master interfaces on the L3 interconnect */ -static struct omap_hwmod_ocp_if *omap2430_l3_masters[] = { - &omap2430_l3__l4_core, +static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = { + &omap2430_l3_main__l4_core, }; /* L3 */ -static struct omap_hwmod omap2430_l3_hwmod = { - .name = "l3_hwmod", +static struct omap_hwmod omap2430_l3_main_hwmod = { + .name = "l3_main", .class = &l3_hwmod_class, - .masters = omap2430_l3_masters, - .masters_cnt = ARRAY_SIZE(omap2430_l3_masters), - .slaves = omap2430_l3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_l3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) + .masters = omap2430_l3_main_masters, + .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters), + .slaves = omap2430_l3_main_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), + .flags = HWMOD_NO_IDLEST, }; static struct omap_hwmod omap2430_l4_wkup_hwmod; -static struct omap_hwmod omap2430_mmc1_hwmod; -static struct omap_hwmod omap2430_mmc2_hwmod; /* L4_CORE -> L4_WKUP interface */ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { @@ -81,7 +81,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { /* Slave interfaces on the L4_CORE interconnect */ static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { - &omap2430_l3__l4_core, + &omap2430_l3_main__l4_core, }; /* Master interfaces on the L4_CORE interconnect */ @@ -91,13 +91,14 @@ static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = { /* L4 CORE */ static struct omap_hwmod omap2430_l4_core_hwmod = { - .name = "l4_core_hwmod", + .name = "l4_core", .class = &l4_hwmod_class, .masters = omap2430_l4_core_masters, .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), .slaves = omap2430_l4_core_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), + .flags = HWMOD_NO_IDLEST, }; /* Slave interfaces on the L4_WKUP interconnect */ @@ -111,18 +112,19 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { /* L4 WKUP */ static struct omap_hwmod omap2430_l4_wkup_hwmod = { - .name = "l4_wkup_hwmod", + .name = "l4_wkup", .class = &l4_hwmod_class, .masters = omap2430_l4_wkup_masters, .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), .slaves = omap2430_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), + .flags = HWMOD_NO_IDLEST, }; /* Master interfaces on the MPU device */ static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = { - &omap2430_mpu__l3, + &omap2430_mpu__l3_main, }; /* MPU */ @@ -135,11 +137,40 @@ static struct omap_hwmod omap2430_mpu_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; +/* + * IVA2_1 interface data + */ + +/* IVA2 <- L3 interface */ +static struct omap_hwmod_ocp_if omap2430_l3__iva = { + .master = &omap2430_l3_main_hwmod, + .slave = &omap2430_iva_hwmod, + .clk = "dsp_fck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = { + &omap2430_l3__iva, +}; + +/* + * IVA2 (IVA2) + */ + +static struct omap_hwmod omap2430_iva_hwmod = { + .name = "iva", + .class = &iva_hwmod_class, + .masters = omap2430_iva_masters, + .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) +}; + static __initdata struct omap_hwmod *omap2430_hwmods[] = { - &omap2430_l3_hwmod, + &omap2430_l3_main_hwmod, &omap2430_l4_core_hwmod, &omap2430_l4_wkup_hwmod, &omap2430_mpu_hwmod, + &omap2430_iva_hwmod, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 39b0c0eaa37d..5d8eb58ba5e3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -32,51 +32,53 @@ */ static struct omap_hwmod omap3xxx_mpu_hwmod; -static struct omap_hwmod omap3xxx_l3_hwmod; +static struct omap_hwmod omap3xxx_iva_hwmod; +static struct omap_hwmod omap3xxx_l3_main_hwmod; static struct omap_hwmod omap3xxx_l4_core_hwmod; static struct omap_hwmod omap3xxx_l4_per_hwmod; /* L3 -> L4_CORE interface */ -static struct omap_hwmod_ocp_if omap3xxx_l3__l4_core = { - .master = &omap3xxx_l3_hwmod, +static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { + .master = &omap3xxx_l3_main_hwmod, .slave = &omap3xxx_l4_core_hwmod, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L3 -> L4_PER interface */ -static struct omap_hwmod_ocp_if omap3xxx_l3__l4_per = { - .master = &omap3xxx_l3_hwmod, +static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = { + .master = &omap3xxx_l3_main_hwmod, .slave = &omap3xxx_l4_per_hwmod, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* MPU -> L3 interface */ -static struct omap_hwmod_ocp_if omap3xxx_mpu__l3 = { +static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = { .master = &omap3xxx_mpu_hwmod, - .slave = &omap3xxx_l3_hwmod, + .slave = &omap3xxx_l3_main_hwmod, .user = OCP_USER_MPU, }; /* Slave interfaces on the L3 interconnect */ -static struct omap_hwmod_ocp_if *omap3xxx_l3_slaves[] = { - &omap3xxx_mpu__l3, +static struct omap_hwmod_ocp_if *omap3xxx_l3_main_slaves[] = { + &omap3xxx_mpu__l3_main, }; /* Master interfaces on the L3 interconnect */ -static struct omap_hwmod_ocp_if *omap3xxx_l3_masters[] = { - &omap3xxx_l3__l4_core, - &omap3xxx_l3__l4_per, +static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = { + &omap3xxx_l3_main__l4_core, + &omap3xxx_l3_main__l4_per, }; /* L3 */ -static struct omap_hwmod omap3xxx_l3_hwmod = { - .name = "l3_hwmod", +static struct omap_hwmod omap3xxx_l3_main_hwmod = { + .name = "l3_main", .class = &l3_hwmod_class, - .masters = omap3xxx_l3_masters, - .masters_cnt = ARRAY_SIZE(omap3xxx_l3_masters), - .slaves = omap3xxx_l3_slaves, - .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + .masters = omap3xxx_l3_main_masters, + .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), + .slaves = omap3xxx_l3_main_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .flags = HWMOD_NO_IDLEST, }; static struct omap_hwmod omap3xxx_l4_wkup_hwmod; @@ -90,7 +92,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { /* Slave interfaces on the L4_CORE interconnect */ static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = { - &omap3xxx_l3__l4_core, + &omap3xxx_l3_main__l4_core, }; /* Master interfaces on the L4_CORE interconnect */ @@ -100,18 +102,19 @@ static struct omap_hwmod_ocp_if *omap3xxx_l4_core_masters[] = { /* L4 CORE */ static struct omap_hwmod omap3xxx_l4_core_hwmod = { - .name = "l4_core_hwmod", + .name = "l4_core", .class = &l4_hwmod_class, .masters = omap3xxx_l4_core_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_l4_core_masters), .slaves = omap3xxx_l4_core_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .flags = HWMOD_NO_IDLEST, }; /* Slave interfaces on the L4_PER interconnect */ static struct omap_hwmod_ocp_if *omap3xxx_l4_per_slaves[] = { - &omap3xxx_l3__l4_per, + &omap3xxx_l3_main__l4_per, }; /* Master interfaces on the L4_PER interconnect */ @@ -120,13 +123,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_l4_per_masters[] = { /* L4 PER */ static struct omap_hwmod omap3xxx_l4_per_hwmod = { - .name = "l4_per_hwmod", + .name = "l4_per", .class = &l4_hwmod_class, .masters = omap3xxx_l4_per_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_l4_per_masters), .slaves = omap3xxx_l4_per_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .flags = HWMOD_NO_IDLEST, }; /* Slave interfaces on the L4_WKUP interconnect */ @@ -140,18 +144,19 @@ static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_masters[] = { /* L4 WKUP */ static struct omap_hwmod omap3xxx_l4_wkup_hwmod = { - .name = "l4_wkup_hwmod", + .name = "l4_wkup", .class = &l4_hwmod_class, .masters = omap3xxx_l4_wkup_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_masters), .slaves = omap3xxx_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .flags = HWMOD_NO_IDLEST, }; /* Master interfaces on the MPU device */ static struct omap_hwmod_ocp_if *omap3xxx_mpu_masters[] = { - &omap3xxx_mpu__l3, + &omap3xxx_mpu__l3_main, }; /* MPU */ @@ -164,12 +169,41 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; +/* + * IVA2_2 interface data + */ + +/* IVA2 <- L3 interface */ +static struct omap_hwmod_ocp_if omap3xxx_l3__iva = { + .master = &omap3xxx_l3_main_hwmod, + .slave = &omap3xxx_iva_hwmod, + .clk = "iva2_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_ocp_if *omap3xxx_iva_masters[] = { + &omap3xxx_l3__iva, +}; + +/* + * IVA2 (IVA2) + */ + +static struct omap_hwmod omap3xxx_iva_hwmod = { + .name = "iva", + .class = &iva_hwmod_class, + .masters = omap3xxx_iva_masters, + .masters_cnt = ARRAY_SIZE(omap3xxx_iva_masters), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) +}; + static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { - &omap3xxx_l3_hwmod, + &omap3xxx_l3_main_hwmod, &omap3xxx_l4_core_hwmod, &omap3xxx_l4_per_hwmod, &omap3xxx_l4_wkup_hwmod, &omap3xxx_mpu_hwmod, + &omap3xxx_iva_hwmod, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c index 1e80b914fa1a..08a134243ecb 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c @@ -66,3 +66,6 @@ struct omap_hwmod_class mpu_hwmod_class = { .name = "mpu" }; +struct omap_hwmod_class iva_hwmod_class = { + .name = "iva" +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 3645a28c7c27..c34e98bf1242 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -20,5 +20,6 @@ extern struct omap_hwmod_class l3_hwmod_class; extern struct omap_hwmod_class l4_hwmod_class; extern struct omap_hwmod_class mpu_hwmod_class; +extern struct omap_hwmod_class iva_hwmod_class; #endif diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c new file mode 100644 index 000000000000..68f9f2e95891 --- /dev/null +++ b/arch/arm/mach-omap2/pm.c @@ -0,0 +1,84 @@ +/* + * pm.c - Common OMAP2+ power management-related code + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Copyright (C) 2010 Nokia Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include +#include +#include + +static struct omap_device_pm_latency *pm_lats; + +static struct device *mpu_dev; +static struct device *dsp_dev; +static struct device *l3_dev; + +struct device *omap2_get_mpuss_device(void) +{ + WARN_ON_ONCE(!mpu_dev); + return mpu_dev; +} + +struct device *omap2_get_dsp_device(void) +{ + WARN_ON_ONCE(!dsp_dev); + return dsp_dev; +} + +struct device *omap2_get_l3_device(void) +{ + WARN_ON_ONCE(!l3_dev); + return l3_dev; +} + +/* static int _init_omap_device(struct omap_hwmod *oh, void *user) */ +static int _init_omap_device(char *name, struct device **new_dev) +{ + struct omap_hwmod *oh; + struct omap_device *od; + + oh = omap_hwmod_lookup(name); + if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", + __func__, name)) + return -ENODEV; + + od = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false); + if (WARN(IS_ERR(od), "%s: could not build omap_device for %s\n", + __func__, name)) + return -ENODEV; + + *new_dev = &od->pdev.dev; + + return 0; +} + +/* + * Build omap_devices for processors and bus. + */ +static void omap2_init_processor_devices(void) +{ + _init_omap_device("mpu", &mpu_dev); + _init_omap_device("iva", &dsp_dev); + _init_omap_device("l3_main", &l3_dev); +} + +static int __init omap2_common_pm_init(void) +{ + omap2_init_processor_devices(); + omap_pm_if_init(); + + return 0; +} +device_initcall(omap2_common_pm_init); + diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index e321281ab6e1..6aeedeacdad8 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -39,7 +39,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index b88737fd6cfe..fb4994ad622e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -385,8 +385,9 @@ void omap_sram_idle(void) /* Enable IO-PAD and IO-CHAIN wakeups */ per_next_state = pwrdm_read_next_pwrst(per_pwrdm); core_next_state = pwrdm_read_next_pwrst(core_pwrdm); - if (per_next_state < PWRDM_POWER_ON || - core_next_state < PWRDM_POWER_ON) { + if (omap3_has_io_wakeup() && \ + (per_next_state < PWRDM_POWER_ON || + core_next_state < PWRDM_POWER_ON)) { prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); omap3_enable_io_chain(); } @@ -479,7 +480,7 @@ void omap_sram_idle(void) } /* Disable IO-PAD and IO-CHAIN wakeup */ - if (core_next_state < PWRDM_POWER_ON) { + if (omap3_has_io_wakeup() && core_next_state < PWRDM_POWER_ON) { prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); omap3_disable_io_chain(); } diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c new file mode 100644 index 000000000000..54544b4fc76b --- /dev/null +++ b/arch/arm/mach-omap2/pm44xx.c @@ -0,0 +1,135 @@ +/* + * OMAP4 Power Management Routines + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Rajendra Nayak + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +struct power_state { + struct powerdomain *pwrdm; + u32 next_state; +#ifdef CONFIG_SUSPEND + u32 saved_state; +#endif + struct list_head node; +}; + +static LIST_HEAD(pwrst_list); + +#ifdef CONFIG_SUSPEND +static int omap4_pm_prepare(void) +{ + disable_hlt(); + return 0; +} + +static int omap4_pm_suspend(void) +{ + do_wfi(); + return 0; +} + +static int omap4_pm_enter(suspend_state_t suspend_state) +{ + int ret = 0; + + switch (suspend_state) { + case PM_SUSPEND_STANDBY: + case PM_SUSPEND_MEM: + ret = omap4_pm_suspend(); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static void omap4_pm_finish(void) +{ + enable_hlt(); + return; +} + +static int omap4_pm_begin(suspend_state_t state) +{ + return 0; +} + +static void omap4_pm_end(void) +{ + return; +} + +static struct platform_suspend_ops omap_pm_ops = { + .begin = omap4_pm_begin, + .end = omap4_pm_end, + .prepare = omap4_pm_prepare, + .enter = omap4_pm_enter, + .finish = omap4_pm_finish, + .valid = suspend_valid_only_mem, +}; +#endif /* CONFIG_SUSPEND */ + +static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) +{ + struct power_state *pwrst; + + if (!pwrdm->pwrsts) + return 0; + + pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC); + if (!pwrst) + return -ENOMEM; + pwrst->pwrdm = pwrdm; + pwrst->next_state = PWRDM_POWER_ON; + list_add(&pwrst->node, &pwrst_list); + + return pwrdm_set_next_pwrst(pwrst->pwrdm, pwrst->next_state); +} + +/** + * omap4_pm_init - Init routine for OMAP4 PM + * + * Initializes all powerdomain and clockdomain target states + * and all PRCM settings. + */ +static int __init omap4_pm_init(void) +{ + int ret; + + if (!cpu_is_omap44xx()) + return -ENODEV; + + pr_err("Power Management for TI OMAP4.\n"); + +#ifdef CONFIG_PM + ret = pwrdm_for_each(pwrdms_setup, NULL); + if (ret) { + pr_err("Failed to setup powerdomains\n"); + goto err2; + } +#endif + +#ifdef CONFIG_SUSPEND + suspend_set_ops(&omap_pm_ops); +#endif /* CONFIG_SUSPEND */ + +err2: + return ret; +} +late_initcall(omap4_pm_init); diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index a2904aa7065e..6527ec30dc17 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -875,6 +875,7 @@ int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) break; case 4: m = OMAP_MEM4_RETSTATE_MASK; + break; default: WARN_ON(1); /* should never happen */ return -EEXIST; diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h index bd87112beea8..fa904861668b 100644 --- a/arch/arm/mach-omap2/powerdomains34xx.h +++ b/arch/arm/mach-omap2/powerdomains34xx.h @@ -75,12 +75,19 @@ static struct powerdomain mpu_3xxx_pwrdm = { }, }; +/* + * The USBTLL Save-and-Restore mechanism is broken on + * 3430s upto ES3.0 and 3630ES1.0. Hence this feature + * needs to be disabled on these chips. + * Refer: 3430 errata ID i459 and 3630 errata ID i579 + */ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { .name = "core_pwrdm", .prcm_offs = CORE_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 | CHIP_IS_OMAP3430ES2 | - CHIP_IS_OMAP3430ES3_0), + CHIP_IS_OMAP3430ES3_0 | + CHIP_IS_OMAP3630ES1), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 2, @@ -97,7 +104,8 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { static struct powerdomain core_3xxx_es3_1_pwrdm = { .name = "core_pwrdm", .prcm_offs = CORE_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1 | + CHIP_GE_OMAP3630ES1_1), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .flags = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */ diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 3771254dfa81..566e991ede81 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -37,6 +37,9 @@ #define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 #define UART_OMAP_WER 0x17 /* Wake-up enable register */ +#define UART_ERRATA_FIFO_FULL_ABORT (0x1 << 0) +#define UART_ERRATA_i202_MDR1_ACCESS (0x1 << 1) + /* * NOTE: By default the serial timeout is disabled as it causes lost characters * over the serial ports. This means that the UART clocks will stay on until @@ -64,6 +67,7 @@ struct omap_uart_state { struct list_head node; struct platform_device pdev; + u32 errata; #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) int context_valid; @@ -74,6 +78,7 @@ struct omap_uart_state { u16 sysc; u16 scr; u16 wer; + u16 mcr; #endif }; @@ -180,6 +185,42 @@ static inline void __init omap_uart_reset(struct omap_uart_state *uart) #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) +/* + * Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6) + * The access to uart register after MDR1 Access + * causes UART to corrupt data. + * + * Need a delay = + * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) + * give 10 times as much + */ +static void omap_uart_mdr1_errataset(struct omap_uart_state *uart, u8 mdr1_val, + u8 fcr_val) +{ + struct plat_serial8250_port *p = uart->p; + u8 timeout = 255; + + serial_write_reg(p, UART_OMAP_MDR1, mdr1_val); + udelay(2); + serial_write_reg(p, UART_FCR, fcr_val | UART_FCR_CLEAR_XMIT | + UART_FCR_CLEAR_RCVR); + /* + * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and + * TX_FIFO_E bit is 1. + */ + while (UART_LSR_THRE != (serial_read_reg(p, UART_LSR) & + (UART_LSR_THRE | UART_LSR_DR))) { + timeout--; + if (!timeout) { + /* Should *never* happen. we warn and carry on */ + dev_crit(&uart->pdev.dev, "Errata i202: timedout %x\n", + serial_read_reg(p, UART_LSR)); + break; + } + udelay(1); + } +} + static void omap_uart_save_context(struct omap_uart_state *uart) { u16 lcr = 0; @@ -197,6 +238,9 @@ static void omap_uart_save_context(struct omap_uart_state *uart) uart->sysc = serial_read_reg(p, UART_OMAP_SYSC); uart->scr = serial_read_reg(p, UART_OMAP_SCR); uart->wer = serial_read_reg(p, UART_OMAP_WER); + serial_write_reg(p, UART_LCR, 0x80); + uart->mcr = serial_read_reg(p, UART_MCR); + serial_write_reg(p, UART_LCR, lcr); uart->context_valid = 1; } @@ -214,7 +258,10 @@ static void omap_uart_restore_context(struct omap_uart_state *uart) uart->context_valid = 0; - serial_write_reg(p, UART_OMAP_MDR1, 0x7); + if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS) + omap_uart_mdr1_errataset(uart, 0x07, 0xA0); + else + serial_write_reg(p, UART_OMAP_MDR1, 0x7); serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */ efr = serial_read_reg(p, UART_EFR); serial_write_reg(p, UART_EFR, UART_EFR_ECB); @@ -225,14 +272,18 @@ static void omap_uart_restore_context(struct omap_uart_state *uart) serial_write_reg(p, UART_DLM, uart->dlh); serial_write_reg(p, UART_LCR, 0x0); /* Operational mode */ serial_write_reg(p, UART_IER, uart->ier); - serial_write_reg(p, UART_FCR, 0xA1); + serial_write_reg(p, UART_LCR, 0x80); + serial_write_reg(p, UART_MCR, uart->mcr); serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */ serial_write_reg(p, UART_EFR, efr); serial_write_reg(p, UART_LCR, UART_LCR_WLEN8); serial_write_reg(p, UART_OMAP_SCR, uart->scr); serial_write_reg(p, UART_OMAP_WER, uart->wer); serial_write_reg(p, UART_OMAP_SYSC, uart->sysc); - serial_write_reg(p, UART_OMAP_MDR1, 0x00); /* UART 16x mode */ + if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS) + omap_uart_mdr1_errataset(uart, 0x00, 0xA1); + else + serial_write_reg(p, UART_OMAP_MDR1, 0x00); /* UART 16x mode */ } #else static inline void omap_uart_save_context(struct omap_uart_state *uart) {} @@ -489,8 +540,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) } uart->wk_mask = wk_mask; } else { - uart->wk_en = 0; - uart->wk_st = 0; + uart->wk_en = NULL; + uart->wk_st = NULL; uart->wk_mask = 0; uart->padconf = 0; } @@ -552,7 +603,8 @@ static ssize_t sleep_timeout_store(struct device *dev, return n; } -DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show, sleep_timeout_store); +static DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show, + sleep_timeout_store); #define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr)) #else static inline void omap_uart_idle_init(struct omap_uart_state *uart) {} @@ -749,14 +801,20 @@ void __init omap_serial_init_port(int port) * omap3xxx: Never read empty UART fifo on UARTs * with IP rev >=0x52 */ - if (cpu_is_omap44xx()) { - uart->p->serial_in = serial_in_override; - uart->p->serial_out = serial_out_override; - } else if ((serial_read_reg(uart->p, UART_OMAP_MVER) & 0xFF) - >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) { + if (cpu_is_omap44xx()) + uart->errata |= UART_ERRATA_FIFO_FULL_ABORT; + else if ((serial_read_reg(uart->p, UART_OMAP_MVER) & 0xFF) + >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) + uart->errata |= UART_ERRATA_FIFO_FULL_ABORT; + + if (uart->errata & UART_ERRATA_FIFO_FULL_ABORT) { uart->p->serial_in = serial_in_override; uart->p->serial_out = serial_out_override; } + + /* Enable the MDR1 errata for OMAP3 */ + if (cpu_is_omap34xx()) + uart->errata |= UART_ERRATA_i202_MDR1_ACCESS; } /** diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index d522cd70bf53..ba53191ae4c5 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -60,7 +60,7 @@ #define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) .text -/* Function to aquire the semaphore in scratchpad */ +/* Function to acquire the semaphore in scratchpad */ ENTRY(lock_scratchpad_sem) stmfd sp!, {lr} @ save registers on stack wait_sem: diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c index d72d1ac30333..b11bf385d360 100644 --- a/arch/arm/mach-omap2/usb-ehci.c +++ b/arch/arm/mach-omap2/usb-ehci.c @@ -23,7 +23,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c new file mode 100644 index 000000000000..a216d88b04b5 --- /dev/null +++ b/arch/arm/mach-omap2/usb-fs.c @@ -0,0 +1,359 @@ +/* + * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx + * + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN +#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO +#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO +#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN +#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG + +#include "mux.h" + +#if defined(CONFIG_ARCH_OMAP2) + +#ifdef CONFIG_USB_GADGET_OMAP + +static struct resource udc_resources[] = { + /* order is significant! */ + { /* registers */ + .start = UDC_BASE, + .end = UDC_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { /* general IRQ */ + .start = INT_USB_IRQ_GEN, + .flags = IORESOURCE_IRQ, + }, { /* PIO IRQ */ + .start = INT_USB_IRQ_NISO, + .flags = IORESOURCE_IRQ, + }, { /* SOF IRQ */ + .start = INT_USB_IRQ_ISO, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 udc_dmamask = ~(u32)0; + +static struct platform_device udc_device = { + .name = "omap_udc", + .id = -1, + .dev = { + .dma_mask = &udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(udc_resources), + .resource = udc_resources, +}; + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ + pdata->udc_device = &udc_device; +} + +#else + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + +/* The dmamask must be set for OHCI to work */ +static u64 ohci_dmamask = ~(u32)0; + +static struct resource ohci_resources[] = { + { + .start = OMAP_OHCI_BASE, + .end = OMAP_OHCI_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_USB_IRQ_HGEN, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ohci_device = { + .name = "ohci", + .id = -1, + .dev = { + .dma_mask = &ohci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(ohci_resources), + .resource = ohci_resources, +}; + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ + pdata->ohci_device = &ohci_device; +} + +#else + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) + +static struct resource otg_resources[] = { + /* order is significant! */ + { + .start = OTG_BASE, + .end = OTG_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { + .start = INT_USB_IRQ_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device otg_device = { + .name = "omap_otg", + .id = -1, + .num_resources = ARRAY_SIZE(otg_resources), + .resource = otg_resources, +}; + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ + pdata->otg_device = &otg_device; +} + +#else + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +static void omap2_usb_devconf_clear(u8 port, u32 mask) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r &= ~USBTXWRMODEI(port, mask); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb_devconf_set(u8 port, u32 mask) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r |= USBTXWRMODEI(port, mask); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb2_disable_5pinbitll(void) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb2_enable_5pinunitll(void) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI; + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device) +{ + u32 syscon1 = 0; + + omap2_usb_devconf_clear(0, USB_BIDIR_TLL); + + if (nwires == 0) + return 0; + + if (is_device) + omap_mux_init_signal("usb0_puen", 0); + + omap_mux_init_signal("usb0_dat", 0); + omap_mux_init_signal("usb0_txen", 0); + omap_mux_init_signal("usb0_se0", 0); + if (nwires != 3) + omap_mux_init_signal("usb0_rcv", 0); + + switch (nwires) { + case 3: + syscon1 = 2; + omap2_usb_devconf_set(0, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(0, USB_BIDIR); + break; + case 6: + syscon1 = 3; + omap_mux_init_signal("usb0_vp", 0); + omap_mux_init_signal("usb0_vm", 0); + omap2_usb_devconf_set(0, USB_UNIDIR); + break; + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 0, nwires); + } + + return syscon1 << 16; +} + +static u32 __init omap2_usb1_init(unsigned nwires) +{ + u32 syscon1 = 0; + + omap2_usb_devconf_clear(1, USB_BIDIR_TLL); + + if (nwires == 0) + return 0; + + /* NOTE: board-specific code must set up pin muxing for usb1, + * since each signal could come out on either of two balls. + */ + + switch (nwires) { + case 2: + /* NOTE: board-specific code must override this setting if + * this TLL link is not using DP/DM + */ + syscon1 = 1; + omap2_usb_devconf_set(1, USB_BIDIR_TLL); + break; + case 3: + syscon1 = 2; + omap2_usb_devconf_set(1, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(1, USB_BIDIR); + break; + case 6: + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 1, nwires); + } + + return syscon1 << 20; +} + +static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup) +{ + u32 syscon1 = 0; + + omap2_usb2_disable_5pinbitll(); + alt_pingroup = 0; + + /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ + if (alt_pingroup || nwires == 0) + return 0; + + omap_mux_init_signal("usb2_dat", 0); + omap_mux_init_signal("usb2_se0", 0); + if (nwires > 2) + omap_mux_init_signal("usb2_txen", 0); + if (nwires > 3) + omap_mux_init_signal("usb2_rcv", 0); + + switch (nwires) { + case 2: + /* NOTE: board-specific code must override this setting if + * this TLL link is not using DP/DM + */ + syscon1 = 1; + omap2_usb_devconf_set(2, USB_BIDIR_TLL); + break; + case 3: + syscon1 = 2; + omap2_usb_devconf_set(2, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(2, USB_BIDIR); + break; + case 5: + /* NOTE: board-specific code must mux this setting depending + * on TLL link using DP/DM. Something must also + * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} + * 2420: hdq_sio.usb2_tllse0 or vlynq_rx0.usb2_tllse0 + * 2430: hdq_sio.usb2_tllse0 or sdmmc2_dat0.usb2_tllse0 + */ + + syscon1 = 3; + omap2_usb2_enable_5pinunitll(); + break; + case 6: + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 2, nwires); + } + + return syscon1 << 24; +} + +void __init omap2_usbfs_init(struct omap_usb_config *pdata) +{ + struct clk *ick; + + if (!cpu_is_omap24xx()) + return; + + ick = clk_get(NULL, "usb_l4_ick"); + if (IS_ERR(ick)) + return; + + clk_enable(ick); + pdata->usb0_init = omap2_usb0_init; + pdata->usb1_init = omap2_usb1_init; + pdata->usb2_init = omap2_usb2_init; + udc_device_init(pdata); + ohci_device_init(pdata); + otg_device_init(pdata); + omap_otg_init(pdata); + clk_disable(ick); + clk_put(ick); +} + +#endif diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 96f6787e00b2..33a5cde1c227 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -28,7 +28,6 @@ #include #include -#include #include #ifdef CONFIG_USB_MUSB_SOC diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 10a2013c1104..64a0112b70a5 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -17,8 +17,8 @@ #include #include -#include +#include "mux.h" static u8 async_cs, sync_cs; static unsigned refclk_psec; @@ -325,17 +325,17 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data, else { /* assume OMAP 2420 ES2.0 and later */ if (dmachan & (1 << 0)) - omap_cfg_reg(AA10_242X_DMAREQ0); + omap_mux_init_signal("sys_ndmareq0", 0); if (dmachan & (1 << 1)) - omap_cfg_reg(AA6_242X_DMAREQ1); + omap_mux_init_signal("sys_ndmareq1", 0); if (dmachan & (1 << 2)) - omap_cfg_reg(E4_242X_DMAREQ2); + omap_mux_init_signal("sys_ndmareq2", 0); if (dmachan & (1 << 3)) - omap_cfg_reg(G4_242X_DMAREQ3); + omap_mux_init_signal("sys_ndmareq3", 0); if (dmachan & (1 << 4)) - omap_cfg_reg(D3_242X_DMAREQ4); + omap_mux_init_signal("sys_ndmareq4", 0); if (dmachan & (1 << 5)) - omap_cfg_reg(E3_242X_DMAREQ5); + omap_mux_init_signal("sys_ndmareq5", 0); } /* so far so good ... register the device */ diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index 5041d1bc26b1..696b1a97f9e2 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -216,6 +216,7 @@ static struct mtd_partition ts78xx_ts_nand_parts[] = { static struct platform_nand_data ts78xx_ts_nand_data = { .chip = { + .nr_chips = 1, .part_probe_types = ts_nand_part_probes, .partitions = ts78xx_ts_nand_parts, .nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts), diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 3b51741a4810..7aefb9074852 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -238,6 +238,17 @@ config MACH_COLIBRI bool "Toradex Colibri PXA270" select PXA27x +config MACH_COLIBRI_PXA270_EVALBOARD + bool "Toradex Colibri Evaluation Carrier Board support (PXA270)" + depends on MACH_COLIBRI + +config MACH_COLIBRI_PXA270_INCOME + bool "Income s.r.o. PXA270 SBC" + depends on MACH_COLIBRI + select PXA27x + select HAVE_PWM + select PXA_HAVE_BOARD_IRQS + config MACH_COLIBRI300 bool "Toradex Colibri PXA300/310" select PXA3xx @@ -336,6 +347,9 @@ config ARCH_PXA_PALM bool "PXA based Palm PDAs" select HAVE_PWM +config MACH_PALM27X + bool + config MACH_PALMTE2 bool "Palm Tungsten|E2" default y @@ -360,6 +374,7 @@ config MACH_PALMT5 depends on ARCH_PXA_PALM select PXA27x select IWMMXT + select MACH_PALM27X help Say Y here if you intend to run this kernel on a Palm Tungsten|T5 handheld computer. @@ -370,6 +385,7 @@ config MACH_PALMTX depends on ARCH_PXA_PALM select PXA27x select IWMMXT + select MACH_PALM27X help Say Y here if you intend to run this kernel on a Palm T|X handheld computer. @@ -380,6 +396,7 @@ config MACH_PALMZ72 depends on ARCH_PXA_PALM select PXA27x select IWMMXT + select MACH_PALM27X help Say Y here if you intend to run this kernel on Palm Zire 72 handheld computer. @@ -390,6 +407,7 @@ config MACH_PALMLD depends on ARCH_PXA_PALM select PXA27x select IWMMXT + select MACH_PALM27X help Say Y here if you intend to run this kernel on a Palm LifeDrive handheld computer. @@ -447,16 +465,13 @@ config PXA_SHARPSL SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) handheld computer. -config SHARPSL_PM - bool - select APM_EMULATION - select SHARPSL_PM_MAX1111 - -config SHARPSL_PM_MAX1111 - bool - depends on !CORGI_SSP_DEPRECATED - select HWMON - select SENSORS_MAX1111 +config PXA_SHARPSL_DETECT_MACH_ID + bool "Detect machine ID at run-time in the decompressor" + depends on PXA_SHARPSL + help + Say Y here if you want the zImage decompressor to detect + the Zaurus machine ID at run-time. For latest kexec-based + boot loader, this is not necessary. config MACH_POODLE bool "Enable Sharp SL-5600 (Poodle) Support" @@ -510,6 +525,25 @@ config MACH_TOSA select PXA25x select PXA_HAVE_BOARD_IRQS +config TOSA_BT + tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" + depends on MACH_TOSA + select RFKILL + help + This is a simple driver that is able to control + the state of built in bluetooth chip on tosa. + +config TOSA_USE_EXT_KEYCODES + bool "Tosa keyboard: use extended keycodes" + depends on MACH_TOSA + default n + help + Say Y here to enable the tosa keyboard driver to generate extended + (>= 127) keycodes. Be aware, that they can't be correctly interpreted + by either console keyboard driver or by Kdrive keybd driver. + + Say Y only if you know, what you are doing! + config MACH_ICONTROL bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM" select CPU_PXA320 @@ -648,25 +682,15 @@ config PXA_SHARP_Cxx00 help Enable common support for Sharp Cxx00 models -config TOSA_BT - tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" - depends on MACH_TOSA - select RFKILL - help - This is a simple driver that is able to control - the state of built in bluetooth chip on tosa. - -config TOSA_USE_EXT_KEYCODES - bool "Tosa keyboard: use extended keycodes" - depends on MACH_TOSA - default n - help - Say Y here to enable the tosa keyboard driver to generate extended - (>= 127) keycodes. Be aware, that they can't be correctly interpreted - by either console keyboard driver or by Kdrive keybd driver. - - Say Y only if you know, what you are doing! +config SHARPSL_PM + bool + select APM_EMULATION + select SHARPSL_PM_MAX1111 +config SHARPSL_PM_MAX1111 + bool + select HWMON + select SENSORS_MAX1111 config PXA_HAVE_BOARD_IRQS bool diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index b8f1f4bc7ca7..85c7fb324dbb 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -51,14 +51,16 @@ obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o -obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o +obj-$(CONFIG_MACH_INTELMOTE2) += stargate2.o obj-$(CONFIG_MACH_STARGATE2) += stargate2.o obj-$(CONFIG_MACH_XCEP) += xcep.o obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o obj-$(CONFIG_MACH_PCM027) += pcm027.o obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o -obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o +obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o +obj-$(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) += colibri-pxa270-evalboard.o +obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o obj-$(CONFIG_MACH_VPAC270) += vpac270.o @@ -73,6 +75,7 @@ obj-$(CONFIG_PXA_EZX) += ezx.o obj-$(CONFIG_MACH_MP900C) += mp900.o obj-$(CONFIG_MACH_PALMTE2) += palmte2.o obj-$(CONFIG_MACH_PALMTC) += palmtc.o +obj-$(CONFIG_MACH_PALM27X) += palm27x.o obj-$(CONFIG_MACH_PALMT5) += palmt5.o obj-$(CONFIG_MACH_PALMTX) += palmtx.o obj-$(CONFIG_MACH_PALMZ72) += palmz72.o @@ -84,12 +87,6 @@ obj-$(CONFIG_MACH_POODLE) += poodle.o obj-$(CONFIG_MACH_TOSA) += tosa.o obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o -obj-$(CONFIG_MACH_E330) += e330.o -obj-$(CONFIG_MACH_E350) += e350.o -obj-$(CONFIG_MACH_E740) += e740.o -obj-$(CONFIG_MACH_E750) += e750.o -obj-$(CONFIG_MACH_E400) += e400.o -obj-$(CONFIG_MACH_E800) += e800.o obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index f3b5ace815e5..9041340fee1d 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -22,9 +22,14 @@ #include #include #include +#include #include #include #include +#include +#include +#include +#include #include #include @@ -51,6 +56,59 @@ #include "generic.h" #include "devices.h" +/****************************************************************************** + * Pin configuration + ******************************************************************************/ +static unsigned long balloon3_pin_config[] __initdata = { + /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */ + GPIO42_BTUART_RXD, + GPIO43_BTUART_TXD, + GPIO44_BTUART_CTS, + GPIO45_BTUART_RTS, + + /* Reset, configured as GPIO wakeup source */ + GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, + + /* LEDs */ + GPIO9_GPIO, /* NAND activity LED */ + GPIO10_GPIO, /* Heartbeat LED */ + + /* AC97 */ + GPIO28_AC97_BITCLK, + GPIO29_AC97_SDATA_IN_0, + GPIO30_AC97_SDATA_OUT, + GPIO31_AC97_SYNC, + GPIO113_AC97_nRESET, + GPIO95_GPIO, + + /* MMC */ + GPIO32_MMC_CLK, + GPIO92_MMC_DAT_0, + GPIO109_MMC_DAT_1, + GPIO110_MMC_DAT_2, + GPIO111_MMC_DAT_3, + GPIO112_MMC_CMD, + + /* USB Host */ + GPIO88_USBH1_PWR, + GPIO89_USBH1_PEN, + + /* PC Card */ + GPIO48_nPOE, + GPIO49_nPWE, + GPIO50_nPIOR, + GPIO51_nPIOW, + GPIO85_nPCE_1, + GPIO54_nPCE_2, + GPIO79_PSKTSEL, + GPIO55_nPREG, + GPIO56_nPWAIT, + GPIO57_nIOIS16, +}; + +/****************************************************************************** + * Compatibility: Parameter parsing + ******************************************************************************/ static unsigned long balloon3_irq_enabled; static unsigned long balloon3_features_present = @@ -73,6 +131,321 @@ int __init parse_balloon3_features(char *arg) } early_param("balloon3_features", parse_balloon3_features); +/****************************************************************************** + * NOR Flash + ******************************************************************************/ +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) +static struct mtd_partition balloon3_nor_partitions[] = { + { + .name = "Flash", + .offset = 0x00000000, + .size = MTDPART_SIZ_FULL, + } +}; + +static struct physmap_flash_data balloon3_flash_data[] = { + { + .width = 2, /* bankwidth in bytes */ + .parts = balloon3_nor_partitions, + .nr_parts = ARRAY_SIZE(balloon3_nor_partitions) + } +}; + +static struct resource balloon3_flash_resource = { + .start = PXA_CS0_PHYS, + .end = PXA_CS0_PHYS + SZ_64M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device balloon3_flash = { + .name = "physmap-flash", + .id = 0, + .resource = &balloon3_flash_resource, + .num_resources = 1, + .dev = { + .platform_data = balloon3_flash_data, + }, +}; +static void __init balloon3_nor_init(void) +{ + platform_device_register(&balloon3_flash); +} +#else +static inline void balloon3_nor_init(void) {} +#endif + +/****************************************************************************** + * Audio and Touchscreen + ******************************************************************************/ +#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ + defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) +static struct ucb1400_pdata vpac270_ucb1400_pdata = { + .irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ), +}; + + +static struct platform_device balloon3_ucb1400_device = { + .name = "ucb1400_core", + .id = -1, + .dev = { + .platform_data = &vpac270_ucb1400_pdata, + }, +}; + +static void __init balloon3_ts_init(void) +{ + if (!balloon3_has(BALLOON3_FEATURE_AUDIO)) + return; + + pxa_set_ac97_info(NULL); + platform_device_register(&balloon3_ucb1400_device); +} +#else +static inline void balloon3_ts_init(void) {} +#endif + +/****************************************************************************** + * Framebuffer + ******************************************************************************/ +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) +static struct pxafb_mode_info balloon3_lcd_modes[] = { + { + .pixclock = 38000, + .xres = 480, + .yres = 640, + .bpp = 16, + .hsync_len = 8, + .left_margin = 8, + .right_margin = 8, + .vsync_len = 2, + .upper_margin = 4, + .lower_margin = 5, + .sync = 0, + }, +}; + +static struct pxafb_mach_info balloon3_lcd_screen = { + .modes = balloon3_lcd_modes, + .num_modes = ARRAY_SIZE(balloon3_lcd_modes), + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, +}; + +static void balloon3_backlight_power(int on) +{ + gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on); +} + +static void __init balloon3_lcd_init(void) +{ + int ret; + + if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY)) + return; + + ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON"); + if (ret) { + pr_err("Requesting BKL-ON GPIO failed!\n"); + goto err; + } + + ret = gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1); + if (ret) { + pr_err("Setting BKL-ON GPIO direction failed!\n"); + goto err2; + } + + balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power; + set_pxa_fb_info(&balloon3_lcd_screen); + return; + +err2: + gpio_free(BALLOON3_GPIO_RUN_BACKLIGHT); +err: + return; +} +#else +static inline void balloon3_lcd_init(void) {} +#endif + +/****************************************************************************** + * SD/MMC card controller + ******************************************************************************/ +#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) +static struct pxamci_platform_data balloon3_mci_platform_data = { + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, + .gpio_card_detect = -1, + .gpio_card_ro = -1, + .gpio_power = -1, + .detect_delay_ms = 200, +}; + +static void __init balloon3_mmc_init(void) +{ + pxa_set_mci_info(&balloon3_mci_platform_data); +} +#else +static inline void balloon3_mmc_init(void) {} +#endif + +/****************************************************************************** + * USB Gadget + ******************************************************************************/ +#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) +static void balloon3_udc_command(int cmd) +{ + if (cmd == PXA2XX_UDC_CMD_CONNECT) + UP2OCR |= UP2OCR_DPPUE | UP2OCR_DPPUBE; + else if (cmd == PXA2XX_UDC_CMD_DISCONNECT) + UP2OCR &= ~UP2OCR_DPPUE; +} + +static int balloon3_udc_is_connected(void) +{ + return 1; +} + +static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = { + .udc_command = balloon3_udc_command, + .udc_is_connected = balloon3_udc_is_connected, + .gpio_pullup = -1, +}; + +static void __init balloon3_udc_init(void) +{ + pxa_set_udc_info(&balloon3_udc_info); + platform_device_register(&balloon3_gpio_vbus); +} +#else +static inline void balloon3_udc_init(void) {} +#endif + +/****************************************************************************** + * IrDA + ******************************************************************************/ +#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE) +static struct pxaficp_platform_data balloon3_ficp_platform_data = { + .transceiver_cap = IR_FIRMODE | IR_SIRMODE | IR_OFF, +}; + +static void __init balloon3_irda_init(void) +{ + pxa_set_ficp_info(&balloon3_ficp_platform_data); +} +#else +static inline void balloon3_irda_init(void) {} +#endif + +/****************************************************************************** + * USB Host + ******************************************************************************/ +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +static struct pxaohci_platform_data balloon3_ohci_info = { + .port_mode = PMM_PERPORT_MODE, + .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, +}; + +static void __init balloon3_uhc_init(void) +{ + if (!balloon3_has(BALLOON3_FEATURE_OHCI)) + return; + pxa_set_ohci_info(&balloon3_ohci_info); +} +#else +static inline void balloon3_uhc_init(void) {} +#endif + +/****************************************************************************** + * LEDs + ******************************************************************************/ +#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) +struct gpio_led balloon3_gpio_leds[] = { + { + .name = "balloon3:green:idle", + .default_trigger = "heartbeat", + .gpio = BALLOON3_GPIO_LED_IDLE, + .active_low = 1, + }, { + .name = "balloon3:green:nand", + .default_trigger = "nand-disk", + .gpio = BALLOON3_GPIO_LED_NAND, + .active_low = 1, + }, +}; + +static struct gpio_led_platform_data balloon3_gpio_led_info = { + .leds = balloon3_gpio_leds, + .num_leds = ARRAY_SIZE(balloon3_gpio_leds), +}; + +static struct platform_device balloon3_leds = { + .name = "leds-gpio", + .id = 0, + .dev = { + .platform_data = &balloon3_gpio_led_info, + } +}; + +struct gpio_led balloon3_pcf_gpio_leds[] = { + { + .name = "balloon3:green:led0", + .gpio = BALLOON3_PCF_GPIO_LED0, + .active_low = 1, + }, { + .name = "balloon3:green:led1", + .gpio = BALLOON3_PCF_GPIO_LED1, + .active_low = 1, + }, { + .name = "balloon3:orange:led2", + .gpio = BALLOON3_PCF_GPIO_LED2, + .active_low = 1, + }, { + .name = "balloon3:orange:led3", + .gpio = BALLOON3_PCF_GPIO_LED3, + .active_low = 1, + }, { + .name = "balloon3:orange:led4", + .gpio = BALLOON3_PCF_GPIO_LED4, + .active_low = 1, + }, { + .name = "balloon3:orange:led5", + .gpio = BALLOON3_PCF_GPIO_LED5, + .active_low = 1, + }, { + .name = "balloon3:red:led6", + .gpio = BALLOON3_PCF_GPIO_LED6, + .active_low = 1, + }, { + .name = "balloon3:red:led7", + .gpio = BALLOON3_PCF_GPIO_LED7, + .active_low = 1, + }, +}; + +static struct gpio_led_platform_data balloon3_pcf_gpio_led_info = { + .leds = balloon3_pcf_gpio_leds, + .num_leds = ARRAY_SIZE(balloon3_pcf_gpio_leds), +}; + +static struct platform_device balloon3_pcf_leds = { + .name = "leds-gpio", + .id = 1, + .dev = { + .platform_data = &balloon3_pcf_gpio_led_info, + } +}; + +static void __init balloon3_leds_init(void) +{ + platform_device_register(&balloon3_leds); + platform_device_register(&balloon3_pcf_leds); +} +#else +static inline void balloon3_leds_init(void) {} +#endif + +/****************************************************************************** + * FPGA IRQ + ******************************************************************************/ static void balloon3_mask_irq(unsigned int irq) { int balloon3_irq = (irq - BALLOON3_IRQ(0)); @@ -98,7 +471,6 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc) { unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) & balloon3_irq_enabled; - do { /* clear useless edge notification */ if (desc->chip->ack) @@ -132,201 +504,259 @@ static void __init balloon3_init_irq(void) "enabled\n", __func__, BALLOON3_AUX_NIRQ); } -static unsigned long balloon3_ac97_pin_config[] = { - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO113_AC97_nRESET, +/****************************************************************************** + * GPIO expander + ******************************************************************************/ +#if defined(CONFIG_GPIO_PCF857X) || defined(CONFIG_GPIO_PCF857X_MODULE) +static struct pcf857x_platform_data balloon3_pcf857x_pdata = { + .gpio_base = BALLOON3_PCF_GPIO_BASE, + .n_latch = 0, + .setup = NULL, + .teardown = NULL, + .context = NULL, }; -static void balloon3_backlight_power(int on) -{ - pr_debug("%s: power is %s\n", __func__, on ? "on" : "off"); - gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on); -} - -static unsigned long balloon3_lcd_pin_config[] = { - /* LCD - 16bpp Active TFT */ - GPIOxx_LCD_TFT_16BPP, - - GPIO99_GPIO, /* Backlight */ -}; - -static struct pxafb_mode_info balloon3_lcd_modes[] = { +static struct i2c_board_info __initdata balloon3_i2c_devs[] = { { - .pixclock = 38000, - .xres = 480, - .yres = 640, - .bpp = 16, - .hsync_len = 8, - .left_margin = 8, - .right_margin = 8, - .vsync_len = 2, - .upper_margin = 4, - .lower_margin = 5, - .sync = 0, + I2C_BOARD_INFO("pcf8574a", 0x38), + .platform_data = &balloon3_pcf857x_pdata, }, }; -static struct pxafb_mach_info balloon3_pxafb_info = { - .modes = balloon3_lcd_modes, - .num_modes = ARRAY_SIZE(balloon3_lcd_modes), - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, - .pxafb_backlight_power = balloon3_backlight_power, -}; - -static unsigned long balloon3_mmc_pin_config[] = { - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, -}; - -static void balloon3_mci_setpower(struct device *dev, unsigned int vdd) +static void __init balloon3_i2c_init(void) { - struct pxamci_platform_data *p_d = dev->platform_data; + pxa_set_i2c_info(NULL); + i2c_register_board_info(0, ARRAY_AND_SIZE(balloon3_i2c_devs)); +} +#else +static inline void balloon3_i2c_init(void) {} +#endif - if ((1 << vdd) & p_d->ocr_mask) { - pr_debug("%s: on\n", __func__); - /* FIXME something to prod here? */ - } else { - pr_debug("%s: off\n", __func__); - /* FIXME something to prod here? */ +/****************************************************************************** + * NAND + ******************************************************************************/ +#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE) +static uint16_t balloon3_ctl = + BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | + BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | + BALLOON3_NAND_CONTROL_FLWP; + +static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + + if (ctrl & NAND_CTRL_CHANGE) { + if (ctrl & NAND_CLE) + balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCLE; + else + balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLCLE; + + if (ctrl & NAND_ALE) + balloon3_ctl |= BALLOON3_NAND_CONTROL_FLALE; + else + balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLALE; + + __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); } -static struct pxamci_platform_data balloon3_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .setpower = balloon3_mci_setpower, +static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip) +{ + if (chip < 0 || chip > 3) + return; + + balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCE0 | + BALLOON3_NAND_CONTROL_FLCE1 | + BALLOON3_NAND_CONTROL_FLCE2 | + BALLOON3_NAND_CONTROL_FLCE3; + + /* Deassert correct nCE line */ + balloon3_ctl &= ~(BALLOON3_NAND_CONTROL_FLCE0 << chip); + + __raw_writew(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); +} + +static int balloon3_nand_probe(struct platform_device *pdev) +{ + void __iomem *temp_map; + uint16_t ver; + int ret; + + __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, BALLOON3_NAND_CONTROL2_REG); + + ver = __raw_readw(BALLOON3_FPGA_VER); + if (ver > 0x0201) + pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. " + "NAND support might be broken in this version!", ver); + + /* Power up the NAND chips */ + ret = gpio_request(BALLOON3_GPIO_RUN_NAND, "NAND"); + if (ret) + goto err1; + + ret = gpio_direction_output(BALLOON3_GPIO_RUN_NAND, 1); + if (ret) + goto err2; + + gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1); + + /* Deassert all nCE lines and write protect line */ + __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); + return 0; + +err2: + gpio_free(BALLOON3_GPIO_RUN_NAND); +err1: + return ret; +} + +static void balloon3_nand_remove(struct platform_device *pdev) +{ + /* Power down the NAND chips */ + gpio_set_value(BALLOON3_GPIO_RUN_NAND, 0); + gpio_free(BALLOON3_GPIO_RUN_NAND); +} + +static struct mtd_partition balloon3_partition_info[] = { + [0] = { + .name = "Boot", + .offset = 0, + .size = SZ_4M, + }, + [1] = { + .name = "RootFS", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL + }, }; -static int balloon3_udc_is_connected(void) -{ - pr_debug("%s: udc connected\n", __func__); - return 1; -} +static const char *balloon3_part_probes[] = { "cmdlinepart", NULL }; -static void balloon3_udc_command(int cmd) -{ - switch (cmd) { - case PXA2XX_UDC_CMD_CONNECT: - UP2OCR |= (UP2OCR_DPPUE + UP2OCR_DPPUBE); - pr_debug("%s: connect\n", __func__); - break; - case PXA2XX_UDC_CMD_DISCONNECT: - UP2OCR &= ~UP2OCR_DPPUE; - pr_debug("%s: disconnect\n", __func__); - break; +struct platform_nand_data balloon3_nand_pdata = { + .chip = { + .nr_chips = 4, + .chip_offset = 0, + .nr_partitions = ARRAY_SIZE(balloon3_partition_info), + .partitions = balloon3_partition_info, + .chip_delay = 50, + .part_probe_types = balloon3_part_probes, + }, + .ctrl = { + .hwcontrol = 0, + .dev_ready = 0, + .select_chip = balloon3_nand_select_chip, + .cmd_ctrl = balloon3_nand_cmd_ctl, + .probe = balloon3_nand_probe, + .remove = balloon3_nand_remove, + }, +}; + +static struct resource balloon3_nand_resource[] = { + [0] = { + .start = BALLOON3_NAND_BASE, + .end = BALLOON3_NAND_BASE + 0x4, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device balloon3_nand = { + .name = "gen_nand", + .num_resources = ARRAY_SIZE(balloon3_nand_resource), + .resource = balloon3_nand_resource, + .id = -1, + .dev = { + .platform_data = &balloon3_nand_pdata, } +}; + +static void __init balloon3_nand_init(void) +{ + platform_device_register(&balloon3_nand); } +#else +static inline void balloon3_nand_init(void) {} +#endif -static struct pxa2xx_udc_mach_info balloon3_udc_info = { - .udc_is_connected = balloon3_udc_is_connected, - .udc_command = balloon3_udc_command, -}; - -static struct pxaficp_platform_data balloon3_ficp_platform_data = { - .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, -}; - -static unsigned long balloon3_ohci_pin_config[] = { - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, -}; - -static struct pxaohci_platform_data balloon3_ohci_platform_data = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, -}; - -static unsigned long balloon3_pin_config[] __initdata = { - /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* Wakeup GPIO */ - GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, - - /* NAND & IDLE LED GPIOs */ - GPIO9_GPIO, - GPIO10_GPIO, -}; - -static struct gpio_led balloon3_gpio_leds[] = { +/****************************************************************************** + * Core power regulator + ******************************************************************************/ +#if defined(CONFIG_REGULATOR_MAX1586) || \ + defined(CONFIG_REGULATOR_MAX1586_MODULE) +static struct regulator_consumer_supply balloon3_max1587a_consumers[] = { { - .name = "balloon3:green:idle", - .default_trigger = "heartbeat", - .gpio = BALLOON3_GPIO_LED_IDLE, - .active_low = 1, + .supply = "vcc_core", + } +}; + +static struct regulator_init_data balloon3_max1587a_v3_info = { + .constraints = { + .name = "vcc_core range", + .min_uV = 900000, + .max_uV = 1705000, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, }, + .consumer_supplies = balloon3_max1587a_consumers, + .num_consumer_supplies = ARRAY_SIZE(balloon3_max1587a_consumers), +}; + +static struct max1586_subdev_data balloon3_max1587a_subdevs[] = { { - .name = "balloon3:green:nand", - .default_trigger = "nand-disk", - .gpio = BALLOON3_GPIO_LED_NAND, - .active_low = 1, + .name = "vcc_core", + .id = MAX1586_V3, + .platform_data = &balloon3_max1587a_v3_info, + } +}; + +static struct max1586_platform_data balloon3_max1587a_info = { + .subdevs = balloon3_max1587a_subdevs, + .num_subdevs = ARRAY_SIZE(balloon3_max1587a_subdevs), + .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */ +}; + +static struct i2c_board_info __initdata balloon3_pi2c_board_info[] = { + { + I2C_BOARD_INFO("max1586", 0x14), + .platform_data = &balloon3_max1587a_info, }, }; -static struct gpio_led_platform_data balloon3_gpio_leds_platform_data = { - .leds = balloon3_gpio_leds, - .num_leds = ARRAY_SIZE(balloon3_gpio_leds), -}; - -static struct platform_device balloon3led_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &balloon3_gpio_leds_platform_data, - }, -}; +static void __init balloon3_pmic_init(void) +{ + pxa27x_set_i2c_power_info(NULL); + i2c_register_board_info(1, ARRAY_AND_SIZE(balloon3_pi2c_board_info)); +} +#else +static inline void balloon3_pmic_init(void) {} +#endif +/****************************************************************************** + * Machine init + ******************************************************************************/ static void __init balloon3_init(void) { - pr_info("Initialising Balloon3\n"); - - /* system bus arbiter setting - * - Core_Park - * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 - */ ARB_CNTRL = ARB_CORE_PARK | 0x234; + pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config)); + pxa_set_ffuart_info(NULL); pxa_set_btuart_info(NULL); pxa_set_stuart_info(NULL); - pxa_set_i2c_info(NULL); - if (balloon3_has(BALLOON3_FEATURE_AUDIO)) { - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config)); - pxa_set_ac97_info(NULL); - } - - if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) { - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config)); - gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, - "LCD Backlight Power"); - gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1); - set_pxa_fb_info(&balloon3_pxafb_info); - } - - if (balloon3_has(BALLOON3_FEATURE_MMC)) { - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config)); - pxa_set_mci_info(&balloon3_mci_platform_data); - } - pxa_set_ficp_info(&balloon3_ficp_platform_data); - if (balloon3_has(BALLOON3_FEATURE_OHCI)) { - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ohci_pin_config)); - pxa_set_ohci_info(&balloon3_ohci_platform_data); - } - pxa_set_udc_info(&balloon3_udc_info); - - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config)); - - platform_device_register(&balloon3led_device); + balloon3_i2c_init(); + balloon3_irda_init(); + balloon3_lcd_init(); + balloon3_leds_init(); + balloon3_mmc_init(); + balloon3_nand_init(); + balloon3_nor_init(); + balloon3_pmic_init(); + balloon3_ts_init(); + balloon3_udc_init(); + balloon3_uhc_init(); } static struct map_desc balloon3_io_desc[] __initdata = { diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index fdda6be6c391..c70e6c2f4e7c 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -689,6 +689,7 @@ static void __init cm_x300_init_da9030(void) { pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); i2c_register_board_info(1, &cm_x300_pmic_info, 1); + set_irq_wake(IRQ_WAKEUP0, 1); } static void __init cm_x300_init_wi2wi(void) @@ -745,9 +746,10 @@ static void __init cm_x300_init(void) { cm_x300_init_mfp(); - pxa_set_ffuart_info(NULL); pxa_set_btuart_info(NULL); pxa_set_stuart_info(NULL); + if (cpu_is_pxa300()) + pxa_set_ffuart_info(NULL); cm_x300_init_da9030(); cm_x300_init_dm9000(); diff --git a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c b/arch/arm/mach-pxa/colibri-pxa270-evalboard.c new file mode 100644 index 000000000000..0f3b632c3b14 --- /dev/null +++ b/arch/arm/mach-pxa/colibri-pxa270-evalboard.c @@ -0,0 +1,111 @@ +/* + * linux/arch/arm/mach-pxa/colibri-pxa270-evalboard.c + * + * Support for Toradex PXA270 based Colibri Evaluation Carrier Board + * Daniel Mack + * Marek Vasut + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "generic.h" +#include "devices.h" + +/****************************************************************************** + * Pin configuration + ******************************************************************************/ +static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = { + /* MMC */ + GPIO32_MMC_CLK, + GPIO92_MMC_DAT_0, + GPIO109_MMC_DAT_1, + GPIO110_MMC_DAT_2, + GPIO111_MMC_DAT_3, + GPIO112_MMC_CMD, + GPIO0_GPIO, /* SD detect */ + + /* FFUART */ + GPIO39_FFUART_TXD, + GPIO34_FFUART_RXD, + + /* UHC */ + GPIO88_USBH1_PWR, + GPIO89_USBH1_PEN, + GPIO119_USBH2_PWR, + GPIO120_USBH2_PEN, +}; + +/****************************************************************************** + * SD/MMC card controller + ******************************************************************************/ +#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) +static struct pxamci_platform_data colibri_pxa270_mci_platform_data = { + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, + .gpio_power = -1, + .gpio_card_detect = GPIO0_COLIBRI_PXA270_SD_DETECT, + .gpio_card_ro = -1, + .detect_delay_ms = 200, +}; + +static void __init colibri_pxa270_mmc_init(void) +{ + pxa_set_mci_info(&colibri_pxa270_mci_platform_data); +} +#else +static inline void colibri_pxa270_mmc_init(void) {} +#endif + +/****************************************************************************** + * USB Host + ******************************************************************************/ +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +static int colibri_pxa270_ohci_init(struct device *dev) +{ + UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; + return 0; +} + +static struct pxaohci_platform_data colibri_pxa270_ohci_info = { + .port_mode = PMM_PERPORT_MODE, + .flags = ENABLE_PORT1 | ENABLE_PORT2 | + POWER_CONTROL_LOW | POWER_SENSE_LOW, + .init = colibri_pxa270_ohci_init, +}; + +static void __init colibri_pxa270_uhc_init(void) +{ + pxa_set_ohci_info(&colibri_pxa270_ohci_info); +} +#else +static inline void colibri_pxa270_uhc_init(void) {} +#endif + +void __init colibri_pxa270_evalboard_init(void) +{ + pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_evalboard_pin_config)); + pxa_set_ffuart_info(NULL); + pxa_set_btuart_info(NULL); + pxa_set_stuart_info(NULL); + + colibri_pxa270_mmc_init(); + colibri_pxa270_uhc_init(); +} + diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c new file mode 100644 index 000000000000..37f0f3ed7c61 --- /dev/null +++ b/arch/arm/mach-pxa/colibri-pxa270-income.c @@ -0,0 +1,272 @@ +/* + * linux/arch/arm/mach-pxa/income.c + * + * Support for Income s.r.o. SH-Dmaster PXA270 SBC + * + * Copyright (C) 2010 + * Marek Vasut + * Pavel Revak + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#include "devices.h" +#include "generic.h" + +#define GPIO114_INCOME_ETH_IRQ (114) +#define GPIO0_INCOME_SD_DETECT (0) +#define GPIO0_INCOME_SD_RO (1) +#define GPIO54_INCOME_LED_A (54) +#define GPIO55_INCOME_LED_B (55) +#define GPIO113_INCOME_TS_IRQ (113) + +/****************************************************************************** + * Pin configuration + ******************************************************************************/ +static mfp_cfg_t income_pin_config[] __initdata = { + /* MMC */ + GPIO32_MMC_CLK, + GPIO92_MMC_DAT_0, + GPIO109_MMC_DAT_1, + GPIO110_MMC_DAT_2, + GPIO111_MMC_DAT_3, + GPIO112_MMC_CMD, + GPIO0_GPIO, /* SD detect */ + GPIO1_GPIO, /* SD read-only */ + + /* FFUART */ + GPIO39_FFUART_TXD, + GPIO34_FFUART_RXD, + + /* BFUART */ + GPIO42_BTUART_RXD, + GPIO43_BTUART_TXD, + GPIO45_BTUART_RTS, + + /* STUART */ + GPIO46_STUART_RXD, + GPIO47_STUART_TXD, + + /* UHC */ + GPIO88_USBH1_PWR, + GPIO89_USBH1_PEN, + + /* LCD */ + GPIOxx_LCD_TFT_16BPP, + + /* PWM */ + GPIO16_PWM0_OUT, + + /* I2C */ + GPIO117_I2C_SCL, + GPIO118_I2C_SDA, + + /* LED */ + GPIO54_GPIO, /* LED A */ + GPIO55_GPIO, /* LED B */ +}; + +/****************************************************************************** + * SD/MMC card controller + ******************************************************************************/ +#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) +static struct pxamci_platform_data income_mci_platform_data = { + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, + .gpio_power = -1, + .gpio_card_detect = GPIO0_INCOME_SD_DETECT, + .gpio_card_ro = GPIO0_INCOME_SD_RO, + .detect_delay_ms = 200, +}; + +static void __init income_mmc_init(void) +{ + pxa_set_mci_info(&income_mci_platform_data); +} +#else +static inline void income_mmc_init(void) {} +#endif + +/****************************************************************************** + * USB Host + ******************************************************************************/ +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +static struct pxaohci_platform_data income_ohci_info = { + .port_mode = PMM_PERPORT_MODE, + .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW, +}; + +static void __init income_uhc_init(void) +{ + pxa_set_ohci_info(&income_ohci_info); +} +#else +static inline void income_uhc_init(void) {} +#endif + +/****************************************************************************** + * LED + ******************************************************************************/ +#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) +struct gpio_led income_gpio_leds[] = { + { + .name = "income:green:leda", + .default_trigger = "none", + .gpio = GPIO54_INCOME_LED_A, + .active_low = 1, + }, + { + .name = "income:green:ledb", + .default_trigger = "none", + .gpio = GPIO55_INCOME_LED_B, + .active_low = 1, + } +}; + +static struct gpio_led_platform_data income_gpio_led_info = { + .leds = income_gpio_leds, + .num_leds = ARRAY_SIZE(income_gpio_leds), +}; + +static struct platform_device income_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &income_gpio_led_info, + } +}; + +static void __init income_led_init(void) +{ + platform_device_register(&income_leds); +} +#else +static inline void income_led_init(void) {} +#endif + +/****************************************************************************** + * I2C + ******************************************************************************/ +#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) +static struct i2c_board_info __initdata income_i2c_devs[] = { + { + I2C_BOARD_INFO("ds1340", 0x68), + }, { + I2C_BOARD_INFO("lm75", 0x4f), + }, +}; + +static void __init income_i2c_init(void) +{ + pxa_set_i2c_info(NULL); + pxa27x_set_i2c_power_info(NULL); + i2c_register_board_info(0, ARRAY_AND_SIZE(income_i2c_devs)); +} +#else +static inline void income_i2c_init(void) {} +#endif + +/****************************************************************************** + * Framebuffer + ******************************************************************************/ +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) +static struct pxafb_mode_info income_lcd_modes[] = { +{ + .pixclock = 144700, + .xres = 320, + .yres = 240, + .bpp = 32, + .depth = 18, + + .left_margin = 10, + .right_margin = 10, + .upper_margin = 7, + .lower_margin = 8, + + .hsync_len = 20, + .vsync_len = 2, + + .sync = FB_SYNC_VERT_HIGH_ACT, +}, +}; + +static struct pxafb_mach_info income_lcd_screen = { + .modes = income_lcd_modes, + .num_modes = ARRAY_SIZE(income_lcd_modes), + .lcd_conn = LCD_COLOR_TFT_18BPP | LCD_PCLK_EDGE_FALL, +}; + +static void __init income_lcd_init(void) +{ + set_pxa_fb_info(&income_lcd_screen); +} +#else +static inline void income_lcd_init(void) {} +#endif + +/****************************************************************************** + * Backlight + ******************************************************************************/ +#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM__MODULE) +static struct platform_pwm_backlight_data income_backlight_data = { + .pwm_id = 0, + .max_brightness = 0x3ff, + .dft_brightness = 0x1ff, + .pwm_period_ns = 1000000, +}; + +static struct platform_device income_backlight = { + .name = "pwm-backlight", + .dev = { + .parent = &pxa27x_device_pwm0.dev, + .platform_data = &income_backlight_data, + }, +}; + +static void __init income_pwm_init(void) +{ + platform_device_register(&income_backlight); +} +#else +static inline void income_pwm_init(void) {} +#endif + +void __init colibri_pxa270_income_boardinit(void) +{ + pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config)); + pxa_set_ffuart_info(NULL); + pxa_set_btuart_info(NULL); + pxa_set_stuart_info(NULL); + + income_mmc_init(); + income_uhc_init(); + income_led_init(); + income_i2c_init(); + income_lcd_init(); + income_pwm_init(); +} + diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 061c45316de8..98673ac6efd0 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c @@ -3,6 +3,7 @@ * * Support for Toradex PXA270 based Colibri module * Daniel Mack + * Marek Vasut * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -10,49 +11,55 @@ */ #include -#include -#include -#include #include -#include -#include -#include +#include #include #include #include -#include -#include -#include -#include -#include +#include +#include +#include + #include -#include -#include #include +#include +#include -#include +#include #include +#include -#include "generic.h" #include "devices.h" +#include "generic.h" -/* - * GPIO configuration - */ +/****************************************************************************** + * Pin configuration + ******************************************************************************/ static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = { + /* Ethernet */ GPIO78_nCS_2, /* Ethernet CS */ GPIO114_GPIO, /* Ethernet IRQ */ + + /* AC97 */ + GPIO28_AC97_BITCLK, + GPIO29_AC97_SDATA_IN_0, + GPIO30_AC97_SDATA_OUT, + GPIO31_AC97_SYNC, + GPIO95_AC97_nRESET, + GPIO98_AC97_SYSCLK, + GPIO113_GPIO, /* Touchscreen IRQ */ }; -/* - * NOR flash - */ +/****************************************************************************** + * NOR Flash + ******************************************************************************/ +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) static struct mtd_partition colibri_partitions[] = { { .name = "Bootloader", .offset = 0x00000000, .size = 0x00040000, - .mask_flags = MTD_WRITEABLE /* force read-only */ + .mask_flags = MTD_WRITEABLE /* force read-only */ }, { .name = "Kernel", .offset = 0x00040000, @@ -90,50 +97,113 @@ static struct platform_device colibri_pxa270_flash_device = { .num_resources = 1, }; -/* - * DM9000 Ethernet - */ -#if defined(CONFIG_DM9000) -static struct resource dm9000_resources[] = { - [0] = { - .start = COLIBRI_PXA270_ETH_PHYS, - .end = COLIBRI_PXA270_ETH_PHYS + 3, +static void __init colibri_pxa270_nor_init(void) +{ + platform_device_register(&colibri_pxa270_flash_device); +} +#else +static inline void colibri_pxa270_nor_init(void) {} +#endif + +/****************************************************************************** + * Ethernet + ******************************************************************************/ +#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) +static struct resource colibri_pxa270_dm9000_resources[] = { + { + .start = PXA_CS2_PHYS, + .end = PXA_CS2_PHYS + 3, .flags = IORESOURCE_MEM, }, - [1] = { - .start = COLIBRI_PXA270_ETH_PHYS + 4, - .end = COLIBRI_PXA270_ETH_PHYS + 4 + 500, + { + .start = PXA_CS2_PHYS + 4, + .end = PXA_CS2_PHYS + 4 + 500, .flags = IORESOURCE_MEM, }, - [2] = { - .start = COLIBRI_PXA270_ETH_IRQ, - .end = COLIBRI_PXA270_ETH_IRQ, + { + .start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), + .end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, }, }; -static struct platform_device dm9000_device = { +static struct platform_device colibri_pxa270_dm9000_device = { .name = "dm9000", .id = -1, - .num_resources = ARRAY_SIZE(dm9000_resources), - .resource = dm9000_resources, + .num_resources = ARRAY_SIZE(colibri_pxa270_dm9000_resources), + .resource = colibri_pxa270_dm9000_resources, }; -#endif /* CONFIG_DM9000 */ -static struct platform_device *colibri_pxa270_devices[] __initdata = { - &colibri_pxa270_flash_device, -#if defined(CONFIG_DM9000) - &dm9000_device, +static void __init colibri_pxa270_eth_init(void) +{ + platform_device_register(&colibri_pxa270_dm9000_device); +} +#else +static inline void colibri_pxa270_eth_init(void) {} #endif + +/****************************************************************************** + * Audio and Touchscreen + ******************************************************************************/ +#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ + defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) +static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = { + .reset_gpio = 95, }; +static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { + .irq = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ), +}; + +static struct platform_device colibri_pxa270_ucb1400_device = { + .name = "ucb1400_core", + .id = -1, + .dev = { + .platform_data = &colibri_pxa270_ucb1400_pdata, + }, +}; + +static void __init colibri_pxa270_tsc_init(void) +{ + pxa_set_ac97_info(&colibri_pxa270_ac97_pdata); + platform_device_register(&colibri_pxa270_ucb1400_device); +} +#else +static inline void colibri_pxa270_tsc_init(void) {} +#endif + +static int colibri_pxa270_baseboard; +core_param(colibri_pxa270_baseboard, colibri_pxa270_baseboard, int, 0444); + static void __init colibri_pxa270_init(void) { pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - platform_add_devices(ARRAY_AND_SIZE(colibri_pxa270_devices)); + + colibri_pxa270_nor_init(); + colibri_pxa270_eth_init(); + colibri_pxa270_tsc_init(); + + switch (colibri_pxa270_baseboard) { + case COLIBRI_PXA270_EVALBOARD: + colibri_pxa270_evalboard_init(); + break; + case COLIBRI_PXA270_INCOME: + colibri_pxa270_income_boardinit(); + break; + default: + printk(KERN_ERR "Illegal colibri_pxa270_baseboard type %d\n", + colibri_pxa270_baseboard); + } +} + +/* The "Income s.r.o. SH-Dmaster PXA270 SBC" board can be booted either + * with the INCOME mach type or with COLIBRI and the kernel parameter + * "colibri_pxa270_baseboard=1" + */ +static void __init colibri_pxa270_income_init(void) +{ + colibri_pxa270_baseboard = COLIBRI_PXA270_INCOME; + colibri_pxa270_init(); } MACHINE_START(COLIBRI, "Toradex Colibri PXA270") @@ -146,3 +216,13 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270") .timer = &pxa_timer, MACHINE_END +MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .init_machine = colibri_pxa270_income_init, + .map_io = pxa_map_io, + .init_irq = pxa27x_init_irq, + .timer = &pxa_timer, +MACHINE_END + diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index ae835fad7d10..99e850d84710 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -28,6 +29,8 @@ #include #include #include +#include +#include #include "generic.h" #include "devices.h" @@ -101,6 +104,42 @@ void __init colibri_pxa320_init_ohci(void) static inline void colibri_pxa320_init_ohci(void) {} #endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */ +#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) +static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = { + .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96), + .gpio_pullup = -1, +}; + +static struct platform_device colibri_pxa320_gpio_vbus = { + .name = "gpio-vbus", + .id = -1, + .dev = { + .platform_data = &colibri_pxa320_gpio_vbus_info, + }, +}; + +static void colibri_pxa320_udc_command(int cmd) +{ + if (cmd == PXA2XX_UDC_CMD_CONNECT) + UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE; + else if (cmd == PXA2XX_UDC_CMD_DISCONNECT) + UP2OCR = UP2OCR_HXOE; +} + +static struct pxa2xx_udc_mach_info colibri_pxa320_udc_info __initdata = { + .udc_command = colibri_pxa320_udc_command, + .gpio_pullup = -1, +}; + +static void __init colibri_pxa320_init_udc(void) +{ + pxa_set_udc_info(&colibri_pxa320_udc_info); + platform_device_register(&colibri_pxa320_gpio_vbus); +} +#else +static inline void colibri_pxa320_init_udc(void) {} +#endif + static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = { GPIO22_MMC1_CLK, GPIO23_MMC1_CMD, @@ -212,6 +251,7 @@ void __init colibri_pxa320_init(void) colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config), mfp_to_gpio(MFP_PIN_GPIO28)); colibri_pxa320_init_uart(); + colibri_pxa320_init_udc(); } MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 461ba4080155..3fb0fc099080 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -50,14 +50,13 @@ #include #include #include -#include +#include #include #include #include "generic.h" #include "devices.h" -#include "sharpsl.h" static unsigned long corgi_pin_config[] __initdata = { /* Static Memory I/O */ @@ -185,8 +184,6 @@ static struct scoop_pcmcia_config corgi_pcmcia_config = { .num_devs = 1, }; -EXPORT_SYMBOL(corgiscoop_device); - static struct w100_mem_info corgi_fb_mem = { .ext_cntl = 0x00040003, .sdram_mode_reg = 0x00650021, diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 3f1dc74ac048..29034778bfda 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c @@ -23,12 +23,11 @@ #include #include -#include #include #include +#include #include "generic.h" -#include "sharpsl.h" #define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ #define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ @@ -134,11 +133,11 @@ unsigned long corgipm_read_devdata(int type) case SHARPSL_STATUS_ACIN: return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0); case SHARPSL_STATUS_LOCK: - return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batlock); + return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); case SHARPSL_STATUS_CHRGFULL: - return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batfull); + return gpio_get_value(sharpsl_pm.machinfo->gpio_batfull); case SHARPSL_STATUS_FATAL: - return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_fatal); + return gpio_get_value(sharpsl_pm.machinfo->gpio_fatal); case SHARPSL_ACIN_VOLT: return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT); case SHARPSL_BATT_TEMP: @@ -165,8 +164,6 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { .should_wakeup = corgi_should_wakeup, #if defined(CONFIG_LCD_CORGI) .backlight_limit = corgi_lcd_limit_intensity, -#elif defined(CONFIG_BACKLIGHT_CORGI) - .backlight_limit = corgibl_limit_intensity, #endif .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 8e10db148f1b..65447dc736c2 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -4,6 +4,7 @@ #include #include +#include #include #include #include @@ -31,6 +32,19 @@ void __init pxa_register_device(struct platform_device *dev, void *data) dev_err(&dev->dev, "unable to register device: %d\n", ret); } +static struct resource pxa_resource_pmu = { + .start = IRQ_PMU, + .end = IRQ_PMU, + .flags = IORESOURCE_IRQ, +}; + +struct platform_device pxa_device_pmu = { + .name = "arm-pmu", + .id = ARM_PMU_DEVICE_CPU, + .resource = &pxa_resource_pmu, + .num_resources = 1, +}; + static struct resource pxamci_resources[] = { [0] = { .start = 0x41100000, diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 93817d99761e..50353ea49ba4 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h @@ -1,3 +1,4 @@ +extern struct platform_device pxa_device_pmu; extern struct platform_device pxa_device_mci; extern struct platform_device pxa3xx_device_mci2; extern struct platform_device pxa3xx_device_mci3; diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c deleted file mode 100644 index 8fde3387279d..000000000000 --- a/arch/arm/mach-pxa/e330.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Hardware definitions for the Toshiba e330 PDAs - * - * Copyright (c) 2003 Ian Molton - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "generic.h" -#include "eseries.h" -#include "clock.h" - -/* -------------------- e330 tc6387xb parameters -------------------- */ - -static struct tc6387xb_platform_data e330_tc6387xb_info = { - .enable = &eseries_tmio_enable, - .disable = &eseries_tmio_disable, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, -}; - -static struct platform_device e330_tc6387xb_device = { - .name = "tc6387xb", - .id = -1, - .dev = { - .platform_data = &e330_tc6387xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -/* --------------------------------------------------------------- */ - -static struct platform_device *devices[] __initdata = { - &e330_tc6387xb_device, -}; - -static void __init e330_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - eseries_register_clks(); - eseries_get_tmio_gpios(); - platform_add_devices(devices, ARRAY_SIZE(devices)); - pxa_set_udc_info(&e7xx_udc_mach_info); -} - -MACHINE_START(E330, "Toshiba e330") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .init_machine = e330_init, - .timer = &pxa_timer, -MACHINE_END - diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c deleted file mode 100644 index f50f055f5720..000000000000 --- a/arch/arm/mach-pxa/e350.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * Hardware definitions for the Toshiba e350 PDAs - * - * Copyright (c) 2003 Ian Molton - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "generic.h" -#include "eseries.h" -#include "clock.h" - -/* -------------------- e350 t7l66xb parameters -------------------- */ - -static struct t7l66xb_platform_data e350_t7l66xb_info = { - .irq_base = IRQ_BOARD_START, - .enable = &eseries_tmio_enable, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, -}; - -static struct platform_device e350_t7l66xb_device = { - .name = "t7l66xb", - .id = -1, - .dev = { - .platform_data = &e350_t7l66xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -/* ---------------------------------------------------------- */ - -static struct platform_device *devices[] __initdata = { - &e350_t7l66xb_device, -}; - -static void __init e350_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - eseries_register_clks(); - eseries_get_tmio_gpios(); - platform_add_devices(devices, ARRAY_SIZE(devices)); - pxa_set_udc_info(&e7xx_udc_mach_info); -} - -MACHINE_START(E350, "Toshiba e350") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .init_machine = e350_init, - .timer = &pxa_timer, -MACHINE_END - diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c deleted file mode 100644 index 55b950f12844..000000000000 --- a/arch/arm/mach-pxa/e400.c +++ /dev/null @@ -1,155 +0,0 @@ -/* - * Hardware definitions for the Toshiba eseries PDAs - * - * Copyright (c) 2003 Ian Molton - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "generic.h" -#include "eseries.h" -#include "clock.h" - -/* ------------------------ E400 LCD definitions ------------------------ */ - -static struct pxafb_mode_info e400_pxafb_mode_info = { - .pixclock = 140703, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 4, - .left_margin = 28, - .right_margin = 8, - .vsync_len = 3, - .upper_margin = 5, - .lower_margin = 6, - .sync = 0, -}; - -static struct pxafb_mach_info e400_pxafb_mach_info = { - .modes = &e400_pxafb_mode_info, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP, - .lccr3 = 0, - .pxafb_backlight_power = NULL, -}; - -/* ------------------------ E400 MFP config ----------------------------- */ - -static unsigned long e400_pin_config[] __initdata = { - /* Chip selects */ - GPIO15_nCS_1, /* CS1 - Flash */ - GPIO80_nCS_4, /* CS4 - TMIO */ - - /* Clocks */ - GPIO12_32KHz, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - - /* TMIO controller */ - GPIO19_GPIO, /* t7l66xb #PCLR */ - GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ - - /* wakeup */ - GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, -}; - -/* ---------------------------------------------------------------------- */ - -static struct mtd_partition partition_a = { - .name = "Internal NAND flash", - .offset = 0, - .size = MTDPART_SIZ_FULL, -}; - -static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; - -static struct nand_bbt_descr e400_t7l66xb_nand_bbt = { - .options = 0, - .offs = 4, - .len = 2, - .pattern = scan_ff_pattern -}; - -static struct tmio_nand_data e400_t7l66xb_nand_config = { - .num_partitions = 1, - .partition = &partition_a, - .badblock_pattern = &e400_t7l66xb_nand_bbt, -}; - -static struct t7l66xb_platform_data e400_t7l66xb_info = { - .irq_base = IRQ_BOARD_START, - .enable = &eseries_tmio_enable, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, - - .nand_data = &e400_t7l66xb_nand_config, -}; - -static struct platform_device e400_t7l66xb_device = { - .name = "t7l66xb", - .id = -1, - .dev = { - .platform_data = &e400_t7l66xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -/* ---------------------------------------------------------- */ - -static struct platform_device *devices[] __initdata = { - &e400_t7l66xb_device, -}; - -static void __init e400_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - /* Fixme - e400 may have a switched clock */ - eseries_register_clks(); - eseries_get_tmio_gpios(); - set_pxa_fb_info(&e400_pxafb_mach_info); - platform_add_devices(devices, ARRAY_SIZE(devices)); - pxa_set_udc_info(&e7xx_udc_mach_info); -} - -MACHINE_START(E400, "Toshiba e400") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .init_machine = e400_init, - .timer = &pxa_timer, -MACHINE_END - diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c deleted file mode 100644 index d578021d1a10..000000000000 --- a/arch/arm/mach-pxa/e740.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Hardware definitions for the Toshiba eseries PDAs - * - * Copyright (c) 2003 Ian Molton - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include