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mtd: spi-nor: Rename CR_QUAD_EN_SPAN to SR2_QUAD_EN_BIT1

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JEDEC Basic Flash Parameter Table, 15th DWORD, bits 22:20,
refers to this bit as "bit 1 of the status register 2".
Rename the macro accordingly.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Tudor Ambarus 2019-11-07 08:42:01 +00:00
parent 4da11da15a
commit bb2dc7f46a
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GPG Key ID: 4B554F47A58D14E9
2 changed files with 5 additions and 7 deletions
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8
drivers/mtd/spi-nor/spi-nor.c
View File

@ -1026,7 +1026,7 @@ static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1)
* Write Status (01h) command is available just for the cases
* in which the QE bit is described in SR2 at BIT(1).
*/
sr_cr[1] = CR_QUAD_EN_SPAN;
sr_cr[1] = SR2_QUAD_EN_BIT1;
} else {
sr_cr[1] = 0;
}
@ -2074,7 +2074,7 @@ static int spansion_no_read_cr_quad_enable(struct spi_nor *nor)
if (ret)
return ret;
sr_cr[1] = CR_QUAD_EN_SPAN;
sr_cr[1] = SR2_QUAD_EN_BIT1;
ret = spi_nor_write_sr(nor, sr_cr, 2);
if (ret)
@ -2118,10 +2118,10 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
if (ret)
return ret;
if (sr_cr[1] & CR_QUAD_EN_SPAN)
if (sr_cr[1] & SR2_QUAD_EN_BIT1)
return 0;
sr_cr[1] |= CR_QUAD_EN_SPAN;
sr_cr[1] |= SR2_QUAD_EN_BIT1;
/* Keep the current value of the Status Register. */
ret = spi_nor_read_sr(nor, sr_cr);

4
include/linux/mtd/spi-nor.h
View File

@ -144,10 +144,8 @@
#define FSR_P_ERR BIT(4) /* Program operation status */
#define FSR_PT_ERR BIT(1) /* Protection error bit */
/* Configuration Register bits. */
#define CR_QUAD_EN_SPAN BIT(1) /* Spansion Quad I/O */
/* Status Register 2 bits. */
#define SR2_QUAD_EN_BIT1 BIT(1)
#define SR2_QUAD_EN_BIT7 BIT(7)
/* Supported SPI protocols */