media updates for v4.6-rc1

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Merge tag 'media/v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:
 - Added support for some new video formats
 - mn88473 DVB frontend driver got promoted from staging
 - several improvements at the VSP1 driver
 - several cleanups and improvements at the Media Controller
 - added Media Controller support to snd-usb-audio.  Currently, enabled
   only for au0828-based V4L2/DVB boards
 - Several improvements at nuvoton-cir: it now supports wake up codes
 - Add media controller support to em28xx and saa7134 drivers
 - coda driver now accepts NXP distributed firmware files
 - Some legacy SoC camera drivers will be moving to staging, as they're
   outdated and nobody so far is willing to fix and convert them to use
   the current media framework
 - As usual, lots of cleanups, improvements and new board additions.

* tag 'media/v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (381 commits)
  media: au0828 disable tuner to demod link in au0828_media_device_register()
  [media] touptek: cast char types on %x printk
  [media] touptek: don't DMA at the stack
  [media] mceusb: use %*ph for small buffer dumps
  [media] v4l: exynos4-is: Drop unneeded check when setting up fimc-lite links
  [media] v4l: vsp1: Check if an entity is a subdev with the right function
  [media] hide unused functions for !MEDIA_CONTROLLER
  [media] em28xx: fix Terratec Grabby AC97 codec detection
  [media] media: add prefixes to interface types
  [media] media: rc: nuvoton: switch attribute wakeup_data to text
  [media] v4l2-ioctl: fix YUV422P pixel format description
  [media] media: fix null pointer dereference in v4l_vb2q_enable_media_source()
  [media] v4l2-mc.h: fix yet more compiler errors
  [media] staging/media: add missing TODO files
  [media] media.h: always start with 1 for the audio entities
  [media] sound/usb: Use meaninful names for goto labels
  [media] v4l2-mc.h: fix compiler warnings
  [media] media: au0828 audio mixer isn't connected to decoder
  [media] sound/usb: Use Media Controller API to share media resources
  [media] dw2102: add support for TeVii S662
  ...
This commit is contained in:
Linus Torvalds 2016-03-16 18:27:32 -07:00
commit bace3db5da
398 changed files with 12341 additions and 4943 deletions

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@ -0,0 +1,15 @@
What: /sys/class/rc/rcN/wakeup_data
Date: Mar 2016
KernelVersion: 4.6
Contact: Mauro Carvalho Chehab <m.chehab@samsung.com>
Description:
Reading this file returns the stored CIR wakeup sequence.
It starts with a pulse, followed by a space, pulse etc.
All values are in microseconds.
The same format can be used to store a wakeup sequence
in the Nuvoton chip by writing to this file.
Note: Some systems reset the stored wakeup sequence to a
factory default on each boot. On such systems store the
wakeup sequence in a file and set it on boot using e.g.
a udev rule.

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@ -229,6 +229,7 @@ X!Isound/sound_firmware.c
!Iinclude/media/v4l2-dv-timings.h
!Iinclude/media/v4l2-event.h
!Iinclude/media/v4l2-flash-led-class.h
!Iinclude/media/v4l2-mc.h
!Iinclude/media/v4l2-mediabus.h
!Iinclude/media/v4l2-mem2mem.h
!Iinclude/media/v4l2-of.h

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@ -2329,6 +2329,14 @@ to search and match for the present Macroblock (MB) in the reference picture. Th
vertical search range for motion estimation module in video encoder.</entry>
</row>
<row><entry></entry></row>
<row id="v4l2-mpeg-video-force-key-frame">
<entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME</constant>&nbsp;</entry>
<entry>button</entry>
</row><row><entry spanname="descr">Force a key frame for the next queued buffer. Applicable to encoders.
This is a general, codec-agnostic keyframe control.</entry>
</row>
<row><entry></entry></row>
<row>
<entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE</constant>&nbsp;</entry>
@ -5069,6 +5077,46 @@ interface and may change in the future.</para>
This control is applicable to VGA, DVI-A/D, HDMI and DisplayPort connectors.
</entry>
</row>
<row>
<entry spanname="id"><constant>V4L2_CID_DV_TX_IT_CONTENT_TYPE</constant></entry>
<entry id="v4l2-dv-content-type">enum v4l2_dv_it_content_type</entry>
</row>
<row><entry spanname="descr">Configures the IT Content Type
of the transmitted video. This information is sent over HDMI and DisplayPort connectors
as part of the AVI InfoFrame. The term 'IT Content' is used for content that originates
from a computer as opposed to content from a TV broadcast or an analog source. The
enum&nbsp;v4l2_dv_it_content_type defines the possible content types:</entry>
</row>
<row>
<entrytbl spanname="descr" cols="2">
<tbody valign="top">
<row>
<entry><constant>V4L2_DV_IT_CONTENT_TYPE_GRAPHICS</constant>&nbsp;</entry>
<entry>Graphics content. Pixel data should be passed unfiltered and without
analog reconstruction.</entry>
</row>
<row>
<entry><constant>V4L2_DV_IT_CONTENT_TYPE_PHOTO</constant>&nbsp;</entry>
<entry>Photo content. The content is derived from digital still pictures.
The content should be passed through with minimal scaling and picture
enhancements.</entry>
</row>
<row>
<entry><constant>V4L2_DV_IT_CONTENT_TYPE_CINEMA</constant>&nbsp;</entry>
<entry>Cinema content.</entry>
</row>
<row>
<entry><constant>V4L2_DV_IT_CONTENT_TYPE_GAME</constant>&nbsp;</entry>
<entry>Game content. Audio and video latency should be minimized.</entry>
</row>
<row>
<entry><constant>V4L2_DV_IT_CONTENT_TYPE_NO_ITC</constant>&nbsp;</entry>
<entry>No IT Content information is available and the ITC bit in the AVI
InfoFrame is set to 0.</entry>
</row>
</tbody>
</entrytbl>
</row>
<row>
<entry spanname="id"><constant>V4L2_CID_DV_RX_POWER_PRESENT</constant></entry>
<entry>bitmask</entry>
@ -5098,6 +5146,16 @@ interface and may change in the future.</para>
This control is applicable to VGA, DVI-A/D, HDMI and DisplayPort connectors.
</entry>
</row>
<row>
<entry spanname="id"><constant>V4L2_CID_DV_RX_IT_CONTENT_TYPE</constant></entry>
<entry>enum v4l2_dv_it_content_type</entry>
</row>
<row><entry spanname="descr">Reads the IT Content Type
of the received video. This information is sent over HDMI and DisplayPort connectors
as part of the AVI InfoFrame. The term 'IT Content' is used for content that originates
from a computer as opposed to content from a TV broadcast or an analog source. See
<constant>V4L2_CID_DV_TX_IT_CONTENT_TYPE</constant> for the available content types.</entry>
</row>
<row><entry></entry></row>
</tbody>
</tgroup>

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@ -48,9 +48,6 @@
<refsect1>
<title>Description</title>
<para><emphasis role="bold">NOTE:</emphasis> This new ioctl is programmed to be added on Kernel 4.6. Its definition/arguments may change until its final version.</para>
<para>The typical usage of this ioctl is to call it twice.
On the first call, the structure defined at &media-v2-topology; should
be zeroed. At return, if no errors happen, this ioctl will return the

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@ -80,7 +80,46 @@
</row>
<row>
<entry><constant>MEDIA_ENT_F_TUNER</constant></entry>
<entry>Digital TV, analog TV, radio and/or software radio tuner.</entry>
<entry>Digital TV, analog TV, radio and/or software radio tuner,
with consists on a PLL tuning stage that converts radio
frequency (RF) signal into an Intermediate Frequency (IF).
Modern tuners have internally IF-PLL decoders for audio
and video, but older models have those stages implemented
on separate entities.
</entry>
</row>
<row>
<entry><constant>MEDIA_ENT_F_IF_VID_DECODER</constant></entry>
<entry>IF-PLL video decoder. It receives the IF from a PLL
and decodes the analog TV video signal. This is commonly
found on some very old analog tuners, like Philips MK3
designs. They all contain a tda9887 (or some software
compatible similar chip, like tda9885). Those devices
use a different I2C address than the tuner PLL.
</entry>
</row>
<row>
<entry><constant>MEDIA_ENT_F_IF_AUD_DECODER</constant></entry>
<entry>IF-PLL sound decoder. It receives the IF from a PLL
and decodes the analog TV audio signal. This is commonly
found on some very old analog hardware, like Micronas
msp3400, Philips tda9840, tda985x, etc. Those devices
use a different I2C address than the tuner PLL and
should be controlled together with the IF-PLL video
decoder.
</entry>
</row>
<row>
<entry><constant>MEDIA_ENT_F_AUDIO_CAPTURE</constant></entry>
<entry>Audio Capture Function Entity.</entry>
</row>
<row>
<entry><constant>MEDIA_ENT_F_AUDIO_PLAYBACK</constant></entry>
<entry>Audio Playback Function Entity.</entry>
</row>
<row>
<entry><constant>MEDIA_ENT_F_AUDIO_MIXER</constant></entry>
<entry>Audio Mixer Function Entity.</entry>
</row>
</tbody>
</tgroup>
@ -162,6 +201,46 @@
<entry>Device node interface for Software Defined Radio (V4L)</entry>
<entry>typically, /dev/swradio?</entry>
</row>
<row>
<entry><constant>MEDIA_INTF_T_ALSA_PCM_CAPTURE</constant></entry>
<entry>Device node interface for ALSA PCM Capture</entry>
<entry>typically, /dev/snd/pcmC?D?c</entry>
</row>
<row>
<entry><constant>MEDIA_INTF_T_ALSA_PCM_PLAYBACK</constant></entry>
<entry>Device node interface for ALSA PCM Playback</entry>
<entry>typically, /dev/snd/pcmC?D?p</entry>
</row>
<row>
<entry><constant>MEDIA_INTF_T_ALSA_CONTROL</constant></entry>
<entry>Device node interface for ALSA Control</entry>
<entry>typically, /dev/snd/controlC?</entry>
</row>
<row>
<entry><constant>MEDIA_INTF_T_ALSA_COMPRESS</constant></entry>
<entry>Device node interface for ALSA Compress</entry>
<entry>typically, /dev/snd/compr?</entry>
</row>
<row>
<entry><constant>MEDIA_INTF_T_ALSA_RAWMIDI</constant></entry>
<entry>Device node interface for ALSA Raw MIDI</entry>
<entry>typically, /dev/snd/midi?</entry>
</row>
<row>
<entry><constant>MEDIA_INTF_T_ALSA_HWDEP</constant></entry>
<entry>Device node interface for ALSA Hardware Dependent</entry>
<entry>typically, /dev/snd/hwC?D?</entry>
</row>
<row>
<entry><constant>MEDIA_INTF_T_ALSA_SEQUENCER</constant></entry>
<entry>Device node interface for ALSA Sequencer</entry>
<entry>typically, /dev/snd/seq</entry>
</row>
<row>
<entry><constant>MEDIA_INTF_T_ALSA_TIMER</constant></entry>
<entry>Device node interface for ALSA Timer</entry>
<entry>typically, /dev/snd/timer</entry>
</row>
</tbody>
</tgroup>
</table>

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@ -0,0 +1,49 @@
<refentry id="V4L2-PIX-FMT-Y12I">
<refmeta>
<refentrytitle>V4L2_PIX_FMT_Y12I ('Y12I')</refentrytitle>
&manvol;
</refmeta>
<refnamediv>
<refname><constant>V4L2_PIX_FMT_Y12I</constant></refname>
<refpurpose>Interleaved grey-scale image, e.g. from a stereo-pair</refpurpose>
</refnamediv>
<refsect1>
<title>Description</title>
<para>This is a grey-scale image with a depth of 12 bits per pixel, but with
pixels from 2 sources interleaved and bit-packed. Each pixel is stored in a
24-bit word in the little-endian order. On a little-endian machine these pixels
can be deinterlaced using</para>
<para>
<programlisting>
__u8 *buf;
left0 = 0xfff &amp; *(__u16 *)buf;
right0 = *(__u16 *)(buf + 1) >> 4;
</programlisting>
</para>
<example>
<title><constant>V4L2_PIX_FMT_Y12I</constant> 2 pixel data stream taking 3 bytes</title>
<formalpara>
<title>Bit-packed representation</title>
<para>pixels cross the byte boundary and have a ratio of 3 bytes for each
interleaved pixel.
<informaltable frame="all">
<tgroup cols="3" align="center">
<colspec align="left" colwidth="2*" />
<tbody valign="top">
<row>
<entry>Y'<subscript>0left[7:0]</subscript></entry>
<entry>Y'<subscript>0right[3:0]</subscript>Y'<subscript>0left[11:8]</subscript></entry>
<entry>Y'<subscript>0right[11:4]</subscript></entry>
</row>
</tbody>
</tgroup>
</informaltable>
</para>
</formalpara>
</example>
</refsect1>
</refentry>

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@ -0,0 +1,80 @@
<refentry id="V4L2-PIX-FMT-Y8I">
<refmeta>
<refentrytitle>V4L2_PIX_FMT_Y8I ('Y8I ')</refentrytitle>
&manvol;
</refmeta>
<refnamediv>
<refname><constant>V4L2_PIX_FMT_Y8I</constant></refname>
<refpurpose>Interleaved grey-scale image, e.g. from a stereo-pair</refpurpose>
</refnamediv>
<refsect1>
<title>Description</title>
<para>This is a grey-scale image with a depth of 8 bits per pixel, but with
pixels from 2 sources interleaved. Each pixel is stored in a 16-bit word. E.g.
the R200 RealSense camera stores pixel from the left sensor in lower and from
the right sensor in the higher 8 bits.</para>
<example>
<title><constant>V4L2_PIX_FMT_Y8I</constant> 4 &times; 4
pixel image</title>
<formalpara>
<title>Byte Order.</title>
<para>Each cell is one byte.
<informaltable frame="none">
<tgroup cols="9" align="center">
<colspec align="left" colwidth="2*" />
<tbody valign="top">
<row>
<entry>start&nbsp;+&nbsp;0:</entry>
<entry>Y'<subscript>00left</subscript></entry>
<entry>Y'<subscript>00right</subscript></entry>
<entry>Y'<subscript>01left</subscript></entry>
<entry>Y'<subscript>01right</subscript></entry>
<entry>Y'<subscript>02left</subscript></entry>
<entry>Y'<subscript>02right</subscript></entry>
<entry>Y'<subscript>03left</subscript></entry>
<entry>Y'<subscript>03right</subscript></entry>
</row>
<row>
<entry>start&nbsp;+&nbsp;8:</entry>
<entry>Y'<subscript>10left</subscript></entry>
<entry>Y'<subscript>10right</subscript></entry>
<entry>Y'<subscript>11left</subscript></entry>
<entry>Y'<subscript>11right</subscript></entry>
<entry>Y'<subscript>12left</subscript></entry>
<entry>Y'<subscript>12right</subscript></entry>
<entry>Y'<subscript>13left</subscript></entry>
<entry>Y'<subscript>13right</subscript></entry>
</row>
<row>
<entry>start&nbsp;+&nbsp;16:</entry>
<entry>Y'<subscript>20left</subscript></entry>
<entry>Y'<subscript>20right</subscript></entry>
<entry>Y'<subscript>21left</subscript></entry>
<entry>Y'<subscript>21right</subscript></entry>
<entry>Y'<subscript>22left</subscript></entry>
<entry>Y'<subscript>22right</subscript></entry>
<entry>Y'<subscript>23left</subscript></entry>
<entry>Y'<subscript>23right</subscript></entry>
</row>
<row>
<entry>start&nbsp;+&nbsp;24:</entry>
<entry>Y'<subscript>30left</subscript></entry>
<entry>Y'<subscript>30right</subscript></entry>
<entry>Y'<subscript>31left</subscript></entry>
<entry>Y'<subscript>31right</subscript></entry>
<entry>Y'<subscript>32left</subscript></entry>
<entry>Y'<subscript>32right</subscript></entry>
<entry>Y'<subscript>33left</subscript></entry>
<entry>Y'<subscript>33right</subscript></entry>
</row>
</tbody>
</tgroup>
</informaltable>
</para>
</formalpara>
</example>
</refsect1>
</refentry>

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@ -1,35 +1,43 @@
<refentry id="V4L2-PIX-FMT-YUV420M">
<refentry>
<refmeta>
<refentrytitle>V4L2_PIX_FMT_YUV420M ('YM12')</refentrytitle>
<refentrytitle>V4L2_PIX_FMT_YUV420M ('YM12'), V4L2_PIX_FMT_YVU420M ('YM21')</refentrytitle>
&manvol;
</refmeta>
<refnamediv>
<refname> <constant>V4L2_PIX_FMT_YUV420M</constant></refname>
<refpurpose>Variation of <constant>V4L2_PIX_FMT_YUV420</constant>
with planes non contiguous in memory. </refpurpose>
<refname id="V4L2-PIX-FMT-YUV420M"><constant>V4L2_PIX_FMT_YUV420M</constant></refname>
<refname id="V4L2-PIX-FMT-YVU420M"><constant>V4L2_PIX_FMT_YVU420M</constant></refname>
<refpurpose>Variation of <constant>V4L2_PIX_FMT_YUV420</constant> and
<constant>V4L2_PIX_FMT_YVU420</constant> with planes non contiguous
in memory.</refpurpose>
</refnamediv>
<refsect1>
<title>Description</title>
<para>This is a multi-planar format, as opposed to a packed format.
The three components are separated into three sub- images or planes.
The three components are separated into three sub-images or planes.</para>
The Y plane is first. The Y plane has one byte per pixel. The Cb data
<para>The Y plane is first. The Y plane has one byte per pixel.
For <constant>V4L2_PIX_FMT_YUV420M</constant> the Cb data
constitutes the second plane which is half the width and half
the height of the Y plane (and of the image). Each Cb belongs to four
pixels, a two-by-two square of the image. For example,
Cb<subscript>0</subscript> belongs to Y'<subscript>00</subscript>,
Y'<subscript>01</subscript>, Y'<subscript>10</subscript>, and
Y'<subscript>11</subscript>. The Cr data, just like the Cb plane, is
in the third plane. </para>
in the third plane.</para>
<para><constant>V4L2_PIX_FMT_YVU420M</constant> is the same except
the Cr data is stored in the second plane and the Cb data in the third plane.
</para>
<para>If the Y plane has pad bytes after each row, then the Cb
and Cr planes have half as many pad bytes after their rows. In other
words, two Cx rows (including padding) is exactly as long as one Y row
(including padding).</para>
<para><constant>V4L2_PIX_FMT_YUV420M</constant> is intended to be
<para><constant>V4L2_PIX_FMT_YUV420M</constant> and
<constant>V4L2_PIX_FMT_YVU420M</constant> are intended to be
used only in drivers and applications that support the multi-planar API,
described in <xref linkend="planar-apis"/>. </para>

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@ -1,40 +1,45 @@
<refentry id="V4L2-PIX-FMT-YVU420M">
<refentry>
<refmeta>
<refentrytitle>V4L2_PIX_FMT_YVU420M ('YM21')</refentrytitle>
<refentrytitle>V4L2_PIX_FMT_YUV422M ('YM16'), V4L2_PIX_FMT_YVU422M ('YM61')</refentrytitle>
&manvol;
</refmeta>
<refnamediv>
<refname> <constant>V4L2_PIX_FMT_YVU420M</constant></refname>
<refpurpose>Variation of <constant>V4L2_PIX_FMT_YVU420</constant>
with planes non contiguous in memory. </refpurpose>
<refname id="V4L2-PIX-FMT-YUV422M"><constant>V4L2_PIX_FMT_YUV422M</constant></refname>
<refname id="V4L2-PIX-FMT-YVU422M"><constant>V4L2_PIX_FMT_YVU422M</constant></refname>
<refpurpose>Planar formats with &frac12; horizontal resolution, also
known as YUV and YVU 4:2:2</refpurpose>
</refnamediv>
<refsect1>
<title>Description</title>
<para>This is a multi-planar format, as opposed to a packed format.
The three components are separated into three sub-images or planes.
The three components are separated into three sub-images or planes.</para>
The Y plane is first. The Y plane has one byte per pixel. The Cr data
constitutes the second plane which is half the width and half
the height of the Y plane (and of the image). Each Cr belongs to four
pixels, a two-by-two square of the image. For example,
Cr<subscript>0</subscript> belongs to Y'<subscript>00</subscript>,
Y'<subscript>01</subscript>, Y'<subscript>10</subscript>, and
Y'<subscript>11</subscript>. The Cb data, just like the Cr plane, constitutes
the third plane. </para>
<para>The Y plane is first. The Y plane has one byte per pixel.
For <constant>V4L2_PIX_FMT_YUV422M</constant> the Cb data
constitutes the second plane which is half the width of the Y plane (and of the
image). Each Cb belongs to two pixels. For example,
Cb<subscript>0</subscript> belongs to Y'<subscript>00</subscript>,
Y'<subscript>01</subscript>. The Cr data, just like the Cb plane, is
in the third plane. </para>
<para>If the Y plane has pad bytes after each row, then the Cr
and Cb planes have half as many pad bytes after their rows. In other
<para><constant>V4L2_PIX_FMT_YVU422M</constant> is the same except
the Cr data is stored in the second plane and the Cb data in the third plane.
</para>
<para>If the Y plane has pad bytes after each row, then the Cb
and Cr planes have half as many pad bytes after their rows. In other
words, two Cx rows (including padding) is exactly as long as one Y row
(including padding).</para>
<para><constant>V4L2_PIX_FMT_YVU420M</constant> is intended to be
<para><constant>V4L2_PIX_FMT_YUV422M</constant> and
<constant>V4L2_PIX_FMT_YVU422M</constant> are intended to be
used only in drivers and applications that support the multi-planar API,
described in <xref linkend="planar-apis"/>. </para>
<example>
<title><constant>V4L2_PIX_FMT_YVU420M</constant> 4 &times; 4
<title><constant>V4L2_PIX_FMT_YUV422M</constant> 4 &times; 4
pixel image</title>
<formalpara>
@ -75,25 +80,45 @@ pixel image</title>
<row><entry></entry></row>
<row>
<entry>start1&nbsp;+&nbsp;0:</entry>
<entry>Cr<subscript>00</subscript></entry>
<entry>Cr<subscript>01</subscript></entry>
</row>
<row>
<entry>start1&nbsp;+&nbsp;2:</entry>
<entry>Cr<subscript>10</subscript></entry>
<entry>Cr<subscript>11</subscript></entry>
</row>
<row><entry></entry></row>
<row>
<entry>start2&nbsp;+&nbsp;0:</entry>
<entry>Cb<subscript>00</subscript></entry>
<entry>Cb<subscript>01</subscript></entry>
</row>
<row>
<entry>start2&nbsp;+&nbsp;2:</entry>
<entry>start1&nbsp;+&nbsp;2:</entry>
<entry>Cb<subscript>10</subscript></entry>
<entry>Cb<subscript>11</subscript></entry>
</row>
<row>
<entry>start1&nbsp;+&nbsp;4:</entry>
<entry>Cb<subscript>20</subscript></entry>
<entry>Cb<subscript>21</subscript></entry>
</row>
<row>
<entry>start1&nbsp;+&nbsp;6:</entry>
<entry>Cb<subscript>30</subscript></entry>
<entry>Cb<subscript>31</subscript></entry>
</row>
<row><entry></entry></row>
<row>
<entry>start2&nbsp;+&nbsp;0:</entry>
<entry>Cr<subscript>00</subscript></entry>
<entry>Cr<subscript>01</subscript></entry>
</row>
<row>
<entry>start2&nbsp;+&nbsp;2:</entry>
<entry>Cr<subscript>10</subscript></entry>
<entry>Cr<subscript>11</subscript></entry>
</row>
<row>
<entry>start2&nbsp;+&nbsp;4:</entry>
<entry>Cr<subscript>20</subscript></entry>
<entry>Cr<subscript>21</subscript></entry>
</row>
<row>
<entry>start2&nbsp;+&nbsp;6:</entry>
<entry>Cr<subscript>30</subscript></entry>
<entry>Cr<subscript>31</subscript></entry>
</row>
</tbody>
</tgroup>
</informaltable>
@ -113,36 +138,23 @@ pixel image</title>
</row>
<row>
<entry>0</entry>
<entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
<entry>Y</entry><entry></entry><entry>Y</entry>
</row>
<row>
<entry></entry>
<entry></entry><entry>C</entry><entry></entry><entry></entry>
<entry></entry><entry>C</entry><entry></entry>
<entry>Y</entry><entry>C</entry><entry>Y</entry><entry></entry>
<entry>Y</entry><entry>C</entry><entry>Y</entry>
</row>
<row>
<entry>1</entry>
<entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
<entry>Y</entry><entry></entry><entry>Y</entry>
</row>
<row>
<entry></entry>
<entry>Y</entry><entry>C</entry><entry>Y</entry><entry></entry>
<entry>Y</entry><entry>C</entry><entry>Y</entry>
</row>
<row>
<entry>2</entry>
<entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
<entry>Y</entry><entry></entry><entry>Y</entry>
</row>
<row>
<entry></entry>
<entry></entry><entry>C</entry><entry></entry><entry></entry>
<entry></entry><entry>C</entry><entry></entry>
<entry>Y</entry><entry>C</entry><entry>Y</entry><entry></entry>
<entry>Y</entry><entry>C</entry><entry>Y</entry>
</row>
<row>
<entry>3</entry>
<entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
<entry>Y</entry><entry></entry><entry>Y</entry>
<entry>Y</entry><entry>C</entry><entry>Y</entry><entry></entry>
<entry>Y</entry><entry>C</entry><entry>Y</entry>
</row>
</tbody>
</tgroup>

View File

@ -0,0 +1,177 @@
<refentry>
<refmeta>
<refentrytitle>V4L2_PIX_FMT_YUV444M ('YM24'), V4L2_PIX_FMT_YVU444M ('YM42')</refentrytitle>
&manvol;
</refmeta>
<refnamediv>
<refname id="V4L2-PIX-FMT-YUV444M"><constant>V4L2_PIX_FMT_YUV444M</constant></refname>
<refname id="V4L2-PIX-FMT-YVU444M"><constant>V4L2_PIX_FMT_YVU444M</constant></refname>
<refpurpose>Planar formats with full horizontal resolution, also
known as YUV and YVU 4:4:4</refpurpose>
</refnamediv>
<refsect1>
<title>Description</title>
<para>This is a multi-planar format, as opposed to a packed format.
The three components are separated into three sub-images or planes.</para>
<para>The Y plane is first. The Y plane has one byte per pixel.
For <constant>V4L2_PIX_FMT_YUV444M</constant> the Cb data
constitutes the second plane which is the same width and height as the Y plane
(and as the image). The Cr data, just like the Cb plane, is in the third plane.
</para>
<para><constant>V4L2_PIX_FMT_YVU444M</constant> is the same except
the Cr data is stored in the second plane and the Cb data in the third plane.
</para>
<para>If the Y plane has pad bytes after each row, then the Cb
and Cr planes have the same number of pad bytes after their rows.</para>
<para><constant>V4L2_PIX_FMT_YUV444M</constant> and
<constant>V4L2_PIX_FMT_YUV444M</constant> are intended to be
used only in drivers and applications that support the multi-planar API,
described in <xref linkend="planar-apis"/>. </para>
<example>
<title><constant>V4L2_PIX_FMT_YUV444M</constant> 4 &times; 4
pixel image</title>
<formalpara>
<title>Byte Order.</title>
<para>Each cell is one byte.
<informaltable frame="none">
<tgroup cols="5" align="center">
<colspec align="left" colwidth="2*" />
<tbody valign="top">
<row>
<entry>start0&nbsp;+&nbsp;0:</entry>
<entry>Y'<subscript>00</subscript></entry>
<entry>Y'<subscript>01</subscript></entry>
<entry>Y'<subscript>02</subscript></entry>
<entry>Y'<subscript>03</subscript></entry>
</row>
<row>
<entry>start0&nbsp;+&nbsp;4:</entry>
<entry>Y'<subscript>10</subscript></entry>
<entry>Y'<subscript>11</subscript></entry>
<entry>Y'<subscript>12</subscript></entry>
<entry>Y'<subscript>13</subscript></entry>
</row>
<row>
<entry>start0&nbsp;+&nbsp;8:</entry>
<entry>Y'<subscript>20</subscript></entry>
<entry>Y'<subscript>21</subscript></entry>
<entry>Y'<subscript>22</subscript></entry>
<entry>Y'<subscript>23</subscript></entry>
</row>
<row>
<entry>start0&nbsp;+&nbsp;12:</entry>
<entry>Y'<subscript>30</subscript></entry>
<entry>Y'<subscript>31</subscript></entry>
<entry>Y'<subscript>32</subscript></entry>
<entry>Y'<subscript>33</subscript></entry>
</row>
<row><entry></entry></row>
<row>
<entry>start1&nbsp;+&nbsp;0:</entry>
<entry>Cb<subscript>00</subscript></entry>
<entry>Cb<subscript>01</subscript></entry>
<entry>Cb<subscript>02</subscript></entry>
<entry>Cb<subscript>03</subscript></entry>
</row>
<row>
<entry>start1&nbsp;+&nbsp;4:</entry>
<entry>Cb<subscript>10</subscript></entry>
<entry>Cb<subscript>11</subscript></entry>
<entry>Cb<subscript>12</subscript></entry>
<entry>Cb<subscript>13</subscript></entry>
</row>
<row>
<entry>start1&nbsp;+&nbsp;8:</entry>
<entry>Cb<subscript>20</subscript></entry>
<entry>Cb<subscript>21</subscript></entry>
<entry>Cb<subscript>22</subscript></entry>
<entry>Cb<subscript>23</subscript></entry>
</row>
<row>
<entry>start1&nbsp;+&nbsp;12:</entry>
<entry>Cb<subscript>20</subscript></entry>
<entry>Cb<subscript>21</subscript></entry>
<entry>Cb<subscript>32</subscript></entry>
<entry>Cb<subscript>33</subscript></entry>
</row>
<row><entry></entry></row>
<row>
<entry>start2&nbsp;+&nbsp;0:</entry>
<entry>Cr<subscript>00</subscript></entry>
<entry>Cr<subscript>01</subscript></entry>
<entry>Cr<subscript>02</subscript></entry>
<entry>Cr<subscript>03</subscript></entry>
</row>
<row>
<entry>start2&nbsp;+&nbsp;4:</entry>
<entry>Cr<subscript>10</subscript></entry>
<entry>Cr<subscript>11</subscript></entry>
<entry>Cr<subscript>12</subscript></entry>
<entry>Cr<subscript>13</subscript></entry>
</row>
<row>
<entry>start2&nbsp;+&nbsp;8:</entry>
<entry>Cr<subscript>20</subscript></entry>
<entry>Cr<subscript>21</subscript></entry>
<entry>Cr<subscript>22</subscript></entry>
<entry>Cr<subscript>23</subscript></entry>
</row>
<row>
<entry>start2&nbsp;+&nbsp;12:</entry>
<entry>Cr<subscript>30</subscript></entry>
<entry>Cr<subscript>31</subscript></entry>
<entry>Cr<subscript>32</subscript></entry>
<entry>Cr<subscript>33</subscript></entry>
</row>
</tbody>
</tgroup>
</informaltable>
</para>
</formalpara>
<formalpara>
<title>Color Sample Location.</title>
<para>
<informaltable frame="none">
<tgroup cols="7" align="center">
<tbody valign="top">
<row>
<entry></entry>
<entry>0</entry><entry></entry><entry>1</entry><entry></entry>
<entry>2</entry><entry></entry><entry>3</entry>
</row>
<row>
<entry>0</entry>
<entry>YC</entry><entry></entry><entry>YC</entry><entry></entry>
<entry>YC</entry><entry></entry><entry>YC</entry>
</row>
<row>
<entry>1</entry>
<entry>YC</entry><entry></entry><entry>YC</entry><entry></entry>
<entry>YC</entry><entry></entry><entry>YC</entry>
</row>
<row>
<entry>2</entry>
<entry>YC</entry><entry></entry><entry>YC</entry><entry></entry>
<entry>YC</entry><entry></entry><entry>YC</entry>
</row>
<row>
<entry>3</entry>
<entry>YC</entry><entry></entry><entry>YC</entry><entry></entry>
<entry>YC</entry><entry></entry><entry>YC</entry>
</row>
</tbody>
</tgroup>
</informaltable>
</para>
</formalpara>
</example>
</refsect1>
</refentry>

View File

@ -0,0 +1,81 @@
<refentry id="V4L2-PIX-FMT-Z16">
<refmeta>
<refentrytitle>V4L2_PIX_FMT_Z16 ('Z16 ')</refentrytitle>
&manvol;
</refmeta>
<refnamediv>
<refname><constant>V4L2_PIX_FMT_Z16</constant></refname>
<refpurpose>Interleaved grey-scale image, e.g. from a stereo-pair</refpurpose>
</refnamediv>
<refsect1>
<title>Description</title>
<para>This is a 16-bit format, representing depth data. Each pixel is a
distance to the respective point in the image coordinates. Distance unit can
vary and has to be negotiated with the device separately. Each pixel is stored
in a 16-bit word in the little endian byte order.
</para>
<example>
<title><constant>V4L2_PIX_FMT_Z16</constant> 4 &times; 4
pixel image</title>
<formalpara>
<title>Byte Order.</title>
<para>Each cell is one byte.
<informaltable frame="none">
<tgroup cols="9" align="center">
<colspec align="left" colwidth="2*" />
<tbody valign="top">
<row>
<entry>start&nbsp;+&nbsp;0:</entry>
<entry>Z<subscript>00low</subscript></entry>
<entry>Z<subscript>00high</subscript></entry>
<entry>Z<subscript>01low</subscript></entry>
<entry>Z<subscript>01high</subscript></entry>
<entry>Z<subscript>02low</subscript></entry>
<entry>Z<subscript>02high</subscript></entry>
<entry>Z<subscript>03low</subscript></entry>
<entry>Z<subscript>03high</subscript></entry>
</row>
<row>
<entry>start&nbsp;+&nbsp;8:</entry>
<entry>Z<subscript>10low</subscript></entry>
<entry>Z<subscript>10high</subscript></entry>
<entry>Z<subscript>11low</subscript></entry>
<entry>Z<subscript>11high</subscript></entry>
<entry>Z<subscript>12low</subscript></entry>
<entry>Z<subscript>12high</subscript></entry>
<entry>Z<subscript>13low</subscript></entry>
<entry>Z<subscript>13high</subscript></entry>
</row>
<row>
<entry>start&nbsp;+&nbsp;16:</entry>
<entry>Z<subscript>20low</subscript></entry>
<entry>Z<subscript>20high</subscript></entry>
<entry>Z<subscript>21low</subscript></entry>
<entry>Z<subscript>21high</subscript></entry>
<entry>Z<subscript>22low</subscript></entry>
<entry>Z<subscript>22high</subscript></entry>
<entry>Z<subscript>23low</subscript></entry>
<entry>Z<subscript>23high</subscript></entry>
</row>
<row>
<entry>start&nbsp;+&nbsp;24:</entry>
<entry>Z<subscript>30low</subscript></entry>
<entry>Z<subscript>30high</subscript></entry>
<entry>Z<subscript>31low</subscript></entry>
<entry>Z<subscript>31high</subscript></entry>
<entry>Z<subscript>32low</subscript></entry>
<entry>Z<subscript>32high</subscript></entry>
<entry>Z<subscript>33low</subscript></entry>
<entry>Z<subscript>33high</subscript></entry>
</row>
</tbody>
</tgroup>
</informaltable>
</para>
</formalpara>
</example>
</refsect1>
</refentry>

View File

@ -1620,6 +1620,8 @@ information.</para>
&sub-y10b;
&sub-y16;
&sub-y16-be;
&sub-y8i;
&sub-y12i;
&sub-uv8;
&sub-yuyv;
&sub-uyvy;
@ -1628,7 +1630,8 @@ information.</para>
&sub-y41p;
&sub-yuv420;
&sub-yuv420m;
&sub-yvu420m;
&sub-yuv422m;
&sub-yuv444m;
&sub-yuv410;
&sub-yuv422p;
&sub-yuv411p;
@ -1641,6 +1644,14 @@ information.</para>
&sub-m420;
</section>
<section id="depth-formats">
<title>Depth Formats</title>
<para>Depth data provides distance to points, mapped onto the image plane
</para>
&sub-z16;
</section>
<section>
<title>Compressed Formats</title>

View File

@ -60,9 +60,19 @@ input</refpurpose>
automatically, similar to sensing the video standard. To do so, applications
call <constant>VIDIOC_QUERY_DV_TIMINGS</constant> with a pointer to a
&v4l2-dv-timings;. Once the hardware detects the timings, it will fill in the
timings structure.
timings structure.</para>
If the timings could not be detected because there was no signal, then
<para>Please note that drivers shall <emphasis>not</emphasis> switch timings automatically
if new timings are detected. Instead, drivers should send the
<constant>V4L2_EVENT_SOURCE_CHANGE</constant> event (if they support this) and expect
that userspace will take action by calling <constant>VIDIOC_QUERY_DV_TIMINGS</constant>.
The reason is that new timings usually mean different buffer sizes as well, and you
cannot change buffer sizes on the fly. In general, applications that receive the
Source Change event will have to call <constant>VIDIOC_QUERY_DV_TIMINGS</constant>,
and if the detected timings are valid they will have to stop streaming, set the new
timings, allocate new buffers and start streaming again.</para>
<para>If the timings could not be detected because there was no signal, then
<errorcode>ENOLINK</errorcode> is returned. If a signal was detected, but
it was unstable and the receiver could not lock to the signal, then
<errorcode>ENOLCK</errorcode> is returned. If the receiver could lock to the signal,

View File

@ -59,6 +59,16 @@ then the driver will return V4L2_STD_UNKNOWN. When detection is not
possible or fails, the set must contain all standards supported by the
current video input or output.</para>
<para>Please note that drivers shall <emphasis>not</emphasis> switch the video standard
automatically if a new video standard is detected. Instead, drivers should send the
<constant>V4L2_EVENT_SOURCE_CHANGE</constant> event (if they support this) and expect
that userspace will take action by calling <constant>VIDIOC_QUERYSTD</constant>.
The reason is that a new video standard can mean different buffer sizes as well, and you
cannot change buffer sizes on the fly. In general, applications that receive the
Source Change event will have to call <constant>VIDIOC_QUERYSTD</constant>,
and if the detected video standard is valid they will have to stop streaming, set the new
standard, allocate new buffers and start streaming again.</para>
</refsect1>
<refsect1>

View File

@ -20,6 +20,8 @@ Optional Properties:
- link-frequencies: List of allowed link frequencies in Hz. Each frequency is
expressed as a 64-bit big-endian integer.
- reset-gpios: GPIO handle which is connected to the reset pin of the chip.
- standby-gpios: GPIO handle which is connected to the standby pin of the chip.
For further reading on port node refer to
Documentation/devicetree/bindings/media/video-interfaces.txt.

View File

@ -0,0 +1,45 @@
* Texas Instruments TVP5150 and TVP5151 video decoders
The TVP5150 and TVP5151 are video decoders that convert baseband NTSC and PAL
(and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV
with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats.
Required Properties:
- compatible: value must be "ti,tvp5150"
- reg: I2C slave address
Optional Properties:
- pdn-gpios: phandle for the GPIO connected to the PDN pin, if any.
- reset-gpios: phandle for the GPIO connected to the RESETB pin, if any.
The device node must contain one 'port' child node for its digital output
video port, in accordance with the video interface bindings defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
Required Endpoint Properties for parallel synchronization:
- hsync-active: active state of the HSYNC signal. Must be <1> (HIGH).
- vsync-active: active state of the VSYNC signal. Must be <1> (HIGH).
- field-even-active: field signal level during the even field data
transmission. Must be <0>.
If none of hsync-active, vsync-active and field-even-active is specified,
the endpoint is assumed to use embedded BT.656 synchronization.
Example:
&i2c2 {
...
tvp5150@5c {
compatible = "ti,tvp5150";
reg = <0x5c>;
pdn-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
port {
tvp5150_1: endpoint {
remote-endpoint = <&ccdc_ep>;
};
};
};
};

View File

@ -6,6 +6,7 @@ family of devices. The current blocks are always slaves and suppot one input
channel which can be either RGB, YUYV or BT656.
- compatible: Must be one of the following
- "renesas,vin-r8a7795" for the R8A7795 device
- "renesas,vin-r8a7794" for the R8A7794 device
- "renesas,vin-r8a7793" for the R8A7793 device
- "renesas,vin-r8a7791" for the R8A7791 device

View File

@ -5,11 +5,12 @@ and decoding function conforming to the JPEG baseline process, so that the JPU
can encode image data and decode JPEG data quickly.
Required properties:
- compatible: should containg one of the following:
- "renesas,jpu-r8a7790" for R-Car H2
- "renesas,jpu-r8a7791" for R-Car M2-W
- "renesas,jpu-r8a7792" for R-Car V2H
- "renesas,jpu-r8a7793" for R-Car M2-N
- compatible: "renesas,jpu-<soctype>", "renesas,rcar-gen2-jpu" as fallback.
Examples with soctypes are:
- "renesas,jpu-r8a7790" for R-Car H2
- "renesas,jpu-r8a7791" for R-Car M2-W
- "renesas,jpu-r8a7792" for R-Car V2H
- "renesas,jpu-r8a7793" for R-Car M2-N
- reg: Base address and length of the registers block for the JPU.
- interrupts: JPU interrupt specifier.
@ -17,7 +18,7 @@ Required properties:
Example: R8A7790 (R-Car H2) JPU node
jpeg-codec@fe980000 {
compatible = "renesas,jpu-r8a7790";
compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
reg = <0 0xfe980000 0 0x10300>;
interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7790_CLK_JPU>;

View File

@ -1,30 +1,18 @@
* Renesas VSP1 Video Processing Engine
* Renesas VSP Video Processing Engine
The VSP1 is a video processing engine that supports up-/down-scaling, alpha
The VSP is a video processing engine that supports up-/down-scaling, alpha
blending, color space conversion and various other image processing features.
It can be found in the Renesas R-Car second generation SoCs.
Required properties:
- compatible: Must contain "renesas,vsp1"
- compatible: Must contain one of the following values
- "renesas,vsp1" for the R-Car Gen2 VSP1
- "renesas,vsp2" for the R-Car Gen3 VSP2
- reg: Base address and length of the registers block for the VSP1.
- interrupts: VSP1 interrupt specifier.
- clocks: A phandle + clock-specifier pair for the VSP1 functional clock.
- renesas,#rpf: Number of Read Pixel Formatter (RPF) modules in the VSP1.
- renesas,#uds: Number of Up Down Scaler (UDS) modules in the VSP1.
- renesas,#wpf: Number of Write Pixel Formatter (WPF) modules in the VSP1.
Optional properties:
- renesas,has-lif: Boolean, indicates that the LCD Interface (LIF) module is
available.
- renesas,has-lut: Boolean, indicates that the Look Up Table (LUT) module is
available.
- renesas,has-sru: Boolean, indicates that the Super Resolution Unit (SRU)
module is available.
- reg: Base address and length of the registers block for the VSP.
- interrupts: VSP interrupt specifier.
- clocks: A phandle + clock-specifier pair for the VSP functional clock.
Example: R8A7790 (R-Car H2) VSP1-S node
@ -34,10 +22,4 @@ Example: R8A7790 (R-Car H2) VSP1-S node
reg = <0 0xfe928000 0 0x8000>;
interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
renesas,has-lut;
renesas,has-sru;
renesas,#rpf = <5>;
renesas,#uds = <3>;
renesas,#wpf = <4>;
};

View File

@ -0,0 +1,72 @@
Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL)
------------------------------------------------------
The Camera Adaptation Layer (CAL) is a key component for image capture
applications. The capture module provides the system interface and the
processing capability to connect CSI2 image-sensor modules to the
DRA72x device.
Required properties:
- compatible: must be "ti,dra72-cal"
- reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX
control address space
- reg-names: cal_top, cal_rx_core0, cal_rx_core1, and camerrx_control
registers
- interrupts: should contain IRQ line for the CAL;
CAL supports 2 camera port nodes on MIPI bus. Each CSI2 camera port nodes
should contain a 'port' child node with child 'endpoint' node. Please
refer to the bindings defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
Example:
cal: cal@4845b000 {
compatible = "ti,dra72-cal";
ti,hwmods = "cal";
reg = <0x4845B000 0x400>,
<0x4845B800 0x40>,
<0x4845B900 0x40>,
<0x4A002e94 0x4>;
reg-names = "cal_top",
"cal_rx_core0",
"cal_rx_core1",
"camerrx_control";
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
csi2_0: port@0 {
reg = <0>;
endpoint {
slave-mode;
remote-endpoint = <&ar0330_1>;
};
};
csi2_1: port@1 {
reg = <1>;
};
};
};
i2c5: i2c@4807c000 {
ar0330@10 {
compatible = "ti,ar0330";
reg = <0x10>;
port {
#address-cells = <1>;
#size-cells = <0>;
ar0330_1: endpoint {
reg = <0>;
clock-lanes = <1>;
data-lanes = <0 2 3 4>;
remote-endpoint = <&csi2_0>;
};
};
};
};

View File

@ -190,7 +190,7 @@ and watch another one.
Patches, comments and suggestions are very very welcome.
3. Acknowledgements
Amaury Demol (ademol@dibcom.fr) and Francois Kanounnikoff from DiBcom for
Amaury Demol (Amaury.Demol@parrot.com) and Francois Kanounnikoff from DiBcom for
providing specs, code and help, on which the dvb-dibusb, dib3000mb and
dib3000mc are based.

View File

@ -194,3 +194,4 @@
193 -> WIS Voyager or compatible [1905:7007]
194 -> AverMedia AverTV/505 [1461:a10a]
195 -> Leadtek Winfast TV2100 FM [107d:6f3a]
196 -> SnaZio* TVPVR PRO [1779:13cf]

View File

@ -647,7 +647,6 @@ Or you can add specific controls to a handler:
volume = v4l2_ctrl_new_std(&video_ctrl_handler, &ops, V4L2_CID_AUDIO_VOLUME, ...);
v4l2_ctrl_new_std(&video_ctrl_handler, &ops, V4L2_CID_BRIGHTNESS, ...);
v4l2_ctrl_new_std(&video_ctrl_handler, &ops, V4L2_CID_CONTRAST, ...);
v4l2_ctrl_add_ctrl(&radio_ctrl_handler, volume);
What you should not do is make two identical controls for two handlers.
For example:

View File

@ -7236,10 +7236,8 @@ L: linux-media@vger.kernel.org
W: https://linuxtv.org
W: http://palosaari.fi/linux/
Q: http://patchwork.linuxtv.org/project/linux-media/list/
T: git git://linuxtv.org/anttip/media_tree.git
S: Maintained
F: drivers/staging/media/mn88473/
F: drivers/media/dvb-frontends/mn88473.h
F: drivers/media/dvb-frontends/mn88473*
MODULE SUPPORT
M: Rusty Russell <rusty@rustcorp.com.au>
@ -10897,6 +10895,14 @@ L: linux-omap@vger.kernel.org
S: Maintained
F: drivers/thermal/ti-soc-thermal/
TI VPE/CAL DRIVERS
M: Benoit Parrot <bparrot@ti.com>
L: linux-media@vger.kernel.org
W: http://linuxtv.org/
Q: http://patchwork.linuxtv.org/project/linux-media/list/
S: Maintained
F: drivers/media/platform/ti-vpe/
TI CDCE706 CLOCK DRIVER
M: Max Filippov <jcmvbkbc@gmail.com>
S: Maintained

View File

@ -38,7 +38,7 @@ static int flexcop_fe_request_firmware(struct dvb_frontend *fe,
#endif
/* lnb control */
#if FE_SUPPORTED(MT312) || FE_SUPPORTED(STV0299)
#if (FE_SUPPORTED(MT312) || FE_SUPPORTED(STV0299)) && FE_SUPPORTED(PLL)
static int flexcop_set_voltage(struct dvb_frontend *fe,
enum fe_sec_voltage voltage)
{
@ -68,7 +68,7 @@ static int flexcop_set_voltage(struct dvb_frontend *fe,
#endif
#if FE_SUPPORTED(S5H1420) || FE_SUPPORTED(STV0299) || FE_SUPPORTED(MT312)
static int flexcop_sleep(struct dvb_frontend* fe)
static int __maybe_unused flexcop_sleep(struct dvb_frontend* fe)
{
struct flexcop_device *fc = fe->dvb->priv;
if (fc->fe_sleep)

View File

@ -1,7 +1,7 @@
/*
* Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III
* flexcop.c - main module part
* Copyright (C) 2004-9 Patrick Boettcher <patrick.boettcher@desy.de>
* Copyright (C) 2004-9 Patrick Boettcher <patrick.boettcher@posteo.de>
* based on skystar2-driver Copyright (C) 2003 Vadim Catana, skystar@moldova.cc
*
* Acknowledgements:
@ -34,7 +34,7 @@
#include "flexcop.h"
#define DRIVER_NAME "B2C2 FlexcopII/II(b)/III digital TV receiver chip"
#define DRIVER_AUTHOR "Patrick Boettcher <patrick.boettcher@desy.de"
#define DRIVER_AUTHOR "Patrick Boettcher <patrick.boettcher@posteo.de"
#ifdef CONFIG_DVB_B2C2_FLEXCOP_DEBUG
#define DEBSTATUS ""

View File

@ -1,6 +1,6 @@
/* cypress_firmware.c is part of the DVB USB library.
*
* Copyright (C) 2004-6 Patrick Boettcher (patrick.boettcher@desy.de)
* Copyright (C) 2004-6 Patrick Boettcher (patrick.boettcher@posteo.de)
* see dvb-usb-init.c for copyright information.
*
* This file contains functions for downloading the firmware to Cypress FX 1

View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2004-6 Patrick Boettcher (patrick.boettcher@desy.de)
* Copyright (C) 2004-6 Patrick Boettcher (patrick.boettcher@posteo.de)
* see dvb-usb-init.c for copyright information.
*
* This file contains functions for downloading the firmware to Cypress FX 1

View File

@ -1167,8 +1167,8 @@ static int smscore_load_firmware_from_file(struct smscore_device_t *coredev,
return rc;
}
pr_debug("read fw %s, buffer size=0x%zx\n", fw_filename, fw->size);
fw_buf = kmalloc(ALIGN(fw->size, SMS_ALLOC_ALIGNMENT),
GFP_KERNEL | GFP_DMA);
fw_buf = kmalloc(ALIGN(fw->size + sizeof(struct sms_firmware),
SMS_ALLOC_ALIGNMENT), GFP_KERNEL | GFP_DMA);
if (!fw_buf) {
pr_err("failed to allocate firmware buffer\n");
rc = -ENOMEM;

View File

@ -1015,12 +1015,6 @@ static int smsdvb_set_frontend(struct dvb_frontend *fe)
}
}
/* Nothing to do here, as stats are automatically updated */
static int smsdvb_get_frontend(struct dvb_frontend *fe)
{
return 0;
}
static int smsdvb_init(struct dvb_frontend *fe)
{
struct smsdvb_client_t *client =
@ -1069,7 +1063,6 @@ static struct dvb_frontend_ops smsdvb_fe_ops = {
.release = smsdvb_release,
.set_frontend = smsdvb_set_frontend,
.get_frontend = smsdvb_get_frontend,
.get_tune_settings = smsdvb_get_tune_settings,
.read_status = smsdvb_read_status,

View File

@ -1,6 +1,6 @@
/* dvb-usb-ids.h is part of the DVB USB library.
*
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de) see
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de) see
* dvb-usb-init.c for copyright information.
*
* a header file containing define's for the USB device supported by the
@ -118,6 +118,7 @@
#define USB_PID_DIBCOM_STK807XP 0x1f90
#define USB_PID_DIBCOM_STK807XPVR 0x1f98
#define USB_PID_DIBCOM_STK8096GP 0x1fa0
#define USB_PID_DIBCOM_STK8096PVR 0x1faa
#define USB_PID_DIBCOM_NIM8096MD 0x1fa8
#define USB_PID_DIBCOM_TFE8096P 0x1f9C
#define USB_PID_DIBCOM_ANCHOR_2135_COLD 0x2131
@ -241,12 +242,14 @@
#define USB_PID_AVERMEDIA_1867 0x1867
#define USB_PID_AVERMEDIA_A867 0xa867
#define USB_PID_AVERMEDIA_H335 0x0335
#define USB_PID_AVERMEDIA_TD110 0xa110
#define USB_PID_AVERMEDIA_TWINSTAR 0x0825
#define USB_PID_TECHNOTREND_CONNECT_S2400 0x3006
#define USB_PID_TECHNOTREND_CONNECT_S2400_8KEEPROM 0x3009
#define USB_PID_TECHNOTREND_CONNECT_CT3650 0x300d
#define USB_PID_TECHNOTREND_CONNECT_S2_4600 0x3011
#define USB_PID_TECHNOTREND_CONNECT_CT2_4650_CI 0x3012
#define USB_PID_TECHNOTREND_CONNECT_CT2_4650_CI_2 0x3015
#define USB_PID_TECHNOTREND_TVSTICK_CT2_4400 0x3014
#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY 0x005a
#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2 0x0081
@ -255,6 +258,10 @@
#define USB_PID_TERRATEC_CINERGY_T_EXPRESS 0x0062
#define USB_PID_TERRATEC_CINERGY_T_XXS 0x0078
#define USB_PID_TERRATEC_CINERGY_T_XXS_2 0x00ab
#define USB_PID_TERRATEC_CINERGY_S2_R1 0x00a8
#define USB_PID_TERRATEC_CINERGY_S2_R2 0x00b0
#define USB_PID_TERRATEC_CINERGY_S2_R3 0x0102
#define USB_PID_TERRATEC_CINERGY_S2_R4 0x0105
#define USB_PID_TERRATEC_H7 0x10b4
#define USB_PID_TERRATEC_H7_2 0x10a3
#define USB_PID_TERRATEC_H7_3 0x10a5

View File

@ -134,15 +134,17 @@ struct dvb_frontend_private {
#if defined(CONFIG_MEDIA_CONTROLLER_DVB)
struct media_pipeline pipe;
struct media_entity *pipe_start_entity;
#endif
};
static void dvb_frontend_wakeup(struct dvb_frontend *fe);
static int dtv_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c,
struct dvb_frontend_parameters *p_out);
static int dtv_property_legacy_params_sync(struct dvb_frontend *fe,
struct dvb_frontend_parameters *p);
static int
dtv_property_legacy_params_sync(struct dvb_frontend *fe,
const struct dtv_frontend_properties *c,
struct dvb_frontend_parameters *p);
static bool has_get_frontend(struct dvb_frontend *fe)
{
@ -202,6 +204,7 @@ static void dvb_frontend_add_event(struct dvb_frontend *fe,
enum fe_status status)
{
struct dvb_frontend_private *fepriv = fe->frontend_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct dvb_fe_events *events = &fepriv->events;
struct dvb_frontend_event *e;
int wp;
@ -209,7 +212,7 @@ static void dvb_frontend_add_event(struct dvb_frontend *fe,
dev_dbg(fe->dvb->device, "%s:\n", __func__);
if ((status & FE_HAS_LOCK) && has_get_frontend(fe))
dtv_get_frontend(fe, &fepriv->parameters_out);
dtv_get_frontend(fe, c, &fepriv->parameters_out);
mutex_lock(&events->mtx);
@ -596,104 +599,13 @@ static void dvb_frontend_wakeup(struct dvb_frontend *fe)
wake_up_interruptible(&fepriv->wait_queue);
}
/**
* dvb_enable_media_tuner() - tries to enable the DVB tuner
*
* @fe: struct dvb_frontend pointer
*
* This function ensures that just one media tuner is enabled for a given
* frontend. It has two different behaviors:
* - For trivial devices with just one tuner:
* it just enables the existing tuner->fe link
* - For devices with more than one tuner:
* It is up to the driver to implement the logic that will enable one tuner
* and disable the other ones. However, if more than one tuner is enabled for
* the same frontend, it will print an error message and return -EINVAL.
*
* At return, it will return the error code returned by media_entity_setup_link,
* or 0 if everything is OK, if no tuner is linked to the frontend or if the
* mdev is NULL.
*/
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
static int dvb_enable_media_tuner(struct dvb_frontend *fe)
{
struct dvb_frontend_private *fepriv = fe->frontend_priv;
struct dvb_adapter *adapter = fe->dvb;
struct media_device *mdev = adapter->mdev;
struct media_entity *entity, *source;
struct media_link *link, *found_link = NULL;
int ret, n_links = 0, active_links = 0;
fepriv->pipe_start_entity = NULL;
if (!mdev)
return 0;
entity = fepriv->dvbdev->entity;
fepriv->pipe_start_entity = entity;
list_for_each_entry(link, &entity->links, list) {
if (link->sink->entity == entity) {
found_link = link;
n_links++;
if (link->flags & MEDIA_LNK_FL_ENABLED)
active_links++;
}
}
if (!n_links || active_links == 1 || !found_link)
return 0;
/*
* If a frontend has more than one tuner linked, it is up to the driver
* to select with one will be the active one, as the frontend core can't
* guess. If the driver doesn't do that, it is a bug.
*/
if (n_links > 1 && active_links != 1) {
dev_err(fe->dvb->device,
"WARNING: there are %d active links among %d tuners. This is a driver's bug!\n",
active_links, n_links);
return -EINVAL;
}
source = found_link->source->entity;
fepriv->pipe_start_entity = source;
list_for_each_entry(link, &source->links, list) {
struct media_entity *sink;
int flags = 0;
sink = link->sink->entity;
if (sink == entity)
flags = MEDIA_LNK_FL_ENABLED;
ret = media_entity_setup_link(link, flags);
if (ret) {
dev_err(fe->dvb->device,
"Couldn't change link %s->%s to %s. Error %d\n",
source->name, sink->name,
flags ? "enabled" : "disabled",
ret);
return ret;
} else
dev_dbg(fe->dvb->device,
"link %s->%s was %s\n",
source->name, sink->name,
flags ? "ENABLED" : "disabled");
}
return 0;
}
#endif
static int dvb_frontend_thread(void *data)
{
struct dvb_frontend *fe = data;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct dvb_frontend_private *fepriv = fe->frontend_priv;
enum fe_status s;
enum dvbfe_algo algo;
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
int ret;
#endif
bool re_tune = false;
bool semheld = false;
@ -706,20 +618,6 @@ static int dvb_frontend_thread(void *data)
fepriv->wakeup = 0;
fepriv->reinitialise = 0;
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
ret = dvb_enable_media_tuner(fe);
if (ret) {
/* FIXME: return an error if it fails */
dev_info(fe->dvb->device,
"proceeding with FE task\n");
} else if (fepriv->pipe_start_entity) {
ret = media_entity_pipeline_start(fepriv->pipe_start_entity,
&fepriv->pipe);
if (ret)
return ret;
}
#endif
dvb_frontend_init(fe);
set_freezable();
@ -807,7 +705,7 @@ restart:
fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
fepriv->delay = HZ / 2;
}
dtv_property_legacy_params_sync(fe, &fepriv->parameters_out);
dtv_property_legacy_params_sync(fe, c, &fepriv->parameters_out);
fe->ops.read_status(fe, &s);
if (s != fepriv->status) {
dvb_frontend_add_event(fe, s); /* update event list */
@ -829,12 +727,6 @@ restart:
}
}
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
if (fepriv->pipe_start_entity)
media_entity_pipeline_stop(fepriv->pipe_start_entity);
fepriv->pipe_start_entity = NULL;
#endif
if (dvb_powerdown_on_sleep) {
if (fe->ops.set_voltage)
fe->ops.set_voltage(fe, SEC_VOLTAGE_OFF);
@ -899,10 +791,10 @@ void dvb_frontend_sleep_until(ktime_t *waketime, u32 add_usec)
s32 delta;
*waketime = ktime_add_us(*waketime, add_usec);
delta = ktime_us_delta(ktime_get_real(), *waketime);
delta = ktime_us_delta(ktime_get_boottime(), *waketime);
if (delta > 2500) {
msleep((delta - 1500) / 1000);
delta = ktime_us_delta(ktime_get_real(), *waketime);
delta = ktime_us_delta(ktime_get_boottime(), *waketime);
}
if (delta > 0)
udelay(delta);
@ -1162,18 +1054,24 @@ static struct dtv_cmds_h dtv_cmds[DTV_MAX_COMMAND + 1] = {
_DTV_CMD(DTV_STAT_TOTAL_BLOCK_COUNT, 0, 0),
};
static void dtv_property_dump(struct dvb_frontend *fe, struct dtv_property *tvp)
static void dtv_property_dump(struct dvb_frontend *fe,
bool is_set,
struct dtv_property *tvp)
{
int i;
if (tvp->cmd <= 0 || tvp->cmd > DTV_MAX_COMMAND) {
dev_warn(fe->dvb->device, "%s: tvp.cmd = 0x%08x undefined\n",
__func__, tvp->cmd);
dev_warn(fe->dvb->device, "%s: %s tvp.cmd = 0x%08x undefined\n",
__func__,
is_set ? "SET" : "GET",
tvp->cmd);
return;
}
dev_dbg(fe->dvb->device, "%s: tvp.cmd = 0x%08x (%s)\n", __func__,
tvp->cmd, dtv_cmds[tvp->cmd].name);
dev_dbg(fe->dvb->device, "%s: %s tvp.cmd = 0x%08x (%s)\n", __func__,
is_set ? "SET" : "GET",
tvp->cmd,
dtv_cmds[tvp->cmd].name);
if (dtv_cmds[tvp->cmd].buffer) {
dev_dbg(fe->dvb->device, "%s: tvp.u.buffer.len = 0x%02x\n",
@ -1268,11 +1166,11 @@ static int dtv_property_cache_sync(struct dvb_frontend *fe,
/* Ensure the cached values are set correctly in the frontend
* legacy tuning structures, for the advanced tuning API.
*/
static int dtv_property_legacy_params_sync(struct dvb_frontend *fe,
struct dvb_frontend_parameters *p)
static int
dtv_property_legacy_params_sync(struct dvb_frontend *fe,
const struct dtv_frontend_properties *c,
struct dvb_frontend_parameters *p)
{
const struct dtv_frontend_properties *c = &fe->dtv_property_cache;
p->frequency = c->frequency;
p->inversion = c->inversion;
@ -1344,16 +1242,17 @@ static int dtv_property_legacy_params_sync(struct dvb_frontend *fe,
* If p_out is not null, it will update the DVBv3 params pointed by it.
*/
static int dtv_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c,
struct dvb_frontend_parameters *p_out)
{
int r;
if (fe->ops.get_frontend) {
r = fe->ops.get_frontend(fe);
r = fe->ops.get_frontend(fe, c);
if (unlikely(r < 0))
return r;
if (p_out)
dtv_property_legacy_params_sync(fe, p_out);
dtv_property_legacy_params_sync(fe, c, p_out);
return 0;
}
@ -1589,7 +1488,7 @@ static int dtv_property_process_get(struct dvb_frontend *fe,
return r;
}
dtv_property_dump(fe, tvp);
dtv_property_dump(fe, false, tvp);
return 0;
}
@ -1830,6 +1729,8 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
return r;
}
dtv_property_dump(fe, true, tvp);
switch(tvp->cmd) {
case DTV_CLEAR:
/*
@ -2073,6 +1974,8 @@ static int dvb_frontend_ioctl_properties(struct file *file,
dev_dbg(fe->dvb->device, "%s: Property cache is full, tuning\n", __func__);
} else if (cmd == FE_GET_PROPERTY) {
struct dtv_frontend_properties getp = fe->dtv_property_cache;
dev_dbg(fe->dvb->device, "%s: properties.num = %d\n", __func__, tvps->num);
dev_dbg(fe->dvb->device, "%s: properties.props = %p\n", __func__, tvps->props);
@ -2094,17 +1997,18 @@ static int dvb_frontend_ioctl_properties(struct file *file,
}
/*
* Fills the cache out struct with the cache contents, plus
* the data retrieved from get_frontend, if the frontend
* is not idle. Otherwise, returns the cached content
* Let's use our own copy of property cache, in order to
* avoid mangling with DTV zigzag logic, as drivers might
* return crap, if they don't check if the data is available
* before updating the properties cache.
*/
if (fepriv->state != FESTATE_IDLE) {
err = dtv_get_frontend(fe, NULL);
err = dtv_get_frontend(fe, &getp, NULL);
if (err < 0)
goto out;
}
for (i = 0; i < tvps->num; i++) {
err = dtv_property_process_get(fe, c, tvp + i, file);
err = dtv_property_process_get(fe, &getp, tvp + i, file);
if (err < 0)
goto out;
(tvp + i)->result = err;
@ -2139,7 +2043,7 @@ static int dtv_set_frontend(struct dvb_frontend *fe)
* the user. FE_SET_FRONTEND triggers an initial frontend event
* with status = 0, which copies output parameters to userspace.
*/
dtv_property_legacy_params_sync(fe, &fepriv->parameters_out);
dtv_property_legacy_params_sync(fe, c, &fepriv->parameters_out);
/*
* Be sure that the bandwidth will be filled for all
@ -2451,7 +2355,7 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
u8 last = 1;
if (dvb_frontend_debug)
printk("%s switch command: 0x%04lx\n", __func__, swcmd);
nexttime = ktime_get_real();
nexttime = ktime_get_boottime();
if (dvb_frontend_debug)
tv[0] = nexttime;
/* before sending a command, initialize by sending
@ -2462,7 +2366,7 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
for (i = 0; i < 9; i++) {
if (dvb_frontend_debug)
tv[i+1] = ktime_get_real();
tv[i+1] = ktime_get_boottime();
if ((swcmd & 0x01) != last) {
/* set voltage to (last ? 13V : 18V) */
fe->ops.set_voltage(fe, (last) ? SEC_VOLTAGE_13 : SEC_VOLTAGE_18);
@ -2509,10 +2413,18 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
err = dvb_frontend_get_event (fe, parg, file->f_flags);
break;
case FE_GET_FRONTEND:
err = dtv_get_frontend(fe, parg);
break;
case FE_GET_FRONTEND: {
struct dtv_frontend_properties getp = fe->dtv_property_cache;
/*
* Let's use our own copy of property cache, in order to
* avoid mangling with DTV zigzag logic, as drivers might
* return crap, if they don't check if the data is available
* before updating the properties cache.
*/
err = dtv_get_frontend(fe, &getp, parg);
break;
}
case FE_SET_FRONTEND_TUNE_MODE:
fepriv->tune_mode_flags = (unsigned long) parg;
err = 0;
@ -2612,9 +2524,20 @@ static int dvb_frontend_open(struct inode *inode, struct file *file)
fepriv->tone = -1;
fepriv->voltage = -1;
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
if (fe->dvb->mdev && fe->dvb->mdev->enable_source) {
ret = fe->dvb->mdev->enable_source(dvbdev->entity,
&fepriv->pipe);
if (ret) {
dev_err(fe->dvb->device,
"Tuner is busy. Error %d\n", ret);
goto err2;
}
}
#endif
ret = dvb_frontend_start (fe);
if (ret)
goto err2;
goto err3;
/* empty event queue */
fepriv->events.eventr = fepriv->events.eventw = 0;
@ -2624,7 +2547,12 @@ static int dvb_frontend_open(struct inode *inode, struct file *file)
mutex_unlock (&adapter->mfe_lock);
return ret;
err3:
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
if (fe->dvb->mdev && fe->dvb->mdev->disable_source)
fe->dvb->mdev->disable_source(dvbdev->entity);
err2:
#endif
dvb_generic_release(inode, file);
err1:
if (dvbdev->users == -1 && fe->ops.ts_bus_ctrl)
@ -2653,6 +2581,10 @@ static int dvb_frontend_release(struct inode *inode, struct file *file)
if (dvbdev->users == -1) {
wake_up(&fepriv->wait_queue);
#ifdef CONFIG_MEDIA_CONTROLLER_DVB
if (fe->dvb->mdev && fe->dvb->mdev->disable_source)
fe->dvb->mdev->disable_source(dvbdev->entity);
#endif
if (fe->exit != DVB_FE_NO_EXIT)
wake_up(&dvbdev->wait_queue);
if (fe->ops.ts_bus_ctrl)

View File

@ -449,7 +449,8 @@ struct dvb_frontend_ops {
int (*set_frontend)(struct dvb_frontend *fe);
int (*get_tune_settings)(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* settings);
int (*get_frontend)(struct dvb_frontend *fe);
int (*get_frontend)(struct dvb_frontend *fe,
struct dtv_frontend_properties *props);
int (*read_status)(struct dvb_frontend *fe, enum fe_status *status);
int (*read_ber)(struct dvb_frontend* fe, u32* ber);

View File

@ -58,7 +58,7 @@ static const char * const dnames[] = {
#define DVB_MAX_IDS MAX_DVB_MINORS
#else
#define DVB_MAX_IDS 4
#define nums2minor(num,type,id) ((num << 6) | (id << 4) | type)
#define nums2minor(num, type, id) ((num << 6) | (id << 4) | type)
#define MAX_DVB_MINORS (DVB_MAX_ADAPTERS*64)
#endif
@ -85,7 +85,7 @@ static int dvb_device_open(struct inode *inode, struct file *file)
file->private_data = dvbdev;
replace_fops(file, new_fops);
if (file->f_op->open)
err = file->f_op->open(inode,file);
err = file->f_op->open(inode, file);
up_read(&minor_rwsem);
mutex_unlock(&dvbdev_mutex);
return err;
@ -352,7 +352,7 @@ static int dvb_create_media_entity(struct dvb_device *dvbdev,
ret = media_device_register_entity(dvbdev->adapter->mdev,
dvbdev->entity);
if (ret)
return (ret);
return ret;
printk(KERN_DEBUG "%s: media entity '%s' registered.\n",
__func__, dvbdev->entity->name);
@ -620,8 +620,7 @@ int dvb_create_media_graph(struct dvb_adapter *adap,
return -ENOMEM;
adap->conn = conn;
adap->conn_pads = kcalloc(1, sizeof(*adap->conn_pads),
GFP_KERNEL);
adap->conn_pads = kzalloc(sizeof(*adap->conn_pads), GFP_KERNEL);
if (!adap->conn_pads)
return -ENOMEM;
@ -661,7 +660,7 @@ int dvb_create_media_graph(struct dvb_adapter *adap,
if (ntuner && ndemod) {
ret = media_create_pad_links(mdev,
MEDIA_ENT_F_TUNER,
tuner, TUNER_PAD_IF_OUTPUT,
tuner, TUNER_PAD_OUTPUT,
MEDIA_ENT_F_DTV_DEMOD,
demod, 0, MEDIA_LNK_FL_ENABLED,
false);
@ -682,7 +681,7 @@ int dvb_create_media_graph(struct dvb_adapter *adap,
if (demux && ca) {
ret = media_create_pad_link(demux, 1, ca,
0, MEDIA_LNK_FL_ENABLED);
if (!ret)
if (ret)
return -ENOMEM;
}
@ -868,7 +867,7 @@ int dvb_usercopy(struct file *file,
parg = sbuf;
} else {
/* too big to allocate from stack */
mbuf = kmalloc(_IOC_SIZE(cmd),GFP_KERNEL);
mbuf = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL);
if (NULL == mbuf)
return -ENOMEM;
parg = mbuf;

View File

@ -73,6 +73,14 @@ config DVB_SI2165
Say Y when you want to support this frontend.
config DVB_MN88473
tristate "Panasonic MN88473"
depends on DVB_CORE && I2C
select REGMAP_I2C
default m if !MEDIA_SUBDRV_AUTOSELECT
help
Say Y when you want to support this frontend.
comment "DVB-S (satellite) frontends"
depends on DVB_CORE

View File

@ -95,6 +95,7 @@ obj-$(CONFIG_DVB_STV0900) += stv0900.o
obj-$(CONFIG_DVB_STV090x) += stv090x.o
obj-$(CONFIG_DVB_STV6110x) += stv6110x.o
obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o
obj-$(CONFIG_DVB_MN88473) += mn88473.o
obj-$(CONFIG_DVB_ISL6423) += isl6423.o
obj-$(CONFIG_DVB_EC100) += ec100.o
obj-$(CONFIG_DVB_HD29L2) += hd29l2.o

View File

@ -866,9 +866,9 @@ err:
return ret;
}
static int af9013_get_frontend(struct dvb_frontend *fe)
static int af9013_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct af9013_state *state = fe->demodulator_priv;
int ret;
u8 buf[3];
@ -1344,6 +1344,10 @@ err:
static void af9013_release(struct dvb_frontend *fe)
{
struct af9013_state *state = fe->demodulator_priv;
/* stop statistics polling */
cancel_delayed_work_sync(&state->statistics_work);
kfree(state);
}

View File

@ -691,10 +691,10 @@ err:
return ret;
}
static int af9033_get_frontend(struct dvb_frontend *fe)
static int af9033_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct af9033_dev *dev = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u8 buf[8];
@ -1372,6 +1372,9 @@ static int af9033_remove(struct i2c_client *client)
dev_dbg(&dev->client->dev, "\n");
/* stop statistics polling */
cancel_delayed_work_sync(&dev->stat_work);
dev->fe.ops.release = NULL;
dev->fe.demodulator_priv = NULL;
kfree(dev);

View File

@ -190,10 +190,10 @@ static int as102_fe_set_frontend(struct dvb_frontend *fe)
return state->ops->set_tune(state->priv, &tune_args);
}
static int as102_fe_get_frontend(struct dvb_frontend *fe)
static int as102_fe_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct as102_state *state = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret = 0;
struct as10x_tps tps = { 0 };

View File

@ -297,9 +297,9 @@ static int atbm8830_set_fe(struct dvb_frontend *fe)
return 0;
}
static int atbm8830_get_fe(struct dvb_frontend *fe)
static int atbm8830_get_fe(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
dprintk("%s\n", __func__);
/* TODO: get real readings from device */

View File

@ -89,5 +89,4 @@ enum au8522_audio_input {
AU8522_AUDIO_NONE,
AU8522_AUDIO_SIF,
};
#endif /* __AU8522_H__ */

View File

@ -763,9 +763,10 @@ static int au8522_probe(struct i2c_client *client,
v4l2_i2c_subdev_init(sd, client, &au8522_ops);
#if defined(CONFIG_MEDIA_CONTROLLER)
state->pads[AU8522_PAD_INPUT].flags = MEDIA_PAD_FL_SINK;
state->pads[AU8522_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;
state->pads[AU8522_PAD_VBI_OUT].flags = MEDIA_PAD_FL_SOURCE;
state->pads[DEMOD_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK;
state->pads[DEMOD_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;
state->pads[DEMOD_PAD_VBI_OUT].flags = MEDIA_PAD_FL_SOURCE;
state->pads[DEMOD_PAD_AUDIO_OUT].flags = MEDIA_PAD_FL_SOURCE;
sd->entity.function = MEDIA_ENT_F_ATV_DECODER;
ret = media_entity_pads_init(&sd->entity, ARRAY_SIZE(state->pads),

View File

@ -816,9 +816,9 @@ static int au8522_read_ber(struct dvb_frontend *fe, u32 *ber)
return au8522_read_ucblocks(fe, ber);
}
static int au8522_get_frontend(struct dvb_frontend *fe)
static int au8522_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct au8522_state *state = fe->demodulator_priv;
c->frequency = state->current_frequency;

View File

@ -30,6 +30,7 @@
#include <linux/videodev2.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-mc.h>
#include <linux/i2c.h>
#include "dvb_frontend.h"
#include "au8522.h"
@ -39,14 +40,6 @@
#define AU8522_DIGITAL_MODE 1
#define AU8522_SUSPEND_MODE 2
enum au8522_media_pads {
AU8522_PAD_INPUT,
AU8522_PAD_VID_OUT,
AU8522_PAD_VBI_OUT,
AU8522_NUM_PADS
};
struct au8522_state {
struct i2c_client *c;
struct i2c_adapter *i2c;
@ -78,7 +71,7 @@ struct au8522_state {
struct v4l2_ctrl_handler hdl;
#ifdef CONFIG_MEDIA_CONTROLLER
struct media_pad pads[AU8522_NUM_PADS];
struct media_pad pads[DEMOD_NUM_PADS];
#endif
};

View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2001-5, B2C2 inc.
*
* GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
* GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@posteo.de>
*
* This driver is "hard-coded" to be used with the 1st generation of
* Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
@ -865,5 +865,5 @@ static struct dvb_frontend_ops bcm3510_ops = {
};
MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_LICENSE("GPL");

View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2001-5, B2C2 inc.
*
* GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
* GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@posteo.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2001-5, B2C2 inc.
*
* GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
* GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@posteo.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

View File

@ -345,9 +345,9 @@ static int cx22700_set_frontend(struct dvb_frontend *fe)
return 0;
}
static int cx22700_get_frontend(struct dvb_frontend *fe)
static int cx22700_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct cx22700_state* state = fe->demodulator_priv;
u8 reg09 = cx22700_readreg (state, 0x09);

View File

@ -562,9 +562,9 @@ static int cx22702_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
return 0;
}
static int cx22702_get_frontend(struct dvb_frontend *fe)
static int cx22702_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct cx22702_state *state = fe->demodulator_priv;
u8 reg0C = cx22702_readreg(state, 0x0C);

View File

@ -550,9 +550,9 @@ static int cx24110_set_frontend(struct dvb_frontend *fe)
return 0;
}
static int cx24110_get_frontend(struct dvb_frontend *fe)
static int cx24110_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct cx24110_state *state = fe->demodulator_priv;
s32 afc; unsigned sclk;

View File

@ -1560,10 +1560,10 @@ static int cx24117_get_algo(struct dvb_frontend *fe)
return DVBFE_ALGO_HW;
}
static int cx24117_get_frontend(struct dvb_frontend *fe)
static int cx24117_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct cx24117_state *state = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct cx24117_cmd cmd;
u8 reg, st, inv;
int ret, idx;

View File

@ -1502,16 +1502,18 @@ static int cx24120_sleep(struct dvb_frontend *fe)
return 0;
}
static int cx24120_get_frontend(struct dvb_frontend *fe)
static int cx24120_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct cx24120_state *state = fe->demodulator_priv;
u8 freq1, freq2, freq3;
int status;
dev_dbg(&state->i2c->dev, "\n");
/* don't return empty data if we're not tuned in */
if ((state->fe_status & FE_HAS_LOCK) == 0)
status = cx24120_readreg(state, CX24120_REG_STATUS);
if (!(status & CX24120_HAS_LOCK))
return 0;
/* Get frequency */

View File

@ -945,9 +945,9 @@ static int cx24123_set_frontend(struct dvb_frontend *fe)
return 0;
}
static int cx24123_get_frontend(struct dvb_frontend *fe)
static int cx24123_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct cx24123_state *state = fe->demodulator_priv;
dprintk("\n");

View File

@ -101,10 +101,10 @@ error:
return ret;
}
int cxd2820r_get_frontend_c(struct dvb_frontend *fe)
int cxd2820r_get_frontend_c(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct cxd2820r_priv *priv = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u8 buf[2];

View File

@ -313,7 +313,8 @@ static int cxd2820r_read_status(struct dvb_frontend *fe, enum fe_status *status)
return ret;
}
static int cxd2820r_get_frontend(struct dvb_frontend *fe)
static int cxd2820r_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct cxd2820r_priv *priv = fe->demodulator_priv;
int ret;
@ -326,13 +327,13 @@ static int cxd2820r_get_frontend(struct dvb_frontend *fe)
switch (fe->dtv_property_cache.delivery_system) {
case SYS_DVBT:
ret = cxd2820r_get_frontend_t(fe);
ret = cxd2820r_get_frontend_t(fe, p);
break;
case SYS_DVBT2:
ret = cxd2820r_get_frontend_t2(fe);
ret = cxd2820r_get_frontend_t2(fe, p);
break;
case SYS_DVBC_ANNEX_A:
ret = cxd2820r_get_frontend_c(fe);
ret = cxd2820r_get_frontend_c(fe, p);
break;
default:
ret = -EINVAL;
@ -606,8 +607,7 @@ static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
int val)
{
struct cxd2820r_priv *priv =
container_of(chip, struct cxd2820r_priv, gpio_chip);
struct cxd2820r_priv *priv = gpiochip_get_data(chip);
u8 gpio[GPIO_COUNT];
dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
@ -620,8 +620,7 @@ static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
{
struct cxd2820r_priv *priv =
container_of(chip, struct cxd2820r_priv, gpio_chip);
struct cxd2820r_priv *priv = gpiochip_get_data(chip);
u8 gpio[GPIO_COUNT];
dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
@ -636,8 +635,7 @@ static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
{
struct cxd2820r_priv *priv =
container_of(chip, struct cxd2820r_priv, gpio_chip);
struct cxd2820r_priv *priv = gpiochip_get_data(chip);
dev_dbg(&priv->i2c->dev, "%s: nr=%d\n", __func__, nr);
@ -731,7 +729,7 @@ struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
priv->gpio_chip.base = -1; /* dynamic allocation */
priv->gpio_chip.ngpio = GPIO_COUNT;
priv->gpio_chip.can_sleep = 1;
ret = gpiochip_add(&priv->gpio_chip);
ret = gpiochip_add_data(&priv->gpio_chip, priv);
if (ret)
goto error;

View File

@ -76,7 +76,8 @@ int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val);
/* cxd2820r_c.c */
int cxd2820r_get_frontend_c(struct dvb_frontend *fe);
int cxd2820r_get_frontend_c(struct dvb_frontend *fe,
struct dtv_frontend_properties *p);
int cxd2820r_set_frontend_c(struct dvb_frontend *fe);
@ -99,7 +100,8 @@ int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
/* cxd2820r_t.c */
int cxd2820r_get_frontend_t(struct dvb_frontend *fe);
int cxd2820r_get_frontend_t(struct dvb_frontend *fe,
struct dtv_frontend_properties *p);
int cxd2820r_set_frontend_t(struct dvb_frontend *fe);
@ -122,7 +124,8 @@ int cxd2820r_get_tune_settings_t(struct dvb_frontend *fe,
/* cxd2820r_t2.c */
int cxd2820r_get_frontend_t2(struct dvb_frontend *fe);
int cxd2820r_get_frontend_t2(struct dvb_frontend *fe,
struct dtv_frontend_properties *p);
int cxd2820r_set_frontend_t2(struct dvb_frontend *fe);

View File

@ -138,10 +138,10 @@ error:
return ret;
}
int cxd2820r_get_frontend_t(struct dvb_frontend *fe)
int cxd2820r_get_frontend_t(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct cxd2820r_priv *priv = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u8 buf[2];

View File

@ -23,8 +23,8 @@
int cxd2820r_set_frontend_t2(struct dvb_frontend *fe)
{
struct cxd2820r_priv *priv = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct cxd2820r_priv *priv = fe->demodulator_priv;
int ret, i, bw_i;
u32 if_freq, if_ctl;
u64 num;
@ -169,10 +169,10 @@ error:
}
int cxd2820r_get_frontend_t2(struct dvb_frontend *fe)
int cxd2820r_get_frontend_t2(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct cxd2820r_priv *priv = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u8 buf[2];

View File

@ -2090,13 +2090,13 @@ static int cxd2841er_sleep_tc_to_active_c(struct cxd2841er_priv *priv,
return 0;
}
static int cxd2841er_get_frontend(struct dvb_frontend *fe)
static int cxd2841er_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
enum fe_status status = 0;
u16 strength = 0, snr = 0;
u32 errors = 0, ber = 0;
struct cxd2841er_priv *priv = fe->demodulator_priv;
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
if (priv->state == STATE_ACTIVE_S)

View File

@ -774,6 +774,6 @@ free_mem:
}
EXPORT_SYMBOL(dib0070_attach);
MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_DESCRIPTION("Driver for the DiBcom 0070 base-band RF Tuner");
MODULE_LICENSE("GPL");

View File

@ -1115,9 +1115,15 @@ void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
dib0090_set_bbramp_pwm(state, bb_ramp);
/* activate the ramp generator using PWM control */
dprintk("ramp RF gain = %d BAND = %s version = %d", state->rf_ramp[0], (state->current_band == BAND_CBAND) ? "CBAND" : "NOT CBAND", state->identity.version & 0x1f);
if (state->rf_ramp)
dprintk("ramp RF gain = %d BAND = %s version = %d",
state->rf_ramp[0],
(state->current_band == BAND_CBAND) ? "CBAND" : "NOT CBAND",
state->identity.version & 0x1f);
if ((state->rf_ramp[0] == 0) || (state->current_band == BAND_CBAND && (state->identity.version & 0x1f) <= P1D_E_F)) {
if (rf_ramp && ((state->rf_ramp[0] == 0) ||
(state->current_band == BAND_CBAND &&
(state->identity.version & 0x1f) <= P1D_E_F))) {
dprintk("DE-Engage mux for direct gain reg control");
en_pwm_rf_mux = 0;
} else
@ -2669,7 +2675,7 @@ free_mem:
}
EXPORT_SYMBOL(dib0090_fw_register);
MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
MODULE_AUTHOR("Olivier Grenie <olivier.grenie@dibcom.fr>");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_AUTHOR("Olivier Grenie <olivier.grenie@parrot.com>");
MODULE_DESCRIPTION("Driver for the DiBcom 0090 base-band RF Tuner");
MODULE_LICENSE("GPL");

View File

@ -2,11 +2,11 @@
* public header file of the frontend drivers for mobile DVB-T demodulators
* DiBcom 3000M-B and DiBcom 3000P/M-C (http://www.dibcom.fr/)
*
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de)
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de)
*
* based on GPL code from DibCom, which has
*
* Copyright (C) 2004 Amaury Demol for DiBcom (ademol@dibcom.fr)
* Copyright (C) 2004 Amaury Demol for DiBcom
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@ -14,7 +14,7 @@
*
* Acknowledgements
*
* Amaury Demol (ademol@dibcom.fr) from DiBcom for providing specs and driver
* Amaury Demol from DiBcom for providing specs and driver
* sources, on which this driver (and the dvb-dibusb) are based.
*
* see Documentation/dvb/README.dvb-usb for more information

View File

@ -2,11 +2,11 @@
* Frontend driver for mobile DVB-T demodulator DiBcom 3000M-B
* DiBcom (http://www.dibcom.fr/)
*
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de)
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de)
*
* based on GPL code from DibCom, which has
*
* Copyright (C) 2004 Amaury Demol for DiBcom (ademol@dibcom.fr)
* Copyright (C) 2004 Amaury Demol for DiBcom
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@ -14,7 +14,7 @@
*
* Acknowledgements
*
* Amaury Demol (ademol@dibcom.fr) from DiBcom for providing specs and driver
* Amaury Demol from DiBcom for providing specs and driver
* sources, on which this driver (and the dvb-dibusb) are based.
*
* see Documentation/dvb/README.dvb-usb for more information
@ -36,7 +36,7 @@
/* Version information */
#define DRIVER_VERSION "0.1"
#define DRIVER_DESC "DiBcom 3000M-B DVB-T demodulator"
#define DRIVER_AUTHOR "Patrick Boettcher, patrick.boettcher@desy.de"
#define DRIVER_AUTHOR "Patrick Boettcher, patrick.boettcher@posteo.de"
static int debug;
module_param(debug, int, 0644);
@ -112,7 +112,8 @@ static u16 dib3000_seq[2][2][2] = /* fft,gua, inv */
}
};
static int dib3000mb_get_frontend(struct dvb_frontend* fe);
static int dib3000mb_get_frontend(struct dvb_frontend* fe,
struct dtv_frontend_properties *c);
static int dib3000mb_set_frontend(struct dvb_frontend *fe, int tuner)
{
@ -359,7 +360,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend *fe, int tuner)
deb_setf("search_state after autosearch %d after %d checks\n",search_state,as_count);
if (search_state == 1) {
if (dib3000mb_get_frontend(fe) == 0) {
if (dib3000mb_get_frontend(fe, c) == 0) {
deb_setf("reading tuning data from frontend succeeded.\n");
return dib3000mb_set_frontend(fe, 0);
}
@ -450,9 +451,9 @@ static int dib3000mb_fe_init(struct dvb_frontend* fe, int mobile_mode)
return 0;
}
static int dib3000mb_get_frontend(struct dvb_frontend* fe)
static int dib3000mb_get_frontend(struct dvb_frontend* fe,
struct dtv_frontend_properties *c)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct dib3000_state* state = fe->demodulator_priv;
enum fe_code_rate *cr;
u16 tps_val;

View File

@ -1,7 +1,7 @@
/*
* dib3000mb_priv.h
*
* Copyright (C) 2004 Patrick Boettcher (patrick.boettcher@desy.de)
* Copyright (C) 2004 Patrick Boettcher (patrick.boettcher@posteo.de)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as

View File

@ -2,7 +2,7 @@
* Driver for DiBcom DiB3000MC/P-demodulator.
*
* Copyright (C) 2004-7 DiBcom (http://www.dibcom.fr/)
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de)
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de)
*
* This code is partially based on the previous dib3000mc.c .
*
@ -636,9 +636,9 @@ struct i2c_adapter * dib3000mc_get_tuner_i2c_master(struct dvb_frontend *demod,
EXPORT_SYMBOL(dib3000mc_get_tuner_i2c_master);
static int dib3000mc_get_frontend(struct dvb_frontend* fe)
static int dib3000mc_get_frontend(struct dvb_frontend* fe,
struct dtv_frontend_properties *fep)
{
struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
struct dib3000mc_state *state = fe->demodulator_priv;
u16 tps = dib3000mc_read_word(state,458);
@ -726,7 +726,7 @@ static int dib3000mc_set_frontend(struct dvb_frontend *fe)
if (found == 0 || found == 1)
return 0; // no channel found
dib3000mc_get_frontend(fe);
dib3000mc_get_frontend(fe, fep);
}
ret = dib3000mc_tune(fe);
@ -939,6 +939,6 @@ static struct dvb_frontend_ops dib3000mc_ops = {
.read_ucblocks = dib3000mc_read_unc_blocks,
};
MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_DESCRIPTION("Driver for the DiBcom 3000MC/P COFDM demodulator");
MODULE_LICENSE("GPL");

View File

@ -2,7 +2,7 @@
* Driver for DiBcom DiB3000MC/P-demodulator.
*
* Copyright (C) 2004-6 DiBcom (http://www.dibcom.fr/)
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher\@desy.de)
* Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de)
*
* This code is partially based on the previous dib3000mc.c .
*

View File

@ -1151,9 +1151,9 @@ static int dib7000m_identify(struct dib7000m_state *state)
}
static int dib7000m_get_frontend(struct dvb_frontend* fe)
static int dib7000m_get_frontend(struct dvb_frontend* fe,
struct dtv_frontend_properties *fep)
{
struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
struct dib7000m_state *state = fe->demodulator_priv;
u16 tps = dib7000m_read_word(state,480);
@ -1246,7 +1246,7 @@ static int dib7000m_set_frontend(struct dvb_frontend *fe)
if (found == 0 || found == 1)
return 0; // no channel found
dib7000m_get_frontend(fe);
dib7000m_get_frontend(fe, fep);
}
ret = dib7000m_tune(fe);
@ -1465,6 +1465,6 @@ static struct dvb_frontend_ops dib7000m_ops = {
.read_ucblocks = dib7000m_read_unc_blocks,
};
MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_DESCRIPTION("Driver for the DiBcom 7000MA/MB/PA/PB/MC COFDM demodulator");
MODULE_LICENSE("GPL");

View File

@ -1405,9 +1405,9 @@ static int dib7000p_identify(struct dib7000p_state *st)
return 0;
}
static int dib7000p_get_frontend(struct dvb_frontend *fe)
static int dib7000p_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *fep)
{
struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
struct dib7000p_state *state = fe->demodulator_priv;
u16 tps = dib7000p_read_word(state, 463);
@ -1540,7 +1540,7 @@ static int dib7000p_set_frontend(struct dvb_frontend *fe)
if (found == 0 || found == 1)
return 0;
dib7000p_get_frontend(fe);
dib7000p_get_frontend(fe, fep);
}
ret = dib7000p_tune(fe);
@ -2834,7 +2834,7 @@ static struct dvb_frontend_ops dib7000p_ops = {
.read_ucblocks = dib7000p_read_unc_blocks,
};
MODULE_AUTHOR("Olivier Grenie <ogrenie@dibcom.fr>");
MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
MODULE_AUTHOR("Olivier Grenie <olivie.grenie@parrot.com>");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_DESCRIPTION("Driver for the DiBcom 7000PC COFDM demodulator");
MODULE_LICENSE("GPL");

View File

@ -3382,14 +3382,15 @@ static int dib8000_sleep(struct dvb_frontend *fe)
static int dib8000_read_status(struct dvb_frontend *fe, enum fe_status *stat);
static int dib8000_get_frontend(struct dvb_frontend *fe)
static int dib8000_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dib8000_state *state = fe->demodulator_priv;
u16 i, val = 0;
enum fe_status stat = 0;
u8 index_frontend, sub_index_frontend;
fe->dtv_property_cache.bandwidth_hz = 6000000;
c->bandwidth_hz = 6000000;
/*
* If called to early, get_frontend makes dib8000_tune to either
@ -3406,7 +3407,7 @@ static int dib8000_get_frontend(struct dvb_frontend *fe)
if (stat&FE_HAS_SYNC) {
dprintk("TMCC lock on the slave%i", index_frontend);
/* synchronize the cache with the other frontends */
state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend]);
state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend], c);
for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_index_frontend] != NULL); sub_index_frontend++) {
if (sub_index_frontend != index_frontend) {
state->fe[sub_index_frontend]->dtv_property_cache.isdbt_sb_mode = state->fe[index_frontend]->dtv_property_cache.isdbt_sb_mode;
@ -3426,57 +3427,57 @@ static int dib8000_get_frontend(struct dvb_frontend *fe)
}
}
fe->dtv_property_cache.isdbt_sb_mode = dib8000_read_word(state, 508) & 0x1;
c->isdbt_sb_mode = dib8000_read_word(state, 508) & 0x1;
if (state->revision == 0x8090)
val = dib8000_read_word(state, 572);
else
val = dib8000_read_word(state, 570);
fe->dtv_property_cache.inversion = (val & 0x40) >> 6;
c->inversion = (val & 0x40) >> 6;
switch ((val & 0x30) >> 4) {
case 1:
fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_2K;
c->transmission_mode = TRANSMISSION_MODE_2K;
dprintk("dib8000_get_frontend: transmission mode 2K");
break;
case 2:
fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_4K;
c->transmission_mode = TRANSMISSION_MODE_4K;
dprintk("dib8000_get_frontend: transmission mode 4K");
break;
case 3:
default:
fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
c->transmission_mode = TRANSMISSION_MODE_8K;
dprintk("dib8000_get_frontend: transmission mode 8K");
break;
}
switch (val & 0x3) {
case 0:
fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_32;
c->guard_interval = GUARD_INTERVAL_1_32;
dprintk("dib8000_get_frontend: Guard Interval = 1/32 ");
break;
case 1:
fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_16;
c->guard_interval = GUARD_INTERVAL_1_16;
dprintk("dib8000_get_frontend: Guard Interval = 1/16 ");
break;
case 2:
dprintk("dib8000_get_frontend: Guard Interval = 1/8 ");
fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
c->guard_interval = GUARD_INTERVAL_1_8;
break;
case 3:
dprintk("dib8000_get_frontend: Guard Interval = 1/4 ");
fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_4;
c->guard_interval = GUARD_INTERVAL_1_4;
break;
}
val = dib8000_read_word(state, 505);
fe->dtv_property_cache.isdbt_partial_reception = val & 1;
dprintk("dib8000_get_frontend: partial_reception = %d ", fe->dtv_property_cache.isdbt_partial_reception);
c->isdbt_partial_reception = val & 1;
dprintk("dib8000_get_frontend: partial_reception = %d ", c->isdbt_partial_reception);
for (i = 0; i < 3; i++) {
int show;
val = dib8000_read_word(state, 493 + i) & 0x0f;
fe->dtv_property_cache.layer[i].segment_count = val;
c->layer[i].segment_count = val;
if (val == 0 || val > 13)
show = 0;
@ -3485,41 +3486,41 @@ static int dib8000_get_frontend(struct dvb_frontend *fe)
if (show)
dprintk("dib8000_get_frontend: Layer %d segments = %d ",
i, fe->dtv_property_cache.layer[i].segment_count);
i, c->layer[i].segment_count);
val = dib8000_read_word(state, 499 + i) & 0x3;
/* Interleaving can be 0, 1, 2 or 4 */
if (val == 3)
val = 4;
fe->dtv_property_cache.layer[i].interleaving = val;
c->layer[i].interleaving = val;
if (show)
dprintk("dib8000_get_frontend: Layer %d time_intlv = %d ",
i, fe->dtv_property_cache.layer[i].interleaving);
i, c->layer[i].interleaving);
val = dib8000_read_word(state, 481 + i);
switch (val & 0x7) {
case 1:
fe->dtv_property_cache.layer[i].fec = FEC_1_2;
c->layer[i].fec = FEC_1_2;
if (show)
dprintk("dib8000_get_frontend: Layer %d Code Rate = 1/2 ", i);
break;
case 2:
fe->dtv_property_cache.layer[i].fec = FEC_2_3;
c->layer[i].fec = FEC_2_3;
if (show)
dprintk("dib8000_get_frontend: Layer %d Code Rate = 2/3 ", i);
break;
case 3:
fe->dtv_property_cache.layer[i].fec = FEC_3_4;
c->layer[i].fec = FEC_3_4;
if (show)
dprintk("dib8000_get_frontend: Layer %d Code Rate = 3/4 ", i);
break;
case 5:
fe->dtv_property_cache.layer[i].fec = FEC_5_6;
c->layer[i].fec = FEC_5_6;
if (show)
dprintk("dib8000_get_frontend: Layer %d Code Rate = 5/6 ", i);
break;
default:
fe->dtv_property_cache.layer[i].fec = FEC_7_8;
c->layer[i].fec = FEC_7_8;
if (show)
dprintk("dib8000_get_frontend: Layer %d Code Rate = 7/8 ", i);
break;
@ -3528,23 +3529,23 @@ static int dib8000_get_frontend(struct dvb_frontend *fe)
val = dib8000_read_word(state, 487 + i);
switch (val & 0x3) {
case 0:
fe->dtv_property_cache.layer[i].modulation = DQPSK;
c->layer[i].modulation = DQPSK;
if (show)
dprintk("dib8000_get_frontend: Layer %d DQPSK ", i);
break;
case 1:
fe->dtv_property_cache.layer[i].modulation = QPSK;
c->layer[i].modulation = QPSK;
if (show)
dprintk("dib8000_get_frontend: Layer %d QPSK ", i);
break;
case 2:
fe->dtv_property_cache.layer[i].modulation = QAM_16;
c->layer[i].modulation = QAM_16;
if (show)
dprintk("dib8000_get_frontend: Layer %d QAM16 ", i);
break;
case 3:
default:
fe->dtv_property_cache.layer[i].modulation = QAM_64;
c->layer[i].modulation = QAM_64;
if (show)
dprintk("dib8000_get_frontend: Layer %d QAM64 ", i);
break;
@ -3553,16 +3554,16 @@ static int dib8000_get_frontend(struct dvb_frontend *fe)
/* synchronize the cache with the other frontends */
for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
state->fe[index_frontend]->dtv_property_cache.isdbt_sb_mode = fe->dtv_property_cache.isdbt_sb_mode;
state->fe[index_frontend]->dtv_property_cache.inversion = fe->dtv_property_cache.inversion;
state->fe[index_frontend]->dtv_property_cache.transmission_mode = fe->dtv_property_cache.transmission_mode;
state->fe[index_frontend]->dtv_property_cache.guard_interval = fe->dtv_property_cache.guard_interval;
state->fe[index_frontend]->dtv_property_cache.isdbt_partial_reception = fe->dtv_property_cache.isdbt_partial_reception;
state->fe[index_frontend]->dtv_property_cache.isdbt_sb_mode = c->isdbt_sb_mode;
state->fe[index_frontend]->dtv_property_cache.inversion = c->inversion;
state->fe[index_frontend]->dtv_property_cache.transmission_mode = c->transmission_mode;
state->fe[index_frontend]->dtv_property_cache.guard_interval = c->guard_interval;
state->fe[index_frontend]->dtv_property_cache.isdbt_partial_reception = c->isdbt_partial_reception;
for (i = 0; i < 3; i++) {
state->fe[index_frontend]->dtv_property_cache.layer[i].segment_count = fe->dtv_property_cache.layer[i].segment_count;
state->fe[index_frontend]->dtv_property_cache.layer[i].interleaving = fe->dtv_property_cache.layer[i].interleaving;
state->fe[index_frontend]->dtv_property_cache.layer[i].fec = fe->dtv_property_cache.layer[i].fec;
state->fe[index_frontend]->dtv_property_cache.layer[i].modulation = fe->dtv_property_cache.layer[i].modulation;
state->fe[index_frontend]->dtv_property_cache.layer[i].segment_count = c->layer[i].segment_count;
state->fe[index_frontend]->dtv_property_cache.layer[i].interleaving = c->layer[i].interleaving;
state->fe[index_frontend]->dtv_property_cache.layer[i].fec = c->layer[i].fec;
state->fe[index_frontend]->dtv_property_cache.layer[i].modulation = c->layer[i].modulation;
}
}
return 0;
@ -3671,7 +3672,7 @@ static int dib8000_set_frontend(struct dvb_frontend *fe)
if (state->channel_parameters_set == 0) { /* searching */
if ((dib8000_get_status(state->fe[index_frontend]) == FE_STATUS_DEMOD_SUCCESS) || (dib8000_get_status(state->fe[index_frontend]) == FE_STATUS_FFT_SUCCESS)) {
dprintk("autosearch succeeded on fe%i", index_frontend);
dib8000_get_frontend(state->fe[index_frontend]); /* we read the channel parameters from the frontend which was successful */
dib8000_get_frontend(state->fe[index_frontend], c); /* we read the channel parameters from the frontend which was successful */
state->channel_parameters_set = 1;
for (l = 0; (l < MAX_NUMBER_OF_FRONTENDS) && (state->fe[l] != NULL); l++) {
@ -4516,6 +4517,6 @@ void *dib8000_attach(struct dib8000_ops *ops)
}
EXPORT_SYMBOL(dib8000_attach);
MODULE_AUTHOR("Olivier Grenie <Olivier.Grenie@dibcom.fr, " "Patrick Boettcher <pboettcher@dibcom.fr>");
MODULE_AUTHOR("Olivier Grenie <Olivier.Grenie@parrot.com, Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_DESCRIPTION("Driver for the DiBcom 8000 ISDB-T demodulator");
MODULE_LICENSE("GPL");

View File

@ -225,7 +225,7 @@ static u16 to_fw_output_mode(u16 mode)
}
}
static u16 dib9000_read16_attr(struct dib9000_state *state, u16 reg, u8 * b, u32 len, u16 attribute)
static int dib9000_read16_attr(struct dib9000_state *state, u16 reg, u8 *b, u32 len, u16 attribute)
{
u32 chunk_size = 126;
u32 l;
@ -309,7 +309,7 @@ static inline u16 dib9000_read_word_attr(struct dib9000_state *state, u16 reg, u
#define dib9000_read16_noinc_attr(state, reg, b, len, attribute) dib9000_read16_attr(state, reg, b, len, (attribute) | DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT)
static u16 dib9000_write16_attr(struct dib9000_state *state, u16 reg, const u8 * buf, u32 len, u16 attribute)
static int dib9000_write16_attr(struct dib9000_state *state, u16 reg, const u8 *buf, u32 len, u16 attribute)
{
u32 chunk_size = 126;
u32 l;
@ -1889,7 +1889,8 @@ static int dib9000_fe_get_tune_settings(struct dvb_frontend *fe, struct dvb_fron
return 0;
}
static int dib9000_get_frontend(struct dvb_frontend *fe)
static int dib9000_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dib9000_state *state = fe->demodulator_priv;
u8 index_frontend, sub_index_frontend;
@ -1909,7 +1910,7 @@ static int dib9000_get_frontend(struct dvb_frontend *fe)
dprintk("TPS lock on the slave%i", index_frontend);
/* synchronize the cache with the other frontends */
state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend]);
state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend], c);
for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_index_frontend] != NULL);
sub_index_frontend++) {
if (sub_index_frontend != index_frontend) {
@ -1943,14 +1944,14 @@ static int dib9000_get_frontend(struct dvb_frontend *fe)
/* synchronize the cache with the other frontends */
for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
state->fe[index_frontend]->dtv_property_cache.inversion = fe->dtv_property_cache.inversion;
state->fe[index_frontend]->dtv_property_cache.transmission_mode = fe->dtv_property_cache.transmission_mode;
state->fe[index_frontend]->dtv_property_cache.guard_interval = fe->dtv_property_cache.guard_interval;
state->fe[index_frontend]->dtv_property_cache.modulation = fe->dtv_property_cache.modulation;
state->fe[index_frontend]->dtv_property_cache.hierarchy = fe->dtv_property_cache.hierarchy;
state->fe[index_frontend]->dtv_property_cache.code_rate_HP = fe->dtv_property_cache.code_rate_HP;
state->fe[index_frontend]->dtv_property_cache.code_rate_LP = fe->dtv_property_cache.code_rate_LP;
state->fe[index_frontend]->dtv_property_cache.rolloff = fe->dtv_property_cache.rolloff;
state->fe[index_frontend]->dtv_property_cache.inversion = c->inversion;
state->fe[index_frontend]->dtv_property_cache.transmission_mode = c->transmission_mode;
state->fe[index_frontend]->dtv_property_cache.guard_interval = c->guard_interval;
state->fe[index_frontend]->dtv_property_cache.modulation = c->modulation;
state->fe[index_frontend]->dtv_property_cache.hierarchy = c->hierarchy;
state->fe[index_frontend]->dtv_property_cache.code_rate_HP = c->code_rate_HP;
state->fe[index_frontend]->dtv_property_cache.code_rate_LP = c->code_rate_LP;
state->fe[index_frontend]->dtv_property_cache.rolloff = c->rolloff;
}
ret = 0;
@ -2083,7 +2084,7 @@ static int dib9000_set_frontend(struct dvb_frontend *fe)
/* synchronize all the channel cache */
state->get_frontend_internal = 1;
dib9000_get_frontend(state->fe[0]);
dib9000_get_frontend(state->fe[0], &state->fe[0]->dtv_property_cache);
state->get_frontend_internal = 0;
/* retune the other frontends with the found channel */
@ -2589,7 +2590,7 @@ static struct dvb_frontend_ops dib9000_ops = {
.read_ucblocks = dib9000_read_unc_blocks,
};
MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
MODULE_AUTHOR("Olivier Grenie <ogrenie@dibcom.fr>");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_AUTHOR("Olivier Grenie <olivier.grenie@parrot.com>");
MODULE_DESCRIPTION("Driver for the DiBcom 9000 COFDM demodulator");
MODULE_LICENSE("GPL");

View File

@ -510,6 +510,6 @@ u32 systime(void)
}
EXPORT_SYMBOL(systime);
MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
MODULE_DESCRIPTION("Common function the DiBcom demodulator family");
MODULE_LICENSE("GPL");

View File

@ -4131,7 +4131,7 @@ int drxj_dap_scu_atomic_read_write_block(struct i2c_device_addr *dev_addr, u32 a
{
struct drxjscu_cmd scu_cmd;
int rc;
u16 set_param_parameters[15];
u16 set_param_parameters[18];
u16 cmd_result[15];
/* Parameter check */
@ -9597,12 +9597,13 @@ ctrl_get_qam_sig_quality(struct drx_demod_instance *demod)
Precision errors still possible.
*/
e = post_bit_err_rs * 742686;
m = fec_oc_period * 100;
if (fec_oc_period == 0)
if (!fec_oc_period) {
qam_post_rs_ber = 0xFFFFFFFF;
else
} else {
e = post_bit_err_rs * 742686;
m = fec_oc_period * 100;
qam_post_rs_ber = e / m;
}
/* fill signal quality data structure */
p->pre_bit_count.stat[0].scale = FE_SCALE_COUNTER;

View File

@ -70,9 +70,12 @@ static int dvb_dummy_fe_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
}
/*
* Only needed if it actually reads something from the hardware
* Should only be implemented if it actually reads something from the hardware.
* Also, it should check for the locks, in order to avoid report wrong data
* to userspace.
*/
static int dvb_dummy_fe_get_frontend(struct dvb_frontend *fe)
static int dvb_dummy_fe_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
return 0;
}

View File

@ -560,11 +560,11 @@ static int hd29l2_get_frontend_algo(struct dvb_frontend *fe)
return DVBFE_ALGO_CUSTOM;
}
static int hd29l2_get_frontend(struct dvb_frontend *fe)
static int hd29l2_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
int ret;
struct hd29l2_priv *priv = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u8 buf[3];
u32 if_ctl;
char *str_constellation, *str_code_rate, *str_constellation_code_rate,

View File

@ -243,9 +243,9 @@ static int apply_frontend_param(struct dvb_frontend *fe)
return 0;
}
static int get_frontend(struct dvb_frontend *fe)
static int get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct l64781_state* state = fe->demodulator_priv;
int tmp;

View File

@ -942,101 +942,102 @@ static int lg216x_read_rs_err_count(struct lg216x_state *state, u16 *err)
/* ------------------------------------------------------------------------ */
static int lg216x_get_frontend(struct dvb_frontend *fe)
static int lg216x_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct lg216x_state *state = fe->demodulator_priv;
int ret;
lg_dbg("\n");
fe->dtv_property_cache.modulation = VSB_8;
fe->dtv_property_cache.frequency = state->current_frequency;
fe->dtv_property_cache.delivery_system = SYS_ATSCMH;
c->modulation = VSB_8;
c->frequency = state->current_frequency;
c->delivery_system = SYS_ATSCMH;
ret = lg216x_get_fic_version(state,
&fe->dtv_property_cache.atscmh_fic_ver);
&c->atscmh_fic_ver);
if (lg_fail(ret))
goto fail;
if (state->fic_ver != fe->dtv_property_cache.atscmh_fic_ver) {
state->fic_ver = fe->dtv_property_cache.atscmh_fic_ver;
if (state->fic_ver != c->atscmh_fic_ver) {
state->fic_ver = c->atscmh_fic_ver;
#if 0
ret = lg2160_get_parade_id(state,
&fe->dtv_property_cache.atscmh_parade_id);
&c->atscmh_parade_id);
if (lg_fail(ret))
goto fail;
/* #else */
fe->dtv_property_cache.atscmh_parade_id = state->parade_id;
c->atscmh_parade_id = state->parade_id;
#endif
ret = lg216x_get_nog(state,
&fe->dtv_property_cache.atscmh_nog);
&c->atscmh_nog);
if (lg_fail(ret))
goto fail;
ret = lg216x_get_tnog(state,
&fe->dtv_property_cache.atscmh_tnog);
&c->atscmh_tnog);
if (lg_fail(ret))
goto fail;
ret = lg216x_get_sgn(state,
&fe->dtv_property_cache.atscmh_sgn);
&c->atscmh_sgn);
if (lg_fail(ret))
goto fail;
ret = lg216x_get_prc(state,
&fe->dtv_property_cache.atscmh_prc);
&c->atscmh_prc);
if (lg_fail(ret))
goto fail;
ret = lg216x_get_rs_frame_mode(state,
(enum atscmh_rs_frame_mode *)
&fe->dtv_property_cache.atscmh_rs_frame_mode);
&c->atscmh_rs_frame_mode);
if (lg_fail(ret))
goto fail;
ret = lg216x_get_rs_frame_ensemble(state,
(enum atscmh_rs_frame_ensemble *)
&fe->dtv_property_cache.atscmh_rs_frame_ensemble);
&c->atscmh_rs_frame_ensemble);
if (lg_fail(ret))
goto fail;
ret = lg216x_get_rs_code_mode(state,
(enum atscmh_rs_code_mode *)
&fe->dtv_property_cache.atscmh_rs_code_mode_pri,
&c->atscmh_rs_code_mode_pri,
(enum atscmh_rs_code_mode *)
&fe->dtv_property_cache.atscmh_rs_code_mode_sec);
&c->atscmh_rs_code_mode_sec);
if (lg_fail(ret))
goto fail;
ret = lg216x_get_sccc_block_mode(state,
(enum atscmh_sccc_block_mode *)
&fe->dtv_property_cache.atscmh_sccc_block_mode);
&c->atscmh_sccc_block_mode);
if (lg_fail(ret))
goto fail;
ret = lg216x_get_sccc_code_mode(state,
(enum atscmh_sccc_code_mode *)
&fe->dtv_property_cache.atscmh_sccc_code_mode_a,
&c->atscmh_sccc_code_mode_a,
(enum atscmh_sccc_code_mode *)
&fe->dtv_property_cache.atscmh_sccc_code_mode_b,
&c->atscmh_sccc_code_mode_b,
(enum atscmh_sccc_code_mode *)
&fe->dtv_property_cache.atscmh_sccc_code_mode_c,
&c->atscmh_sccc_code_mode_c,
(enum atscmh_sccc_code_mode *)
&fe->dtv_property_cache.atscmh_sccc_code_mode_d);
&c->atscmh_sccc_code_mode_d);
if (lg_fail(ret))
goto fail;
}
#if 0
ret = lg216x_read_fic_err_count(state,
(u8 *)&fe->dtv_property_cache.atscmh_fic_err);
(u8 *)&c->atscmh_fic_err);
if (lg_fail(ret))
goto fail;
ret = lg216x_read_crc_err_count(state,
&fe->dtv_property_cache.atscmh_crc_err);
&c->atscmh_crc_err);
if (lg_fail(ret))
goto fail;
ret = lg216x_read_rs_err_count(state,
&fe->dtv_property_cache.atscmh_rs_err);
&c->atscmh_rs_err);
if (lg_fail(ret))
goto fail;
switch (state->cfg->lg_chip) {
case LG2160:
if (((fe->dtv_property_cache.atscmh_rs_err >= 240) &&
(fe->dtv_property_cache.atscmh_crc_err >= 240)) &&
if (((c->atscmh_rs_err >= 240) &&
(c->atscmh_crc_err >= 240)) &&
((jiffies_to_msecs(jiffies) - state->last_reset) > 6000))
ret = lg216x_soft_reset(state);
break;
@ -1054,14 +1055,17 @@ fail:
static int lg216x_get_property(struct dvb_frontend *fe,
struct dtv_property *tvp)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
return (DTV_ATSCMH_FIC_VER == tvp->cmd) ?
lg216x_get_frontend(fe) : 0;
lg216x_get_frontend(fe, c) : 0;
}
static int lg2160_set_frontend(struct dvb_frontend *fe)
{
struct lg216x_state *state = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
lg_dbg("(%d)\n", fe->dtv_property_cache.frequency);
@ -1129,7 +1133,7 @@ static int lg2160_set_frontend(struct dvb_frontend *fe)
ret = lg216x_enable_fic(state, 1);
lg_fail(ret);
lg216x_get_frontend(fe);
lg216x_get_frontend(fe, c);
fail:
return ret;
}

View File

@ -812,9 +812,9 @@ fail:
return ret;
}
static int lgdt3305_get_frontend(struct dvb_frontend *fe)
static int lgdt3305_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct lgdt3305_state *state = fe->demodulator_priv;
lg_dbg("\n");

View File

@ -1040,10 +1040,10 @@ fail:
return ret;
}
static int lgdt3306a_get_frontend(struct dvb_frontend *fe)
static int lgdt3306a_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct lgdt3306a_state *state = fe->demodulator_priv;
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
dbg_info("(%u, %d)\n",
state->current_frequency, state->current_modulation);

View File

@ -439,10 +439,11 @@ static int lgdt330x_set_parameters(struct dvb_frontend *fe)
return 0;
}
static int lgdt330x_get_frontend(struct dvb_frontend *fe)
static int lgdt330x_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct lgdt330x_state *state = fe->demodulator_priv;
p->frequency = state->current_frequency;
return 0;
}

View File

@ -336,10 +336,11 @@ lgs8gl5_set_frontend(struct dvb_frontend *fe)
static int
lgs8gl5_get_frontend(struct dvb_frontend *fe)
lgs8gl5_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct lgs8gl5_state *state = fe->demodulator_priv;
u8 inv = lgs8gl5_read_reg(state, REG_INVERSION);
p->inversion = (inv & REG_INVERSION_ON) ? INVERSION_ON : INVERSION_OFF;

View File

@ -672,7 +672,7 @@ static int lgs8gxx_write(struct dvb_frontend *fe, const u8 buf[], int len)
static int lgs8gxx_set_fe(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
struct lgs8gxx_state *priv = fe->demodulator_priv;
dprintk("%s\n", __func__);
@ -689,17 +689,7 @@ static int lgs8gxx_set_fe(struct dvb_frontend *fe)
msleep(10);
return 0;
}
static int lgs8gxx_get_fe(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
dprintk("%s\n", __func__);
/* TODO: get real readings from device */
/* inversion status */
fe_params->inversion = INVERSION_OFF;
/* bandwidth */
fe_params->bandwidth_hz = 8000000;
@ -1016,7 +1006,6 @@ static struct dvb_frontend_ops lgs8gxx_ops = {
.i2c_gate_ctrl = lgs8gxx_i2c_gate_ctrl,
.set_frontend = lgs8gxx_set_fe,
.get_frontend = lgs8gxx_get_fe,
.get_tune_settings = lgs8gxx_get_tune_settings,
.read_status = lgs8gxx_read_status,

View File

@ -791,11 +791,11 @@ err:
return ret;
}
static int m88ds3103_get_frontend(struct dvb_frontend *fe)
static int m88ds3103_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct m88ds3103_dev *dev = fe->demodulator_priv;
struct i2c_client *client = dev->client;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u8 buf[3];

View File

@ -708,10 +708,11 @@ static int m88rs2000_set_frontend(struct dvb_frontend *fe)
return 0;
}
static int m88rs2000_get_frontend(struct dvb_frontend *fe)
static int m88rs2000_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct m88rs2000_state *state = fe->demodulator_priv;
c->fec_inner = state->fec_inner;
c->frequency = state->tuner_frequency;
c->symbol_rate = state->symbol_rate;

View File

@ -2028,16 +2028,6 @@ static int mb86a20s_read_signal_strength_from_cache(struct dvb_frontend *fe,
return 0;
}
static int mb86a20s_get_frontend_dummy(struct dvb_frontend *fe)
{
/*
* get_frontend is now handled together with other stats
* retrival, when read_status() is called, as some statistics
* will depend on the layers detection.
*/
return 0;
};
static int mb86a20s_tune(struct dvb_frontend *fe,
bool re_tune,
unsigned int mode_flags,
@ -2136,7 +2126,6 @@ static struct dvb_frontend_ops mb86a20s_ops = {
.init = mb86a20s_initfe,
.set_frontend = mb86a20s_set_frontend,
.get_frontend = mb86a20s_get_frontend_dummy,
.read_status = mb86a20s_read_status_and_stats,
.read_signal_strength = mb86a20s_read_signal_strength_from_cache,
.tune = mb86a20s_tune,

View File

@ -29,21 +29,17 @@ static int mn88473_set_frontend(struct dvb_frontend *fe)
struct mn88473_dev *dev = i2c_get_clientdata(client);
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret, i;
unsigned int uitmp;
u32 if_frequency;
u64 tmp;
u8 delivery_system_val, if_val[3], bw_val[7];
u8 delivery_system_val, if_val[3], *conf_val_ptr;
u8 reg_bank2_2d_val, reg_bank0_d2_val;
dev_dbg(&client->dev,
"delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
c->delivery_system,
c->modulation,
c->frequency,
c->bandwidth_hz,
c->symbol_rate,
c->inversion,
c->stream_id);
c->delivery_system, c->modulation, c->frequency,
c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
if (!dev->warm) {
if (!dev->active) {
ret = -EAGAIN;
goto err;
}
@ -51,30 +47,50 @@ static int mn88473_set_frontend(struct dvb_frontend *fe)
switch (c->delivery_system) {
case SYS_DVBT:
delivery_system_val = 0x02;
reg_bank2_2d_val = 0x23;
reg_bank0_d2_val = 0x2a;
break;
case SYS_DVBT2:
delivery_system_val = 0x03;
reg_bank2_2d_val = 0x3b;
reg_bank0_d2_val = 0x29;
break;
case SYS_DVBC_ANNEX_A:
delivery_system_val = 0x04;
reg_bank2_2d_val = 0x3b;
reg_bank0_d2_val = 0x29;
break;
default:
ret = -EINVAL;
goto err;
}
if (c->bandwidth_hz <= 6000000) {
memcpy(bw_val, "\xe9\x55\x55\x1c\x29\x1c\x29", 7);
} else if (c->bandwidth_hz <= 7000000) {
memcpy(bw_val, "\xc8\x00\x00\x17\x0a\x17\x0a", 7);
} else if (c->bandwidth_hz <= 8000000) {
memcpy(bw_val, "\xaf\x00\x00\x11\xec\x11\xec", 7);
} else {
ret = -EINVAL;
goto err;
switch (c->delivery_system) {
case SYS_DVBT:
case SYS_DVBT2:
switch (c->bandwidth_hz) {
case 6000000:
conf_val_ptr = "\xe9\x55\x55\x1c\x29\x1c\x29";
break;
case 7000000:
conf_val_ptr = "\xc8\x00\x00\x17\x0a\x17\x0a";
break;
case 8000000:
conf_val_ptr = "\xaf\x00\x00\x11\xec\x11\xec";
break;
default:
ret = -EINVAL;
goto err;
}
break;
case SYS_DVBC_ANNEX_A:
conf_val_ptr = "\x10\xab\x0d\xae\x1d\x9d";
break;
default:
break;
}
/* program tuner */
/* Program tuner */
if (fe->ops.tuner_ops.set_params) {
ret = fe->ops.tuner_ops.set_params(fe);
if (ret)
@ -86,27 +102,45 @@ static int mn88473_set_frontend(struct dvb_frontend *fe)
if (ret)
goto err;
dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency);
dev_dbg(&client->dev, "get_if_frequency=%u\n", if_frequency);
} else {
if_frequency = 0;
ret = -EINVAL;
goto err;
}
/* Calculate IF registers ( (1<<24)*IF / Xtal ) */
tmp = div_u64(if_frequency * (u64)(1<<24) + (dev->xtal / 2),
dev->xtal);
if_val[0] = ((tmp >> 16) & 0xff);
if_val[1] = ((tmp >> 8) & 0xff);
if_val[2] = ((tmp >> 0) & 0xff);
/* Calculate IF registers */
uitmp = DIV_ROUND_CLOSEST_ULL((u64) if_frequency * 0x1000000, dev->clk);
if_val[0] = (uitmp >> 16) & 0xff;
if_val[1] = (uitmp >> 8) & 0xff;
if_val[2] = (uitmp >> 0) & 0xff;
ret = regmap_write(dev->regmap[2], 0x05, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0xfb, 0x13);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0xef, 0x13);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0xf9, 0x13);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0x00, 0x18);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0x01, 0x01);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0x02, 0x21);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
if (ret)
goto err;
for (i = 0; i < sizeof(if_val); i++) {
ret = regmap_write(dev->regmap[2], 0x10 + i, if_val[i]);
@ -114,52 +148,85 @@ static int mn88473_set_frontend(struct dvb_frontend *fe)
goto err;
}
for (i = 0; i < sizeof(bw_val); i++) {
ret = regmap_write(dev->regmap[2], 0x13 + i, bw_val[i]);
switch (c->delivery_system) {
case SYS_DVBT:
case SYS_DVBT2:
for (i = 0; i < 7; i++) {
ret = regmap_write(dev->regmap[2], 0x13 + i,
conf_val_ptr[i]);
if (ret)
goto err;
}
break;
case SYS_DVBC_ANNEX_A:
ret = regmap_bulk_write(dev->regmap[1], 0x10, conf_val_ptr, 6);
if (ret)
goto err;
break;
default:
break;
}
ret = regmap_write(dev->regmap[2], 0x2d, 0x3b);
ret = regmap_write(dev->regmap[2], 0x2d, reg_bank2_2d_val);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0x2e, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0x56, 0x0d);
ret = regmap_write(dev->regmap[0], 0x01, 0xba);
ret = regmap_write(dev->regmap[0], 0x02, 0x13);
ret = regmap_write(dev->regmap[0], 0x03, 0x80);
ret = regmap_write(dev->regmap[0], 0x04, 0xba);
ret = regmap_write(dev->regmap[0], 0x05, 0x91);
ret = regmap_write(dev->regmap[0], 0x07, 0xe7);
ret = regmap_write(dev->regmap[0], 0x08, 0x28);
if (ret)
goto err;
ret = regmap_bulk_write(dev->regmap[0], 0x01,
"\xba\x13\x80\xba\x91\xdd\xe7\x28", 8);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0x0a, 0x1a);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0x13, 0x1f);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0x19, 0x03);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0x1d, 0xb0);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0x2a, 0x72);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0x2d, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0x3c, 0x00);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0x3f, 0xf8);
ret = regmap_write(dev->regmap[0], 0x40, 0xf4);
ret = regmap_write(dev->regmap[0], 0x41, 0x08);
ret = regmap_write(dev->regmap[0], 0xd2, 0x29);
if (ret)
goto err;
ret = regmap_bulk_write(dev->regmap[0], 0x40, "\xf4\x08", 2);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0xd2, reg_bank0_d2_val);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0xd4, 0x55);
ret = regmap_write(dev->regmap[1], 0x10, 0x10);
ret = regmap_write(dev->regmap[1], 0x11, 0xab);
ret = regmap_write(dev->regmap[1], 0x12, 0x0d);
ret = regmap_write(dev->regmap[1], 0x13, 0xae);
ret = regmap_write(dev->regmap[1], 0x14, 0x1d);
ret = regmap_write(dev->regmap[1], 0x15, 0x9d);
if (ret)
goto err;
ret = regmap_write(dev->regmap[1], 0xbe, 0x08);
ret = regmap_write(dev->regmap[2], 0x09, 0x08);
ret = regmap_write(dev->regmap[2], 0x08, 0x1d);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0xb2, 0x37);
if (ret)
goto err;
ret = regmap_write(dev->regmap[0], 0xd7, 0x04);
ret = regmap_write(dev->regmap[2], 0x32, 0x80);
ret = regmap_write(dev->regmap[2], 0x36, 0x00);
ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
if (ret)
goto err;
dev->delivery_system = c->delivery_system;
/* Reset FSM */
ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
if (ret)
goto err;
return 0;
err:
@ -173,51 +240,61 @@ static int mn88473_read_status(struct dvb_frontend *fe, enum fe_status *status)
struct mn88473_dev *dev = i2c_get_clientdata(client);
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
unsigned int utmp;
int lock = 0;
unsigned int uitmp;
*status = 0;
if (!dev->warm) {
if (!dev->active) {
ret = -EAGAIN;
goto err;
}
*status = 0;
switch (c->delivery_system) {
case SYS_DVBT:
ret = regmap_read(dev->regmap[0], 0x62, &utmp);
ret = regmap_read(dev->regmap[0], 0x62, &uitmp);
if (ret)
goto err;
if (!(utmp & 0xA0)) {
if ((utmp & 0xF) >= 0x03)
*status |= FE_HAS_SIGNAL;
if ((utmp & 0xF) >= 0x09)
lock = 1;
if (!(uitmp & 0xa0)) {
if ((uitmp & 0x0f) >= 0x09)
*status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
FE_HAS_VITERBI | FE_HAS_SYNC |
FE_HAS_LOCK;
else if ((uitmp & 0x0f) >= 0x03)
*status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
}
break;
case SYS_DVBT2:
ret = regmap_read(dev->regmap[2], 0x8B, &utmp);
ret = regmap_read(dev->regmap[2], 0x8b, &uitmp);
if (ret)
goto err;
if (!(utmp & 0x40)) {
if ((utmp & 0xF) >= 0x07)
*status |= FE_HAS_SIGNAL;
if ((utmp & 0xF) >= 0x0a)
*status |= FE_HAS_CARRIER;
if ((utmp & 0xF) >= 0x0d)
*status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
if (!(uitmp & 0x40)) {
if ((uitmp & 0x0f) >= 0x0d)
*status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
FE_HAS_VITERBI | FE_HAS_SYNC |
FE_HAS_LOCK;
else if ((uitmp & 0x0f) >= 0x0a)
*status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
FE_HAS_VITERBI;
else if ((uitmp & 0x0f) >= 0x07)
*status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
}
break;
case SYS_DVBC_ANNEX_A:
ret = regmap_read(dev->regmap[1], 0x85, &utmp);
ret = regmap_read(dev->regmap[1], 0x85, &uitmp);
if (ret)
goto err;
if (!(utmp & 0x40)) {
ret = regmap_read(dev->regmap[1], 0x89, &utmp);
if (!(uitmp & 0x40)) {
ret = regmap_read(dev->regmap[1], 0x89, &uitmp);
if (ret)
goto err;
if (utmp & 0x01)
lock = 1;
if (uitmp & 0x01)
*status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
FE_HAS_VITERBI | FE_HAS_SYNC |
FE_HAS_LOCK;
}
break;
default:
@ -225,10 +302,6 @@ static int mn88473_read_status(struct dvb_frontend *fe, enum fe_status *status)
goto err;
}
if (lock)
*status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
FE_HAS_SYNC | FE_HAS_LOCK;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
@ -239,85 +312,76 @@ static int mn88473_init(struct dvb_frontend *fe)
{
struct i2c_client *client = fe->demodulator_priv;
struct mn88473_dev *dev = i2c_get_clientdata(client);
int ret, len, remaining;
const struct firmware *fw = NULL;
u8 *fw_file = MN88473_FIRMWARE;
unsigned int tmp;
int ret, len, remain;
unsigned int uitmp;
const struct firmware *fw;
const char *name = MN88473_FIRMWARE;
dev_dbg(&client->dev, "\n");
/* set cold state by default */
dev->warm = false;
/* check if firmware is already running */
ret = regmap_read(dev->regmap[0], 0xf5, &tmp);
/* Check if firmware is already running */
ret = regmap_read(dev->regmap[0], 0xf5, &uitmp);
if (ret)
goto err;
if (!(tmp & 0x1)) {
dev_info(&client->dev, "firmware already running\n");
dev->warm = true;
return 0;
}
if (!(uitmp & 0x01))
goto warm;
/* request the firmware, this will block and timeout */
ret = request_firmware(&fw, fw_file, &client->dev);
/* Request the firmware, this will block and timeout */
ret = request_firmware(&fw, name, &client->dev);
if (ret) {
dev_err(&client->dev, "firmare file '%s' not found\n", fw_file);
goto err_request_firmware;
dev_err(&client->dev, "firmare file '%s' not found\n", name);
goto err;
}
dev_info(&client->dev, "downloading firmware from file '%s'\n",
fw_file);
dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
if (ret)
goto err;
for (remaining = fw->size; remaining > 0;
remaining -= (dev->i2c_wr_max - 1)) {
len = remaining;
if (len > (dev->i2c_wr_max - 1))
len = dev->i2c_wr_max - 1;
goto err_release_firmware;
for (remain = fw->size; remain > 0; remain -= (dev->i2c_wr_max - 1)) {
len = min(dev->i2c_wr_max - 1, remain);
ret = regmap_bulk_write(dev->regmap[0], 0xf6,
&fw->data[fw->size - remaining], len);
&fw->data[fw->size - remain], len);
if (ret) {
dev_err(&client->dev, "firmware download failed=%d\n",
dev_err(&client->dev, "firmware download failed %d\n",
ret);
goto err;
goto err_release_firmware;
}
}
/* parity check of firmware */
ret = regmap_read(dev->regmap[0], 0xf8, &tmp);
if (ret) {
dev_err(&client->dev,
"parity reg read failed=%d\n", ret);
release_firmware(fw);
/* Parity check of firmware */
ret = regmap_read(dev->regmap[0], 0xf8, &uitmp);
if (ret)
goto err;
if (uitmp & 0x10) {
dev_err(&client->dev, "firmware parity check failed\n");
ret = -EINVAL;
goto err;
}
if (tmp & 0x10) {
dev_err(&client->dev,
"firmware parity check failed=0x%x\n", tmp);
goto err;
}
dev_err(&client->dev, "firmware parity check succeeded=0x%x\n", tmp);
ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
if (ret)
goto err;
warm:
/* TS config */
ret = regmap_write(dev->regmap[2], 0x09, 0x08);
if (ret)
goto err;
ret = regmap_write(dev->regmap[2], 0x08, 0x1d);
if (ret)
goto err;
release_firmware(fw);
fw = NULL;
/* warm state */
dev->warm = true;
dev->active = true;
return 0;
err:
err_release_firmware:
release_firmware(fw);
err_request_firmware:
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
@ -330,20 +394,20 @@ static int mn88473_sleep(struct dvb_frontend *fe)
dev_dbg(&client->dev, "\n");
dev->active = false;
ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
if (ret)
goto err;
dev->delivery_system = SYS_UNDEFINED;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static struct dvb_frontend_ops mn88473_ops = {
.delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_AC},
static const struct dvb_frontend_ops mn88473_ops = {
.delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
.info = {
.name = "Panasonic MN88473",
.symbol_rate_min = 1000000,
@ -365,8 +429,7 @@ static struct dvb_frontend_ops mn88473_ops = {
FE_CAN_GUARD_INTERVAL_AUTO |
FE_CAN_HIERARCHY_AUTO |
FE_CAN_MUTE_TS |
FE_CAN_2G_MODULATION |
FE_CAN_MULTISTREAM
FE_CAN_2G_MODULATION
},
.get_tune_settings = mn88473_get_tune_settings,
@ -385,7 +448,7 @@ static int mn88473_probe(struct i2c_client *client,
struct mn88473_config *config = client->dev.platform_data;
struct mn88473_dev *dev;
int ret;
unsigned int utmp;
unsigned int uitmp;
static const struct regmap_config regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@ -393,7 +456,7 @@ static int mn88473_probe(struct i2c_client *client,
dev_dbg(&client->dev, "\n");
/* Caller really need to provide pointer for frontend we create. */
/* Caller really need to provide pointer for frontend we create */
if (config->fe == NULL) {
dev_err(&client->dev, "frontend pointer not defined\n");
ret = -EINVAL;
@ -406,11 +469,15 @@ static int mn88473_probe(struct i2c_client *client,
goto err;
}
dev->i2c_wr_max = config->i2c_wr_max;
if (!config->xtal)
dev->xtal = 25000000;
if (config->i2c_wr_max)
dev->i2c_wr_max = config->i2c_wr_max;
else
dev->xtal = config->xtal;
dev->i2c_wr_max = ~0;
if (config->xtal)
dev->clk = config->xtal;
else
dev->clk = 25000000;
dev->client[0] = client;
dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config);
if (IS_ERR(dev->regmap[0])) {
@ -418,15 +485,25 @@ static int mn88473_probe(struct i2c_client *client,
goto err_kfree;
}
/* check demod answers to I2C */
ret = regmap_read(dev->regmap[0], 0x00, &utmp);
/* Check demod answers with correct chip id */
ret = regmap_read(dev->regmap[0], 0xff, &uitmp);
if (ret)
goto err_regmap_0_regmap_exit;
dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
if (uitmp != 0x03) {
ret = -ENODEV;
goto err_regmap_0_regmap_exit;
}
/*
* Chip has three I2C addresses for different register pages. Used
* Chip has three I2C addresses for different register banks. Used
* addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
* 0x1a and 0x1c, in order to get own I2C client for each register page.
* 0x1a and 0x1c, in order to get own I2C client for each register bank.
*
* Also, register bank 2 do not support sequential I/O. Only single
* register write or read is allowed to that bank.
*/
dev->client[1] = i2c_new_dummy(client->adapter, 0x1a);
if (dev->client[1] == NULL) {
@ -456,13 +533,19 @@ static int mn88473_probe(struct i2c_client *client,
}
i2c_set_clientdata(dev->client[2], dev);
/* create dvb_frontend */
memcpy(&dev->fe.ops, &mn88473_ops, sizeof(struct dvb_frontend_ops));
dev->fe.demodulator_priv = client;
*config->fe = &dev->fe;
/* Sleep because chip is active by default */
ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
if (ret)
goto err_client_2_i2c_unregister_device;
/* Create dvb frontend */
memcpy(&dev->frontend.ops, &mn88473_ops, sizeof(dev->frontend.ops));
dev->frontend.demodulator_priv = client;
*config->fe = &dev->frontend;
i2c_set_clientdata(client, dev);
dev_info(&dev->client[0]->dev, "Panasonic MN88473 successfully attached\n");
dev_info(&client->dev, "Panasonic MN88473 successfully identified\n");
return 0;
err_client_2_i2c_unregister_device:
@ -507,7 +590,8 @@ MODULE_DEVICE_TABLE(i2c, mn88473_id_table);
static struct i2c_driver mn88473_driver = {
.driver = {
.name = "mn88473",
.name = "mn88473",
.suppress_bind_attrs = true,
},
.probe = mn88473_probe,
.remove = mn88473_remove,

View File

@ -22,10 +22,16 @@
struct mn88473_config {
/*
* Max num of bytes given I2C adapter could write at once.
* Default: none
* Default: unlimited
*/
u16 i2c_wr_max;
/*
* Xtal frequency Hz.
* Default: 25000000
*/
u32 xtal;
/* Everything after that is returned by the driver. */
@ -33,12 +39,6 @@ struct mn88473_config {
* DVB frontend.
*/
struct dvb_frontend **fe;
/*
* Xtal frequency.
* Hz
*/
u32 xtal;
};
#endif

View File

@ -27,11 +27,10 @@
struct mn88473_dev {
struct i2c_client *client[3];
struct regmap *regmap[3];
struct dvb_frontend fe;
struct dvb_frontend frontend;
u16 i2c_wr_max;
enum fe_delivery_system delivery_system;
bool warm; /* FW running */
u32 xtal;
bool active;
u32 clk;
};
#endif

View File

@ -647,9 +647,9 @@ static int mt312_set_frontend(struct dvb_frontend *fe)
return 0;
}
static int mt312_get_frontend(struct dvb_frontend *fe)
static int mt312_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct mt312_state *state = fe->demodulator_priv;
int ret;

View File

@ -311,9 +311,9 @@ static int mt352_set_parameters(struct dvb_frontend *fe)
return 0;
}
static int mt352_get_parameters(struct dvb_frontend* fe)
static int mt352_get_parameters(struct dvb_frontend* fe,
struct dtv_frontend_properties *op)
{
struct dtv_frontend_properties *op = &fe->dtv_property_cache;
struct mt352_state* state = fe->demodulator_priv;
u16 tps;
u16 div;

View File

@ -375,9 +375,9 @@ static int or51132_set_parameters(struct dvb_frontend *fe)
return 0;
}
static int or51132_get_parameters(struct dvb_frontend* fe)
static int or51132_get_parameters(struct dvb_frontend* fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct or51132_state* state = fe->demodulator_priv;
int status;
int retry = 1;

View File

@ -279,11 +279,11 @@ err:
return ret;
}
static int rtl2830_get_frontend(struct dvb_frontend *fe)
static int rtl2830_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct i2c_client *client = fe->demodulator_priv;
struct rtl2830_dev *dev = i2c_get_clientdata(client);
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u8 buf[3];
@ -900,6 +900,9 @@ static int rtl2830_remove(struct i2c_client *client)
dev_dbg(&client->dev, "\n");
/* stop statistics polling */
cancel_delayed_work_sync(&dev->stat_work);
i2c_del_mux_adapter(dev->adapter);
regmap_exit(dev->regmap);
kfree(dev);

View File

@ -347,6 +347,10 @@ static int rtl2832_init(struct dvb_frontend *fe)
dev_dbg(&client->dev, "\n");
ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
if (ret)
goto err;
for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {
ret = rtl2832_wr_demod_reg(dev, rtl2832_initial_regs[i].reg,
rtl2832_initial_regs[i].value);
@ -404,8 +408,6 @@ static int rtl2832_init(struct dvb_frontend *fe)
c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
c->post_bit_count.len = 1;
c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
/* start statistics polling */
schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
dev->sleeping = false;
return 0;
@ -423,8 +425,6 @@ static int rtl2832_sleep(struct dvb_frontend *fe)
dev_dbg(&client->dev, "\n");
dev->sleeping = true;
/* stop statistics polling */
cancel_delayed_work_sync(&dev->stat_work);
dev->fe_status = 0;
ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
@ -491,11 +491,6 @@ static int rtl2832_set_frontend(struct dvb_frontend *fe)
if (fe->ops.tuner_ops.set_params)
fe->ops.tuner_ops.set_params(fe);
/* PIP mode related */
ret = rtl2832_bulk_write(client, 0x192, "\x00\x0f\xff", 3);
if (ret)
goto err;
/* If the frontend has get_if_frequency(), use it */
if (fe->ops.tuner_ops.get_if_frequency) {
u32 if_freq;
@ -575,11 +570,11 @@ err:
return ret;
}
static int rtl2832_get_frontend(struct dvb_frontend *fe)
static int rtl2832_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *c)
{
struct rtl2832_dev *dev = fe->demodulator_priv;
struct i2c_client *client = dev->client;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u8 buf[3];
@ -692,8 +687,11 @@ static int rtl2832_read_status(struct dvb_frontend *fe, enum fe_status *status)
{
struct rtl2832_dev *dev = fe->demodulator_priv;
struct i2c_client *client = dev->client;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret;
u32 uninitialized_var(tmp);
u8 u8tmp, buf[2];
u16 u16tmp;
dev_dbg(&client->dev, "\n");
@ -714,45 +712,6 @@ static int rtl2832_read_status(struct dvb_frontend *fe, enum fe_status *status)
}
dev->fe_status = *status;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int rtl2832_read_snr(struct dvb_frontend *fe, u16 *snr)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
/* report SNR in resolution of 0.1 dB */
if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
*snr = div_s64(c->cnr.stat[0].svalue, 100);
else
*snr = 0;
return 0;
}
static int rtl2832_read_ber(struct dvb_frontend *fe, u32 *ber)
{
struct rtl2832_dev *dev = fe->demodulator_priv;
*ber = (dev->post_bit_error - dev->post_bit_error_prev);
dev->post_bit_error_prev = dev->post_bit_error;
return 0;
}
static void rtl2832_stat_work(struct work_struct *work)
{
struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, stat_work.work);
struct i2c_client *client = dev->client;
struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
int ret, tmp;
u8 u8tmp, buf[2];
u16 u16tmp;
dev_dbg(&client->dev, "\n");
/* signal strength */
if (dev->fe_status & FE_HAS_SIGNAL) {
@ -789,11 +748,11 @@ static void rtl2832_stat_work(struct work_struct *work)
constellation = (u8tmp >> 2) & 0x03; /* [3:2] */
if (constellation > CONSTELLATION_NUM - 1)
goto err_schedule_delayed_work;
goto err;
hierarchy = (u8tmp >> 4) & 0x07; /* [6:4] */
if (hierarchy > HIERARCHY_NUM - 1)
goto err_schedule_delayed_work;
goto err;
ret = rtl2832_bulk_read(client, 0x40c, buf, 2);
if (ret)
@ -835,11 +794,33 @@ static void rtl2832_stat_work(struct work_struct *work)
c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
}
err_schedule_delayed_work:
schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
return;
return 0;
err:
dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int rtl2832_read_snr(struct dvb_frontend *fe, u16 *snr)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
/* report SNR in resolution of 0.1 dB */
if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
*snr = div_s64(c->cnr.stat[0].svalue, 100);
else
*snr = 0;
return 0;
}
static int rtl2832_read_ber(struct dvb_frontend *fe, u32 *ber)
{
struct rtl2832_dev *dev = fe->demodulator_priv;
*ber = (dev->post_bit_error - dev->post_bit_error_prev);
dev->post_bit_error_prev = dev->post_bit_error;
return 0;
}
/*
@ -1081,37 +1062,46 @@ static struct i2c_adapter *rtl2832_get_i2c_adapter(struct i2c_client *client)
return dev->i2c_adapter_tuner;
}
static int rtl2832_enable_slave_ts(struct i2c_client *client)
static int rtl2832_slave_ts_ctrl(struct i2c_client *client, bool enable)
{
struct rtl2832_dev *dev = i2c_get_clientdata(client);
int ret;
dev_dbg(&client->dev, "\n");
dev_dbg(&client->dev, "enable=%d\n", enable);
ret = rtl2832_bulk_write(client, 0x10c, "\x5f\xff", 2);
if (ret)
goto err;
ret = rtl2832_wr_demod_reg(dev, DVBT_PIP_ON, 0x1);
if (ret)
goto err;
ret = rtl2832_bulk_write(client, 0x0bc, "\x18", 1);
if (ret)
goto err;
ret = rtl2832_bulk_write(client, 0x192, "\x7f\xf7\xff", 3);
if (ret)
goto err;
/* soft reset */
ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
if (ret)
goto err;
ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
if (ret)
goto err;
if (enable) {
ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
if (ret)
goto err;
ret = rtl2832_bulk_write(client, 0x10c, "\x5f\xff", 2);
if (ret)
goto err;
ret = rtl2832_wr_demod_reg(dev, DVBT_PIP_ON, 0x1);
if (ret)
goto err;
ret = rtl2832_bulk_write(client, 0x0bc, "\x18", 1);
if (ret)
goto err;
ret = rtl2832_bulk_write(client, 0x192, "\x7f\xf7\xff", 3);
if (ret)
goto err;
} else {
ret = rtl2832_bulk_write(client, 0x192, "\x00\x0f\xff", 3);
if (ret)
goto err;
ret = rtl2832_bulk_write(client, 0x0bc, "\x08", 1);
if (ret)
goto err;
ret = rtl2832_wr_demod_reg(dev, DVBT_PIP_ON, 0x0);
if (ret)
goto err;
ret = rtl2832_bulk_write(client, 0x10c, "\x00\x00", 2);
if (ret)
goto err;
ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
if (ret)
goto err;
}
return 0;
err:
@ -1227,7 +1217,6 @@ static int rtl2832_probe(struct i2c_client *client,
dev->pdata = client->dev.platform_data;
dev->sleeping = true;
INIT_DELAYED_WORK(&dev->i2c_gate_work, rtl2832_i2c_gate_work);
INIT_DELAYED_WORK(&dev->stat_work, rtl2832_stat_work);
/* create regmap */
mutex_init(&dev->regmap_mutex);
dev->regmap_config.reg_bits = 8,
@ -1267,7 +1256,7 @@ static int rtl2832_probe(struct i2c_client *client,
/* setup callbacks */
pdata->get_dvb_frontend = rtl2832_get_dvb_frontend;
pdata->get_i2c_adapter = rtl2832_get_i2c_adapter;
pdata->enable_slave_ts = rtl2832_enable_slave_ts;
pdata->slave_ts_ctrl = rtl2832_slave_ts_ctrl;
pdata->pid_filter = rtl2832_pid_filter;
pdata->pid_filter_ctrl = rtl2832_pid_filter_ctrl;
pdata->bulk_read = rtl2832_bulk_read;

View File

@ -31,7 +31,7 @@
* @tuner: Used tuner model.
* @get_dvb_frontend: Get DVB frontend.
* @get_i2c_adapter: Get I2C adapter.
* @enable_slave_ts: Enable slave TS IF.
* @slave_ts_ctrl: Control slave TS interface.
* @pid_filter: Set PID to PID filter.
* @pid_filter_ctrl: Control PID filter.
*/
@ -53,7 +53,7 @@ struct rtl2832_platform_data {
struct dvb_frontend* (*get_dvb_frontend)(struct i2c_client *);
struct i2c_adapter* (*get_i2c_adapter)(struct i2c_client *);
int (*enable_slave_ts)(struct i2c_client *);
int (*slave_ts_ctrl)(struct i2c_client *, bool);
int (*pid_filter)(struct dvb_frontend *, u8, u16, int);
int (*pid_filter_ctrl)(struct dvb_frontend *, int);
/* private: Register access for SDR module use only */

View File

@ -38,7 +38,6 @@ struct rtl2832_dev {
struct regmap *regmap;
struct i2c_adapter *i2c_adapter_tuner;
struct dvb_frontend fe;
struct delayed_work stat_work;
enum fe_status fe_status;
u64 post_bit_error_prev; /* for old DVBv3 read_ber() calculation */
u64 post_bit_error;

View File

@ -925,9 +925,9 @@ static int s5h1409_read_ber(struct dvb_frontend *fe, u32 *ber)
return s5h1409_read_ucblocks(fe, ber);
}
static int s5h1409_get_frontend(struct dvb_frontend *fe)
static int s5h1409_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct s5h1409_state *state = fe->demodulator_priv;
p->frequency = state->current_frequency;

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@ -840,9 +840,9 @@ static int s5h1411_read_ber(struct dvb_frontend *fe, u32 *ber)
return s5h1411_read_ucblocks(fe, ber);
}
static int s5h1411_get_frontend(struct dvb_frontend *fe)
static int s5h1411_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct s5h1411_state *state = fe->demodulator_priv;
p->frequency = state->current_frequency;

View File

@ -756,9 +756,9 @@ static int s5h1420_set_frontend(struct dvb_frontend *fe)
return 0;
}
static int s5h1420_get_frontend(struct dvb_frontend* fe)
static int s5h1420_get_frontend(struct dvb_frontend* fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct s5h1420_state* state = fe->demodulator_priv;
p->frequency = state->tunedfreq + s5h1420_getfreqoffset(state);

View File

@ -433,9 +433,9 @@ static int s921_set_frontend(struct dvb_frontend *fe)
return 0;
}
static int s921_get_frontend(struct dvb_frontend *fe)
static int s921_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct s921_state *state = fe->demodulator_priv;
/* FIXME: Probably it is possible to get it from regs f1 and f2 */

View File

@ -225,22 +225,18 @@ static int si2165_writereg32(struct si2165_state *state, const u16 reg, u32 val)
static int si2165_writereg_mask8(struct si2165_state *state, const u16 reg,
u8 val, u8 mask)
{
int ret;
u8 tmp;
if (mask != 0xff) {
ret = si2165_readreg8(state, reg, &tmp);
u8 tmp;
int ret = si2165_readreg8(state, reg, &tmp);
if (ret < 0)
goto err;
return ret;
val &= mask;
tmp &= ~mask;
val |= tmp;
}
ret = si2165_writereg8(state, reg, val);
err:
return ret;
return si2165_writereg8(state, reg, val);
}
#define REG16(reg, val) { (reg), (val) & 0xff }, { (reg)+1, (val)>>8 & 0xff }
@ -825,19 +821,19 @@ static int si2165_set_frontend_dvbt(struct dvb_frontend *fe)
struct si2165_state *state = fe->demodulator_priv;
u32 dvb_rate = 0;
u16 bw10k;
u32 bw_hz = p->bandwidth_hz;
dprintk("%s: called\n", __func__);
if (!state->has_dvbt)
return -EINVAL;
if (p->bandwidth_hz > 0) {
dvb_rate = p->bandwidth_hz * 8 / 7;
bw10k = p->bandwidth_hz / 10000;
} else {
dvb_rate = 8 * 8 / 7;
bw10k = 800;
}
/* no bandwidth auto-detection */
if (bw_hz == 0)
return -EINVAL;
dvb_rate = bw_hz * 8 / 7;
bw10k = bw_hz / 10000;
ret = si2165_adjust_pll_divl(state, 12);
if (ret < 0)

View File

@ -1568,9 +1568,9 @@ static enum dvbfe_search stb0899_search(struct dvb_frontend *fe)
return DVBFE_ALGO_SEARCH_ERROR;
}
static int stb0899_get_frontend(struct dvb_frontend *fe)
static int stb0899_get_frontend(struct dvb_frontend *fe,
struct dtv_frontend_properties *p)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct stb0899_state *state = fe->demodulator_priv;
struct stb0899_internal *internal = &state->internal;

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