forked from Minki/linux
This is a bunch of Integrator changes for v4.9:
- Add and fix a bunch of clocks in the DTS corresponding to the new clock support merged into the clk tree. - Move the CLCD display configuration from boardfile to device tree using the new CLCD support merged into the fbdev tree. - Cut some auxdata. - Cut some static remappings. - Move the sched_clock() counter to use syscon+regmap. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXxogwAAoJEEEQszewGV1z2WoQAIpNj8akj2qHWfaZKUa5HTVH YN2ukEkhpY8qXDw8ZjQVGMQ2VrHUCFWkwcYat8RPe7yfeZcEEkFMTgfTkq9h3P3g 15a+a4PuX2Prli/gzH3gq9VayHBOrUe+YAiy6qRbtVM6K7qwd9fBDWGYUBgC4i9p 7Y8lsyNTXXthtOnajlYVAxfFGTq67F2kZjHiCEagsWB6aLfT5Ixi/ZmCTs/GTfEf Lon7XG8RQFo/3xatM/k4kjv/Bd8GzIW8UR/iZ5qnEOBIbcFSBWey9N0saiagZ8M1 vMmYjClMlunvX8L22EoC8ZOHcfF+YFeKpqbKehDmobY5qdi40yTse0CoVcFPaX7o JZWZThOirsEb6q0iFH/Imno8dGWnWRG++h3ONx4KYbyJ8dOxJOwjbGtM23iT+SbF JnceDpQ/oo5D84UEZhdonY0bemhkKhd9TADHlg0IHPo94dtD2VCsZalfLk7RyDyx 9fOZFBZv5y8khh9nX5BhBkDexw0LXXmSyzrkjVOKsuImsBaLFueZe8kTDHFHbRCm MjYwLGRdmQIBCubdbjj1lxWk+xVDtvSonrT57a/A3+luAJutGbOdAeCUGtF3IzIY uSgGVaExxD+ax/E9dWP6N1kPvBAtB7+jqQXOsX6kO39irFxoUBE6OhdyT4RsrSEN J1FRkiDG5EH1rXiVpD8h =kkO1 -----END PGP SIGNATURE----- Merge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/late Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij: - Add and fix a bunch of clocks in the DTS corresponding to the new clock support merged into the clk tree. - Move the CLCD display configuration from boardfile to device tree using the new CLCD support merged into the fbdev tree. - Cut some auxdata. - Cut some static remappings. - Move the sched_clock() counter to use syscon+regmap. * tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: integrator: read counter using syscon/regmap ARM: integrator: cut down on static maps ARM: integrator: delete some auxdata ARM: integrator: move CP CLCD display to DTS ARM: dts: add the core module clocks to Integrator/CP ARM: dts: Add the core module clocks to Integrator/AP ARM: dts: add the Integrator/AP baseboard clocks ARM: dts: set the 24MHz xtal as parent of the UART clock
This commit is contained in:
commit
bac6dd36e3
@ -19,7 +19,7 @@
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bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
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};
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/* 24 MHz chrystal on the core module */
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/* 24 MHz chrystal on the Integrator/AP development board */
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xtal24mhz: xtal24mhz@24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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@ -39,6 +39,34 @@
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <14745600>;
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clocks = <&xtal24mhz>;
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};
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core-module@10000000 {
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/* 24 MHz chrystal on the core module */
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cm24mhz: cm24mhz@24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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/* Oscillator on the core module, clocks the CPU core */
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cmosc: cmosc@24M {
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compatible = "arm,syscon-icst525-integratorap-cm";
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#clock-cells = <0>;
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lock-offset = <0x14>;
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vco-offset = <0x08>;
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clocks = <&cm24mhz>;
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};
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/* Auxilary oscillator on the core module, 32.369MHz at boot */
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auxosc: auxosc@24M {
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compatible = "arm,syscon-icst525";
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#clock-cells = <0>;
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lock-offset = <0x14>;
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vco-offset = <0x1c>;
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clocks = <&cm24mhz>;
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};
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};
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syscon {
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@ -47,6 +75,27 @@
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interrupt-parent = <&pic>;
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/* These are the logical module IRQs */
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interrupts = <9>, <10>, <11>, <12>;
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/*
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* SYSCLK clocks PCIv3 bridge, system controller and the
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* logic modules.
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*/
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sysclk: apsys@24M {
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compatible = "arm,syscon-icst525-integratorap-sys";
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#clock-cells = <0>;
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lock-offset = <0x1c>;
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vco-offset = <0x04>;
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clocks = <&xtal24mhz>;
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};
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/* One-bit control for the PCI bus clock (33 or 25 MHz) */
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pciclk: pciclk@24M {
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compatible = "arm,syscon-icst525-integratorap-pci";
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#clock-cells = <0>;
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lock-offset = <0x1c>;
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vco-offset = <0x04>;
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clocks = <&xtal24mhz>;
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};
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};
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timer0: timer@13000000 {
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@ -58,20 +58,37 @@
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core-module@10000000 {
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/* 24 MHz chrystal on the core module */
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xtal24mhz: xtal24mhz@24M {
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cm24mhz: cm24mhz@24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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/*
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* External oscillator on the core module, usually used
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* to drive video circuitry. Driven from the 24MHz clock.
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*/
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auxosc: cm_aux_osc@25M {
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/* Oscillator on the core module, clocks the CPU core */
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cmcore: cmosc@24M {
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compatible = "arm,syscon-icst525-integratorcp-cm-core";
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#clock-cells = <0>;
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compatible = "arm,integrator-cm-auxosc";
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clocks = <&xtal24mhz>;
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lock-offset = <0x14>;
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vco-offset = <0x08>;
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clocks = <&cm24mhz>;
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};
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/* Oscillator on the core module, clocks the memory bus */
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cmmem: cmosc@24M {
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compatible = "arm,syscon-icst525-integratorcp-cm-mem";
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#clock-cells = <0>;
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lock-offset = <0x14>;
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vco-offset = <0x08>;
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clocks = <&cm24mhz>;
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};
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/* Auxilary oscillator on the core module, clocks the CLCD */
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auxosc: auxosc@24M {
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compatible = "arm,syscon-icst525";
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#clock-cells = <0>;
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lock-offset = <0x14>;
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vco-offset = <0x1c>;
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clocks = <&cm24mhz>;
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};
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/* The KMI clock is the 24 MHz oscillator divided to 8MHz */
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@ -80,7 +97,7 @@
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compatible = "fixed-factor-clock";
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clock-div = <3>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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clocks = <&cm24mhz>;
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};
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/* The timer clock is the 24 MHz oscillator divided to 1MHz */
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@ -89,7 +106,7 @@
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compatible = "fixed-factor-clock";
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clock-div = <24>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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clocks = <&cm24mhz>;
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};
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};
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@ -209,7 +226,42 @@
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reg = <0xC0000000 0x1000>;
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interrupts = <22>;
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clocks = <&auxosc>, <&pclk>;
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clock-names = "clcd", "apb_pclk";
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clock-names = "clcdclk", "apb_pclk";
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port {
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/*
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* The VGA connected is implemented with a
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* THS8134A triple DAC that can be run in 24bit
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* or 16bit RGB mode.
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*/
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clcd_pads: endpoint {
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remote-endpoint = <&clcd_panel>;
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arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
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};
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};
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panel {
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compatible = "panel-dpi";
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port {
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clcd_panel: endpoint {
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remote-endpoint = <&clcd_pads>;
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};
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};
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/* Standard 640x480 VGA timings */
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panel-timing {
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clock-frequency = <25175000>;
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hactive = <640>;
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hback-porch = <48>;
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hfront-porch = <16>;
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hsync-len = <96>;
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vactive = <480>;
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vback-porch = <33>;
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vfront-porch = <10>;
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vsync-len = <2>;
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};
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};
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};
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};
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};
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@ -17,33 +17,19 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/syscore_ops.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/kmi.h>
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#include <linux/io.h>
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#include <linux/irqchip.h>
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#include <linux/platform_data/clk-integrator.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/stat.h>
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#include <linux/termios.h>
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#include <asm/setup.h>
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#include <asm/param.h> /* HZ */
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include "hardware.h"
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#include "cm.h"
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@ -68,14 +54,8 @@ static void __iomem *ebi_base;
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/*
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* Logical Physical
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* ef000000 Cache flush
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* f1100000 11000000 System controller registers
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* f1300000 13000000 Counter/Timer
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* f1400000 14000000 Interrupt controller
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* f1600000 16000000 UART 0
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* f1700000 17000000 UART 1
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* f1a00000 1a000000 Debug LEDs
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* f1b00000 1b000000 GPIO
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*/
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static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
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@ -89,16 +69,6 @@ static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
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.pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_AP_GPIO_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_AP_GPIO_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}
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};
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@ -196,16 +166,10 @@ static void __init ap_init_irq_of(void)
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/* For the Device Tree, add in the UART callbacks as AUXDATA */
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static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
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"rtc", NULL),
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OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
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"uart0", &ap_uart_data),
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OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
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"uart1", &ap_uart_data),
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OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
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"kmi0", NULL),
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OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
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"kmi1", NULL),
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{ /* sentinel */ },
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};
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@ -7,67 +7,40 @@
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/string.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/kmi.h>
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#include <linux/amba/clcd.h>
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#include <linux/platform_data/video-clcd-versatile.h>
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#include <linux/amba/mmci.h>
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#include <linux/io.h>
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#include <linux/irqchip.h>
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#include <linux/gfp.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/sched_clock.h>
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#include <linux/regmap.h>
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#include <linux/mfd/syscon.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include "hardware.h"
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#include "cm.h"
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#include "common.h"
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/* Base address to the core module header */
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static struct regmap *cm_map;
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/* Base address to the CP controller */
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static void __iomem *intcp_con_base;
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#define INTCP_PA_CLCD_BASE 0xc0000000
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#define CM_COUNTER_OFFSET 0x28
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/*
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* Logical Physical
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* f1000000 10000000 Core module registers
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* f1300000 13000000 Counter/Timer
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* f1400000 14000000 Interrupt controller
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* f1600000 16000000 UART 0
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* f1700000 17000000 UART 1
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* f1a00000 1a000000 Debug LEDs
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* fc900000 c9000000 GPIO
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* fca00000 ca000000 SIC
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*/
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static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
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{
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.virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
|
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
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.length = SZ_4K,
|
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@ -77,16 +50,6 @@ static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
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.pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
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.length = SZ_4K,
|
||||
.type = MT_DEVICE
|
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
|
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.pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
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.length = SZ_4K,
|
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.type = MT_DEVICE
|
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE),
|
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.pfn = __phys_to_pfn(INTEGRATOR_CP_GPIO_BASE),
|
||||
.length = SZ_4K,
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.type = MT_DEVICE
|
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}, {
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||||
.virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE),
|
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.pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
|
||||
@ -121,66 +84,20 @@ static struct mmci_platform_data mmc_data = {
|
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.gpio_cd = -1,
|
||||
};
|
||||
|
||||
/*
|
||||
* CLCD support
|
||||
*/
|
||||
/*
|
||||
* Ensure VGA is selected.
|
||||
*/
|
||||
static void cp_clcd_enable(struct clcd_fb *fb)
|
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{
|
||||
struct fb_var_screeninfo *var = &fb->fb.var;
|
||||
u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2
|
||||
| CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1;
|
||||
|
||||
if (var->bits_per_pixel <= 8 ||
|
||||
(var->bits_per_pixel == 16 && var->green.length == 5))
|
||||
/* Pseudocolor, RGB555, BGR555 */
|
||||
val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555;
|
||||
else if (fb->fb.var.bits_per_pixel <= 16)
|
||||
/* truecolor RGB565 */
|
||||
val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555;
|
||||
else
|
||||
val = 0; /* no idea for this, don't trust the docs */
|
||||
|
||||
cm_control(CM_CTRL_LCDMUXSEL_MASK|
|
||||
CM_CTRL_LCDEN0|
|
||||
CM_CTRL_LCDEN1|
|
||||
CM_CTRL_STATIC1|
|
||||
CM_CTRL_STATIC2|
|
||||
CM_CTRL_STATIC|
|
||||
CM_CTRL_n24BITEN, val);
|
||||
}
|
||||
|
||||
static int cp_clcd_setup(struct clcd_fb *fb)
|
||||
{
|
||||
fb->panel = versatile_clcd_get_panel("VGA");
|
||||
if (!fb->panel)
|
||||
return -EINVAL;
|
||||
|
||||
return versatile_clcd_setup_dma(fb, SZ_1M);
|
||||
}
|
||||
|
||||
static struct clcd_board clcd_data = {
|
||||
.name = "Integrator/CP",
|
||||
.caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888,
|
||||
.check = clcdfb_check,
|
||||
.decode = clcdfb_decode,
|
||||
.enable = cp_clcd_enable,
|
||||
.setup = cp_clcd_setup,
|
||||
.mmap = versatile_clcd_mmap_dma,
|
||||
.remove = versatile_clcd_remove_dma,
|
||||
};
|
||||
|
||||
#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
|
||||
|
||||
static u64 notrace intcp_read_sched_clock(void)
|
||||
{
|
||||
return readl(REFCOUNTER);
|
||||
unsigned int val;
|
||||
|
||||
/* MMIO so discard return code */
|
||||
regmap_read(cm_map, CM_COUNTER_OFFSET, &val);
|
||||
return val;
|
||||
}
|
||||
|
||||
static void __init intcp_init_early(void)
|
||||
{
|
||||
cm_map = syscon_regmap_lookup_by_compatible("arm,core-module-integrator");
|
||||
if (IS_ERR(cm_map))
|
||||
return;
|
||||
sched_clock_register(intcp_read_sched_clock, 32, 24000000);
|
||||
}
|
||||
|
||||
@ -195,22 +112,8 @@ static void __init intcp_init_irq_of(void)
|
||||
* and enforce the bus names since these are used for clock lookups.
|
||||
*/
|
||||
static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
|
||||
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
|
||||
"rtc", NULL),
|
||||
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
|
||||
"uart0", NULL),
|
||||
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
|
||||
"uart1", NULL),
|
||||
OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
|
||||
"kmi0", NULL),
|
||||
OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
|
||||
"kmi1", NULL),
|
||||
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE,
|
||||
"mmci", &mmc_data),
|
||||
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE,
|
||||
"aaci", &mmc_data),
|
||||
OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,
|
||||
"clcd", &clcd_data),
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user