forked from Minki/linux
mtd: nand: add support for "nand-ecc-algo" DT property
So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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@ -22,6 +22,8 @@ Optional NAND chip properties:
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- nand-ecc-mode : String, operation mode of the NAND ecc mode.
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Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
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"soft_bch".
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- nand-ecc-algo: string, algorithm of NAND ECC.
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Supported values are: "hamming", "bch".
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- nand-bus-width : 8 or 16 bus width if not present 8
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- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
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@ -4003,17 +4003,23 @@ static int of_get_nand_ecc_mode(struct device_node *np)
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return -ENODEV;
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}
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static const char * const nand_ecc_algos[] = {
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[NAND_ECC_HAMMING] = "hamming",
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[NAND_ECC_BCH] = "bch",
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};
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static int of_get_nand_ecc_algo(struct device_node *np)
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{
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const char *pm;
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int err;
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int err, i;
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/*
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* TODO: Read ECC algo OF property and map it to enum nand_ecc_algo.
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* It's not implemented yet as currently NAND subsystem ignores
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* algorithm explicitly set this way. Once it's handled we should
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* document & support new property.
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*/
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err = of_property_read_string(np, "nand-ecc-algo", &pm);
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if (!err) {
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for (i = NAND_ECC_HAMMING; i < ARRAY_SIZE(nand_ecc_algos); i++)
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if (!strcasecmp(pm, nand_ecc_algos[i]))
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return i;
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return -ENODEV;
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}
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/*
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* For backward compatibility we also read "nand-ecc-mode" checking
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