ACPICA: AcpiSrc: Fix some translation issues for Linux conversion
Fixes issues like this: i_aSL -> iASL 00-7_f -> 00-7F local_fADT -> local_FADT execute_oSI -> execute_OSI Also, in function headers, the parameters are now translated to lower case (with underscores if necessary.) Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@@ -48,7 +48,7 @@
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* Definitions for Resource Attributes
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*/
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typedef u16 acpi_rs_length; /* Resource Length field is fixed at 16 bits */
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typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (64_k-1)+3 */
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typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (64K-1)+3 */
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/*
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* Memory Attributes
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@@ -332,7 +332,7 @@ struct acpi_resource_address64 {
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};
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struct acpi_resource_extended_address64 {
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ACPI_RESOURCE_ADDRESS_COMMON u8 revision_iD;
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ACPI_RESOURCE_ADDRESS_COMMON u8 revision_ID;
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u64 granularity;
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u64 minimum;
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u64 maximum;
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@@ -212,7 +212,7 @@ struct acpi_table_fadt {
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u32 smi_command; /* 32-bit Port address of SMI command port */
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u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
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u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
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u8 S4bios_request; /* Value to write to SMI CMD to enter S4BIOS state */
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u8 s4_bios_request; /* Value to write to SMI CMD to enter S4BIOS state */
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u8 pstate_control; /* Processor performance state control */
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u32 pm1a_event_block; /* 32-bit Port address of Power Mgt 1a Event Reg Blk */
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u32 pm1b_event_block; /* 32-bit Port address of Power Mgt 1b Event Reg Blk */
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@@ -230,8 +230,8 @@ struct acpi_table_fadt {
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u8 gpe1_block_length; /* Byte Length of ports at gpe1_block */
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u8 gpe1_base; /* Offset in GPE number space where GPE1 events start */
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u8 cst_control; /* Support for the _CST object and C States change notification */
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u16 C2latency; /* Worst case HW latency to enter/exit C2 state */
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u16 C3latency; /* Worst case HW latency to enter/exit C3 state */
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u16 c2_latency; /* Worst case HW latency to enter/exit C2 state */
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u16 c3_latency; /* Worst case HW latency to enter/exit C3 state */
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u16 flush_size; /* Processor's memory cache line width, in bytes */
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u16 flush_stride; /* Number of flush strides that need to be read */
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u8 duty_offset; /* Processor duty cycle index in processor's P_CNT reg */
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@@ -291,7 +291,7 @@ struct acpi_table_fadt {
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#define ACPI_FADT_S4_RTC_VALID (1<<16) /* 16: [V4] Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
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#define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: [V4] System is compatible with remote power on (ACPI 3.0) */
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#define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: [V4] All local APICs must use cluster model (ACPI 3.0) */
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#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local x_aPICs must use physical dest mode (ACPI 3.0) */
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#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local xAPICs must use physical dest mode (ACPI 3.0) */
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#define ACPI_FADT_HW_REDUCED (1<<20) /* 20: [V5] ACPI hardware is not implemented (ACPI 5.0) */
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#define ACPI_FADT_LOW_POWER_S0 (1<<21) /* 21: [V5] S0 power savings are equal or better than S3 (ACPI 5.0) */
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@@ -676,7 +676,7 @@ struct acpi_madt_local_apic {
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struct acpi_madt_io_apic {
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struct acpi_subtable_header header;
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u8 id; /* I/O APIC ID */
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u8 reserved; /* Reserved - must be zero */
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u8 reserved; /* reserved - must be zero */
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u32 address; /* APIC physical address */
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u32 global_irq_base; /* Global system interrupt where INTI lines start */
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};
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@@ -794,11 +794,11 @@ struct acpi_madt_generic_interrupt {
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struct acpi_madt_generic_distributor {
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struct acpi_subtable_header header;
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u16 reserved; /* Reserved - must be zero */
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u16 reserved; /* reserved - must be zero */
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u32 gic_id;
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u64 base_address;
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u32 global_irq_base;
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u32 reserved2; /* Reserved - must be zero */
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u32 reserved2; /* reserved - must be zero */
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};
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/*
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@@ -841,7 +841,7 @@ struct acpi_table_msct {
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u64 max_address; /* Max physical address in system */
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};
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/* Subtable - Maximum Proximity Domain Information. Version 1 */
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/* subtable - Maximum Proximity Domain Information. Version 1 */
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struct acpi_msct_proximity {
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u8 revision;
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@@ -66,7 +66,7 @@
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#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
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#define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
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#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
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#define ACPI_SIG_IBFT "IBFT" /* i_sCSI Boot Firmware Table */
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#define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */
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#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
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#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
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#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
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@@ -334,8 +334,8 @@ struct acpi_dmar_reserved_memory {
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struct acpi_dmar_header header;
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u16 reserved;
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u16 segment;
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u64 base_address; /* 4_k aligned base address */
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u64 end_address; /* 4_k aligned limit address */
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u64 base_address; /* 4K aligned base address */
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u64 end_address; /* 4K aligned limit address */
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};
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/* Masks for Flags field above */
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@@ -565,7 +565,7 @@ struct acpi_ivrs_hardware {
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/* Masks for Info field above */
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#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
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#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_iD */
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#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
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/*
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* Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
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@@ -173,7 +173,7 @@ typedef u64 acpi_physical_address;
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* to indicate that special precautions must be taken to avoid alignment faults.
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* (IA64 or ia64 is currently used by existing compilers to indicate IPF.)
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*
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* Note: Em64_t and other X86-64 processors support misaligned transfers,
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* Note: EM64T and other X86-64 processors support misaligned transfers,
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* so there is no need to define this flag.
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*/
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#if defined (__IA64__) || defined (__ia64__)
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@@ -636,7 +636,7 @@ typedef u32 acpi_event_type;
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#define ACPI_NUM_FIXED_EVENTS ACPI_EVENT_MAX + 1
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/*
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* Event Status - Per event
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* Event status - Per event
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* -------------
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* The encoding of acpi_event_status is illustrated below.
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* Note that a set bit (1) indicates the property is TRUE
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