ARM: OMAP2+: Drop legacy platform data for omap5 mcspi
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@@ -763,86 +763,6 @@ static struct omap_hwmod omap54xx_mcpdm_hwmod = {
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},
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};
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/*
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* 'mcspi' class
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* multichannel serial port interface (mcspi) / master/slave synchronous serial
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* bus
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*/
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static struct omap_hwmod_class_sysconfig omap54xx_mcspi_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
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SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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SIDLE_SMART_WKUP),
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.sysc_fields = &omap_hwmod_sysc_type2,
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};
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static struct omap_hwmod_class omap54xx_mcspi_hwmod_class = {
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.name = "mcspi",
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.sysc = &omap54xx_mcspi_sysc,
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};
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/* mcspi1 */
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static struct omap_hwmod omap54xx_mcspi1_hwmod = {
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.name = "mcspi1",
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.class = &omap54xx_mcspi_hwmod_class,
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.clkdm_name = "l4per_clkdm",
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.main_clk = "func_48m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L4PER_MCSPI1_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L4PER_MCSPI1_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* mcspi2 */
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static struct omap_hwmod omap54xx_mcspi2_hwmod = {
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.name = "mcspi2",
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.class = &omap54xx_mcspi_hwmod_class,
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.clkdm_name = "l4per_clkdm",
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.main_clk = "func_48m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L4PER_MCSPI2_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L4PER_MCSPI2_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* mcspi3 */
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static struct omap_hwmod omap54xx_mcspi3_hwmod = {
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.name = "mcspi3",
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.class = &omap54xx_mcspi_hwmod_class,
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.clkdm_name = "l4per_clkdm",
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.main_clk = "func_48m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L4PER_MCSPI3_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L4PER_MCSPI3_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* mcspi4 */
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static struct omap_hwmod omap54xx_mcspi4_hwmod = {
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.name = "mcspi4",
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.class = &omap54xx_mcspi_hwmod_class,
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.clkdm_name = "l4per_clkdm",
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.main_clk = "func_48m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L4PER_MCSPI4_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L4PER_MCSPI4_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/*
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* 'mmu' class
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@@ -1747,38 +1667,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcpdm = {
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.user = OCP_USER_MPU,
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};
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/* l4_per -> mcspi1 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mcspi1 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mcspi1_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mcspi2 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mcspi2 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mcspi2_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mcspi3 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mcspi3 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mcspi3_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mcspi4 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mcspi4 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mcspi4_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> mpu */
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static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = {
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.master = &omap54xx_l4_cfg_hwmod,
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@@ -1958,10 +1846,6 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
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&omap54xx_l4_abe__mcbsp2,
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&omap54xx_l4_abe__mcbsp3,
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&omap54xx_l4_abe__mcpdm,
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&omap54xx_l4_per__mcspi1,
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&omap54xx_l4_per__mcspi2,
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&omap54xx_l4_per__mcspi3,
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&omap54xx_l4_per__mcspi4,
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&omap54xx_l4_cfg__mpu,
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&omap54xx_l4_cfg__spinlock,
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&omap54xx_l4_cfg__ocp2scp1,
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