drm/nouveau/gr/gm200-: explicitly handle nofw
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
38fd546beb
commit
b9c246ad3b
@ -2103,7 +2103,7 @@ gf100_gr_new_(const struct gf100_gr_fwif *fwif,
|
||||
|
||||
fwif = nvkm_firmware_load(&gr->base.engine.subdev, fwif, "Gr", gr);
|
||||
if (IS_ERR(fwif))
|
||||
return -ENODEV;
|
||||
return PTR_ERR(fwif);
|
||||
|
||||
gr->func = fwif->func;
|
||||
|
||||
|
@ -404,6 +404,7 @@ int gf100_gr_nofw(struct gf100_gr *, int, const struct gf100_gr_fwif *);
|
||||
|
||||
int gk20a_gr_load_sw(struct gf100_gr *, const char *path, int ver);
|
||||
|
||||
int gm200_gr_nofw(struct gf100_gr *, int, const struct gf100_gr_fwif *);
|
||||
int gm200_gr_load(struct gf100_gr *, int, const struct gf100_gr_fwif *);
|
||||
extern const struct nvkm_acr_lsf_func gm200_gr_gpccs_acr;
|
||||
extern const struct nvkm_acr_lsf_func gm200_gr_fecs_acr;
|
||||
|
@ -32,6 +32,13 @@
|
||||
|
||||
#include <nvif/class.h>
|
||||
|
||||
int
|
||||
gm200_gr_nofw(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
|
||||
{
|
||||
nvkm_warn(&gr->base.engine.subdev, "firmware unavailable\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* PGRAPH engine/subdev functions
|
||||
******************************************************************************/
|
||||
@ -275,7 +282,8 @@ MODULE_FIRMWARE("nvidia/gm206/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gm200_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &gm200_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &gm200_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -175,7 +175,8 @@ MODULE_FIRMWARE("nvidia/gm20b/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gm20b_gr_fwif[] = {
|
||||
{ 0, gm20b_gr_load, &gm20b_gr, &gm20b_gr_fecs_acr },
|
||||
{ 0, gm20b_gr_load, &gm20b_gr, &gm20b_gr_fecs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -150,7 +150,8 @@ MODULE_FIRMWARE("nvidia/gp100/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gp100_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &gp100_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &gp100_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -146,7 +146,8 @@ MODULE_FIRMWARE("nvidia/gp102/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gp102_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &gp102_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &gp102_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -87,7 +87,8 @@ MODULE_FIRMWARE("nvidia/gp106/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gp104_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &gp104_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &gp104_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -76,7 +76,8 @@ MODULE_FIRMWARE("nvidia/gp107/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gp107_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &gp107_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &gp107_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -86,7 +86,8 @@ MODULE_FIRMWARE("nvidia/gp108/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gp108_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &gp107_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &gp107_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -88,7 +88,8 @@ MODULE_FIRMWARE("nvidia/gp10b/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gp10b_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &gp10b_gr, &gm20b_gr_fecs_acr, &gp10b_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &gp10b_gr, &gm20b_gr_fecs_acr, &gp10b_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -135,7 +135,8 @@ MODULE_FIRMWARE("nvidia/gv100/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
gv100_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &gv100_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &gv100_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -192,7 +192,8 @@ MODULE_FIRMWARE("nvidia/tu116/gr/sw_method_init.bin");
|
||||
|
||||
static const struct gf100_gr_fwif
|
||||
tu102_gr_fwif[] = {
|
||||
{ 0, gm200_gr_load, &tu102_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },
|
||||
{ 0, gm200_gr_load, &tu102_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },
|
||||
{ -1, gm200_gr_nofw },
|
||||
{}
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user