forked from Minki/linux
[POWERPC] pci32: Remove PowerMac P2P bridge IO hack
The 32 bits PowerPC PCI code has a hack for use by some PowerMacs to try to re-open PCI<->PCI bridge IO resources that were closed by the firmware. This is no longer necessary as the generic code will now do that for us. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Benjamin Herrenschmidt
Paul Mackerras
parent
0ec6b5c102
commit
b9baa20b0a
@ -711,217 +711,6 @@ void pcibios_make_OF_bus_map(void)
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}
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#endif /* CONFIG_PPC_OF */
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#ifdef CONFIG_PPC_PMAC
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/*
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* This set of routines checks for PCI<->PCI bridges that have closed
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* IO resources and have child devices. It tries to re-open an IO
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* window on them.
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*
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* This is a _temporary_ fix to workaround a problem with Apple's OF
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* closing IO windows on P2P bridges when the OF drivers of cards
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* below this bridge don't claim any IO range (typically ATI or
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* Adaptec).
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*
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* A more complete fix would be to use drivers/pci/setup-bus.c, which
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* involves a working pcibios_fixup_pbus_ranges(), some more care about
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* ordering when creating the host bus resources, and maybe a few more
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* minor tweaks
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*/
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/* Initialize bridges with base/limit values we have collected */
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static void __init
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do_update_p2p_io_resource(struct pci_bus *bus, int enable_vga)
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{
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struct pci_dev *bridge = bus->self;
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struct pci_controller* hose = (struct pci_controller *)bridge->sysdata;
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u32 l;
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u16 w;
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struct resource res;
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if (bus->resource[0] == NULL)
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return;
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res = *(bus->resource[0]);
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DBG("Remapping Bus %d, bridge: %s\n", bus->number, pci_name(bridge));
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res.start -= ((unsigned long) hose->io_base_virt - isa_io_base);
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res.end -= ((unsigned long) hose->io_base_virt - isa_io_base);
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DBG(" IO window: %016llx-%016llx\n", res.start, res.end);
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/* Set up the top and bottom of the PCI I/O segment for this bus. */
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pci_read_config_dword(bridge, PCI_IO_BASE, &l);
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l &= 0xffff000f;
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l |= (res.start >> 8) & 0x00f0;
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l |= res.end & 0xf000;
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pci_write_config_dword(bridge, PCI_IO_BASE, l);
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if ((l & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
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l = (res.start >> 16) | (res.end & 0xffff0000);
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pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, l);
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}
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pci_read_config_word(bridge, PCI_COMMAND, &w);
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w |= PCI_COMMAND_IO;
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pci_write_config_word(bridge, PCI_COMMAND, w);
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#if 0 /* Enabling this causes XFree 4.2.0 to hang during PCI probe */
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if (enable_vga) {
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pci_read_config_word(bridge, PCI_BRIDGE_CONTROL, &w);
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w |= PCI_BRIDGE_CTL_VGA;
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pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, w);
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}
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#endif
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}
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/* This function is pretty basic and actually quite broken for the
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* general case, it's enough for us right now though. It's supposed
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* to tell us if we need to open an IO range at all or not and what
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* size.
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*/
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static int __init
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check_for_io_childs(struct pci_bus *bus, struct resource* res, int *found_vga)
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{
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struct pci_dev *dev;
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int i;
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int rc = 0;
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#define push_end(res, mask) do { \
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BUG_ON((mask+1) & mask); \
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res->end = (res->end + mask) | mask; \
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} while (0)
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list_for_each_entry(dev, &bus->devices, bus_list) {
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u16 class = dev->class >> 8;
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if (class == PCI_CLASS_DISPLAY_VGA ||
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class == PCI_CLASS_NOT_DEFINED_VGA)
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*found_vga = 1;
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if (class >> 8 == PCI_BASE_CLASS_BRIDGE && dev->subordinate)
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rc |= check_for_io_childs(dev->subordinate, res, found_vga);
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if (class == PCI_CLASS_BRIDGE_CARDBUS)
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push_end(res, 0xfff);
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for (i=0; i<PCI_NUM_RESOURCES; i++) {
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struct resource *r;
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unsigned long r_size;
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if (dev->class >> 8 == PCI_CLASS_BRIDGE_PCI
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&& i >= PCI_BRIDGE_RESOURCES)
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continue;
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r = &dev->resource[i];
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r_size = r->end - r->start;
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if (r_size < 0xfff)
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r_size = 0xfff;
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if (r->flags & IORESOURCE_IO && (r_size) != 0) {
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rc = 1;
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push_end(res, r_size);
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}
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}
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}
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return rc;
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}
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/* Here we scan all P2P bridges of a given level that have a closed
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* IO window. Note that the test for the presence of a VGA card should
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* be improved to take into account already configured P2P bridges,
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* currently, we don't see them and might end up configuring 2 bridges
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* with VGA pass through enabled
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*/
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static void __init
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do_fixup_p2p_level(struct pci_bus *bus)
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{
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struct pci_bus *b;
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int i, parent_io;
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int has_vga = 0;
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for (parent_io=0; parent_io<4; parent_io++)
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if (bus->resource[parent_io]
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&& bus->resource[parent_io]->flags & IORESOURCE_IO)
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break;
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if (parent_io >= 4)
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return;
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list_for_each_entry(b, &bus->children, node) {
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struct pci_dev *d = b->self;
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struct pci_controller* hose = (struct pci_controller *)d->sysdata;
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struct resource *res = b->resource[0];
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struct resource tmp_res;
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unsigned long max;
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int found_vga = 0;
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memset(&tmp_res, 0, sizeof(tmp_res));
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tmp_res.start = bus->resource[parent_io]->start;
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/* We don't let low addresses go through that closed P2P bridge, well,
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* that may not be necessary but I feel safer that way
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*/
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if (tmp_res.start == 0)
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tmp_res.start = 0x1000;
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if (!list_empty(&b->devices) && res && res->flags == 0 &&
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res != bus->resource[parent_io] &&
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(d->class >> 8) == PCI_CLASS_BRIDGE_PCI &&
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check_for_io_childs(b, &tmp_res, &found_vga)) {
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u8 io_base_lo;
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printk(KERN_INFO "Fixing up IO bus %s\n", b->name);
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if (found_vga) {
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if (has_vga) {
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printk(KERN_WARNING "Skipping VGA, already active"
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" on bus segment\n");
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found_vga = 0;
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} else
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has_vga = 1;
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}
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pci_read_config_byte(d, PCI_IO_BASE, &io_base_lo);
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if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32)
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max = ((unsigned long) hose->io_base_virt
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- isa_io_base) + 0xffffffff;
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else
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max = ((unsigned long) hose->io_base_virt
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- isa_io_base) + 0xffff;
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*res = tmp_res;
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res->flags = IORESOURCE_IO;
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res->name = b->name;
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/* Find a resource in the parent where we can allocate */
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for (i = 0 ; i < 4; i++) {
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struct resource *r = bus->resource[i];
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if (!r)
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continue;
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if ((r->flags & IORESOURCE_IO) == 0)
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continue;
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DBG("Trying to allocate from %016llx, size %016llx from parent"
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" res %d: %016llx -> %016llx\n",
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res->start, res->end, i, r->start, r->end);
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if (allocate_resource(r, res, res->end + 1, res->start, max,
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res->end + 1, NULL, NULL) < 0) {
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DBG("Failed !\n");
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continue;
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}
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do_update_p2p_io_resource(b, found_vga);
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break;
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}
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}
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do_fixup_p2p_level(b);
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}
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}
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static void
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pcibios_fixup_p2p_bridges(void)
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{
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struct pci_bus *b;
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list_for_each_entry(b, &pci_root_buses, node)
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do_fixup_p2p_level(b);
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}
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#endif /* CONFIG_PPC_PMAC */
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static int __init
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pcibios_init(void)
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{
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@ -961,9 +750,7 @@ pcibios_init(void)
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pcibios_allocate_bus_resources(&pci_root_buses);
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pcibios_allocate_resources(0);
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pcibios_allocate_resources(1);
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#ifdef CONFIG_PPC_PMAC
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pcibios_fixup_p2p_bridges();
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#endif /* CONFIG_PPC_PMAC */
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DBG("PCI: Assigning unassigned resouces...\n");
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pci_assign_unassigned_resources();
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