forked from Minki/linux
Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
ath.git patches for 4.10. Major changes: ath10k * allow setting coverage class for first generation cards * read regulatory domain from ACPI ath9k * disable RNG by default
This commit is contained in:
commit
b9824cb891
@ -198,6 +198,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.name = "qca9984/qca9994 hw1.0",
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.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
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.uart_pin = 7,
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.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
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.otp_exe_param = 0x00000700,
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.continuous_frag_desc = true,
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.cck_rate_map_rev2 = true,
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@ -223,6 +224,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.name = "qca9888 hw2.0",
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.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
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.uart_pin = 7,
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.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
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.otp_exe_param = 0x00000700,
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.continuous_frag_desc = true,
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.channel_counters_freq_hz = 150000,
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@ -1560,6 +1562,15 @@ static void ath10k_core_restart(struct work_struct *work)
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mutex_unlock(&ar->conf_mutex);
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}
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static void ath10k_core_set_coverage_class_work(struct work_struct *work)
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{
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struct ath10k *ar = container_of(work, struct ath10k,
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set_coverage_class_work);
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if (ar->hw_params.hw_ops->set_coverage_class)
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ar->hw_params.hw_ops->set_coverage_class(ar, -1);
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}
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static int ath10k_core_init_firmware_features(struct ath10k *ar)
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{
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struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
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@ -2342,6 +2353,8 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
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INIT_WORK(&ar->register_work, ath10k_core_register_work);
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INIT_WORK(&ar->restart_work, ath10k_core_restart);
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INIT_WORK(&ar->set_coverage_class_work,
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ath10k_core_set_coverage_class_work);
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init_dummy_netdev(&ar->napi_dev);
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@ -713,6 +713,7 @@ struct ath10k {
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u32 phy_capability;
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u32 hw_min_tx_power;
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u32 hw_max_tx_power;
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u32 hw_eeprom_rd;
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u32 ht_cap_info;
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u32 vht_cap_info;
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u32 num_rf_chains;
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@ -911,6 +912,19 @@ struct ath10k {
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struct net_device napi_dev;
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struct napi_struct napi;
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struct work_struct set_coverage_class_work;
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/* protected by conf_mutex */
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struct {
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/* writing also protected by data_lock */
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s16 coverage_class;
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u32 reg_phyclk;
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u32 reg_slottime_conf;
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u32 reg_slottime_orig;
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u32 reg_ack_cts_timeout_conf;
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u32 reg_ack_cts_timeout_orig;
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} fw_coverage;
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/* must be last */
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u8 drv_priv[0] __aligned(sizeof(void *));
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};
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@ -94,7 +94,19 @@ int ath10k_debug_get_et_sset_count(struct ieee80211_hw *hw,
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void ath10k_debug_get_et_stats(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif,
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struct ethtool_stats *stats, u64 *data);
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static inline u64 ath10k_debug_get_fw_dbglog_mask(struct ath10k *ar)
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{
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return ar->debug.fw_dbglog_mask;
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}
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static inline u32 ath10k_debug_get_fw_dbglog_level(struct ath10k *ar)
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{
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return ar->debug.fw_dbglog_level;
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}
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#else
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static inline int ath10k_debug_start(struct ath10k *ar)
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{
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return 0;
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@ -144,6 +156,16 @@ ath10k_debug_get_new_fw_crash_data(struct ath10k *ar)
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return NULL;
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}
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static inline u64 ath10k_debug_get_fw_dbglog_mask(struct ath10k *ar)
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{
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return 0;
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}
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static inline u32 ath10k_debug_get_fw_dbglog_level(struct ath10k *ar)
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{
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return 0;
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}
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#define ATH10K_DFS_STAT_INC(ar, c) do { } while (0)
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#define ath10k_debug_get_et_strings NULL
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@ -1463,8 +1463,7 @@ static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
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}
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static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
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struct sk_buff_head *amsdu,
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bool chained)
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struct sk_buff_head *amsdu)
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{
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struct sk_buff *first;
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struct htt_rx_desc *rxd;
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@ -1475,9 +1474,6 @@ static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
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decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
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RX_MSDU_START_INFO1_DECAP_FORMAT);
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if (!chained)
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return;
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/* FIXME: Current unchaining logic can only handle simple case of raw
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* msdu chaining. If decapping is other than raw the chaining may be
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* more complex and this isn't handled by the current code. Don't even
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@ -1555,7 +1551,11 @@ static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
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num_msdus = skb_queue_len(&amsdu);
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ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
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ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
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/* only for ret = 1 indicates chained msdus */
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if (ret > 0)
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ath10k_htt_rx_h_unchain(ar, &amsdu);
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ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
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ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
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ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
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@ -17,11 +17,14 @@
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#include <linux/types.h>
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#include "core.h"
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#include "hw.h"
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#include "hif.h"
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#include "wmi-ops.h"
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const struct ath10k_hw_regs qca988x_regs = {
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.rtc_soc_base_address = 0x00004000,
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.rtc_wmac_base_address = 0x00005000,
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.soc_core_base_address = 0x00009000,
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.wlan_mac_base_address = 0x00020000,
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.ce_wrapper_base_address = 0x00057000,
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.ce0_base_address = 0x00057400,
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.ce1_base_address = 0x00057800,
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@ -48,6 +51,7 @@ const struct ath10k_hw_regs qca6174_regs = {
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.rtc_soc_base_address = 0x00000800,
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.rtc_wmac_base_address = 0x00001000,
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.soc_core_base_address = 0x0003a000,
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.wlan_mac_base_address = 0x00020000,
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.ce_wrapper_base_address = 0x00034000,
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.ce0_base_address = 0x00034400,
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.ce1_base_address = 0x00034800,
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@ -74,6 +78,7 @@ const struct ath10k_hw_regs qca99x0_regs = {
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.rtc_soc_base_address = 0x00080000,
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.rtc_wmac_base_address = 0x00000000,
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.soc_core_base_address = 0x00082000,
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.wlan_mac_base_address = 0x00030000,
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.ce_wrapper_base_address = 0x0004d000,
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.ce0_base_address = 0x0004a000,
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.ce1_base_address = 0x0004a400,
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@ -109,6 +114,7 @@ const struct ath10k_hw_regs qca99x0_regs = {
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const struct ath10k_hw_regs qca4019_regs = {
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.rtc_soc_base_address = 0x00080000,
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.soc_core_base_address = 0x00082000,
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.wlan_mac_base_address = 0x00030000,
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.ce_wrapper_base_address = 0x0004d000,
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.ce0_base_address = 0x0004a000,
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.ce1_base_address = 0x0004a400,
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@ -220,7 +226,143 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
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survey->time_busy = CCNT_TO_MSEC(ar, rcc);
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}
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/* The firmware does not support setting the coverage class. Instead this
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* function monitors and modifies the corresponding MAC registers.
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*/
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static void ath10k_hw_qca988x_set_coverage_class(struct ath10k *ar,
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s16 value)
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{
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u32 slottime_reg;
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u32 slottime;
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u32 timeout_reg;
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u32 ack_timeout;
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u32 cts_timeout;
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u32 phyclk_reg;
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u32 phyclk;
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u64 fw_dbglog_mask;
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u32 fw_dbglog_level;
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mutex_lock(&ar->conf_mutex);
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/* Only modify registers if the core is started. */
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if ((ar->state != ATH10K_STATE_ON) &&
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(ar->state != ATH10K_STATE_RESTARTED))
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goto unlock;
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/* Retrieve the current values of the two registers that need to be
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* adjusted.
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*/
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slottime_reg = ath10k_hif_read32(ar, WLAN_MAC_BASE_ADDRESS +
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WAVE1_PCU_GBL_IFS_SLOT);
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timeout_reg = ath10k_hif_read32(ar, WLAN_MAC_BASE_ADDRESS +
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WAVE1_PCU_ACK_CTS_TIMEOUT);
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phyclk_reg = ath10k_hif_read32(ar, WLAN_MAC_BASE_ADDRESS +
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WAVE1_PHYCLK);
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phyclk = MS(phyclk_reg, WAVE1_PHYCLK_USEC) + 1;
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if (value < 0)
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value = ar->fw_coverage.coverage_class;
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/* Break out if the coverage class and registers have the expected
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* value.
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*/
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if (value == ar->fw_coverage.coverage_class &&
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slottime_reg == ar->fw_coverage.reg_slottime_conf &&
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timeout_reg == ar->fw_coverage.reg_ack_cts_timeout_conf &&
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phyclk_reg == ar->fw_coverage.reg_phyclk)
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goto unlock;
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/* Store new initial register values from the firmware. */
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if (slottime_reg != ar->fw_coverage.reg_slottime_conf)
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ar->fw_coverage.reg_slottime_orig = slottime_reg;
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if (timeout_reg != ar->fw_coverage.reg_ack_cts_timeout_conf)
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ar->fw_coverage.reg_ack_cts_timeout_orig = timeout_reg;
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ar->fw_coverage.reg_phyclk = phyclk_reg;
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/* Calculat new value based on the (original) firmware calculation. */
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slottime_reg = ar->fw_coverage.reg_slottime_orig;
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timeout_reg = ar->fw_coverage.reg_ack_cts_timeout_orig;
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/* Do some sanity checks on the slottime register. */
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if (slottime_reg % phyclk) {
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ath10k_warn(ar,
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"failed to set coverage class: expected integer microsecond value in register\n");
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goto store_regs;
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}
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slottime = MS(slottime_reg, WAVE1_PCU_GBL_IFS_SLOT);
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slottime = slottime / phyclk;
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if (slottime != 9 && slottime != 20) {
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ath10k_warn(ar,
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"failed to set coverage class: expected slot time of 9 or 20us in HW register. It is %uus.\n",
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slottime);
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goto store_regs;
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}
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/* Recalculate the register values by adding the additional propagation
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* delay (3us per coverage class).
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*/
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slottime = MS(slottime_reg, WAVE1_PCU_GBL_IFS_SLOT);
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slottime += value * 3 * phyclk;
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slottime = min_t(u32, slottime, WAVE1_PCU_GBL_IFS_SLOT_MAX);
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slottime = SM(slottime, WAVE1_PCU_GBL_IFS_SLOT);
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slottime_reg = (slottime_reg & ~WAVE1_PCU_GBL_IFS_SLOT_MASK) | slottime;
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/* Update ack timeout (lower halfword). */
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ack_timeout = MS(timeout_reg, WAVE1_PCU_ACK_CTS_TIMEOUT_ACK);
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ack_timeout += 3 * value * phyclk;
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ack_timeout = min_t(u32, ack_timeout, WAVE1_PCU_ACK_CTS_TIMEOUT_MAX);
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ack_timeout = SM(ack_timeout, WAVE1_PCU_ACK_CTS_TIMEOUT_ACK);
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/* Update cts timeout (upper halfword). */
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cts_timeout = MS(timeout_reg, WAVE1_PCU_ACK_CTS_TIMEOUT_CTS);
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cts_timeout += 3 * value * phyclk;
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cts_timeout = min_t(u32, cts_timeout, WAVE1_PCU_ACK_CTS_TIMEOUT_MAX);
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cts_timeout = SM(cts_timeout, WAVE1_PCU_ACK_CTS_TIMEOUT_CTS);
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timeout_reg = ack_timeout | cts_timeout;
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ath10k_hif_write32(ar,
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WLAN_MAC_BASE_ADDRESS + WAVE1_PCU_GBL_IFS_SLOT,
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slottime_reg);
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ath10k_hif_write32(ar,
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WLAN_MAC_BASE_ADDRESS + WAVE1_PCU_ACK_CTS_TIMEOUT,
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timeout_reg);
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/* Ensure we have a debug level of WARN set for the case that the
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* coverage class is larger than 0. This is important as we need to
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* set the registers again if the firmware does an internal reset and
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* this way we will be notified of the event.
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*/
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fw_dbglog_mask = ath10k_debug_get_fw_dbglog_mask(ar);
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fw_dbglog_level = ath10k_debug_get_fw_dbglog_level(ar);
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if (value > 0) {
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if (fw_dbglog_level > ATH10K_DBGLOG_LEVEL_WARN)
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fw_dbglog_level = ATH10K_DBGLOG_LEVEL_WARN;
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fw_dbglog_mask = ~0;
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}
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ath10k_wmi_dbglog_cfg(ar, fw_dbglog_mask, fw_dbglog_level);
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store_regs:
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/* After an error we will not retry setting the coverage class. */
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spin_lock_bh(&ar->data_lock);
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ar->fw_coverage.coverage_class = value;
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spin_unlock_bh(&ar->data_lock);
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ar->fw_coverage.reg_slottime_conf = slottime_reg;
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ar->fw_coverage.reg_ack_cts_timeout_conf = timeout_reg;
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unlock:
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mutex_unlock(&ar->conf_mutex);
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}
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const struct ath10k_hw_ops qca988x_ops = {
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.set_coverage_class = ath10k_hw_qca988x_set_coverage_class,
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};
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static int ath10k_qca99x0_rx_desc_get_l3_pad_bytes(struct htt_rx_desc *rxd)
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|
@ -230,6 +230,7 @@ struct ath10k_hw_regs {
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u32 rtc_soc_base_address;
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u32 rtc_wmac_base_address;
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u32 soc_core_base_address;
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u32 wlan_mac_base_address;
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u32 ce_wrapper_base_address;
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u32 ce0_base_address;
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u32 ce1_base_address;
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@ -418,6 +419,7 @@ struct htt_rx_desc;
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/* Defines needed for Rx descriptor abstraction */
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struct ath10k_hw_ops {
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int (*rx_desc_get_l3_pad_bytes)(struct htt_rx_desc *rxd);
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void (*set_coverage_class)(struct ath10k *ar, s16 value);
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};
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extern const struct ath10k_hw_ops qca988x_ops;
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@ -614,7 +616,7 @@ ath10k_rx_desc_get_l3_pad_bytes(struct ath10k_hw_params *hw,
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#define WLAN_SI_BASE_ADDRESS 0x00010000
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#define WLAN_GPIO_BASE_ADDRESS 0x00014000
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#define WLAN_ANALOG_INTF_BASE_ADDRESS 0x0001c000
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#define WLAN_MAC_BASE_ADDRESS 0x00020000
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#define WLAN_MAC_BASE_ADDRESS ar->regs->wlan_mac_base_address
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#define EFUSE_BASE_ADDRESS 0x00030000
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#define FPGA_REG_BASE_ADDRESS 0x00039000
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#define WLAN_UART2_BASE_ADDRESS 0x00054c00
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@ -814,4 +816,28 @@ ath10k_rx_desc_get_l3_pad_bytes(struct ath10k_hw_params *hw,
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#define RTC_STATE_V_GET(x) (((x) & RTC_STATE_V_MASK) >> RTC_STATE_V_LSB)
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|
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/* Register definitions for first generation ath10k cards. These cards include
|
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* a mac thich has a register allocation similar to ath9k and at least some
|
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* registers including the ones relevant for modifying the coverage class are
|
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* identical to the ath9k definitions.
|
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* These registers are usually managed by the ath10k firmware. However by
|
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* overriding them it is possible to support coverage class modifications.
|
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*/
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#define WAVE1_PCU_ACK_CTS_TIMEOUT 0x8014
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#define WAVE1_PCU_ACK_CTS_TIMEOUT_MAX 0x00003FFF
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#define WAVE1_PCU_ACK_CTS_TIMEOUT_ACK_MASK 0x00003FFF
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#define WAVE1_PCU_ACK_CTS_TIMEOUT_ACK_LSB 0
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#define WAVE1_PCU_ACK_CTS_TIMEOUT_CTS_MASK 0x3FFF0000
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#define WAVE1_PCU_ACK_CTS_TIMEOUT_CTS_LSB 16
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#define WAVE1_PCU_GBL_IFS_SLOT 0x1070
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#define WAVE1_PCU_GBL_IFS_SLOT_MASK 0x0000FFFF
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#define WAVE1_PCU_GBL_IFS_SLOT_MAX 0x0000FFFF
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#define WAVE1_PCU_GBL_IFS_SLOT_LSB 0
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#define WAVE1_PCU_GBL_IFS_SLOT_RESV0 0xFFFF0000
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#define WAVE1_PHYCLK 0x801C
|
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#define WAVE1_PHYCLK_USEC_MASK 0x0000007F
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#define WAVE1_PHYCLK_USEC_LSB 0
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#endif /* _HW_H_ */
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|
@ -19,6 +19,7 @@
|
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|
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#include <net/mac80211.h>
|
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#include <linux/etherdevice.h>
|
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#include <linux/acpi.h>
|
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|
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#include "hif.h"
|
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#include "core.h"
|
||||
@ -3179,7 +3180,8 @@ static void ath10k_mac_vif_handle_tx_pause(struct ath10k_vif *arvif,
|
||||
ath10k_mac_vif_tx_unlock(arvif, pause_id);
|
||||
break;
|
||||
default:
|
||||
ath10k_warn(ar, "received unknown tx pause action %d on vdev %i, ignoring\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"received unknown tx pause action %d on vdev %i, ignoring\n",
|
||||
action, arvif->vdev_id);
|
||||
break;
|
||||
}
|
||||
@ -4929,7 +4931,9 @@ static int ath10k_add_interface(struct ieee80211_hw *hw,
|
||||
}
|
||||
|
||||
ar->free_vdev_map &= ~(1LL << arvif->vdev_id);
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
list_add(&arvif->list, &ar->arvifs);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
/* It makes no sense to have firmware do keepalives. mac80211 already
|
||||
* takes care of this with idle connection polling.
|
||||
@ -5080,7 +5084,9 @@ err_peer_delete:
|
||||
err_vdev_delete:
|
||||
ath10k_wmi_vdev_delete(ar, arvif->vdev_id);
|
||||
ar->free_vdev_map |= 1LL << arvif->vdev_id;
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
list_del(&arvif->list);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
err:
|
||||
if (arvif->beacon_buf) {
|
||||
@ -5126,7 +5132,9 @@ static void ath10k_remove_interface(struct ieee80211_hw *hw,
|
||||
arvif->vdev_id, ret);
|
||||
|
||||
ar->free_vdev_map |= 1LL << arvif->vdev_id;
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
list_del(&arvif->list);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
if (arvif->vdev_type == WMI_VDEV_TYPE_AP ||
|
||||
arvif->vdev_type == WMI_VDEV_TYPE_IBSS) {
|
||||
@ -5410,6 +5418,20 @@ static void ath10k_bss_info_changed(struct ieee80211_hw *hw,
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
}
|
||||
|
||||
static void ath10k_mac_op_set_coverage_class(struct ieee80211_hw *hw, s16 value)
|
||||
{
|
||||
struct ath10k *ar = hw->priv;
|
||||
|
||||
/* This function should never be called if setting the coverage class
|
||||
* is not supported on this hardware.
|
||||
*/
|
||||
if (!ar->hw_params.hw_ops->set_coverage_class) {
|
||||
WARN_ON_ONCE(1);
|
||||
return;
|
||||
}
|
||||
ar->hw_params.hw_ops->set_coverage_class(ar, value);
|
||||
}
|
||||
|
||||
static int ath10k_hw_scan(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_scan_request *hw_req)
|
||||
@ -7435,6 +7457,7 @@ static const struct ieee80211_ops ath10k_ops = {
|
||||
.remove_interface = ath10k_remove_interface,
|
||||
.configure_filter = ath10k_configure_filter,
|
||||
.bss_info_changed = ath10k_bss_info_changed,
|
||||
.set_coverage_class = ath10k_mac_op_set_coverage_class,
|
||||
.hw_scan = ath10k_hw_scan,
|
||||
.cancel_hw_scan = ath10k_cancel_hw_scan,
|
||||
.set_key = ath10k_set_key,
|
||||
@ -7789,6 +7812,109 @@ struct ath10k_vif *ath10k_get_arvif(struct ath10k *ar, u32 vdev_id)
|
||||
return arvif_iter.arvif;
|
||||
}
|
||||
|
||||
#define WRD_METHOD "WRDD"
|
||||
#define WRDD_WIFI (0x07)
|
||||
|
||||
static u32 ath10k_mac_wrdd_get_mcc(struct ath10k *ar, union acpi_object *wrdd)
|
||||
{
|
||||
union acpi_object *mcc_pkg;
|
||||
union acpi_object *domain_type;
|
||||
union acpi_object *mcc_value;
|
||||
u32 i;
|
||||
|
||||
if (wrdd->type != ACPI_TYPE_PACKAGE ||
|
||||
wrdd->package.count < 2 ||
|
||||
wrdd->package.elements[0].type != ACPI_TYPE_INTEGER ||
|
||||
wrdd->package.elements[0].integer.value != 0) {
|
||||
ath10k_warn(ar, "ignoring malformed/unsupported wrdd structure\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
for (i = 1; i < wrdd->package.count; ++i) {
|
||||
mcc_pkg = &wrdd->package.elements[i];
|
||||
|
||||
if (mcc_pkg->type != ACPI_TYPE_PACKAGE)
|
||||
continue;
|
||||
if (mcc_pkg->package.count < 2)
|
||||
continue;
|
||||
if (mcc_pkg->package.elements[0].type != ACPI_TYPE_INTEGER ||
|
||||
mcc_pkg->package.elements[1].type != ACPI_TYPE_INTEGER)
|
||||
continue;
|
||||
|
||||
domain_type = &mcc_pkg->package.elements[0];
|
||||
if (domain_type->integer.value != WRDD_WIFI)
|
||||
continue;
|
||||
|
||||
mcc_value = &mcc_pkg->package.elements[1];
|
||||
return mcc_value->integer.value;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath10k_mac_get_wrdd_regulatory(struct ath10k *ar, u16 *rd)
|
||||
{
|
||||
struct pci_dev __maybe_unused *pdev = to_pci_dev(ar->dev);
|
||||
acpi_handle root_handle;
|
||||
acpi_handle handle;
|
||||
struct acpi_buffer wrdd = {ACPI_ALLOCATE_BUFFER, NULL};
|
||||
acpi_status status;
|
||||
u32 alpha2_code;
|
||||
char alpha2[3];
|
||||
|
||||
root_handle = ACPI_HANDLE(&pdev->dev);
|
||||
if (!root_handle)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
status = acpi_get_handle(root_handle, (acpi_string)WRD_METHOD, &handle);
|
||||
if (ACPI_FAILURE(status)) {
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"failed to get wrd method %d\n", status);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
status = acpi_evaluate_object(handle, NULL, NULL, &wrdd);
|
||||
if (ACPI_FAILURE(status)) {
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"failed to call wrdc %d\n", status);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
alpha2_code = ath10k_mac_wrdd_get_mcc(ar, wrdd.pointer);
|
||||
kfree(wrdd.pointer);
|
||||
if (!alpha2_code)
|
||||
return -EIO;
|
||||
|
||||
alpha2[0] = (alpha2_code >> 8) & 0xff;
|
||||
alpha2[1] = (alpha2_code >> 0) & 0xff;
|
||||
alpha2[2] = '\0';
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"regulatory hint from WRDD (alpha2-code): %s\n", alpha2);
|
||||
|
||||
*rd = ath_regd_find_country_by_name(alpha2);
|
||||
if (*rd == 0xffff)
|
||||
return -EIO;
|
||||
|
||||
*rd |= COUNTRY_ERD_FLAG;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath10k_mac_init_rd(struct ath10k *ar)
|
||||
{
|
||||
int ret;
|
||||
u16 rd;
|
||||
|
||||
ret = ath10k_mac_get_wrdd_regulatory(ar, &rd);
|
||||
if (ret) {
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"fallback to eeprom programmed regulatory settings\n");
|
||||
rd = ar->hw_eeprom_rd;
|
||||
}
|
||||
|
||||
ar->ath_common.regulatory.current_rd = rd;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ath10k_mac_register(struct ath10k *ar)
|
||||
{
|
||||
static const u32 cipher_suites[] = {
|
||||
@ -8012,6 +8138,16 @@ int ath10k_mac_register(struct ath10k *ar)
|
||||
ar->running_fw->fw_file.fw_features))
|
||||
ar->ops->wake_tx_queue = NULL;
|
||||
|
||||
ret = ath10k_mac_init_rd(ar);
|
||||
if (ret) {
|
||||
ath10k_err(ar, "failed to derive regdom: %d\n", ret);
|
||||
goto err_dfs_detector_exit;
|
||||
}
|
||||
|
||||
/* Disable set_coverage_class for chipsets that do not support it. */
|
||||
if (!ar->hw_params.hw_ops->set_coverage_class)
|
||||
ar->ops->set_coverage_class = NULL;
|
||||
|
||||
ret = ath_regd_init(&ar->ath_common.regulatory, ar->hw->wiphy,
|
||||
ath10k_reg_notifier);
|
||||
if (ret) {
|
||||
|
@ -4676,7 +4676,7 @@ static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
|
||||
ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
|
||||
ar->phy_capability = __le32_to_cpu(arg.phy_capab);
|
||||
ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
|
||||
ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
|
||||
ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
|
||||
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
|
||||
arg.service_map, arg.service_map_len);
|
||||
@ -4931,6 +4931,23 @@ exit:
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
|
||||
{
|
||||
if (ar->hw_params.hw_ops->set_coverage_class) {
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
|
||||
/* This call only ensures that the modified coverage class
|
||||
* persists in case the firmware sets the registers back to
|
||||
* their default value. So calling it is only necessary if the
|
||||
* coverage class has a non-zero value.
|
||||
*/
|
||||
if (ar->fw_coverage.coverage_class)
|
||||
queue_work(ar->workqueue, &ar->set_coverage_class_work);
|
||||
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
}
|
||||
}
|
||||
|
||||
static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_cmd_hdr *cmd_hdr;
|
||||
@ -4951,6 +4968,7 @@ static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
return;
|
||||
case WMI_SCAN_EVENTID:
|
||||
ath10k_wmi_event_scan(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_CHAN_INFO_EVENTID:
|
||||
ath10k_wmi_event_chan_info(ar, skb);
|
||||
@ -4960,15 +4978,18 @@ static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_DEBUG_MESG_EVENTID:
|
||||
ath10k_wmi_event_debug_mesg(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_UPDATE_STATS_EVENTID:
|
||||
ath10k_wmi_event_update_stats(ar, skb);
|
||||
break;
|
||||
case WMI_VDEV_START_RESP_EVENTID:
|
||||
ath10k_wmi_event_vdev_start_resp(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_VDEV_STOPPED_EVENTID:
|
||||
ath10k_wmi_event_vdev_stopped(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_PEER_STA_KICKOUT_EVENTID:
|
||||
ath10k_wmi_event_peer_sta_kickout(ar, skb);
|
||||
@ -4984,12 +5005,14 @@ static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_ROAM_EVENTID:
|
||||
ath10k_wmi_event_roam(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_PROFILE_MATCH:
|
||||
ath10k_wmi_event_profile_match(ar, skb);
|
||||
break;
|
||||
case WMI_DEBUG_PRINT_EVENTID:
|
||||
ath10k_wmi_event_debug_print(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_PDEV_QVIT_EVENTID:
|
||||
ath10k_wmi_event_pdev_qvit(ar, skb);
|
||||
@ -5038,6 +5061,7 @@ static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
return;
|
||||
case WMI_READY_EVENTID:
|
||||
ath10k_wmi_event_ready(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
default:
|
||||
ath10k_warn(ar, "Unknown eventid: %d\n", id);
|
||||
@ -5081,6 +5105,7 @@ static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
return;
|
||||
case WMI_10X_SCAN_EVENTID:
|
||||
ath10k_wmi_event_scan(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10X_CHAN_INFO_EVENTID:
|
||||
ath10k_wmi_event_chan_info(ar, skb);
|
||||
@ -5090,15 +5115,18 @@ static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_10X_DEBUG_MESG_EVENTID:
|
||||
ath10k_wmi_event_debug_mesg(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10X_UPDATE_STATS_EVENTID:
|
||||
ath10k_wmi_event_update_stats(ar, skb);
|
||||
break;
|
||||
case WMI_10X_VDEV_START_RESP_EVENTID:
|
||||
ath10k_wmi_event_vdev_start_resp(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10X_VDEV_STOPPED_EVENTID:
|
||||
ath10k_wmi_event_vdev_stopped(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10X_PEER_STA_KICKOUT_EVENTID:
|
||||
ath10k_wmi_event_peer_sta_kickout(ar, skb);
|
||||
@ -5114,12 +5142,14 @@ static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_10X_ROAM_EVENTID:
|
||||
ath10k_wmi_event_roam(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10X_PROFILE_MATCH:
|
||||
ath10k_wmi_event_profile_match(ar, skb);
|
||||
break;
|
||||
case WMI_10X_DEBUG_PRINT_EVENTID:
|
||||
ath10k_wmi_event_debug_print(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10X_PDEV_QVIT_EVENTID:
|
||||
ath10k_wmi_event_pdev_qvit(ar, skb);
|
||||
@ -5159,6 +5189,7 @@ static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
return;
|
||||
case WMI_10X_READY_EVENTID:
|
||||
ath10k_wmi_event_ready(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10X_PDEV_UTF_EVENTID:
|
||||
/* ignore utf events */
|
||||
@ -5205,6 +5236,7 @@ static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
return;
|
||||
case WMI_10_2_SCAN_EVENTID:
|
||||
ath10k_wmi_event_scan(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_CHAN_INFO_EVENTID:
|
||||
ath10k_wmi_event_chan_info(ar, skb);
|
||||
@ -5214,15 +5246,18 @@ static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_10_2_DEBUG_MESG_EVENTID:
|
||||
ath10k_wmi_event_debug_mesg(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_UPDATE_STATS_EVENTID:
|
||||
ath10k_wmi_event_update_stats(ar, skb);
|
||||
break;
|
||||
case WMI_10_2_VDEV_START_RESP_EVENTID:
|
||||
ath10k_wmi_event_vdev_start_resp(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_VDEV_STOPPED_EVENTID:
|
||||
ath10k_wmi_event_vdev_stopped(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
|
||||
ath10k_wmi_event_peer_sta_kickout(ar, skb);
|
||||
@ -5238,12 +5273,14 @@ static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_10_2_ROAM_EVENTID:
|
||||
ath10k_wmi_event_roam(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_PROFILE_MATCH:
|
||||
ath10k_wmi_event_profile_match(ar, skb);
|
||||
break;
|
||||
case WMI_10_2_DEBUG_PRINT_EVENTID:
|
||||
ath10k_wmi_event_debug_print(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_PDEV_QVIT_EVENTID:
|
||||
ath10k_wmi_event_pdev_qvit(ar, skb);
|
||||
@ -5274,15 +5311,18 @@ static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
|
||||
ath10k_wmi_event_vdev_standby_req(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
|
||||
ath10k_wmi_event_vdev_resume_req(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_SERVICE_READY_EVENTID:
|
||||
ath10k_wmi_event_service_ready(ar, skb);
|
||||
return;
|
||||
case WMI_10_2_READY_EVENTID:
|
||||
ath10k_wmi_event_ready(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
|
||||
ath10k_wmi_event_temperature(ar, skb);
|
||||
@ -5345,12 +5385,14 @@ static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_10_4_DEBUG_MESG_EVENTID:
|
||||
ath10k_wmi_event_debug_mesg(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_4_SERVICE_READY_EVENTID:
|
||||
ath10k_wmi_event_service_ready(ar, skb);
|
||||
return;
|
||||
case WMI_10_4_SCAN_EVENTID:
|
||||
ath10k_wmi_event_scan(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_4_CHAN_INFO_EVENTID:
|
||||
ath10k_wmi_event_chan_info(ar, skb);
|
||||
@ -5360,12 +5402,14 @@ static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_10_4_READY_EVENTID:
|
||||
ath10k_wmi_event_ready(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
|
||||
ath10k_wmi_event_peer_sta_kickout(ar, skb);
|
||||
break;
|
||||
case WMI_10_4_ROAM_EVENTID:
|
||||
ath10k_wmi_event_roam(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_4_HOST_SWBA_EVENTID:
|
||||
ath10k_wmi_event_host_swba(ar, skb);
|
||||
@ -5375,12 +5419,15 @@ static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
case WMI_10_4_DEBUG_PRINT_EVENTID:
|
||||
ath10k_wmi_event_debug_print(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_4_VDEV_START_RESP_EVENTID:
|
||||
ath10k_wmi_event_vdev_start_resp(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_4_VDEV_STOPPED_EVENTID:
|
||||
ath10k_wmi_event_vdev_stopped(ar, skb);
|
||||
ath10k_wmi_queue_set_coverage_class_work(ar);
|
||||
break;
|
||||
case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
|
||||
case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
|
||||
@ -5397,6 +5444,9 @@ static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
|
||||
ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
|
||||
break;
|
||||
case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
|
||||
ath10k_wmi_event_pdev_tpc_config(ar, skb);
|
||||
break;
|
||||
default:
|
||||
ath10k_warn(ar, "Unknown eventid: %d\n", id);
|
||||
break;
|
||||
@ -6096,6 +6146,7 @@ void ath10k_wmi_start_scan_init(struct ath10k *ar,
|
||||
| WMI_SCAN_EVENT_COMPLETED
|
||||
| WMI_SCAN_EVENT_BSS_CHANNEL
|
||||
| WMI_SCAN_EVENT_FOREIGN_CHANNEL
|
||||
| WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
|
||||
| WMI_SCAN_EVENT_DEQUEUED;
|
||||
arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
|
||||
arg->n_bssids = 1;
|
||||
@ -8153,6 +8204,7 @@ static const struct wmi_ops wmi_10_4_ops = {
|
||||
.get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
|
||||
.gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
|
||||
.gen_echo = ath10k_wmi_op_gen_echo,
|
||||
.gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
|
||||
};
|
||||
|
||||
int ath10k_wmi_attach(struct ath10k *ar)
|
||||
|
@ -75,6 +75,8 @@ struct ath6kl_sdio {
|
||||
#define CMD53_ARG_FIXED_ADDRESS 0
|
||||
#define CMD53_ARG_INCR_ADDRESS 1
|
||||
|
||||
static int ath6kl_sdio_config(struct ath6kl *ar);
|
||||
|
||||
static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar)
|
||||
{
|
||||
return ar->hif_priv;
|
||||
@ -526,8 +528,15 @@ static int ath6kl_sdio_power_on(struct ath6kl *ar)
|
||||
*/
|
||||
msleep(10);
|
||||
|
||||
ret = ath6kl_sdio_config(ar);
|
||||
if (ret) {
|
||||
ath6kl_err("Failed to config sdio: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
ar_sdio->is_disabled = false;
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -703,8 +712,10 @@ static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
|
||||
* ath6kl_hif_rw_comp_handler() with status -ECANCELED so
|
||||
* that the packet is properly freed?
|
||||
*/
|
||||
if (s_req->busrequest)
|
||||
if (s_req->busrequest) {
|
||||
s_req->busrequest->scat_req = 0;
|
||||
ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest);
|
||||
}
|
||||
kfree(s_req->virt_dma_buf);
|
||||
kfree(s_req->sgentries);
|
||||
kfree(s_req);
|
||||
@ -712,6 +723,8 @@ static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
|
||||
spin_lock_bh(&ar_sdio->scat_lock);
|
||||
}
|
||||
spin_unlock_bh(&ar_sdio->scat_lock);
|
||||
|
||||
ar_sdio->scatter_enabled = false;
|
||||
}
|
||||
|
||||
/* setup of HIF scatter resources */
|
||||
|
@ -22,7 +22,7 @@
|
||||
#include "ar9003_phy.h"
|
||||
|
||||
#define ATH9K_RNG_BUF_SIZE 320
|
||||
#define ATH9K_RNG_ENTROPY(x) (((x) * 8 * 320) >> 10) /* quality: 320/1024 */
|
||||
#define ATH9K_RNG_ENTROPY(x) (((x) * 8 * 10) >> 5) /* quality: 10/32 */
|
||||
|
||||
static int ath9k_rng_data_read(struct ath_softc *sc, u32 *buf, u32 buf_size)
|
||||
{
|
||||
|
@ -449,7 +449,7 @@ static void ath_reg_apply_world_flags(struct wiphy *wiphy,
|
||||
}
|
||||
}
|
||||
|
||||
static u16 ath_regd_find_country_by_name(char *alpha2)
|
||||
u16 ath_regd_find_country_by_name(char *alpha2)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
@ -460,6 +460,7 @@ static u16 ath_regd_find_country_by_name(char *alpha2)
|
||||
|
||||
return -1;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_regd_find_country_by_name);
|
||||
|
||||
static int __ath_reg_dyn_country(struct wiphy *wiphy,
|
||||
struct ath_regulatory *reg,
|
||||
|
@ -251,6 +251,7 @@ enum CountryCode {
|
||||
|
||||
bool ath_is_world_regd(struct ath_regulatory *reg);
|
||||
bool ath_is_49ghz_allowed(u16 redomain);
|
||||
u16 ath_regd_find_country_by_name(char *alpha2);
|
||||
int ath_regd_init(struct ath_regulatory *reg, struct wiphy *wiphy,
|
||||
void (*reg_notifier)(struct wiphy *wiphy,
|
||||
struct regulatory_request *request));
|
||||
|
Loading…
Reference in New Issue
Block a user