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drm/amdgpu/pm/smu7: drop message about VI performance levels

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Earlier chips only had two performance levels, but newer
ones potentially had more.  The message is harmless.  Drop the
message to avoid spamming the log.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1874
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2022-01-21 09:23:47 -05:00
parent f2bde8349c
commit b9610edcfe
1 changed files with 0 additions and 4 deletions
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4
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
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@@ -3295,10 +3295,6 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
request_ps->classification.ui_label); request_ps->classification.ui_label);
data->mclk_ignore_signal = false; data->mclk_ignore_signal = false;
PP_ASSERT_WITH_CODE(smu7_ps->performance_level_count == 2,
"VI should always have 2 performance levels",
);
max_limits = adev->pm.ac_power ? max_limits = adev->pm.ac_power ?
&(hwmgr->dyn_state.max_clock_voltage_on_ac) : &(hwmgr->dyn_state.max_clock_voltage_on_ac) :
&(hwmgr->dyn_state.max_clock_voltage_on_dc); &(hwmgr->dyn_state.max_clock_voltage_on_dc);