forked from Minki/linux
net/mlx5: Print health buffer by log level
Add log macro which gets log level as a parameter. Use the severity read from the health buffer and the new log macro to log the health buffer with severity as log level. Prior to this patch, health buffer was printed in error log level regardless of its severity. Now the user may filter dmesg (--level) or change kernel log level to focus on different severity levels of firmware errors. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -543,6 +543,8 @@ The CR-space dump uses vsc interface which is valid even if the FW command
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interface is not functional, which is the case in most FW fatal errors.
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The recover function runs recover flow which reloads the driver and triggers fw
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reset if needed.
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On firmware error, the health buffer is dumped into the dmesg. The log
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level is derived from the error's severity (given in health buffer).
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User commands examples:
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@ -422,27 +422,26 @@ static void print_health_info(struct mlx5_core_dev *dev)
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rfr_severity = ioread8(&h->rfr_severity);
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severity = mlx5_health_get_severity(rfr_severity);
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mlx5_core_err(dev, "Health issue observed, %s, severity(%d) %s:\n",
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hsynd_str(ioread8(&h->synd)), severity, mlx5_loglevel_str(severity));
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mlx5_log(dev, severity, "Health issue observed, %s, severity(%d) %s:\n",
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hsynd_str(ioread8(&h->synd)), severity, mlx5_loglevel_str(severity));
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for (i = 0; i < ARRAY_SIZE(h->assert_var); i++)
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mlx5_core_err(dev, "assert_var[%d] 0x%08x\n", i,
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ioread32be(h->assert_var + i));
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mlx5_log(dev, severity, "assert_var[%d] 0x%08x\n", i,
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ioread32be(h->assert_var + i));
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mlx5_core_err(dev, "assert_exit_ptr 0x%08x\n",
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ioread32be(&h->assert_exit_ptr));
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mlx5_core_err(dev, "assert_callra 0x%08x\n",
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ioread32be(&h->assert_callra));
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mlx5_core_err(dev, "fw_ver %d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev));
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mlx5_core_err(dev, "time %u\n", ioread32be(&h->time));
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mlx5_core_err(dev, "hw_id 0x%08x\n", ioread32be(&h->hw_id));
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mlx5_core_err(dev, "rfr %d\n", mlx5_health_get_rfr(rfr_severity));
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mlx5_core_err(dev, "severity %d (%s)\n", severity, mlx5_loglevel_str(severity));
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mlx5_core_err(dev, "irisc_index %d\n", ioread8(&h->irisc_index));
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mlx5_core_err(dev, "synd 0x%x: %s\n", ioread8(&h->synd),
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hsynd_str(ioread8(&h->synd)));
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mlx5_core_err(dev, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd));
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mlx5_core_err(dev, "raw fw_ver 0x%08x\n", ioread32be(&h->fw_ver));
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mlx5_log(dev, severity, "assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr));
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mlx5_log(dev, severity, "assert_callra 0x%08x\n", ioread32be(&h->assert_callra));
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mlx5_log(dev, severity, "fw_ver %d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev),
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fw_rev_sub(dev));
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mlx5_log(dev, severity, "time %u\n", ioread32be(&h->time));
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mlx5_log(dev, severity, "hw_id 0x%08x\n", ioread32be(&h->hw_id));
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mlx5_log(dev, severity, "rfr %d\n", mlx5_health_get_rfr(rfr_severity));
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mlx5_log(dev, severity, "severity %d (%s)\n", severity, mlx5_loglevel_str(severity));
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mlx5_log(dev, severity, "irisc_index %d\n", ioread8(&h->irisc_index));
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mlx5_log(dev, severity, "synd 0x%x: %s\n", ioread8(&h->synd),
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hsynd_str(ioread8(&h->synd)));
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mlx5_log(dev, severity, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd));
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mlx5_log(dev, severity, "raw fw_ver 0x%08x\n", ioread32be(&h->fw_ver));
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}
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static int
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@ -97,6 +97,30 @@ do { \
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__func__, __LINE__, current->pid, \
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##__VA_ARGS__)
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static inline void mlx5_printk(struct mlx5_core_dev *dev, int level, const char *format, ...)
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{
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struct device *device = dev->device;
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struct va_format vaf;
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va_list args;
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if (WARN_ONCE(level < LOGLEVEL_EMERG || level > LOGLEVEL_DEBUG,
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"Level %d is out of range, set to default level\n", level))
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level = LOGLEVEL_DEFAULT;
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va_start(args, format);
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vaf.fmt = format;
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vaf.va = &args;
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dev_printk_emit(level, device, "%s %s: %pV", dev_driver_string(device), dev_name(device),
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&vaf);
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va_end(args);
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}
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#define mlx5_log(__dev, level, format, ...) \
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mlx5_printk(__dev, level, "%s:%d:(pid %d): " format, \
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__func__, __LINE__, current->pid, \
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##__VA_ARGS__)
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static inline struct device *mlx5_core_dma_dev(struct mlx5_core_dev *dev)
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{
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return &dev->pdev->dev;
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