forked from Minki/linux
drm/sun4i: Add support for HW scaling to DE2
Scaling is currently supported only for RGB framebuffers Coefficients and algorithm which coefficients to select are taken from BSP driver. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171201060550.10392-22-jernej.skrabec@siol.net
This commit is contained in:
Jernej Skrabec
Maxime Ripard
parent
5b1f8367f3
commit
b862a648de
@ -10,7 +10,8 @@ sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
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sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o
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sun8i-mixer-y += sun8i_mixer.o sun8i_ui_layer.o \
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sun8i_vi_layer.o
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sun8i_vi_layer.o sun8i_ui_scaler.o \
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sun8i_vi_scaler.o
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sun4i-tcon-y += sun4i_crtc.o
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sun4i-tcon-y += sun4i_dotclock.o
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@ -77,10 +77,6 @@
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* These sub-engines are still unknown now, the EN registers are here only to
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* be used to disable these sub-engines.
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*/
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#define SUN8I_MIXER_VSU_EN 0x20000
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#define SUN8I_MIXER_GSU1_EN 0x30000
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#define SUN8I_MIXER_GSU2_EN 0x40000
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#define SUN8I_MIXER_GSU3_EN 0x50000
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#define SUN8I_MIXER_FCE_EN 0xa0000
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#define SUN8I_MIXER_BWS_EN 0xa2000
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#define SUN8I_MIXER_LTI_EN 0xa4000
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@ -24,6 +24,7 @@
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#include "sun8i_ui_layer.h"
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#include "sun8i_mixer.h"
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#include "sun8i_ui_scaler.h"
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static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
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int overlay, bool enable)
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@ -56,29 +57,35 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel,
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int overlay, struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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u32 width, height, size;
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u32 src_w, src_h, dst_w, dst_h;
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u32 outsize, insize;
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u32 hphase, vphase;
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DRM_DEBUG_DRIVER("Updating channel %d overlay %d\n", channel, overlay);
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DRM_DEBUG_DRIVER("Updating UI channel %d overlay %d\n",
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channel, overlay);
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/*
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* Same source and destination width and height are guaranteed
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* by atomic check function.
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*/
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width = drm_rect_width(&state->dst);
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height = drm_rect_height(&state->dst);
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size = SUN8I_MIXER_SIZE(width, height);
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src_w = drm_rect_width(&state->src) >> 16;
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src_h = drm_rect_height(&state->src) >> 16;
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dst_w = drm_rect_width(&state->dst);
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dst_h = drm_rect_height(&state->dst);
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hphase = state->src.x1 & 0xffff;
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vphase = state->src.y1 & 0xffff;
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insize = SUN8I_MIXER_SIZE(src_w, src_h);
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outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
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if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
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bool interlaced = false;
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u32 val;
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DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n",
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width, height);
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dst_w, dst_h);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_GLOBAL_SIZE,
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size);
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outsize);
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regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_OUTSIZE,
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size);
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outsize);
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if (state->crtc)
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interlaced = state->crtc->state->adjusted_mode.flags
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@ -99,23 +106,42 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel,
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}
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/* Set height and width */
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DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n", width, height);
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DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n",
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state->src.x1 >> 16, state->src.y1 >> 16);
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DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_LAYER_SIZE(channel, overlay),
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size);
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insize);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_OVL_SIZE(channel),
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size);
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insize);
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if (insize != outsize || hphase || vphase) {
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u32 hscale, vscale;
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DRM_DEBUG_DRIVER("HW scaling is enabled\n");
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hscale = state->src_w / state->crtc_w;
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vscale = state->src_h / state->crtc_h;
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sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, dst_w,
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dst_h, hscale, vscale, hphase, vphase);
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sun8i_ui_scaler_enable(mixer, channel, true);
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} else {
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DRM_DEBUG_DRIVER("HW scaling is not needed\n");
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sun8i_ui_scaler_enable(mixer, channel, false);
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}
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/* Set base coordinates */
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DRM_DEBUG_DRIVER("Layer coordinates X: %d Y: %d\n",
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DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n",
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state->dst.x1, state->dst.y1);
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DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_BLEND_ATTR_COORD(channel),
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SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1));
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_BLEND_ATTR_INSIZE(channel),
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size);
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outsize);
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return 0;
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}
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@ -181,8 +207,10 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel,
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static int sun8i_ui_layer_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane);
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struct drm_crtc *crtc = state->crtc;
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struct drm_crtc_state *crtc_state;
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int min_scale, max_scale;
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struct drm_rect clip;
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if (!crtc)
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@ -197,9 +225,16 @@ static int sun8i_ui_layer_atomic_check(struct drm_plane *plane,
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clip.x2 = crtc_state->adjusted_mode.hdisplay;
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clip.y2 = crtc_state->adjusted_mode.vdisplay;
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min_scale = DRM_PLANE_HELPER_NO_SCALING;
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max_scale = DRM_PLANE_HELPER_NO_SCALING;
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if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) {
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min_scale = SUN8I_UI_SCALER_SCALE_MIN;
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max_scale = SUN8I_UI_SCALER_SCALE_MAX;
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}
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return drm_atomic_helper_check_plane_state(state, crtc_state, &clip,
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DRM_PLANE_HELPER_NO_SCALING,
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DRM_PLANE_HELPER_NO_SCALING,
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min_scale, max_scale,
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true, true);
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}
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172
drivers/gpu/drm/sun4i/sun8i_ui_scaler.c
Normal file
172
drivers/gpu/drm/sun4i/sun8i_ui_scaler.c
Normal file
@ -0,0 +1,172 @@
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/*
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* Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
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*
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* Coefficients are taken from BSP driver, which is:
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* Copyright (C) 2014-2015 Allwinner
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include "sun8i_ui_scaler.h"
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static const u32 lan2coefftab16[240] = {
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0x00004000, 0x00033ffe, 0x00063efc, 0x000a3bfb,
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0xff0f37fb, 0xfe1433fb, 0xfd192ffb, 0xfd1f29fb,
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0xfc2424fc, 0xfb291ffd, 0xfb2f19fd, 0xfb3314fe,
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0xfb370fff, 0xfb3b0a00, 0xfc3e0600, 0xfe3f0300,
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0xff053804, 0xff083801, 0xff0a3700, 0xff0e34ff,
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0xff1232fd, 0xfe162ffd, 0xfd1b2cfc, 0xfd1f28fc,
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0xfd2323fd, 0xfc281ffd, 0xfc2c1bfd, 0xfd2f16fe,
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0xfd3212ff, 0xff340eff, 0x00360a00, 0x02370700,
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0xff083207, 0xff0a3205, 0xff0d3103, 0xfe113001,
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0xfe142e00, 0xfe182bff, 0xfe1b29fe, 0xfe1f25fe,
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0xfe2222fe, 0xfe251ffe, 0xfe291bfe, 0xff2b18fe,
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0x002e14fe, 0x013010ff, 0x03310dff, 0x05310a00,
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0xff0a2e09, 0xff0c2e07, 0xff0f2d05, 0xff122c03,
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0xfe152b02, 0xfe182901, 0xfe1b2700, 0xff1e24ff,
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0xff2121ff, 0xff241eff, 0x00261bff, 0x012818ff,
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0x022a15ff, 0x032c12ff, 0x052d0fff, 0x072d0c00,
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0xff0c2a0b, 0xff0e2a09, 0xff102a07, 0xff132905,
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0xff162803, 0xff182702, 0xff1b2501, 0xff1e2300,
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0x00202000, 0x01221d00, 0x01251bff, 0x032618ff,
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0x042815ff, 0x052913ff, 0x072a10ff, 0x092a0d00,
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0xff0d280c, 0xff0f280a, 0xff112808, 0xff142706,
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0xff162605, 0xff192503, 0x001b2302, 0x001d2201,
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0x011f1f01, 0x01221d00, 0x02231b00, 0x04241800,
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0x052616ff, 0x072713ff, 0x08271100, 0x0a280e00,
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0xff0e260d, 0xff10260b, 0xff122609, 0xff142508,
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0x00152506, 0x00182305, 0x001b2203, 0x011d2002,
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0x011f1f01, 0x02201d01, 0x03221b00, 0x04231801,
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0x06241600, 0x08251300, 0x09261100, 0x0b260f00,
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0xff0e250e, 0xff10250c, 0x0011250a, 0x00142408,
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0x00162307, 0x00182206, 0x011a2104, 0x011c2003,
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0x021e1e02, 0x03201c01, 0x04211a01, 0x05221801,
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0x07231600, 0x08241400, 0x0a241200, 0x0c241000,
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0x000e240e, 0x0010240c, 0x0013230a, 0x00142309,
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0x00162208, 0x01182106, 0x011a2005, 0x021b1f04,
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0x031d1d03, 0x041e1c02, 0x05201a01, 0x06211801,
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0x07221601, 0x09231400, 0x0a231300, 0x0c231100,
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0x000f220f, 0x0011220d, 0x0013220b, 0x0015210a,
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0x01162108, 0x01182007, 0x02191f06, 0x031a1e05,
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0x041c1c04, 0x051d1b03, 0x061f1902, 0x07201801,
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0x08211601, 0x0a211500, 0x0b221300, 0x0d221100,
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0x0010210f, 0x0011210e, 0x0013210c, 0x0114200b,
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0x01161f0a, 0x02171f08, 0x03181e07, 0x031a1d06,
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0x041c1c04, 0x051d1a04, 0x071d1903, 0x081e1802,
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0x091f1602, 0x0b1f1501, 0x0c211300, 0x0e201200,
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0x00102010, 0x0012200e, 0x0013200d, 0x01151f0b,
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0x01161f0a, 0x02171e09, 0x03191d07, 0x041a1c06,
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0x051b1b05, 0x061c1a04, 0x071d1903, 0x081e1703,
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0x0a1f1601, 0x0b1f1501, 0x0d201300, 0x0e201200,
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0x00102010, 0x00121f0f, 0x00141f0d, 0x01141f0c,
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0x02161e0a, 0x03171d09, 0x03181d08, 0x041a1c06,
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0x051b1b05, 0x061c1a04, 0x081c1903, 0x091d1703,
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0x0a1e1602, 0x0c1e1501, 0x0d1f1400, 0x0e1f1201,
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0x00111e11, 0x00131e0f, 0x01131e0e, 0x02151d0c,
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0x02161d0b, 0x03171c0a, 0x04181b09, 0x05191b07,
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0x061a1a06, 0x071b1905, 0x091b1804, 0x0a1c1703,
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0x0b1d1602, 0x0c1d1502, 0x0e1d1401, 0x0f1e1300,
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0x00111e11, 0x00131d10, 0x01141d0e, 0x02151c0d,
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0x03161c0b, 0x04171b0a, 0x05171b09, 0x06181a08,
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0x07191907, 0x081a1806, 0x091a1805, 0x0a1b1704,
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0x0b1c1603, 0x0d1c1502, 0x0e1d1401, 0x0f1d1301,
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};
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static int sun8i_ui_scaler_coef_index(unsigned int step)
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{
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unsigned int scale, int_part, float_part;
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scale = step >> (SUN8I_UI_SCALER_SCALE_FRAC - 3);
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int_part = scale >> 3;
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float_part = scale & 0x7;
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switch (int_part) {
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case 0:
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return 0;
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case 1:
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return float_part;
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case 2:
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return 8 + (float_part >> 1);
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case 3:
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return 12;
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case 4:
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return 13;
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default:
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return 14;
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}
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}
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void sun8i_ui_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable)
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{
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int vi_cnt = mixer->cfg->vi_num;
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u32 val;
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if (WARN_ON(layer < vi_cnt))
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return;
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if (enable)
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val = SUN8I_SCALER_GSU_CTRL_EN |
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SUN8I_SCALER_GSU_CTRL_COEFF_RDY;
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else
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val = 0;
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regmap_write(mixer->engine.regs,
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SUN8I_SCALER_GSU_CTRL(vi_cnt, layer - vi_cnt), val);
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}
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void sun8i_ui_scaler_setup(struct sun8i_mixer *mixer, int layer,
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u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
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u32 hscale, u32 vscale, u32 hphase, u32 vphase)
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{
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int vi_cnt = mixer->cfg->vi_num;
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u32 insize, outsize;
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int i, offset;
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if (WARN_ON(layer < vi_cnt))
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return;
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hphase <<= SUN8I_UI_SCALER_PHASE_FRAC - 16;
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vphase <<= SUN8I_UI_SCALER_PHASE_FRAC - 16;
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hscale <<= SUN8I_UI_SCALER_SCALE_FRAC - 16;
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vscale <<= SUN8I_UI_SCALER_SCALE_FRAC - 16;
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insize = SUN8I_UI_SCALER_SIZE(src_w, src_h);
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outsize = SUN8I_UI_SCALER_SIZE(dst_w, dst_h);
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layer -= vi_cnt;
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regmap_write(mixer->engine.regs,
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SUN8I_SCALER_GSU_OUTSIZE(vi_cnt, layer), outsize);
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regmap_write(mixer->engine.regs,
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SUN8I_SCALER_GSU_INSIZE(vi_cnt, layer), insize);
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regmap_write(mixer->engine.regs,
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SUN8I_SCALER_GSU_HSTEP(vi_cnt, layer), hscale);
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regmap_write(mixer->engine.regs,
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SUN8I_SCALER_GSU_VSTEP(vi_cnt, layer), vscale);
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regmap_write(mixer->engine.regs,
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SUN8I_SCALER_GSU_HPHASE(vi_cnt, layer), hphase);
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regmap_write(mixer->engine.regs,
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SUN8I_SCALER_GSU_VPHASE(vi_cnt, layer), vphase);
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offset = sun8i_ui_scaler_coef_index(hscale) *
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SUN8I_UI_SCALER_COEFF_COUNT;
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for (i = 0; i < SUN8I_UI_SCALER_COEFF_COUNT; i++)
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regmap_write(mixer->engine.regs,
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SUN8I_SCALER_GSU_HCOEFF(vi_cnt, layer, i),
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lan2coefftab16[offset + i]);
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}
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49
drivers/gpu/drm/sun4i/sun8i_ui_scaler.h
Normal file
49
drivers/gpu/drm/sun4i/sun8i_ui_scaler.h
Normal file
@ -0,0 +1,49 @@
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/*
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* Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef _SUN8I_UI_SCALER_H_
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#define _SUN8I_UI_SCALER_H_
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#include "sun8i_mixer.h"
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/* this two macros assumes 16 fractional bits which is standard in DRM */
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#define SUN8I_UI_SCALER_SCALE_MIN 1
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#define SUN8I_UI_SCALER_SCALE_MAX ((1UL << 20) - 1)
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#define SUN8I_UI_SCALER_SCALE_FRAC 20
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#define SUN8I_UI_SCALER_PHASE_FRAC 20
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#define SUN8I_UI_SCALER_COEFF_COUNT 16
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#define SUN8I_UI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1))
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#define SUN8I_SCALER_GSU_CTRL(vi_cnt, ui_idx) \
|
||||
(0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x0)
|
||||
#define SUN8I_SCALER_GSU_OUTSIZE(vi_cnt, ui_idx) \
|
||||
(0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x40)
|
||||
#define SUN8I_SCALER_GSU_INSIZE(vi_cnt, ui_idx) \
|
||||
(0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x80)
|
||||
#define SUN8I_SCALER_GSU_HSTEP(vi_cnt, ui_idx) \
|
||||
(0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x88)
|
||||
#define SUN8I_SCALER_GSU_VSTEP(vi_cnt, ui_idx) \
|
||||
(0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x8c)
|
||||
#define SUN8I_SCALER_GSU_HPHASE(vi_cnt, ui_idx) \
|
||||
(0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x90)
|
||||
#define SUN8I_SCALER_GSU_VPHASE(vi_cnt, ui_idx) \
|
||||
(0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x98)
|
||||
#define SUN8I_SCALER_GSU_HCOEFF(vi_cnt, ui_idx, index) \
|
||||
(0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x200 + \
|
||||
0x4 * (index))
|
||||
|
||||
#define SUN8I_SCALER_GSU_CTRL_EN BIT(0)
|
||||
#define SUN8I_SCALER_GSU_CTRL_COEFF_RDY BIT(4)
|
||||
|
||||
void sun8i_ui_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable);
|
||||
void sun8i_ui_scaler_setup(struct sun8i_mixer *mixer, int layer,
|
||||
u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
|
||||
u32 hscale, u32 vscale, u32 hphase, u32 vphase);
|
||||
|
||||
#endif
|
||||
@ -18,6 +18,7 @@
|
||||
|
||||
#include "sun8i_vi_layer.h"
|
||||
#include "sun8i_mixer.h"
|
||||
#include "sun8i_vi_scaler.h"
|
||||
|
||||
static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
|
||||
int overlay, bool enable)
|
||||
@ -50,36 +51,61 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
|
||||
int overlay, struct drm_plane *plane)
|
||||
{
|
||||
struct drm_plane_state *state = plane->state;
|
||||
u32 width, height, size;
|
||||
u32 src_w, src_h, dst_w, dst_h;
|
||||
u32 outsize, insize;
|
||||
u32 hphase, vphase;
|
||||
|
||||
DRM_DEBUG_DRIVER("Updating VI channel %d overlay %d\n",
|
||||
channel, overlay);
|
||||
/*
|
||||
* Same source and destination width and height are guaranteed
|
||||
* by atomic check function.
|
||||
*/
|
||||
width = drm_rect_width(&state->dst);
|
||||
height = drm_rect_height(&state->dst);
|
||||
size = SUN8I_MIXER_SIZE(width, height);
|
||||
|
||||
src_w = drm_rect_width(&state->src) >> 16;
|
||||
src_h = drm_rect_height(&state->src) >> 16;
|
||||
dst_w = drm_rect_width(&state->dst);
|
||||
dst_h = drm_rect_height(&state->dst);
|
||||
|
||||
hphase = state->src.x1 & 0xffff;
|
||||
vphase = state->src.y1 & 0xffff;
|
||||
|
||||
insize = SUN8I_MIXER_SIZE(src_w, src_h);
|
||||
outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
|
||||
|
||||
/* Set height and width */
|
||||
DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n", width, height);
|
||||
DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n",
|
||||
state->src.x1 >> 16, state->src.y1 >> 16);
|
||||
DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_MIXER_CHAN_VI_LAYER_SIZE(channel, overlay),
|
||||
size);
|
||||
insize);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_MIXER_CHAN_VI_OVL_SIZE(channel),
|
||||
size);
|
||||
insize);
|
||||
|
||||
if (insize != outsize || hphase || vphase) {
|
||||
u32 hscale, vscale;
|
||||
|
||||
DRM_DEBUG_DRIVER("HW scaling is enabled\n");
|
||||
|
||||
hscale = state->src_w / state->crtc_w;
|
||||
vscale = state->src_h / state->crtc_h;
|
||||
|
||||
sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w,
|
||||
dst_h, hscale, vscale, hphase, vphase);
|
||||
sun8i_vi_scaler_enable(mixer, channel, true);
|
||||
} else {
|
||||
DRM_DEBUG_DRIVER("HW scaling is not needed\n");
|
||||
sun8i_vi_scaler_enable(mixer, channel, false);
|
||||
}
|
||||
|
||||
/* Set base coordinates */
|
||||
DRM_DEBUG_DRIVER("Layer coordinates X: %d Y: %d\n",
|
||||
DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n",
|
||||
state->dst.x1, state->dst.y1);
|
||||
DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_MIXER_BLEND_ATTR_COORD(channel),
|
||||
SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1));
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_MIXER_BLEND_ATTR_INSIZE(channel),
|
||||
size);
|
||||
outsize);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -147,8 +173,10 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel,
|
||||
static int sun8i_vi_layer_atomic_check(struct drm_plane *plane,
|
||||
struct drm_plane_state *state)
|
||||
{
|
||||
struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane);
|
||||
struct drm_crtc *crtc = state->crtc;
|
||||
struct drm_crtc_state *crtc_state;
|
||||
int min_scale, max_scale;
|
||||
struct drm_rect clip;
|
||||
|
||||
if (!crtc)
|
||||
@ -163,9 +191,13 @@ static int sun8i_vi_layer_atomic_check(struct drm_plane *plane,
|
||||
clip.x2 = crtc_state->adjusted_mode.hdisplay;
|
||||
clip.y2 = crtc_state->adjusted_mode.vdisplay;
|
||||
|
||||
if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) {
|
||||
min_scale = SUN8I_VI_SCALER_SCALE_MIN;
|
||||
max_scale = SUN8I_VI_SCALER_SCALE_MAX;
|
||||
}
|
||||
|
||||
return drm_atomic_helper_check_plane_state(state, crtc_state, &clip,
|
||||
DRM_PLANE_HELPER_NO_SCALING,
|
||||
DRM_PLANE_HELPER_NO_SCALING,
|
||||
min_scale, max_scale,
|
||||
true, true);
|
||||
}
|
||||
|
||||
|
||||
535
drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
Normal file
535
drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
Normal file
@ -0,0 +1,535 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
*
|
||||
* Coefficients are taken from BSP driver, which is:
|
||||
* Copyright (C) 2014-2015 Allwinner
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include "sun8i_vi_scaler.h"
|
||||
|
||||
static const u32 lan3coefftab32_left[480] = {
|
||||
0x40000000, 0x40fe0000, 0x3ffd0100, 0x3efc0100,
|
||||
0x3efb0100, 0x3dfa0200, 0x3cf90200, 0x3bf80200,
|
||||
0x39f70200, 0x37f70200, 0x35f70200, 0x33f70200,
|
||||
0x31f70200, 0x2ef70200, 0x2cf70200, 0x2af70200,
|
||||
0x27f70200, 0x24f80100, 0x22f80100, 0x1ef90100,
|
||||
0x1cf90100, 0x19fa0100, 0x17fa0100, 0x14fb0100,
|
||||
0x11fc0000, 0x0ffc0000, 0x0cfd0000, 0x0afd0000,
|
||||
0x08fe0000, 0x05ff0000, 0x03ff0000, 0x02000000,
|
||||
|
||||
0x3806fc02, 0x3805fc02, 0x3803fd01, 0x3801fe01,
|
||||
0x3700fe01, 0x35ffff01, 0x35fdff01, 0x34fc0001,
|
||||
0x34fb0000, 0x33fa0000, 0x31fa0100, 0x2ff90100,
|
||||
0x2df80200, 0x2bf80200, 0x2af70200, 0x28f70200,
|
||||
0x27f70200, 0x24f70300, 0x22f70300, 0x1ff70300,
|
||||
0x1ef70300, 0x1cf70300, 0x1af70300, 0x18f70300,
|
||||
0x16f80300, 0x13f80300, 0x11f90300, 0x0ef90300,
|
||||
0x0efa0200, 0x0cfa0200, 0x0afb0200, 0x08fb0200,
|
||||
|
||||
0x320bfa02, 0x3309fa02, 0x3208fb02, 0x3206fb02,
|
||||
0x3205fb02, 0x3104fc02, 0x3102fc01, 0x3001fd01,
|
||||
0x3000fd01, 0x2ffffd01, 0x2efefe01, 0x2dfdfe01,
|
||||
0x2bfcff01, 0x29fcff01, 0x28fbff01, 0x27fa0001,
|
||||
0x26fa0000, 0x24f90000, 0x22f90100, 0x20f90100,
|
||||
0x1ff80100, 0x1ef80100, 0x1cf80100, 0x1af80200,
|
||||
0x18f80200, 0x17f80200, 0x15f80200, 0x12f80200,
|
||||
0x11f90200, 0x0ff90200, 0x0df90200, 0x0cfa0200,
|
||||
|
||||
0x2e0efa01, 0x2f0dfa01, 0x2f0bfa01, 0x2e0afa01,
|
||||
0x2e09fa01, 0x2e07fb01, 0x2d06fb01, 0x2d05fb01,
|
||||
0x2c04fb01, 0x2b03fc01, 0x2a02fc01, 0x2a01fc01,
|
||||
0x2800fd01, 0x28fffd01, 0x26fefd01, 0x25fefe01,
|
||||
0x24fdfe01, 0x23fcfe01, 0x21fcff01, 0x20fbff01,
|
||||
0x1efbff01, 0x1efbff00, 0x1cfa0000, 0x1bfa0000,
|
||||
0x19fa0000, 0x18fa0000, 0x17f90000, 0x15f90100,
|
||||
0x14f90100, 0x12f90100, 0x11f90100, 0x0ff90100,
|
||||
|
||||
0x2b10fa00, 0x2b0ffa00, 0x2b0efa00, 0x2b0cfa00,
|
||||
0x2b0bfa00, 0x2a0afb01, 0x2a09fb01, 0x2908fb01,
|
||||
0x2807fb01, 0x2806fb01, 0x2805fb01, 0x2604fc01,
|
||||
0x2503fc01, 0x2502fc01, 0x2401fc01, 0x2301fc01,
|
||||
0x2100fd01, 0x21fffd01, 0x21fffd01, 0x20fefd01,
|
||||
0x1dfefe01, 0x1cfdfe01, 0x1cfdfe00, 0x1bfcfe00,
|
||||
0x19fcff00, 0x19fbff00, 0x17fbff00, 0x16fbff00,
|
||||
0x15fbff00, 0x14fb0000, 0x13fa0000, 0x11fa0000,
|
||||
|
||||
0x2811fcff, 0x2810fcff, 0x280ffbff, 0x280efbff,
|
||||
0x270dfb00, 0x270cfb00, 0x270bfb00, 0x260afb00,
|
||||
0x2609fb00, 0x2508fb00, 0x2507fb00, 0x2407fb00,
|
||||
0x2406fc00, 0x2305fc00, 0x2204fc00, 0x2203fc00,
|
||||
0x2103fc00, 0x2002fc00, 0x1f01fd00, 0x1e01fd00,
|
||||
0x1d00fd00, 0x1dfffd00, 0x1cfffd00, 0x1bfefd00,
|
||||
0x1afefe00, 0x19fefe00, 0x18fdfe00, 0x17fdfe00,
|
||||
0x16fdfe00, 0x15fcff00, 0x13fcff00, 0x12fcff00,
|
||||
|
||||
0x2512fdfe, 0x2511fdff, 0x2410fdff, 0x240ffdff,
|
||||
0x240efcff, 0x240dfcff, 0x240dfcff, 0x240cfcff,
|
||||
0x230bfcff, 0x230afc00, 0x2209fc00, 0x2108fc00,
|
||||
0x2108fc00, 0x2007fc00, 0x2006fc00, 0x2005fc00,
|
||||
0x1f05fc00, 0x1e04fc00, 0x1e03fc00, 0x1c03fd00,
|
||||
0x1c02fd00, 0x1b02fd00, 0x1b01fd00, 0x1a00fd00,
|
||||
0x1900fd00, 0x1800fd00, 0x17fffe00, 0x16fffe00,
|
||||
0x16fefe00, 0x14fefe00, 0x13fefe00, 0x13fdfe00,
|
||||
|
||||
0x2212fffe, 0x2211fefe, 0x2211fefe, 0x2110fefe,
|
||||
0x210ffeff, 0x220efdff, 0x210dfdff, 0x210dfdff,
|
||||
0x210cfdff, 0x210bfdff, 0x200afdff, 0x200afdff,
|
||||
0x1f09fdff, 0x1f08fdff, 0x1d08fd00, 0x1c07fd00,
|
||||
0x1d06fd00, 0x1b06fd00, 0x1b05fd00, 0x1c04fd00,
|
||||
0x1b04fd00, 0x1a03fd00, 0x1a03fd00, 0x1902fd00,
|
||||
0x1802fd00, 0x1801fd00, 0x1701fd00, 0x1600fd00,
|
||||
0x1400fe00, 0x1400fe00, 0x14fffe00, 0x13fffe00,
|
||||
|
||||
0x201200fe, 0x201100fe, 0x1f11fffe, 0x2010fffe,
|
||||
0x1f0ffffe, 0x1e0ffffe, 0x1f0efeff, 0x1f0dfeff,
|
||||
0x1f0dfeff, 0x1e0cfeff, 0x1e0bfeff, 0x1d0bfeff,
|
||||
0x1d0afeff, 0x1d09fdff, 0x1d09fdff, 0x1c08fdff,
|
||||
0x1c07fdff, 0x1b07fd00, 0x1b06fd00, 0x1a06fd00,
|
||||
0x1a05fd00, 0x1805fd00, 0x1904fd00, 0x1804fd00,
|
||||
0x1703fd00, 0x1703fd00, 0x1602fe00, 0x1502fe00,
|
||||
0x1501fe00, 0x1401fe00, 0x1301fe00, 0x1300fe00,
|
||||
|
||||
0x1c1202fe, 0x1c1102fe, 0x1b1102fe, 0x1c1001fe,
|
||||
0x1b1001fe, 0x1b0f01ff, 0x1b0e00ff, 0x1b0e00ff,
|
||||
0x1b0d00ff, 0x1a0d00ff, 0x1a0c00ff, 0x1a0cffff,
|
||||
0x1a0bffff, 0x1a0bffff, 0x1a0affff, 0x180affff,
|
||||
0x1909ffff, 0x1809ffff, 0x1808ffff, 0x1808feff,
|
||||
0x1807feff, 0x1707fe00, 0x1606fe00, 0x1506fe00,
|
||||
0x1605fe00, 0x1505fe00, 0x1504fe00, 0x1304fe00,
|
||||
0x1304fe00, 0x1303fe00, 0x1203fe00, 0x1203fe00,
|
||||
|
||||
0x181104ff, 0x191103ff, 0x191003ff, 0x181003ff,
|
||||
0x180f03ff, 0x190f02ff, 0x190e02ff, 0x180e02ff,
|
||||
0x180d02ff, 0x180d01ff, 0x180d01ff, 0x180c01ff,
|
||||
0x180c01ff, 0x180b00ff, 0x170b00ff, 0x170a00ff,
|
||||
0x170a00ff, 0x170900ff, 0x160900ff, 0x160900ff,
|
||||
0x1608ffff, 0x1508ffff, 0x1507ff00, 0x1507ff00,
|
||||
0x1407ff00, 0x1306ff00, 0x1306ff00, 0x1305ff00,
|
||||
0x1205ff00, 0x1105ff00, 0x1204ff00, 0x1104ff00,
|
||||
|
||||
0x171005ff, 0x171005ff, 0x171004ff, 0x170f04ff,
|
||||
0x160f04ff, 0x170f03ff, 0x170e03ff, 0x160e03ff,
|
||||
0x160d03ff, 0x160d02ff, 0x160d02ff, 0x160c02ff,
|
||||
0x160c02ff, 0x160c02ff, 0x160b01ff, 0x150b01ff,
|
||||
0x150a01ff, 0x150a01ff, 0x150a01ff, 0x140901ff,
|
||||
0x14090000, 0x14090000, 0x14080000, 0x13080000,
|
||||
0x13070000, 0x12070000, 0x12070000, 0x12060000,
|
||||
0x11060000, 0x11060000, 0x11050000, 0x1105ff00,
|
||||
|
||||
0x14100600, 0x15100500, 0x150f0500, 0x150f0500,
|
||||
0x140f0500, 0x150e0400, 0x140e0400, 0x130e0400,
|
||||
0x140d0400, 0x150d0300, 0x130d0300, 0x140c0300,
|
||||
0x140c0300, 0x140c0200, 0x140b0200, 0x130b0200,
|
||||
0x120b0200, 0x130a0200, 0x130a0200, 0x130a0100,
|
||||
0x13090100, 0x12090100, 0x11090100, 0x12080100,
|
||||
0x11080100, 0x10080100, 0x11070100, 0x11070000,
|
||||
0x10070000, 0x11060000, 0x10060000, 0x10060000,
|
||||
|
||||
0x140f0600, 0x140f0600, 0x130f0600, 0x140f0500,
|
||||
0x140e0500, 0x130e0500, 0x130e0500, 0x140d0400,
|
||||
0x140d0400, 0x130d0400, 0x120d0400, 0x130c0400,
|
||||
0x130c0300, 0x130c0300, 0x130b0300, 0x130b0300,
|
||||
0x110b0300, 0x130a0200, 0x120a0200, 0x120a0200,
|
||||
0x120a0200, 0x12090200, 0x10090200, 0x11090100,
|
||||
0x11080100, 0x11080100, 0x10080100, 0x10080100,
|
||||
0x10070100, 0x10070100, 0x0f070100, 0x10060100,
|
||||
|
||||
0x120f0701, 0x130f0601, 0x130e0601, 0x130e0601,
|
||||
0x120e0601, 0x130e0501, 0x130e0500, 0x130d0500,
|
||||
0x120d0500, 0x120d0500, 0x130c0400, 0x130c0400,
|
||||
0x120c0400, 0x110c0400, 0x120b0400, 0x120b0300,
|
||||
0x120b0300, 0x120b0300, 0x120a0300, 0x110a0300,
|
||||
0x110a0200, 0x11090200, 0x11090200, 0x10090200,
|
||||
0x10090200, 0x10080200, 0x10080200, 0x10080100,
|
||||
0x0f080100, 0x10070100, 0x0f070100, 0x0f070100
|
||||
};
|
||||
|
||||
static const u32 lan3coefftab32_right[480] = {
|
||||
0x00000000, 0x00000002, 0x0000ff04, 0x0000ff06,
|
||||
0x0000fe08, 0x0000fd0a, 0x0000fd0c, 0x0000fc0f,
|
||||
0x0000fc12, 0x0001fb14, 0x0001fa17, 0x0001fa19,
|
||||
0x0001f91c, 0x0001f91f, 0x0001f822, 0x0001f824,
|
||||
0x0002f727, 0x0002f72a, 0x0002f72c, 0x0002f72f,
|
||||
0x0002f731, 0x0002f733, 0x0002f735, 0x0002f737,
|
||||
0x0002f73a, 0x0002f83b, 0x0002f93c, 0x0002fa3d,
|
||||
0x0001fb3e, 0x0001fc3f, 0x0001fd40, 0x0000fe40,
|
||||
|
||||
0x0002fc06, 0x0002fb08, 0x0002fb0a, 0x0002fa0c,
|
||||
0x0002fa0e, 0x0003f910, 0x0003f912, 0x0003f814,
|
||||
0x0003f816, 0x0003f719, 0x0003f71a, 0x0003f71d,
|
||||
0x0003f71f, 0x0003f721, 0x0003f723, 0x0003f725,
|
||||
0x0002f727, 0x0002f729, 0x0002f72b, 0x0002f82d,
|
||||
0x0002f82e, 0x0001f930, 0x0001fa31, 0x0000fa34,
|
||||
0x0000fb34, 0x0100fc35, 0x01fffd36, 0x01ffff37,
|
||||
0x01fe0037, 0x01fe0138, 0x01fd0338, 0x02fc0538,
|
||||
|
||||
0x0002fa0b, 0x0002fa0c, 0x0002f90e, 0x0002f910,
|
||||
0x0002f911, 0x0002f813, 0x0002f816, 0x0002f817,
|
||||
0x0002f818, 0x0002f81a, 0x0001f81c, 0x0001f81e,
|
||||
0x0001f820, 0x0001f921, 0x0001f923, 0x0000f925,
|
||||
0x0000fa26, 0x0100fa28, 0x01fffb29, 0x01fffc2a,
|
||||
0x01fffc2c, 0x01fefd2d, 0x01fefe2e, 0x01fdff2f,
|
||||
0x01fd0030, 0x01fd0130, 0x01fc0232, 0x02fc0432,
|
||||
0x02fb0532, 0x02fb0633, 0x02fb0833, 0x02fa0933,
|
||||
|
||||
0x0001fa0e, 0x0001f90f, 0x0001f911, 0x0001f913,
|
||||
0x0001f914, 0x0001f915, 0x0000f918, 0x0000fa18,
|
||||
0x0000fa1a, 0x0000fa1b, 0x0000fa1d, 0x00fffb1e,
|
||||
0x01fffb1f, 0x01fffb20, 0x01fffc22, 0x01fefc23,
|
||||
0x01fefd24, 0x01fefe25, 0x01fdfe27, 0x01fdff28,
|
||||
0x01fd0029, 0x01fc012a, 0x01fc022b, 0x01fc032b,
|
||||
0x01fb042d, 0x01fb052d, 0x01fb062e, 0x01fb072e,
|
||||
0x01fa092e, 0x01fa0a2f, 0x01fa0b2f, 0x01fa0d2f,
|
||||
|
||||
0x0000fa11, 0x0000fa12, 0x0000fa13, 0x0000fb14,
|
||||
0x00fffb16, 0x00fffb16, 0x00fffb17, 0x00fffb19,
|
||||
0x00fffc1a, 0x00fefc1c, 0x00fefd1c, 0x01fefd1d,
|
||||
0x01fefe1e, 0x01fdfe20, 0x01fdff21, 0x01fdff22,
|
||||
0x01fd0023, 0x01fc0124, 0x01fc0124, 0x01fc0225,
|
||||
0x01fc0326, 0x01fc0427, 0x01fb0528, 0x01fb0629,
|
||||
0x01fb0729, 0x01fb0829, 0x01fb092a, 0x01fb0a2a,
|
||||
0x00fa0b2c, 0x00fa0c2b, 0x00fa0e2b, 0x00fa0f2c,
|
||||
|
||||
0x00fffc11, 0x00fffc12, 0x00fffc14, 0x00fffc15,
|
||||
0x00fefd16, 0x00fefd17, 0x00fefd18, 0x00fefe19,
|
||||
0x00fefe1a, 0x00fdfe1d, 0x00fdff1d, 0x00fdff1e,
|
||||
0x00fd001d, 0x00fd011e, 0x00fd0120, 0x00fc0221,
|
||||
0x00fc0321, 0x00fc0323, 0x00fc0423, 0x00fc0523,
|
||||
0x00fc0624, 0x00fb0725, 0x00fb0726, 0x00fb0827,
|
||||
0x00fb0926, 0x00fb0a26, 0x00fb0b27, 0x00fb0c27,
|
||||
0x00fb0d27, 0xfffb0e28, 0xfffb0f29, 0xfffc1028,
|
||||
|
||||
0x00fefd13, 0x00fefd13, 0x00fefe14, 0x00fefe15,
|
||||
0x00fefe17, 0x00feff17, 0x00feff17, 0x00fd0018,
|
||||
0x00fd001a, 0x00fd001a, 0x00fd011b, 0x00fd021c,
|
||||
0x00fd021c, 0x00fd031d, 0x00fc031f, 0x00fc041f,
|
||||
0x00fc051f, 0x00fc0521, 0x00fc0621, 0x00fc0721,
|
||||
0x00fc0821, 0x00fc0822, 0x00fc0922, 0x00fc0a23,
|
||||
0xfffc0b24, 0xfffc0c24, 0xfffc0d24, 0xfffc0d25,
|
||||
0xfffc0e25, 0xfffd0f25, 0xfffd1025, 0xfffd1125,
|
||||
|
||||
0x00feff12, 0x00feff14, 0x00feff14, 0x00fe0015,
|
||||
0x00fe0015, 0x00fd0017, 0x00fd0118, 0x00fd0118,
|
||||
0x00fd0218, 0x00fd0219, 0x00fd031a, 0x00fd031a,
|
||||
0x00fd041b, 0x00fd041c, 0x00fd051c, 0x00fd061d,
|
||||
0x00fd061d, 0x00fd071e, 0x00fd081e, 0xfffd081f,
|
||||
0xfffd091f, 0xfffd0a20, 0xfffd0a20, 0xfffd0b21,
|
||||
0xfffd0c21, 0xfffd0d21, 0xfffd0d22, 0xfffd0e23,
|
||||
0xfffe0f22, 0xfefe1022, 0xfefe1122, 0xfefe1123,
|
||||
|
||||
0x00fe0012, 0x00fe0013, 0x00fe0114, 0x00fe0114,
|
||||
0x00fe0116, 0x00fe0216, 0x00fe0216, 0x00fd0317,
|
||||
0x00fd0317, 0x00fd0418, 0x00fd0419, 0x00fd0519,
|
||||
0x00fd051a, 0x00fd061b, 0x00fd061b, 0x00fd071c,
|
||||
0xfffd071e, 0xfffd081d, 0xfffd091d, 0xfffd091e,
|
||||
0xfffe0a1d, 0xfffe0b1e, 0xfffe0b1e, 0xfffe0c1e,
|
||||
0xfffe0d1f, 0xfffe0d1f, 0xfffe0e1f, 0xfeff0f1f,
|
||||
0xfeff0f20, 0xfeff1020, 0xfeff1120, 0xfe001120,
|
||||
|
||||
0x00fe0212, 0x00fe0312, 0x00fe0313, 0x00fe0314,
|
||||
0x00fe0414, 0x00fe0414, 0x00fe0416, 0x00fe0515,
|
||||
0x00fe0516, 0x00fe0616, 0x00fe0617, 0x00fe0717,
|
||||
0xfffe0719, 0xfffe0818, 0xffff0818, 0xffff0919,
|
||||
0xffff0919, 0xffff0a19, 0xffff0a1a, 0xffff0b1a,
|
||||
0xffff0b1b, 0xffff0c1a, 0xff000c1b, 0xff000d1b,
|
||||
0xff000d1b, 0xff000e1b, 0xff000e1c, 0xff010f1c,
|
||||
0xfe01101c, 0xfe01101d, 0xfe02111c, 0xfe02111c,
|
||||
|
||||
0x00ff0411, 0x00ff0411, 0x00ff0412, 0x00ff0512,
|
||||
0x00ff0513, 0x00ff0513, 0x00ff0613, 0x00ff0614,
|
||||
0x00ff0714, 0x00ff0715, 0x00ff0715, 0xffff0816,
|
||||
0xffff0816, 0xff000916, 0xff000917, 0xff000918,
|
||||
0xff000a17, 0xff000a18, 0xff000b18, 0xff000b18,
|
||||
0xff010c18, 0xff010c19, 0xff010d18, 0xff010d18,
|
||||
0xff020d18, 0xff020e19, 0xff020e19, 0xff020f19,
|
||||
0xff030f19, 0xff031019, 0xff031019, 0xff031119,
|
||||
|
||||
0x00ff0511, 0x00ff0511, 0x00000511, 0x00000611,
|
||||
0x00000612, 0x00000612, 0x00000712, 0x00000713,
|
||||
0x00000714, 0x00000814, 0x00000814, 0x00000914,
|
||||
0x00000914, 0xff010914, 0xff010a15, 0xff010a16,
|
||||
0xff010a17, 0xff010b16, 0xff010b16, 0xff020c16,
|
||||
0xff020c16, 0xff020c16, 0xff020d16, 0xff020d17,
|
||||
0xff030d17, 0xff030e17, 0xff030e17, 0xff030f17,
|
||||
0xff040f17, 0xff040f17, 0xff041017, 0xff051017,
|
||||
|
||||
0x00000610, 0x00000610, 0x00000611, 0x00000611,
|
||||
0x00000711, 0x00000712, 0x00010712, 0x00010812,
|
||||
0x00010812, 0x00010812, 0x00010913, 0x00010913,
|
||||
0x00010913, 0x00010a13, 0x00020a13, 0x00020a14,
|
||||
0x00020b14, 0x00020b14, 0x00020b14, 0x00020c14,
|
||||
0x00030c14, 0x00030c15, 0x00030d15, 0x00030d15,
|
||||
0x00040d15, 0x00040e15, 0x00040e15, 0x00040e16,
|
||||
0x00050f15, 0x00050f15, 0x00050f16, 0x00051015,
|
||||
|
||||
0x00000611, 0x00010610, 0x00010710, 0x00010710,
|
||||
0x00010711, 0x00010811, 0x00010811, 0x00010812,
|
||||
0x00010812, 0x00010912, 0x00020912, 0x00020912,
|
||||
0x00020a12, 0x00020a12, 0x00020a13, 0x00020a13,
|
||||
0x00030b13, 0x00030b13, 0x00030b14, 0x00030c13,
|
||||
0x00030c13, 0x00040c13, 0x00040d14, 0x00040d14,
|
||||
0x00040d15, 0x00040d15, 0x00050e14, 0x00050e14,
|
||||
0x00050e15, 0x00050f14, 0x00060f14, 0x00060f14,
|
||||
|
||||
0x0001070f, 0x0001070f, 0x00010710, 0x00010710,
|
||||
0x00010810, 0x00010810, 0x00020810, 0x00020811,
|
||||
0x00020911, 0x00020911, 0x00020912, 0x00020912,
|
||||
0x00020a12, 0x00030a12, 0x00030a12, 0x00030b12,
|
||||
0x00030b12, 0x00030b12, 0x00040b12, 0x00040c12,
|
||||
0x00040c13, 0x00040c14, 0x00040c14, 0x00050d13,
|
||||
0x00050d13, 0x00050d14, 0x00050e13, 0x01050e13,
|
||||
0x01060e13, 0x01060e13, 0x01060e14, 0x01060f13
|
||||
};
|
||||
|
||||
static const u32 lan2coefftab32[480] = {
|
||||
0x00004000, 0x000140ff, 0x00033ffe, 0x00043ffd,
|
||||
0x00063efc, 0xff083dfc, 0x000a3bfb, 0xff0d39fb,
|
||||
0xff0f37fb, 0xff1136fa, 0xfe1433fb, 0xfe1631fb,
|
||||
0xfd192ffb, 0xfd1c2cfb, 0xfd1f29fb, 0xfc2127fc,
|
||||
0xfc2424fc, 0xfc2721fc, 0xfb291ffd, 0xfb2c1cfd,
|
||||
0xfb2f19fd, 0xfb3116fe, 0xfb3314fe, 0xfa3611ff,
|
||||
0xfb370fff, 0xfb390dff, 0xfb3b0a00, 0xfc3d08ff,
|
||||
0xfc3e0600, 0xfd3f0400, 0xfe3f0300, 0xff400100,
|
||||
|
||||
0xff053804, 0xff063803, 0xff083801, 0xff093701,
|
||||
0xff0a3700, 0xff0c3500, 0xff0e34ff, 0xff1033fe,
|
||||
0xff1232fd, 0xfe1431fd, 0xfe162ffd, 0xfe182dfd,
|
||||
0xfd1b2cfc, 0xfd1d2afc, 0xfd1f28fc, 0xfd2126fc,
|
||||
0xfd2323fd, 0xfc2621fd, 0xfc281ffd, 0xfc2a1dfd,
|
||||
0xfc2c1bfd, 0xfd2d18fe, 0xfd2f16fe, 0xfd3114fe,
|
||||
0xfd3212ff, 0xfe3310ff, 0xff340eff, 0x00350cff,
|
||||
0x00360a00, 0x01360900, 0x02370700, 0x03370600,
|
||||
|
||||
0xff083207, 0xff093206, 0xff0a3205, 0xff0c3203,
|
||||
0xff0d3103, 0xff0e3102, 0xfe113001, 0xfe132f00,
|
||||
0xfe142e00, 0xfe162dff, 0xfe182bff, 0xfe192aff,
|
||||
0xfe1b29fe, 0xfe1d27fe, 0xfe1f25fe, 0xfd2124fe,
|
||||
0xfe2222fe, 0xfe2421fd, 0xfe251ffe, 0xfe271dfe,
|
||||
0xfe291bfe, 0xff2a19fe, 0xff2b18fe, 0xff2d16fe,
|
||||
0x002e14fe, 0x002f12ff, 0x013010ff, 0x02300fff,
|
||||
0x03310dff, 0x04310cff, 0x05310a00, 0x06310900,
|
||||
|
||||
0xff0a2e09, 0xff0b2e08, 0xff0c2e07, 0xff0e2d06,
|
||||
0xff0f2d05, 0xff102d04, 0xff122c03, 0xfe142c02,
|
||||
0xfe152b02, 0xfe172a01, 0xfe182901, 0xfe1a2800,
|
||||
0xfe1b2700, 0xfe1d2500, 0xff1e24ff, 0xfe2023ff,
|
||||
0xff2121ff, 0xff2320fe, 0xff241eff, 0x00251dfe,
|
||||
0x00261bff, 0x00281afe, 0x012818ff, 0x012a16ff,
|
||||
0x022a15ff, 0x032b13ff, 0x032c12ff, 0x052c10ff,
|
||||
0x052d0fff, 0x062d0d00, 0x072d0c00, 0x082d0b00,
|
||||
|
||||
0xff0c2a0b, 0xff0d2a0a, 0xff0e2a09, 0xff0f2a08,
|
||||
0xff102a07, 0xff112a06, 0xff132905, 0xff142904,
|
||||
0xff162803, 0xff172703, 0xff182702, 0xff1a2601,
|
||||
0xff1b2501, 0xff1c2401, 0xff1e2300, 0xff1f2200,
|
||||
0x00202000, 0x00211f00, 0x01221d00, 0x01231c00,
|
||||
0x01251bff, 0x02251aff, 0x032618ff, 0x032717ff,
|
||||
0x042815ff, 0x052814ff, 0x052913ff, 0x06291100,
|
||||
0x072a10ff, 0x082a0e00, 0x092a0d00, 0x0a2a0c00,
|
||||
|
||||
0xff0d280c, 0xff0e280b, 0xff0f280a, 0xff102809,
|
||||
0xff112808, 0xff122708, 0xff142706, 0xff152705,
|
||||
0xff162605, 0xff172604, 0xff192503, 0xff1a2403,
|
||||
0x001b2302, 0x001c2202, 0x001d2201, 0x001e2101,
|
||||
0x011f1f01, 0x01211e00, 0x01221d00, 0x02221c00,
|
||||
0x02231b00, 0x03241900, 0x04241800, 0x04251700,
|
||||
0x052616ff, 0x06261400, 0x072713ff, 0x08271100,
|
||||
0x08271100, 0x09271000, 0x0a280e00, 0x0b280d00,
|
||||
|
||||
0xff0e260d, 0xff0f260c, 0xff10260b, 0xff11260a,
|
||||
0xff122609, 0xff132608, 0xff142508, 0xff152507,
|
||||
0x00152506, 0x00172405, 0x00182305, 0x00192304,
|
||||
0x001b2203, 0x001c2103, 0x011d2002, 0x011d2002,
|
||||
0x011f1f01, 0x021f1e01, 0x02201d01, 0x03211c00,
|
||||
0x03221b00, 0x04221a00, 0x04231801, 0x05241700,
|
||||
0x06241600, 0x07241500, 0x08251300, 0x09251200,
|
||||
0x09261100, 0x0a261000, 0x0b260f00, 0x0c260e00,
|
||||
|
||||
0xff0e250e, 0xff0f250d, 0xff10250c, 0xff11250b,
|
||||
0x0011250a, 0x00132409, 0x00142408, 0x00152407,
|
||||
0x00162307, 0x00172306, 0x00182206, 0x00192205,
|
||||
0x011a2104, 0x011b2004, 0x011c2003, 0x021c1f03,
|
||||
0x021e1e02, 0x031e1d02, 0x03201c01, 0x04201b01,
|
||||
0x04211a01, 0x05221900, 0x05221801, 0x06231700,
|
||||
0x07231600, 0x07241500, 0x08241400, 0x09241300,
|
||||
0x0a241200, 0x0b241100, 0x0c241000, 0x0d240f00,
|
||||
|
||||
0x000e240e, 0x000f240d, 0x0010240c, 0x0011240b,
|
||||
0x0013230a, 0x0013230a, 0x00142309, 0x00152308,
|
||||
0x00162208, 0x00172207, 0x01182106, 0x01192105,
|
||||
0x011a2005, 0x021b1f04, 0x021b1f04, 0x021d1e03,
|
||||
0x031d1d03, 0x031e1d02, 0x041e1c02, 0x041f1b02,
|
||||
0x05201a01, 0x05211901, 0x06211801, 0x07221700,
|
||||
0x07221601, 0x08231500, 0x09231400, 0x0a231300,
|
||||
0x0a231300, 0x0b231200, 0x0c231100, 0x0d231000,
|
||||
|
||||
0x000f220f, 0x0010220e, 0x0011220d, 0x0012220c,
|
||||
0x0013220b, 0x0013220b, 0x0015210a, 0x0015210a,
|
||||
0x01162108, 0x01172008, 0x01182007, 0x02191f06,
|
||||
0x02191f06, 0x021a1e06, 0x031a1e05, 0x031c1d04,
|
||||
0x041c1c04, 0x041d1c03, 0x051d1b03, 0x051e1a03,
|
||||
0x061f1902, 0x061f1902, 0x07201801, 0x08201701,
|
||||
0x08211601, 0x09211501, 0x0a211500, 0x0b211400,
|
||||
0x0b221300, 0x0c221200, 0x0d221100, 0x0e221000,
|
||||
|
||||
0x0010210f, 0x0011210e, 0x0011210e, 0x0012210d,
|
||||
0x0013210c, 0x0014200c, 0x0114200b, 0x0115200a,
|
||||
0x01161f0a, 0x01171f09, 0x02171f08, 0x02181e08,
|
||||
0x03181e07, 0x031a1d06, 0x031a1d06, 0x041b1c05,
|
||||
0x041c1c04, 0x051c1b04, 0x051d1a04, 0x061d1a03,
|
||||
0x071d1903, 0x071e1803, 0x081e1802, 0x081f1702,
|
||||
0x091f1602, 0x0a201501, 0x0b1f1501, 0x0b201401,
|
||||
0x0c211300, 0x0d211200, 0x0e201200, 0x0e211100,
|
||||
|
||||
0x00102010, 0x0011200f, 0x0012200e, 0x0013200d,
|
||||
0x0013200d, 0x01141f0c, 0x01151f0b, 0x01151f0b,
|
||||
0x01161f0a, 0x02171e09, 0x02171e09, 0x03181d08,
|
||||
0x03191d07, 0x03191d07, 0x041a1c06, 0x041b1c05,
|
||||
0x051b1b05, 0x051c1b04, 0x061c1a04, 0x071d1903,
|
||||
0x071d1903, 0x081d1803, 0x081e1703, 0x091e1702,
|
||||
0x0a1f1601, 0x0a1f1502, 0x0b1f1501, 0x0c1f1401,
|
||||
0x0d201300, 0x0d201300, 0x0e201200, 0x0f201100,
|
||||
|
||||
0x00102010, 0x0011200f, 0x00121f0f, 0x00131f0e,
|
||||
0x00141f0d, 0x01141f0c, 0x01141f0c, 0x01151e0c,
|
||||
0x02161e0a, 0x02171e09, 0x03171d09, 0x03181d08,
|
||||
0x03181d08, 0x04191c07, 0x041a1c06, 0x051a1b06,
|
||||
0x051b1b05, 0x061b1a05, 0x061c1a04, 0x071c1904,
|
||||
0x081c1903, 0x081d1803, 0x091d1703, 0x091e1702,
|
||||
0x0a1e1602, 0x0b1e1502, 0x0c1e1501, 0x0c1f1401,
|
||||
0x0d1f1400, 0x0e1f1300, 0x0e1f1201, 0x0f1f1200,
|
||||
|
||||
0x00111e11, 0x00121e10, 0x00131e0f, 0x00131e0f,
|
||||
0x01131e0e, 0x01141d0e, 0x02151d0c, 0x02151d0c,
|
||||
0x02161d0b, 0x03161c0b, 0x03171c0a, 0x04171c09,
|
||||
0x04181b09, 0x05181b08, 0x05191b07, 0x06191a07,
|
||||
0x061a1a06, 0x071a1906, 0x071b1905, 0x081b1805,
|
||||
0x091b1804, 0x091c1704, 0x0a1c1703, 0x0a1c1604,
|
||||
0x0b1d1602, 0x0c1d1502, 0x0c1d1502, 0x0d1d1402,
|
||||
0x0e1d1401, 0x0e1e1301, 0x0f1e1300, 0x101e1200,
|
||||
|
||||
0x00111e11, 0x00121e10, 0x00131d10, 0x01131d0f,
|
||||
0x01141d0e, 0x01141d0e, 0x02151c0d, 0x02151c0d,
|
||||
0x03161c0b, 0x03161c0b, 0x04171b0a, 0x04171b0a,
|
||||
0x05171b09, 0x05181a09, 0x06181a08, 0x06191a07,
|
||||
0x07191907, 0x071a1906, 0x081a1806, 0x081a1806,
|
||||
0x091a1805, 0x0a1b1704, 0x0a1b1704, 0x0b1c1603,
|
||||
0x0b1c1603, 0x0c1c1503, 0x0d1c1502, 0x0d1d1402,
|
||||
0x0e1d1401, 0x0f1d1301, 0x0f1d1301, 0x101e1200,
|
||||
};
|
||||
|
||||
static int sun8i_vi_scaler_coef_index(unsigned int step)
|
||||
{
|
||||
unsigned int scale, int_part, float_part;
|
||||
|
||||
scale = step >> (SUN8I_VI_SCALER_SCALE_FRAC - 3);
|
||||
int_part = scale >> 3;
|
||||
float_part = scale & 0x7;
|
||||
|
||||
switch (int_part) {
|
||||
case 0:
|
||||
return 0;
|
||||
case 1:
|
||||
return float_part;
|
||||
case 2:
|
||||
return 8 + (float_part >> 1);
|
||||
case 3:
|
||||
return 12;
|
||||
case 4:
|
||||
return 13;
|
||||
default:
|
||||
return 14;
|
||||
}
|
||||
}
|
||||
|
||||
static void sun8i_vi_scaler_set_coeff(struct regmap *map, int layer,
|
||||
u32 hstep, u32 vstep)
|
||||
{
|
||||
int offset, i;
|
||||
|
||||
offset = sun8i_vi_scaler_coef_index(hstep) *
|
||||
SUN8I_VI_SCALER_COEFF_COUNT;
|
||||
for (i = 0; i < SUN8I_VI_SCALER_COEFF_COUNT; i++) {
|
||||
regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF0(layer, i),
|
||||
lan3coefftab32_left[offset + i]);
|
||||
regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF1(layer, i),
|
||||
lan3coefftab32_right[offset + i]);
|
||||
regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF0(layer, i),
|
||||
lan3coefftab32_left[offset + i]);
|
||||
regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF1(layer, i),
|
||||
lan3coefftab32_right[offset + i]);
|
||||
}
|
||||
|
||||
offset = sun8i_vi_scaler_coef_index(hstep) *
|
||||
SUN8I_VI_SCALER_COEFF_COUNT;
|
||||
for (i = 0; i < SUN8I_VI_SCALER_COEFF_COUNT; i++) {
|
||||
regmap_write(map, SUN8I_SCALER_VSU_YVCOEFF(layer, i),
|
||||
lan2coefftab32[offset + i]);
|
||||
regmap_write(map, SUN8I_SCALER_VSU_CVCOEFF(layer, i),
|
||||
lan2coefftab32[offset + i]);
|
||||
}
|
||||
}
|
||||
|
||||
void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
if (enable)
|
||||
val = SUN8I_SCALER_VSU_CTRL_EN |
|
||||
SUN8I_SCALER_VSU_CTRL_COEFF_RDY;
|
||||
else
|
||||
val = 0;
|
||||
|
||||
regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(layer), val);
|
||||
}
|
||||
|
||||
void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
|
||||
u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
|
||||
u32 hscale, u32 vscale, u32 hphase, u32 vphase)
|
||||
{
|
||||
u32 chphase, cvphase;
|
||||
u32 insize, outsize;
|
||||
|
||||
hphase <<= SUN8I_VI_SCALER_PHASE_FRAC - 16;
|
||||
vphase <<= SUN8I_VI_SCALER_PHASE_FRAC - 16;
|
||||
hscale <<= SUN8I_VI_SCALER_SCALE_FRAC - 16;
|
||||
vscale <<= SUN8I_VI_SCALER_SCALE_FRAC - 16;
|
||||
|
||||
insize = SUN8I_VI_SCALER_SIZE(src_w, src_h);
|
||||
outsize = SUN8I_VI_SCALER_SIZE(dst_w, dst_h);
|
||||
|
||||
chphase = hphase;
|
||||
cvphase = vphase;
|
||||
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_OUTSIZE(layer), outsize);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_YINSIZE(layer), insize);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_YHSTEP(layer), hscale);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_YVSTEP(layer), vscale);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_YHPHASE(layer), hphase);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_YVPHASE(layer), vphase);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_CINSIZE(layer),
|
||||
SUN8I_VI_SCALER_SIZE(src_w, src_h));
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_CHSTEP(layer),
|
||||
hscale);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_CVSTEP(layer),
|
||||
vscale);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_CHPHASE(layer), chphase);
|
||||
regmap_write(mixer->engine.regs,
|
||||
SUN8I_SCALER_VSU_CVPHASE(layer), cvphase);
|
||||
sun8i_vi_scaler_set_coeff(mixer->engine.regs, layer,
|
||||
hscale, vscale);
|
||||
}
|
||||
56
drivers/gpu/drm/sun4i/sun8i_vi_scaler.h
Normal file
56
drivers/gpu/drm/sun4i/sun8i_vi_scaler.h
Normal file
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#ifndef _SUN8I_VI_SCALER_H_
|
||||
#define _SUN8I_VI_SCALER_H_
|
||||
|
||||
#include "sun8i_mixer.h"
|
||||
|
||||
/* this two macros assumes 16 fractional bits which is standard in DRM */
|
||||
#define SUN8I_VI_SCALER_SCALE_MIN 1
|
||||
#define SUN8I_VI_SCALER_SCALE_MAX ((1UL << 20) - 1)
|
||||
|
||||
#define SUN8I_VI_SCALER_SCALE_FRAC 20
|
||||
#define SUN8I_VI_SCALER_PHASE_FRAC 20
|
||||
#define SUN8I_VI_SCALER_COEFF_COUNT 32
|
||||
#define SUN8I_VI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1))
|
||||
|
||||
#define SUN8I_SCALER_VSU_CTRL(ch) (0x20000 + 0x20000 * (ch) + 0x0)
|
||||
#define SUN8I_SCALER_VSU_OUTSIZE(ch) (0x20000 + 0x20000 * (ch) + 0x40)
|
||||
#define SUN8I_SCALER_VSU_YINSIZE(ch) (0x20000 + 0x20000 * (ch) + 0x80)
|
||||
#define SUN8I_SCALER_VSU_YHSTEP(ch) (0x20000 + 0x20000 * (ch) + 0x88)
|
||||
#define SUN8I_SCALER_VSU_YVSTEP(ch) (0x20000 + 0x20000 * (ch) + 0x8c)
|
||||
#define SUN8I_SCALER_VSU_YHPHASE(ch) (0x20000 + 0x20000 * (ch) + 0x90)
|
||||
#define SUN8I_SCALER_VSU_YVPHASE(ch) (0x20000 + 0x20000 * (ch) + 0x98)
|
||||
#define SUN8I_SCALER_VSU_CINSIZE(ch) (0x20000 + 0x20000 * (ch) + 0xc0)
|
||||
#define SUN8I_SCALER_VSU_CHSTEP(ch) (0x20000 + 0x20000 * (ch) + 0xc8)
|
||||
#define SUN8I_SCALER_VSU_CVSTEP(ch) (0x20000 + 0x20000 * (ch) + 0xcc)
|
||||
#define SUN8I_SCALER_VSU_CHPHASE(ch) (0x20000 + 0x20000 * (ch) + 0xd0)
|
||||
#define SUN8I_SCALER_VSU_CVPHASE(ch) (0x20000 + 0x20000 * (ch) + 0xd8)
|
||||
#define SUN8I_SCALER_VSU_YHCOEFF0(ch, i) \
|
||||
(0x20000 + 0x20000 * (ch) + 0x200 + 0x4 * (i))
|
||||
#define SUN8I_SCALER_VSU_YHCOEFF1(ch, i) \
|
||||
(0x20000 + 0x20000 * (ch) + 0x300 + 0x4 * (i))
|
||||
#define SUN8I_SCALER_VSU_YVCOEFF(ch, i) \
|
||||
(0x20000 + 0x20000 * (ch) + 0x400 + 0x4 * (i))
|
||||
#define SUN8I_SCALER_VSU_CHCOEFF0(ch, i) \
|
||||
(0x20000 + 0x20000 * (ch) + 0x600 + 0x4 * (i))
|
||||
#define SUN8I_SCALER_VSU_CHCOEFF1(ch, i) \
|
||||
(0x20000 + 0x20000 * (ch) + 0x700 + 0x4 * (i))
|
||||
#define SUN8I_SCALER_VSU_CVCOEFF(ch, i) \
|
||||
(0x20000 + 0x20000 * (ch) + 0x800 + 0x4 * (i))
|
||||
|
||||
#define SUN8I_SCALER_VSU_CTRL_EN BIT(0)
|
||||
#define SUN8I_SCALER_VSU_CTRL_COEFF_RDY BIT(4)
|
||||
|
||||
void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable);
|
||||
void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
|
||||
u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
|
||||
u32 hscale, u32 vscale, u32 hphase, u32 vphase);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user