leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity

pinctrl: bcm2835: reduce GPPUD set-up time

Browse Source 
Since the BCM2835 datasheet doesn't exactly specify the set-up time for
the GPIO Pull-up/down Clock Registers there was an assumption of 150 cycles
at a clock rate of 1 MHz. During a discussion [1] in the Raspberry Pi forum
it turns out that clock rate refers to the VPU which has a rate of 250 MHz.
So we can reduce the delay to a sensible value and update the comment above.

I tested this optimization with a Raspberry Pi B and a multimeter.

[1] - https://www.raspberrypi.org/forums/viewtopic.php?f=72&t=163352

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Stefan Wahren 2016-10-31 13:21:33 +00:00 committed by Linus Walleij
parent 684373eaa9
commit b83bd893f3
1 changed files with 6 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/pinctrl/bcm/pinctrl-bcm2835.c
View File

@ -917,12 +917,14 @@ static int bcm2835_pinconf_set(struct pinctrl_dev *pctldev,
bcm2835_gpio_wr(pc, GPPUD, arg & 3); bcm2835_gpio_wr(pc, GPPUD, arg & 3);
/* /*
* Docs say to wait 150 cycles, but not of what. We assume a * BCM2835 datasheet say to wait 150 cycles, but not of what.
* 1 MHz clock here, which is pretty slow... * But the VideoCore firmware delay for this operation
* based nearly on the same amount of VPU cycles and this clock
* runs at 250 MHz.
*/ */
udelay(150); udelay(1);
bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), BIT(bit)); bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), BIT(bit));
udelay(150); udelay(1);
bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), 0); bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), 0);
} /* for each config */ } /* for each config */