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drm/amdgpu: Fix the code style warnings in amdgpu_ras

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Fix the code style warnings in amdgpu_ras:
1. ERROR: space required before the open parenthesis '('.
2. WARNING: line length of xxx exceeds 100 columns.
3. ERROR: "foo* bar" should be "foo *bar".
4. WARNING: unnecessary whitespace before a quoted newline.
5. WARNING: space prohibited before semicolon.
6. WARNING: suspect code indent for conditional statements.
7. WARNING: braces {} are not necessary for single statement blocks.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
yipechai
2022-01-14 10:24:30 +08:00
committed by Alex Deucher
parent 03f6fb84bd
commit b6efdb02d2
2 changed files with 30 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

41
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
View File

@@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct amdgpu_device *adev,
static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object *block_obj, static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object *block_obj,
enum amdgpu_ras_block block) enum amdgpu_ras_block block)
{ {
if(!block_obj) if (!block_obj)
return -EINVAL; return -EINVAL;
if (block_obj->block == block) if (block_obj->block == block)
@@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object *block_
return -EINVAL; return -EINVAL;
} }
static struct amdgpu_ras_block_object* amdgpu_ras_get_ras_block(struct amdgpu_device *adev, static struct amdgpu_ras_block_object *amdgpu_ras_get_ras_block(struct amdgpu_device *adev,
enum amdgpu_ras_block block, uint32_t sub_block_index) enum amdgpu_ras_block block, uint32_t sub_block_index)
{ {
struct amdgpu_ras_block_object *obj, *tmp; struct amdgpu_ras_block_object *obj, *tmp;
@@ -941,7 +941,7 @@ static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct ras_err_d
int amdgpu_ras_query_error_status(struct amdgpu_device *adev, int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
struct ras_query_if *info) struct ras_query_if *info)
{ {
struct amdgpu_ras_block_object* block_obj = NULL; struct amdgpu_ras_block_object *block_obj = NULL;
struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head);
struct ras_err_data err_data = {0, 0, 0, NULL}; struct ras_err_data err_data = {0, 0, 0, NULL};
@@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
} else { } else {
block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, 0); block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, 0);
if (!block_obj || !block_obj->hw_ops) { if (!block_obj || !block_obj->hw_ops) {
dev_info(adev->dev, "%s doesn't config ras function \n", dev_info(adev->dev, "%s doesn't config ras function.\n",
get_ras_block_str(&info->head)); get_ras_block_str(&info->head));
return -EINVAL; return -EINVAL;
} }
@@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
int amdgpu_ras_reset_error_status(struct amdgpu_device *adev, int amdgpu_ras_reset_error_status(struct amdgpu_device *adev,
enum amdgpu_ras_block block) enum amdgpu_ras_block block)
{ {
struct amdgpu_ras_block_object* block_obj = amdgpu_ras_get_ras_block(adev, block, 0); struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev, block, 0);
if (!amdgpu_ras_is_supported(adev, block)) if (!amdgpu_ras_is_supported(adev, block))
return -EINVAL; return -EINVAL;
if (!block_obj || !block_obj->hw_ops) { if (!block_obj || !block_obj->hw_ops) {
dev_info(adev->dev, "%s doesn't config ras function \n", ras_block_str(block)); dev_info(adev->dev, "%s doesn't config ras function.\n",
ras_block_str(block));
return -EINVAL; return -EINVAL;
} }
@@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev,
return -EINVAL; return -EINVAL;
if (!block_obj || !block_obj->hw_ops) { if (!block_obj || !block_obj->hw_ops) {
dev_info(adev->dev, "%s doesn't config ras function \n", get_ras_block_str(&info->head)); dev_info(adev->dev, "%s doesn't config ras function.\n",
get_ras_block_str(&info->head));
return -EINVAL; return -EINVAL;
} }
@@ -1702,19 +1704,25 @@ static void amdgpu_ras_log_on_err_counter(struct amdgpu_device *adev)
static void amdgpu_ras_error_status_query(struct amdgpu_device *adev, static void amdgpu_ras_error_status_query(struct amdgpu_device *adev,
struct ras_query_if *info) struct ras_query_if *info)
{ {
struct amdgpu_ras_block_object* block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, info->head.sub_block_index); struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev,
info->head.block,
info->head.sub_block_index);
/* /*
* Only two block need to query read/write * Only two block need to query read/write
* RspStatus at current state * RspStatus at current state
*/ */
if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) && if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) &&
(info->head.block != AMDGPU_RAS_BLOCK__MMHUB)) (info->head.block != AMDGPU_RAS_BLOCK__MMHUB))
return ; return;
block_obj = amdgpu_ras_get_ras_block(adev,
info->head.block,
info->head.sub_block_index);
block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, info->head.sub_block_index);
if (!block_obj || !block_obj->hw_ops) { if (!block_obj || !block_obj->hw_ops) {
dev_info(adev->dev, "%s doesn't config ras function \n", get_ras_block_str(&info->head)); dev_info(adev->dev, "%s doesn't config ras function.\n",
return ; get_ras_block_str(&info->head));
return;
} }
if (block_obj->hw_ops->query_ras_error_status) if (block_obj->hw_ops->query_ras_error_status)
@@ -2715,7 +2723,7 @@ static void amdgpu_register_bad_pages_mca_notifier(struct amdgpu_device *adev)
} }
#endif #endif
struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev) struct amdgpu_ras *amdgpu_ras_get_context(struct amdgpu_device *adev)
{ {
if (!adev) if (!adev)
return NULL; return NULL;
@@ -2723,7 +2731,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev)
return adev->psp.ras_context.ras; return adev->psp.ras_context.ras;
} }
int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras* ras_con) int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras *ras_con)
{ {
if (!adev) if (!adev)
return -EINVAL; return -EINVAL;
@@ -2755,7 +2763,7 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device *adev)
/* Register each ip ras block into amdgpu ras */ /* Register each ip ras block into amdgpu ras */
int amdgpu_ras_register_ras_block(struct amdgpu_device *adev, int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
struct amdgpu_ras_block_object* ras_block_obj) struct amdgpu_ras_block_object *ras_block_obj)
{ {
struct amdgpu_ras_block_object *obj, *tmp; struct amdgpu_ras_block_object *obj, *tmp;
if (!adev || !ras_block_obj) if (!adev || !ras_block_obj)
@@ -2766,9 +2774,8 @@ int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
/* If the ras object is in ras_list, don't add it again */ /* If the ras object is in ras_list, don't add it again */
list_for_each_entry_safe(obj, tmp, &adev->ras_list, node) { list_for_each_entry_safe(obj, tmp, &adev->ras_list, node) {
if (obj == ras_block_obj) { if (obj == ras_block_obj)
return 0; return 0;
}
} }
INIT_LIST_HEAD(&ras_block_obj->node); INIT_LIST_HEAD(&ras_block_obj->node);

10
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
View File

@@ -496,7 +496,8 @@ struct amdgpu_ras_block_object {
/* ras block link */ /* ras block link */
struct list_head node; struct list_head node;
int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj, enum amdgpu_ras_block block, uint32_t sub_block_index); int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
enum amdgpu_ras_block block, uint32_t sub_block_index);
int (*ras_late_init)(struct amdgpu_device *adev, void *ras_info); int (*ras_late_init)(struct amdgpu_device *adev, void *ras_info);
void (*ras_fini)(struct amdgpu_device *adev); void (*ras_fini)(struct amdgpu_device *adev);
const struct amdgpu_ras_block_hw_ops *hw_ops; const struct amdgpu_ras_block_hw_ops *hw_ops;
@@ -504,7 +505,7 @@ struct amdgpu_ras_block_object {
struct amdgpu_ras_block_hw_ops { struct amdgpu_ras_block_hw_ops {
int (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if); int (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if);
void (*query_ras_error_count)(struct amdgpu_device *adev,void *ras_error_status); void (*query_ras_error_count)(struct amdgpu_device *adev, void *ras_error_status);
void (*query_ras_error_status)(struct amdgpu_device *adev); void (*query_ras_error_status)(struct amdgpu_device *adev);
void (*query_ras_error_address)(struct amdgpu_device *adev, void *ras_error_status); void (*query_ras_error_address)(struct amdgpu_device *adev, void *ras_error_status);
void (*reset_ras_error_count)(struct amdgpu_device *adev); void (*reset_ras_error_count)(struct amdgpu_device *adev);
@@ -678,7 +679,8 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device *adev);
struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev); struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev);
int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras* ras_con); int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras *ras_con);
int amdgpu_ras_register_ras_block(struct amdgpu_device *adev, struct amdgpu_ras_block_object* ras_block_obj); int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
struct amdgpu_ras_block_object *ras_block_obj);
#endif #endif