ARM: dts: r8a77470: Add QSPI support
Add QSPI[01] support to the RZ/G1C SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -460,6 +460,38 @@
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status = "disabled";
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};
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qspi0: spi@e6b10000 {
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compatible = "renesas,qspi-r8a77470", "renesas,qspi";
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reg = <0 0xe6b10000 0 0x2c>;
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interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 918>;
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dmas = <&dmac0 0x17>, <&dmac0 0x18>,
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<&dmac1 0x17>, <&dmac1 0x18>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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resets = <&cpg 918>;
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status = "disabled";
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};
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qspi1: spi@ee200000 {
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compatible = "renesas,qspi-r8a77470", "renesas,qspi";
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reg = <0 0xee200000 0 0x2c>;
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interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 917>;
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dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
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<&dmac1 0xd1>, <&dmac1 0xd2>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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resets = <&cpg 917>;
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status = "disabled";
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};
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scif0: serial@e6e60000 {
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compatible = "renesas,scif-r8a77470",
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"renesas,rcar-gen2-scif", "renesas,scif";
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