drm/i915: Don't ignore level 0 lines watermark for glk+
On glk+ the level 0 lines watermark actually matters. Do not ignore it. And while at it let's change things so that we always program a consistnet 0 to the register when the lines watermarks is ignored by the hardware. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181221171436.8218-2-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
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@ -4674,6 +4674,15 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
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return 0;
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}
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static bool skl_wm_has_lines(struct drm_i915_private *dev_priv, int level)
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{
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if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
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return true;
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/* The number of lines are ignored for the level 0 watermark. */
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return level > 0;
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}
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static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
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const struct intel_plane_state *intel_pstate,
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int level,
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@ -4756,8 +4765,10 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
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}
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}
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/* The number of lines are ignored for the level 0 watermark. */
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if (level > 0 && res_lines > 31)
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if (!skl_wm_has_lines(dev_priv, level))
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res_lines = 0;
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if (res_lines > 31)
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return;
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/*
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