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Renesas ARM Based SoC PM Domain Updates for v4.3

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* Make rcar_sysc_ch const for r8a779[09] SoCs
 * Get rid of on_off_fn() function pointer
 * Use BIT() macro instead of open coding
 * Make struct rcar_sysc_ch * parameters const
 * Break infinite loop
 * Shrink rcar_sysc_ch size
 * Improve documentation
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Merge tag 'renesas-pm-domain-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup

Merge "Renesas ARM Based SoC PM Domain Updates for v4.3" from Simon Horman:

* Make rcar_sysc_ch const for r8a779[09] SoCs
* Get rid of on_off_fn() function pointer
* Use BIT() macro instead of open coding
* Make struct rcar_sysc_ch * parameters const
* Break infinite loop
* Shrink rcar_sysc_ch size
* Improve documentation

* tag 'renesas-pm-domain-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790: Make struct rcar_sysc_ch const
  ARM: shmobile: r8a7779: Make struct rcar_sysc_ch const
  ARM: shmobile: R-Car: Get rid of on_off_fn() function pointer
  ARM: shmobile: R-Car: Use BIT() macro instead of open coding
  ARM: shmobile: R-Car: Make struct rcar_sysc_ch * parameters const
  ARM: shmobile: R-Car: Break infinite loop
  ARM: shmobile: R-Car: Shrink rcar_sysc_ch size
  ARM: shmobile: R-Car: Improve documentation

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-07-14 11:50:12 +02:00
commit b3f81739ab
5 changed files with 82 additions and 54 deletions
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3
arch/arm/mach-shmobile/pm-r8a7779.c
View File

@ -35,7 +35,8 @@ struct r8a7779_pm_domain {
struct rcar_sysc_ch ch;
};
static inline struct rcar_sysc_ch *to_r8a7779_ch(struct generic_pm_domain *d)
static inline
const struct rcar_sysc_ch *to_r8a7779_ch(struct generic_pm_domain *d)
{
return &container_of(d, struct r8a7779_pm_domain, genpd)->ch;
}

105
arch/arm/mach-shmobile/pm-rcar.c
View File

@ -15,32 +15,58 @@
#include <asm/io.h>
#include "pm-rcar.h"
/* SYSC */
#define SYSCSR 0x00
#define SYSCISR 0x04
#define SYSCISCR 0x08
/* SYSC Common */
#define SYSCSR 0x00 /* SYSC Status Register */
#define SYSCISR 0x04 /* Interrupt Status Register */
#define SYSCISCR 0x08 /* Interrupt Status Clear Register */
#define SYSCIER 0x0c /* Interrupt Enable Register */
#define SYSCIMR 0x10 /* Interrupt Mask Register */
#define PWRSR_OFFS 0x00
#define PWROFFCR_OFFS 0x04
#define PWRONCR_OFFS 0x0c
#define PWRER_OFFS 0x14
/* SYSC Status Register */
#define SYSCSR_PONENB 1 /* Ready for power resume requests */
#define SYSCSR_POFFENB 0 /* Ready for power shutoff requests */
#define SYSCSR_RETRIES 100
#define SYSCSR_DELAY_US 1
/*
* Power Control Register Offsets inside the register block for each domain
* Note: The "CR" registers for ARM cores exist on H1 only
* Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
*/
#define PWRSR_OFFS 0x00 /* Power Status Register */
#define PWROFFCR_OFFS 0x04 /* Power Shutoff Control Register */
#define PWROFFSR_OFFS 0x08 /* Power Shutoff Status Register */
#define PWRONCR_OFFS 0x0c /* Power Resume Control Register */
#define PWRONSR_OFFS 0x10 /* Power Resume Status Register */
#define PWRER_OFFS 0x14 /* Power Shutoff/Resume Error */
#define SYSCISR_RETRIES 1000
#define SYSCISR_DELAY_US 1
#define SYSCSR_RETRIES 100
#define SYSCSR_DELAY_US 1
#define PWRER_RETRIES 100
#define PWRER_DELAY_US 1
#define SYSCISR_RETRIES 1000
#define SYSCISR_DELAY_US 1
static void __iomem *rcar_sysc_base;
static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
static int rcar_sysc_pwr_on_off(struct rcar_sysc_ch *sysc_ch,
int sr_bit, int reg_offs)
static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on)
{
unsigned int sr_bit, reg_offs;
int k;
if (on) {
sr_bit = SYSCSR_PONENB;
reg_offs = PWRONCR_OFFS;
} else {
sr_bit = SYSCSR_POFFENB;
reg_offs = PWROFFCR_OFFS;
}
/* Wait until SYSC is ready to accept a power request */
for (k = 0; k < SYSCSR_RETRIES; k++) {
if (ioread32(rcar_sysc_base + SYSCSR) & (1 << sr_bit))
if (ioread32(rcar_sysc_base + SYSCSR) & BIT(sr_bit))
break;
udelay(SYSCSR_DELAY_US);
}
@ -48,27 +74,17 @@ static int rcar_sysc_pwr_on_off(struct rcar_sysc_ch *sysc_ch,
if (k == SYSCSR_RETRIES)
return -EAGAIN;
iowrite32(1 << sysc_ch->chan_bit,
/* Submit power shutoff or power resume request */
iowrite32(BIT(sysc_ch->chan_bit),
rcar_sysc_base + sysc_ch->chan_offs + reg_offs);
return 0;
}
static int rcar_sysc_pwr_off(struct rcar_sysc_ch *sysc_ch)
static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
{
return rcar_sysc_pwr_on_off(sysc_ch, 0, PWROFFCR_OFFS);
}
static int rcar_sysc_pwr_on(struct rcar_sysc_ch *sysc_ch)
{
return rcar_sysc_pwr_on_off(sysc_ch, 1, PWRONCR_OFFS);
}
static int rcar_sysc_update(struct rcar_sysc_ch *sysc_ch,
int (*on_off_fn)(struct rcar_sysc_ch *))
{
unsigned int isr_mask = 1 << sysc_ch->isr_bit;
unsigned int chan_mask = 1 << sysc_ch->chan_bit;
unsigned int isr_mask = BIT(sysc_ch->isr_bit);
unsigned int chan_mask = BIT(sysc_ch->chan_bit);
unsigned int status;
unsigned long flags;
int ret = 0;
@ -78,15 +94,26 @@ static int rcar_sysc_update(struct rcar_sysc_ch *sysc_ch,
iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
do {
ret = on_off_fn(sysc_ch);
/* Submit power shutoff or resume request until it was accepted */
for (k = 0; k < PWRER_RETRIES; k++) {
ret = rcar_sysc_pwr_on_off(sysc_ch, on);
if (ret)
goto out;
status = ioread32(rcar_sysc_base +
sysc_ch->chan_offs + PWRER_OFFS);
} while (status & chan_mask);
if (!(status & chan_mask))
break;
udelay(PWRER_DELAY_US);
}
if (k == PWRER_RETRIES) {
ret = -EIO;
goto out;
}
/* Wait until the power shutoff or resume request has completed * */
for (k = 0; k < SYSCISR_RETRIES; k++) {
if (ioread32(rcar_sysc_base + SYSCISR) & isr_mask)
break;
@ -106,22 +133,22 @@ static int rcar_sysc_update(struct rcar_sysc_ch *sysc_ch,
return ret;
}
int rcar_sysc_power_down(struct rcar_sysc_ch *sysc_ch)
int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch)
{
return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_off);
return rcar_sysc_power(sysc_ch, false);
}
int rcar_sysc_power_up(struct rcar_sysc_ch *sysc_ch)
int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch)
{
return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_on);
return rcar_sysc_power(sysc_ch, true);
}
bool rcar_sysc_power_is_off(struct rcar_sysc_ch *sysc_ch)
bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch)
{
unsigned int st;
st = ioread32(rcar_sysc_base + sysc_ch->chan_offs + PWRSR_OFFS);
if (st & (1 << sysc_ch->chan_bit))
if (st & BIT(sysc_ch->chan_bit))
return true;
return false;

12
arch/arm/mach-shmobile/pm-rcar.h
View File

@ -2,14 +2,14 @@
#define PM_RCAR_H
struct rcar_sysc_ch {
unsigned long chan_offs;
unsigned int chan_bit;
unsigned int isr_bit;
u16 chan_offs;
u8 chan_bit;
u8 isr_bit;
};
int rcar_sysc_power_down(struct rcar_sysc_ch *sysc_ch);
int rcar_sysc_power_up(struct rcar_sysc_ch *sysc_ch);
bool rcar_sysc_power_is_off(struct rcar_sysc_ch *sysc_ch);
int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch);
int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch);
bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch);
void __iomem *rcar_sysc_init(phys_addr_t base);
#endif /* PM_RCAR_H */

12
arch/arm/mach-shmobile/smp-r8a7779.c
View File

@ -32,25 +32,25 @@
#define AVECR IOMEM(0xfe700040)
#define R8A7779_SCU_BASE 0xf0000000
static struct rcar_sysc_ch r8a7779_ch_cpu1 = {
static const struct rcar_sysc_ch r8a7779_ch_cpu1 = {
.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
.chan_bit = 1, /* ARM1 */
.isr_bit = 1, /* ARM1 */
};
static struct rcar_sysc_ch r8a7779_ch_cpu2 = {
static const struct rcar_sysc_ch r8a7779_ch_cpu2 = {
.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
.chan_bit = 2, /* ARM2 */
.isr_bit = 2, /* ARM2 */
};
static struct rcar_sysc_ch r8a7779_ch_cpu3 = {
static const struct rcar_sysc_ch r8a7779_ch_cpu3 = {
.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
.chan_bit = 3, /* ARM3 */
.isr_bit = 3, /* ARM3 */
};
static struct rcar_sysc_ch *r8a7779_ch_cpu[4] = {
static const struct rcar_sysc_ch * const r8a7779_ch_cpu[4] = {
[1] = &r8a7779_ch_cpu1,
[2] = &r8a7779_ch_cpu2,
[3] = &r8a7779_ch_cpu3,
@ -66,7 +66,7 @@ void __init r8a7779_register_twd(void)
static int r8a7779_platform_cpu_kill(unsigned int cpu)
{
struct rcar_sysc_ch *ch = NULL;
const struct rcar_sysc_ch *ch = NULL;
int ret = -EIO;
cpu = cpu_logical_map(cpu);
@ -82,7 +82,7 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
struct rcar_sysc_ch *ch = NULL;
const struct rcar_sysc_ch *ch = NULL;
unsigned int lcpu = cpu_logical_map(cpu);
int ret;

4
arch/arm/mach-shmobile/smp-r8a7790.c
View File

@ -26,12 +26,12 @@
#include "rcar-gen2.h"
#include "r8a7790.h"
static struct rcar_sysc_ch r8a7790_ca15_scu = {
static const struct rcar_sysc_ch r8a7790_ca15_scu = {
.chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
.isr_bit = 12, /* CA15-SCU */
};
static struct rcar_sysc_ch r8a7790_ca7_scu = {
static const struct rcar_sysc_ch r8a7790_ca7_scu = {
.chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
.isr_bit = 21, /* CA7-SCU */
};