forked from Minki/linux
KVM: arm64: selftests: Introduce ARM64_SYS_KVM_REG
With the inclusion of sysreg.h, that brings in system register encodings, it would be redundant to re-define register encodings again in processor.h to use it with ARM64_SYS_REG for the KVM functions such as set_reg() or get_reg(). Hence, add helper macro, ARM64_SYS_KVM_REG, that converts SYS_* definitions in sysreg.h into ARM64_SYS_REG definitions. Also replace all the users of ARM64_SYS_REG, relying on the encodings created in processor.h, with ARM64_SYS_KVM_REG and remove the definitions. Signed-off-by: Raghavendra Rao Ananta <rananta@google.com> Reviewed-by: Ricardo Koller <ricarkol@google.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211007233439.1826892-5-rananta@google.com
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@ -190,7 +190,7 @@ static int debug_version(struct kvm_vm *vm)
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{
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uint64_t id_aa64dfr0;
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get_reg(vm, VCPU_ID, ARM64_SYS_REG(ID_AA64DFR0_EL1), &id_aa64dfr0);
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get_reg(vm, VCPU_ID, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), &id_aa64dfr0);
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return id_aa64dfr0 & 0xf;
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}
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@ -91,7 +91,7 @@ int main(void)
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init.features[0] |= (1 << KVM_ARM_VCPU_POWER_OFF);
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aarch64_vcpu_add_default(vm, VCPU_ID_TARGET, &init, guest_main);
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get_reg(vm, VCPU_ID_TARGET, ARM64_SYS_REG(MPIDR_EL1), &target_mpidr);
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get_reg(vm, VCPU_ID_TARGET, KVM_ARM64_SYS_REG(SYS_MPIDR_EL1), &target_mpidr);
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vcpu_args_set(vm, VCPU_ID_SOURCE, 1, target_mpidr & MPIDR_HWID_BITMASK);
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vcpu_run(vm, VCPU_ID_SOURCE);
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@ -16,15 +16,17 @@
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#define ARM64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
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KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
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#define CPACR_EL1 3, 0, 1, 0, 2
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#define TCR_EL1 3, 0, 2, 0, 2
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#define MAIR_EL1 3, 0, 10, 2, 0
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#define MPIDR_EL1 3, 0, 0, 0, 5
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#define TTBR0_EL1 3, 0, 2, 0, 0
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#define SCTLR_EL1 3, 0, 1, 0, 0
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#define VBAR_EL1 3, 0, 12, 0, 0
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#define ID_AA64DFR0_EL1 3, 0, 0, 5, 0
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/*
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* KVM_ARM64_SYS_REG(sys_reg_id): Helper macro to convert
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* SYS_* register definitions in asm/sysreg.h to use in KVM
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* calls such as get_reg() and set_reg().
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*/
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#define KVM_ARM64_SYS_REG(sys_reg_id) \
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ARM64_SYS_REG(sys_reg_Op0(sys_reg_id), \
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sys_reg_Op1(sys_reg_id), \
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sys_reg_CRn(sys_reg_id), \
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sys_reg_CRm(sys_reg_id), \
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sys_reg_Op2(sys_reg_id))
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/*
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* Default MAIR
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@ -232,10 +232,10 @@ void aarch64_vcpu_setup(struct kvm_vm *vm, int vcpuid, struct kvm_vcpu_init *ini
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* Enable FP/ASIMD to avoid trapping when accessing Q0-Q15
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* registers, which the variable argument list macros do.
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*/
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set_reg(vm, vcpuid, ARM64_SYS_REG(CPACR_EL1), 3 << 20);
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set_reg(vm, vcpuid, KVM_ARM64_SYS_REG(SYS_CPACR_EL1), 3 << 20);
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get_reg(vm, vcpuid, ARM64_SYS_REG(SCTLR_EL1), &sctlr_el1);
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get_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), &tcr_el1);
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get_reg(vm, vcpuid, KVM_ARM64_SYS_REG(SYS_SCTLR_EL1), &sctlr_el1);
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get_reg(vm, vcpuid, KVM_ARM64_SYS_REG(SYS_TCR_EL1), &tcr_el1);
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switch (vm->mode) {
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case VM_MODE_P52V48_4K:
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@ -273,10 +273,10 @@ void aarch64_vcpu_setup(struct kvm_vm *vm, int vcpuid, struct kvm_vcpu_init *ini
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tcr_el1 |= (1 << 8) | (1 << 10) | (3 << 12);
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tcr_el1 |= (64 - vm->va_bits) /* T0SZ */;
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set_reg(vm, vcpuid, ARM64_SYS_REG(SCTLR_EL1), sctlr_el1);
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set_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), tcr_el1);
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set_reg(vm, vcpuid, ARM64_SYS_REG(MAIR_EL1), DEFAULT_MAIR_EL1);
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set_reg(vm, vcpuid, ARM64_SYS_REG(TTBR0_EL1), vm->pgd);
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set_reg(vm, vcpuid, KVM_ARM64_SYS_REG(SYS_SCTLR_EL1), sctlr_el1);
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set_reg(vm, vcpuid, KVM_ARM64_SYS_REG(SYS_TCR_EL1), tcr_el1);
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set_reg(vm, vcpuid, KVM_ARM64_SYS_REG(SYS_MAIR_EL1), DEFAULT_MAIR_EL1);
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set_reg(vm, vcpuid, KVM_ARM64_SYS_REG(SYS_TTBR0_EL1), vm->pgd);
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}
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void vcpu_dump(FILE *stream, struct kvm_vm *vm, uint32_t vcpuid, uint8_t indent)
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@ -362,7 +362,7 @@ void vcpu_init_descriptor_tables(struct kvm_vm *vm, uint32_t vcpuid)
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{
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extern char vectors;
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set_reg(vm, vcpuid, ARM64_SYS_REG(VBAR_EL1), (uint64_t)&vectors);
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set_reg(vm, vcpuid, KVM_ARM64_SYS_REG(SYS_VBAR_EL1), (uint64_t)&vectors);
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}
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void route_exception(struct ex_regs *regs, int vector)
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