ice: avoid unnecessary single-member variable-length structs
There are a number of structures that consist of a one-element array as the only struct member. Some of those are unused so remove them. Others are used to index into a buffer/array consisting of a variable number of a different data or structure type. Those are unnecessary since we can use simple pointer arithmetic or index directly into the buffer to access individual elements of the buffer/array. Additional code cleanups were done near areas affected by this change. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
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8d7aab3515
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b3c3890489
@ -215,13 +215,6 @@ struct ice_aqc_get_sw_cfg_resp_elem {
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#define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15)
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};
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/* The response buffer is as follows. Note that the length of the
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* elements array varies with the length of the command response.
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*/
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struct ice_aqc_get_sw_cfg_resp {
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struct ice_aqc_get_sw_cfg_resp_elem elements[1];
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};
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/* These resource type defines are used for all switch resource
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* commands where a resource type is required, such as:
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* Get Resource Allocation command (indirect 0x0204)
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@ -695,14 +688,6 @@ struct ice_aqc_sched_elem_cmd {
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__le32 addr_low;
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};
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/* This is the buffer for:
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* Suspend Nodes (indirect 0x0409)
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* Resume Nodes (indirect 0x040A)
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*/
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struct ice_aqc_suspend_resume_elem {
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__le32 teid[1];
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};
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struct ice_aqc_elem_info_bw {
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__le16 bw_profile_idx;
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__le16 bw_alloc;
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@ -756,14 +741,6 @@ struct ice_aqc_add_elem {
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struct ice_aqc_txsched_elem_data generic[1];
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};
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struct ice_aqc_conf_elem {
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struct ice_aqc_txsched_elem_data generic[1];
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};
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struct ice_aqc_get_elem {
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struct ice_aqc_txsched_elem_data generic[1];
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};
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struct ice_aqc_get_topo_elem {
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struct ice_aqc_txsched_topo_grp_info_hdr hdr;
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struct ice_aqc_txsched_elem_data
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@ -835,10 +812,6 @@ struct ice_aqc_rl_profile_elem {
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__le16 rl_encode;
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};
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struct ice_aqc_rl_profile_generic_elem {
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struct ice_aqc_rl_profile_elem generic[1];
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};
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/* Query Scheduler Resource Allocation (indirect 0x0412)
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* This indirect command retrieves the scheduler resources allocated by
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* EMP Firmware to the given PF.
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@ -1584,10 +1557,6 @@ struct ice_aqc_dis_txq_item {
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(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
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};
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struct ice_aqc_dis_txq {
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struct ice_aqc_dis_txq_item qgrps[1];
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};
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/* Configure Firmware Logging Command (indirect 0xFF09)
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* Logging Information Read Response (indirect 0xFF10)
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* Note: The 0xFF10 command has no input parameters.
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@ -1636,12 +1605,7 @@ enum ice_aqc_fw_logging_mod {
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ICE_AQC_FW_LOG_ID_MAX,
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};
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/* This is the buffer for both of the logging commands.
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* The entry array size depends on the datalen parameter in the descriptor.
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* There will be a total of datalen / 2 entries.
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*/
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struct ice_aqc_fw_logging_data {
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__le16 entry[1];
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/* Defines for both above FW logging command/response buffers */
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#define ICE_AQC_FW_LOG_ID_S 0
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#define ICE_AQC_FW_LOG_ID_M (0xFFF << ICE_AQC_FW_LOG_ID_S)
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@ -1654,7 +1618,6 @@ struct ice_aqc_fw_logging_data {
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#define ICE_AQC_FW_LOG_INIT_EN BIT(13) /* Used by command */
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#define ICE_AQC_FW_LOG_FLOW_EN BIT(14) /* Used by command */
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#define ICE_AQC_FW_LOG_ERR_EN BIT(15) /* Used by command */
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};
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/* Get/Clear FW Log (indirect 0xFF11) */
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struct ice_aqc_get_clear_fw_log {
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@ -440,30 +440,24 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
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devm_kfree(ice_hw_to_dev(hw), sw);
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}
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#define ICE_FW_LOG_DESC_SIZE(n) (sizeof(struct ice_aqc_fw_logging_data) + \
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(((n) - 1) * sizeof(((struct ice_aqc_fw_logging_data *)0)->entry)))
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#define ICE_FW_LOG_DESC_SIZE_MAX \
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ICE_FW_LOG_DESC_SIZE(ICE_AQC_FW_LOG_ID_MAX)
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/**
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* ice_get_fw_log_cfg - get FW logging configuration
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* @hw: pointer to the HW struct
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*/
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static enum ice_status ice_get_fw_log_cfg(struct ice_hw *hw)
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{
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struct ice_aqc_fw_logging_data *config;
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struct ice_aq_desc desc;
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enum ice_status status;
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__le16 *config;
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u16 size;
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size = ICE_FW_LOG_DESC_SIZE_MAX;
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size = sizeof(*config) * ICE_AQC_FW_LOG_ID_MAX;
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config = devm_kzalloc(ice_hw_to_dev(hw), size, GFP_KERNEL);
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if (!config)
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return ICE_ERR_NO_MEMORY;
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ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logging_info);
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desc.flags |= cpu_to_le16(ICE_AQ_FLAG_BUF);
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desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
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status = ice_aq_send_cmd(hw, &desc, config, size, NULL);
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@ -474,7 +468,7 @@ static enum ice_status ice_get_fw_log_cfg(struct ice_hw *hw)
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for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) {
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u16 v, m, flgs;
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v = le16_to_cpu(config->entry[i]);
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v = le16_to_cpu(config[i]);
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m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S;
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flgs = (v & ICE_AQC_FW_LOG_EN_M) >> ICE_AQC_FW_LOG_EN_S;
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@ -526,11 +520,11 @@ static enum ice_status ice_get_fw_log_cfg(struct ice_hw *hw)
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*/
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static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
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{
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struct ice_aqc_fw_logging_data *data = NULL;
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struct ice_aqc_fw_logging *cmd;
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enum ice_status status = 0;
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u16 i, chgs = 0, len = 0;
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struct ice_aq_desc desc;
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__le16 *data = NULL;
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u8 actv_evnts = 0;
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void *buf = NULL;
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@ -571,8 +565,9 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
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continue;
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if (!data) {
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data = devm_kzalloc(ice_hw_to_dev(hw),
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ICE_FW_LOG_DESC_SIZE_MAX,
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data = devm_kcalloc(ice_hw_to_dev(hw),
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sizeof(*data),
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ICE_AQC_FW_LOG_ID_MAX,
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GFP_KERNEL);
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if (!data)
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return ICE_ERR_NO_MEMORY;
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@ -580,7 +575,7 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
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val = i << ICE_AQC_FW_LOG_ID_S;
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val |= hw->fw_log.evnts[i].cfg << ICE_AQC_FW_LOG_EN_S;
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data->entry[chgs++] = cpu_to_le16(val);
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data[chgs++] = cpu_to_le16(val);
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}
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/* Only enable FW logging if at least one module is specified.
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@ -599,7 +594,7 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
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cmd->log_ctrl |= ICE_AQC_FW_LOG_UART_EN;
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buf = data;
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len = ICE_FW_LOG_DESC_SIZE(chgs);
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len = sizeof(*data) * chgs;
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desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
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}
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}
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@ -629,7 +624,7 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
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continue;
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}
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v = le16_to_cpu(data->entry[i]);
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v = le16_to_cpu(data[i]);
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m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S;
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hw->fw_log.evnts[m].cur = hw->fw_log.evnts[m].cfg;
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}
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@ -3690,14 +3685,14 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
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*/
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enum ice_status
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ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
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struct ice_aqc_get_elem *buf)
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struct ice_aqc_txsched_elem_data *buf)
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{
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u16 buf_size, num_elem_ret = 0;
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enum ice_status status;
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buf_size = sizeof(*buf);
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memset(buf, 0, buf_size);
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buf->generic[0].node_teid = cpu_to_le32(node_teid);
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buf->node_teid = cpu_to_le32(node_teid);
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status = ice_aq_query_sched_elems(hw, 1, buf, buf_size, &num_elem_ret,
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NULL);
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if (status || num_elem_ret != 1)
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@ -155,5 +155,5 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
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u64 *prev_stat, u64 *cur_stat);
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enum ice_status
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ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
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struct ice_aqc_get_elem *buf);
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struct ice_aqc_txsched_elem_data *buf);
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#endif /* _ICE_COMMON_H_ */
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@ -1362,7 +1362,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
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struct ice_aqc_port_ets_elem *buf)
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{
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struct ice_sched_node *node, *tc_node;
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struct ice_aqc_get_elem elem;
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struct ice_aqc_txsched_elem_data elem;
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enum ice_status status = 0;
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u32 teid1, teid2;
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u8 i, j;
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@ -1404,7 +1404,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
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/* new TC */
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status = ice_sched_query_elem(pi->hw, teid2, &elem);
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if (!status)
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status = ice_sched_add_node(pi, 1, &elem.generic[0]);
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status = ice_sched_add_node(pi, 1, &elem);
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if (status)
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break;
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/* update the TC number */
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@ -129,7 +129,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
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*/
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enum ice_status
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ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
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struct ice_aqc_get_elem *buf, u16 buf_size,
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struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
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u16 *elems_ret, struct ice_sq_cd *cd)
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{
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return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
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@ -149,8 +149,8 @@ enum ice_status
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ice_sched_add_node(struct ice_port_info *pi, u8 layer,
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struct ice_aqc_txsched_elem_data *info)
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{
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struct ice_aqc_txsched_elem_data elem;
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struct ice_sched_node *parent;
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struct ice_aqc_get_elem elem;
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struct ice_sched_node *node;
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enum ice_status status;
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struct ice_hw *hw;
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@ -195,7 +195,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
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node->parent = parent;
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node->tx_sched_layer = layer;
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parent->children[parent->num_children++] = node;
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memcpy(&node->info, &elem.generic[0], sizeof(node->info));
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node->info = elem;
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return 0;
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}
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@ -423,7 +423,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
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*/
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static enum ice_status
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ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
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struct ice_aqc_conf_elem *buf, u16 buf_size,
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struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
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u16 *elems_cfgd, struct ice_sq_cd *cd)
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{
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return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
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@ -443,8 +443,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
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* Suspend scheduling elements (0x0409)
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*/
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static enum ice_status
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ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
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struct ice_aqc_suspend_resume_elem *buf,
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ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
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u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
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{
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return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
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@ -464,8 +463,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
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* resume scheduling elements (0x040A)
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*/
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static enum ice_status
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ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
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struct ice_aqc_suspend_resume_elem *buf,
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ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
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u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
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{
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return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
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@ -506,9 +504,9 @@ static enum ice_status
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ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
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bool suspend)
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{
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struct ice_aqc_suspend_resume_elem *buf;
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u16 i, buf_size, num_elem_ret = 0;
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enum ice_status status;
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__le32 *buf;
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buf_size = sizeof(*buf) * num_nodes;
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buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL);
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@ -516,7 +514,7 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
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return ICE_ERR_NO_MEMORY;
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for (i = 0; i < num_nodes; i++)
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buf->teid[i] = cpu_to_le32(node_teids[i]);
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buf[i] = cpu_to_le32(node_teids[i]);
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if (suspend)
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status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
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@ -591,7 +589,7 @@ ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
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*/
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static enum ice_status
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ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
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u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,
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u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
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u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
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{
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struct ice_aqc_rl_profile *cmd;
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@ -622,13 +620,11 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
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*/
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static enum ice_status
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ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
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struct ice_aqc_rl_profile_generic_elem *buf,
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u16 buf_size, u16 *num_profiles_added,
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struct ice_sq_cd *cd)
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struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
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u16 *num_profiles_added, struct ice_sq_cd *cd)
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{
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return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,
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num_profiles, buf,
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buf_size, num_profiles_added, cd);
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return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
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buf, buf_size, num_profiles_added, cd);
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}
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/**
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@ -644,13 +640,12 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
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*/
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static enum ice_status
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ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
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struct ice_aqc_rl_profile_generic_elem *buf,
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u16 buf_size, u16 *num_profiles_removed,
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struct ice_sq_cd *cd)
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struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
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u16 *num_profiles_removed, struct ice_sq_cd *cd)
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{
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return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
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num_profiles, buf,
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buf_size, num_profiles_removed, cd);
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num_profiles, buf, buf_size,
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num_profiles_removed, cd);
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}
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/**
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@ -666,7 +661,7 @@ static enum ice_status
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ice_sched_del_rl_profile(struct ice_hw *hw,
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struct ice_aqc_rl_profile_info *rl_info)
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{
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struct ice_aqc_rl_profile_generic_elem *buf;
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struct ice_aqc_rl_profile_elem *buf;
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u16 num_profiles_removed;
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enum ice_status status;
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u16 num_profiles = 1;
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@ -675,8 +670,7 @@ ice_sched_del_rl_profile(struct ice_hw *hw,
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return ICE_ERR_IN_USE;
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/* Safe to remove profile ID */
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buf = (struct ice_aqc_rl_profile_generic_elem *)
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&rl_info->profile;
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buf = &rl_info->profile;
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status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
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&num_profiles_removed, NULL);
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if (status || num_profiles_removed != num_profiles)
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@ -1867,7 +1861,7 @@ static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
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* @node: pointer to node
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* @info: node info to update
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*
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* It updates the HW DB, and local SW DB of node. It updates the scheduling
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* Update the HW DB, and local SW DB of node. Update the scheduling
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* parameters of node from argument info data buffer (Info->data buf) and
|
||||
* returns success or error on config sched element failure. The caller
|
||||
* needs to hold scheduler lock.
|
||||
@ -1876,18 +1870,18 @@ static enum ice_status
|
||||
ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
|
||||
struct ice_aqc_txsched_elem_data *info)
|
||||
{
|
||||
struct ice_aqc_conf_elem buf;
|
||||
struct ice_aqc_txsched_elem_data buf;
|
||||
enum ice_status status;
|
||||
u16 elem_cfgd = 0;
|
||||
u16 num_elems = 1;
|
||||
|
||||
buf.generic[0] = *info;
|
||||
buf = *info;
|
||||
/* Parent TEID is reserved field in this aq call */
|
||||
buf.generic[0].parent_teid = 0;
|
||||
buf.parent_teid = 0;
|
||||
/* Element type is reserved field in this aq call */
|
||||
buf.generic[0].data.elem_type = 0;
|
||||
buf.data.elem_type = 0;
|
||||
/* Flags is reserved field in this aq call */
|
||||
buf.generic[0].data.flags = 0;
|
||||
buf.data.flags = 0;
|
||||
|
||||
/* Update HW DB */
|
||||
/* Configure element node */
|
||||
@ -2131,9 +2125,9 @@ static struct ice_aqc_rl_profile_info *
|
||||
ice_sched_add_rl_profile(struct ice_port_info *pi,
|
||||
enum ice_rl_type rl_type, u32 bw, u8 layer_num)
|
||||
{
|
||||
struct ice_aqc_rl_profile_generic_elem *buf;
|
||||
struct ice_aqc_rl_profile_info *rl_prof_elem;
|
||||
u16 profiles_added = 0, num_profiles = 1;
|
||||
struct ice_aqc_rl_profile_elem *buf;
|
||||
enum ice_status status;
|
||||
struct ice_hw *hw;
|
||||
u8 profile_type;
|
||||
@ -2182,8 +2176,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
|
||||
rl_prof_elem->profile.max_burst_size = cpu_to_le16(hw->max_burst_size);
|
||||
|
||||
/* Create new entry in HW DB */
|
||||
buf = (struct ice_aqc_rl_profile_generic_elem *)
|
||||
&rl_prof_elem->profile;
|
||||
buf = &rl_prof_elem->profile;
|
||||
status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
|
||||
&profiles_added, NULL);
|
||||
if (status || profiles_added != num_profiles)
|
||||
|
@ -56,7 +56,7 @@ struct ice_sched_agg_info {
|
||||
/* FW AQ command calls */
|
||||
enum ice_status
|
||||
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
|
||||
struct ice_aqc_get_elem *buf, u16 buf_size,
|
||||
struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
|
||||
u16 *elems_ret, struct ice_sq_cd *cd);
|
||||
enum ice_status ice_sched_init_port(struct ice_port_info *pi);
|
||||
enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);
|
||||
|
@ -87,7 +87,7 @@ enum ice_status ice_init_def_sw_recp(struct ice_hw *hw)
|
||||
* @num_elems: pointer to number of elements
|
||||
* @cd: pointer to command details structure or NULL
|
||||
*
|
||||
* Get switch configuration (0x0200) to be placed in 'buff'.
|
||||
* Get switch configuration (0x0200) to be placed in buf.
|
||||
* This admin command returns information such as initial VSI/port number
|
||||
* and switch ID it belongs to.
|
||||
*
|
||||
@ -104,13 +104,13 @@ enum ice_status ice_init_def_sw_recp(struct ice_hw *hw)
|
||||
* parsing the response buffer.
|
||||
*/
|
||||
static enum ice_status
|
||||
ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,
|
||||
ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,
|
||||
u16 buf_size, u16 *req_desc, u16 *num_elems,
|
||||
struct ice_sq_cd *cd)
|
||||
{
|
||||
struct ice_aqc_get_sw_cfg *cmd;
|
||||
enum ice_status status;
|
||||
struct ice_aq_desc desc;
|
||||
enum ice_status status;
|
||||
|
||||
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_sw_cfg);
|
||||
cmd = &desc.params.get_sw_conf;
|
||||
@ -550,7 +550,7 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,
|
||||
*/
|
||||
enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
|
||||
{
|
||||
struct ice_aqc_get_sw_cfg_resp *rbuf;
|
||||
struct ice_aqc_get_sw_cfg_resp_elem *rbuf;
|
||||
enum ice_status status;
|
||||
u16 req_desc = 0;
|
||||
u16 num_elems;
|
||||
@ -568,19 +568,19 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
|
||||
* writing a non-zero value in req_desc
|
||||
*/
|
||||
do {
|
||||
struct ice_aqc_get_sw_cfg_resp_elem *ele;
|
||||
|
||||
status = ice_aq_get_sw_cfg(hw, rbuf, ICE_SW_CFG_MAX_BUF_LEN,
|
||||
&req_desc, &num_elems, NULL);
|
||||
|
||||
if (status)
|
||||
break;
|
||||
|
||||
for (i = 0; i < num_elems; i++) {
|
||||
struct ice_aqc_get_sw_cfg_resp_elem *ele;
|
||||
for (i = 0, ele = rbuf; i < num_elems; i++, ele++) {
|
||||
u16 pf_vf_num, swid, vsi_port_num;
|
||||
bool is_vf = false;
|
||||
u8 res_type;
|
||||
|
||||
ele = rbuf[i].elements;
|
||||
vsi_port_num = le16_to_cpu(ele->vsi_port_num) &
|
||||
ICE_AQC_GET_SW_CONF_RESP_VSI_PORT_NUM_M;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user